| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | *  linux/arch/arm/mach-pxa/irq.c | 
|  | 3 | * | 
| eric miao | e3630db | 2008-03-04 11:42:26 +0800 | [diff] [blame] | 4 | *  Generic PXA IRQ handling | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | * | 
|  | 6 | *  Author:	Nicolas Pitre | 
|  | 7 | *  Created:	Jun 15, 2001 | 
|  | 8 | *  Copyright:	MontaVista Software Inc. | 
|  | 9 | * | 
|  | 10 | *  This program is free software; you can redistribute it and/or modify | 
|  | 11 | *  it under the terms of the GNU General Public License version 2 as | 
|  | 12 | *  published by the Free Software Foundation. | 
|  | 13 | */ | 
|  | 14 |  | 
|  | 15 | #include <linux/init.h> | 
|  | 16 | #include <linux/module.h> | 
|  | 17 | #include <linux/interrupt.h> | 
| eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 18 | #include <linux/sysdev.h> | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 |  | 
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 20 | #include <mach/hardware.h> | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 21 | #include <asm/irq.h> | 
|  | 22 | #include <asm/mach/irq.h> | 
| Eric Miao | a58fbcd | 2009-01-06 17:37:37 +0800 | [diff] [blame] | 23 | #include <mach/gpio.h> | 
| Eric Miao | 5bf3df3 | 2009-01-20 11:04:16 +0800 | [diff] [blame] | 24 | #include <mach/regs-intc.h> | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 |  | 
|  | 26 | #include "generic.h" | 
|  | 27 |  | 
| Haojian Zhuang | c482ae4 | 2009-11-02 14:02:21 -0500 | [diff] [blame] | 28 | #define MAX_INTERNAL_IRQS	128 | 
|  | 29 |  | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 30 | #define IRQ_BIT(n)	(((n) - PXA_IRQ(0)) & 0x1f) | 
|  | 31 | #define _ICMR(n)	(*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR)) | 
|  | 32 | #define _ICLR(n)	(*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR)) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 |  | 
|  | 34 | /* | 
|  | 35 | * This is for peripheral IRQs internal to the PXA chip. | 
|  | 36 | */ | 
|  | 37 |  | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 38 | static int pxa_internal_irq_nr; | 
|  | 39 |  | 
|  | 40 | static void pxa_mask_irq(unsigned int irq) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | { | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 42 | _ICMR(irq) &= ~(1 << IRQ_BIT(irq)); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | } | 
|  | 44 |  | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 45 | static void pxa_unmask_irq(unsigned int irq) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | { | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 47 | _ICMR(irq) |= 1 << IRQ_BIT(irq); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | } | 
|  | 49 |  | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 50 | static struct irq_chip pxa_internal_irq_chip = { | 
| David Brownell | 38c677c | 2006-08-01 22:26:25 +0100 | [diff] [blame] | 51 | .name		= "SC", | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 52 | .ack		= pxa_mask_irq, | 
|  | 53 | .mask		= pxa_mask_irq, | 
|  | 54 | .unmask		= pxa_unmask_irq, | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | }; | 
|  | 56 |  | 
| Eric Miao | a58fbcd | 2009-01-06 17:37:37 +0800 | [diff] [blame] | 57 | /* | 
|  | 58 | * GPIO IRQs for GPIO 0 and 1 | 
|  | 59 | */ | 
|  | 60 | static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type) | 
|  | 61 | { | 
|  | 62 | int gpio = irq - IRQ_GPIO0; | 
|  | 63 |  | 
|  | 64 | if (__gpio_is_occupied(gpio)) { | 
|  | 65 | pr_err("%s failed: GPIO is configured\n", __func__); | 
|  | 66 | return -EINVAL; | 
|  | 67 | } | 
|  | 68 |  | 
|  | 69 | if (type & IRQ_TYPE_EDGE_RISING) | 
|  | 70 | GRER0 |= GPIO_bit(gpio); | 
|  | 71 | else | 
|  | 72 | GRER0 &= ~GPIO_bit(gpio); | 
|  | 73 |  | 
|  | 74 | if (type & IRQ_TYPE_EDGE_FALLING) | 
|  | 75 | GFER0 |= GPIO_bit(gpio); | 
|  | 76 | else | 
|  | 77 | GFER0 &= ~GPIO_bit(gpio); | 
|  | 78 |  | 
|  | 79 | return 0; | 
|  | 80 | } | 
|  | 81 |  | 
|  | 82 | static void pxa_ack_low_gpio(unsigned int irq) | 
|  | 83 | { | 
|  | 84 | GEDR0 = (1 << (irq - IRQ_GPIO0)); | 
|  | 85 | } | 
|  | 86 |  | 
|  | 87 | static void pxa_mask_low_gpio(unsigned int irq) | 
|  | 88 | { | 
|  | 89 | ICMR &= ~(1 << (irq - PXA_IRQ(0))); | 
|  | 90 | } | 
|  | 91 |  | 
|  | 92 | static void pxa_unmask_low_gpio(unsigned int irq) | 
|  | 93 | { | 
|  | 94 | ICMR |= 1 << (irq - PXA_IRQ(0)); | 
|  | 95 | } | 
|  | 96 |  | 
|  | 97 | static struct irq_chip pxa_low_gpio_chip = { | 
|  | 98 | .name		= "GPIO-l", | 
|  | 99 | .ack		= pxa_ack_low_gpio, | 
|  | 100 | .mask		= pxa_mask_low_gpio, | 
|  | 101 | .unmask		= pxa_unmask_low_gpio, | 
|  | 102 | .set_type	= pxa_set_low_gpio_type, | 
|  | 103 | }; | 
|  | 104 |  | 
|  | 105 | static void __init pxa_init_low_gpio_irq(set_wake_t fn) | 
|  | 106 | { | 
|  | 107 | int irq; | 
|  | 108 |  | 
|  | 109 | /* clear edge detection on GPIO 0 and 1 */ | 
|  | 110 | GFER0 &= ~0x3; | 
|  | 111 | GRER0 &= ~0x3; | 
|  | 112 | GEDR0 = 0x3; | 
|  | 113 |  | 
|  | 114 | for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { | 
|  | 115 | set_irq_chip(irq, &pxa_low_gpio_chip); | 
|  | 116 | set_irq_handler(irq, handle_edge_irq); | 
|  | 117 | set_irq_flags(irq, IRQF_VALID); | 
|  | 118 | } | 
|  | 119 |  | 
|  | 120 | pxa_low_gpio_chip.set_wake = fn; | 
|  | 121 | } | 
|  | 122 |  | 
| eric miao | b9e25ac | 2008-03-04 14:19:58 +0800 | [diff] [blame] | 123 | void __init pxa_init_irq(int irq_nr, set_wake_t fn) | 
| Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 124 | { | 
| Haojian Zhuang | d2c3706 | 2009-08-19 19:49:31 +0800 | [diff] [blame] | 125 | int irq, i; | 
| Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 126 |  | 
| Haojian Zhuang | c482ae4 | 2009-11-02 14:02:21 -0500 | [diff] [blame] | 127 | BUG_ON(irq_nr > MAX_INTERNAL_IRQS); | 
|  | 128 |  | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 129 | pxa_internal_irq_nr = irq_nr; | 
| Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 130 |  | 
| Marc Zyngier | 57a7a62 | 2008-09-01 13:03:32 +0100 | [diff] [blame] | 131 | for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) { | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 132 | _ICMR(irq) = 0;	/* disable all IRQs */ | 
|  | 133 | _ICLR(irq) = 0;	/* all IRQs are IRQ, not FIQ */ | 
|  | 134 | } | 
| Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 135 |  | 
| Haojian Zhuang | d2c3706 | 2009-08-19 19:49:31 +0800 | [diff] [blame] | 136 | /* initialize interrupt priority */ | 
|  | 137 | if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { | 
|  | 138 | for (i = 0; i < irq_nr; i++) | 
|  | 139 | IPR(i) = i | (1 << 31); | 
|  | 140 | } | 
|  | 141 |  | 
| Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 142 | /* only unmasked interrupts kick us out of idle */ | 
|  | 143 | ICCR = 1; | 
|  | 144 |  | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 145 | for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) { | 
|  | 146 | set_irq_chip(irq, &pxa_internal_irq_chip); | 
| Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 147 | set_irq_handler(irq, handle_level_irq); | 
|  | 148 | set_irq_flags(irq, IRQF_VALID); | 
|  | 149 | } | 
| Eric Miao | 53665a5 | 2007-06-06 06:36:04 +0100 | [diff] [blame] | 150 |  | 
| eric miao | b9e25ac | 2008-03-04 14:19:58 +0800 | [diff] [blame] | 151 | pxa_internal_irq_chip.set_wake = fn; | 
| Eric Miao | a58fbcd | 2009-01-06 17:37:37 +0800 | [diff] [blame] | 152 | pxa_init_low_gpio_irq(fn); | 
| eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 153 | } | 
| eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 154 |  | 
|  | 155 | #ifdef CONFIG_PM | 
| Haojian Zhuang | c482ae4 | 2009-11-02 14:02:21 -0500 | [diff] [blame] | 156 | static unsigned long saved_icmr[MAX_INTERNAL_IRQS/32]; | 
|  | 157 | static unsigned long saved_ipr[MAX_INTERNAL_IRQS]; | 
| eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 158 |  | 
|  | 159 | static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) | 
|  | 160 | { | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 161 | int i, irq = PXA_IRQ(0); | 
|  | 162 |  | 
|  | 163 | for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { | 
|  | 164 | saved_icmr[i] = _ICMR(irq); | 
|  | 165 | _ICMR(irq) = 0; | 
| eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 166 | } | 
| Haojian Zhuang | c482ae4 | 2009-11-02 14:02:21 -0500 | [diff] [blame] | 167 | for (i = 0; i < pxa_internal_irq_nr; i++) | 
|  | 168 | saved_ipr[i] = IPR(i); | 
| eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 169 |  | 
|  | 170 | return 0; | 
|  | 171 | } | 
|  | 172 |  | 
|  | 173 | static int pxa_irq_resume(struct sys_device *dev) | 
|  | 174 | { | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 175 | int i, irq = PXA_IRQ(0); | 
|  | 176 |  | 
|  | 177 | for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { | 
|  | 178 | _ICMR(irq) = saved_icmr[i]; | 
|  | 179 | _ICLR(irq) = 0; | 
| eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 180 | } | 
| Haojian Zhuang | c482ae4 | 2009-11-02 14:02:21 -0500 | [diff] [blame] | 181 | for (i = 0; i < pxa_internal_irq_nr; i++) | 
|  | 182 | IPR(i) = saved_ipr[i]; | 
| eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 183 |  | 
| eric miao | f6fb7af | 2008-03-04 13:53:05 +0800 | [diff] [blame] | 184 | ICCR = 1; | 
| eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 185 | return 0; | 
|  | 186 | } | 
|  | 187 | #else | 
|  | 188 | #define pxa_irq_suspend		NULL | 
|  | 189 | #define pxa_irq_resume		NULL | 
|  | 190 | #endif | 
|  | 191 |  | 
|  | 192 | struct sysdev_class pxa_irq_sysclass = { | 
|  | 193 | .name		= "irq", | 
|  | 194 | .suspend	= pxa_irq_suspend, | 
|  | 195 | .resume		= pxa_irq_resume, | 
|  | 196 | }; | 
|  | 197 |  | 
|  | 198 | static int __init pxa_irq_init(void) | 
|  | 199 | { | 
|  | 200 | return sysdev_class_register(&pxa_irq_sysclass); | 
|  | 201 | } | 
|  | 202 |  | 
|  | 203 | core_initcall(pxa_irq_init); |