| Nobuhiro Iwamatsu | 4cec1a3 | 2008-06-06 17:04:56 +0900 | [diff] [blame] | 1 | /* | 
|  | 2 | * linux/arch/sh/boards/renesas/sh7763rdp/irq.c | 
|  | 3 | * | 
|  | 4 | * Renesas Solutions SH7763RDP Support. | 
|  | 5 | * | 
|  | 6 | * Copyright (C) 2008 Renesas Solutions Corp. | 
|  | 7 | * Copyright (C) 2008  Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> | 
|  | 8 | * | 
|  | 9 | * This file is subject to the terms and conditions of the GNU General Public | 
|  | 10 | * License.  See the file "COPYING" in the main directory of this archive | 
|  | 11 | * for more details. | 
|  | 12 | */ | 
|  | 13 |  | 
|  | 14 | #include <linux/init.h> | 
|  | 15 | #include <linux/irq.h> | 
|  | 16 | #include <asm/io.h> | 
|  | 17 | #include <asm/irq.h> | 
| Paul Mundt | 7639a45 | 2008-10-20 13:02:48 +0900 | [diff] [blame] | 18 | #include <mach/sh7763rdp.h> | 
| Nobuhiro Iwamatsu | 4cec1a3 | 2008-06-06 17:04:56 +0900 | [diff] [blame] | 19 |  | 
|  | 20 | #define INTC_BASE		(0xFFD00000) | 
|  | 21 | #define INTC_INT2PRI7   (INTC_BASE+0x4001C) | 
|  | 22 | #define INTC_INT2MSKCR	(INTC_BASE+0x4003C) | 
|  | 23 | #define INTC_INT2MSKCR1	(INTC_BASE+0x400D4) | 
|  | 24 |  | 
|  | 25 | /* | 
|  | 26 | * Initialize IRQ setting | 
|  | 27 | */ | 
|  | 28 | void __init init_sh7763rdp_IRQ(void) | 
|  | 29 | { | 
|  | 30 | /* GPIO enabled */ | 
|  | 31 | ctrl_outl(1 << 25, INTC_INT2MSKCR); | 
|  | 32 |  | 
|  | 33 | /* enable GPIO interrupts */ | 
|  | 34 | ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, | 
|  | 35 | INTC_INT2PRI7); | 
|  | 36 |  | 
|  | 37 | /* USBH enabled */ | 
|  | 38 | ctrl_outl(1 << 17, INTC_INT2MSKCR1); | 
|  | 39 |  | 
|  | 40 | /* GETHER enabled */ | 
|  | 41 | ctrl_outl(1 << 16, INTC_INT2MSKCR1); | 
|  | 42 |  | 
|  | 43 | /* DMAC enabled */ | 
|  | 44 | ctrl_outl(1 << 8, INTC_INT2MSKCR); | 
|  | 45 | } |