| Ido Shayevitz | ef72ddd | 2012-03-28 18:55:55 +0200 | [diff] [blame^] | 1 | MSM SuperSpeed USB3.0 SoC controller |
| 2 | |
| 3 | Required properties : |
| 4 | - compatible : should be "qcom,dwc-usb3-msm" |
| 5 | - reg : offset and length of the register set in the memory map |
| 6 | - interrupts: IRQ line |
| 7 | - qcom,dwc-usb3-msm-dbm-eps: Number of endpoints avaliable for |
| 8 | the DBM (Device Bus Manager). The DBM is HW unit which is part of |
| 9 | the MSM USB3.0 core (which also includes the Synopsys DesignWare |
| 10 | USB3.0 controller) |
| 11 | |
| 12 | Example MSM USB3.0 controller device node : |
| 13 | usb@f9200000 { |
| 14 | compatible = "qcom,dwc-usb3-msm"; |
| 15 | reg = <0xf9200000 0xCCFF>; |
| 16 | interrupts = <0 131 0> |
| 17 | qcom,dwc-usb3-msm-dbm-eps = <4> |
| 18 | }; |