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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Marc Zyngier89bdafd12011-12-22 11:39:20 +053056#include <asm/hardware/gic.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080059#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#include <mach/irqs.h>
61#include <mach/msm_spi.h>
62#include <mach/msm_serial_hs.h>
63#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080064#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070065#include <mach/msm_memtypes.h>
66#include <asm/mach/mmc.h>
67#include <mach/msm_battery.h>
68#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070069#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#ifdef CONFIG_MSM_DSPS
71#include <mach/msm_dsps.h>
72#endif
73#include <mach/msm_xo.h>
74#include <mach/msm_bus_board.h>
75#include <mach/socinfo.h>
76#include <linux/i2c/isl9519.h>
77#ifdef CONFIG_USB_G_ANDROID
78#include <linux/usb/android.h>
79#include <mach/usbdiag.h>
80#endif
81#include <linux/regulator/consumer.h>
82#include <linux/regulator/machine.h>
83#include <mach/sdio_al.h>
84#include <mach/rpm.h>
85#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070086#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053087#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089#include "devices.h"
90#include "devices-msm8x60.h"
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080091#include <mach/cpuidle.h>
92#include <mach/pm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093#include "mpm.h"
94#include "spm.h"
95#include "rpm_log.h"
96#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#include "gpiomux-8x60.h"
98#include "rpm_stats.h"
99#include "peripheral-loader.h"
100#include <linux/platform_data/qcom_crypto_device.h>
101#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700102#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600103#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700104
105#include <linux/ion.h>
106#include <mach/ion.h>
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109#define MDM2AP_SYNC 129
110
Terence Hampson1c73fef2011-07-19 17:10:49 -0400111#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define LCDC_SPI_GPIO_CLK 73
113#define LCDC_SPI_GPIO_CS 72
114#define LCDC_SPI_GPIO_MOSI 70
115#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
116#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
117#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
118#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
119#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400120#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700122#define PANEL_NAME_MAX_LEN 30
123#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
124#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
125#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
126#define HDMI_PANEL_NAME "hdmi_msm"
127#define TVOUT_PANEL_NAME "tvout_msm"
128
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700129#define DSPS_PIL_GENERIC_NAME "dsps"
130#define DSPS_PIL_FLUID_NAME "dsps_fluid"
131
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800132#ifdef CONFIG_ION_MSM
133static struct platform_device ion_dev;
134#endif
135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136enum {
137 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530138 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700139 /* CORE expander */
140 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
141 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
142 GPIO_WLAN_DEEP_SLEEP_N,
143 GPIO_LVDS_SHUTDOWN_N,
144 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
145 GPIO_MS_SYS_RESET_N,
146 GPIO_CAP_TS_RESOUT_N,
147 GPIO_CAP_GAUGE_BI_TOUT,
148 GPIO_ETHERNET_PME,
149 GPIO_EXT_GPS_LNA_EN,
150 GPIO_MSM_WAKES_BT,
151 GPIO_ETHERNET_RESET_N,
152 GPIO_HEADSET_DET_N,
153 GPIO_USB_UICC_EN,
154 GPIO_BACKLIGHT_EN,
155 GPIO_EXT_CAMIF_PWR_EN,
156 GPIO_BATT_GAUGE_INT_N,
157 GPIO_BATT_GAUGE_EN,
158 /* DOCKING expander */
159 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
160 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
161 GPIO_AUX_JTAG_DET_N,
162 GPIO_DONGLE_DET_N,
163 GPIO_SVIDEO_LOAD_DET,
164 GPIO_SVID_AMP_SHUTDOWN1_N,
165 GPIO_SVID_AMP_SHUTDOWN0_N,
166 GPIO_SDC_WP,
167 GPIO_IRDA_PWDN,
168 GPIO_IRDA_RESET_N,
169 GPIO_DONGLE_GPIO0,
170 GPIO_DONGLE_GPIO1,
171 GPIO_DONGLE_GPIO2,
172 GPIO_DONGLE_GPIO3,
173 GPIO_DONGLE_PWR_EN,
174 GPIO_EMMC_RESET_N,
175 GPIO_TP_EXP2_IO15,
176 /* SURF expander */
177 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
178 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
179 GPIO_SD_CARD_DET_2,
180 GPIO_SD_CARD_DET_4,
181 GPIO_SD_CARD_DET_5,
182 GPIO_UIM3_RST,
183 GPIO_SURF_EXPANDER_IO5,
184 GPIO_SURF_EXPANDER_IO6,
185 GPIO_ADC_I2C_EN,
186 GPIO_SURF_EXPANDER_IO8,
187 GPIO_SURF_EXPANDER_IO9,
188 GPIO_SURF_EXPANDER_IO10,
189 GPIO_SURF_EXPANDER_IO11,
190 GPIO_SURF_EXPANDER_IO12,
191 GPIO_SURF_EXPANDER_IO13,
192 GPIO_SURF_EXPANDER_IO14,
193 GPIO_SURF_EXPANDER_IO15,
194 /* LEFT KB IO expander */
195 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
196 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
197 GPIO_LEFT_LED_2,
198 GPIO_LEFT_LED_3,
199 GPIO_LEFT_LED_WLAN,
200 GPIO_JOYSTICK_EN,
201 GPIO_CAP_TS_SLEEP,
202 GPIO_LEFT_KB_IO6,
203 GPIO_LEFT_LED_5,
204 /* RIGHT KB IO expander */
205 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
206 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
207 GPIO_RIGHT_LED_2,
208 GPIO_RIGHT_LED_3,
209 GPIO_RIGHT_LED_BT,
210 GPIO_WEB_CAMIF_STANDBY,
211 GPIO_COMPASS_RST_N,
212 GPIO_WEB_CAMIF_RESET_N,
213 GPIO_RIGHT_LED_5,
214 GPIO_R_ALTIMETER_RESET_N,
215 /* FLUID S IO expander */
216 GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
218 GPIO_MIC1_ANCL_SEL,
219 GPIO_HS_MIC4_SEL,
220 GPIO_FML_MIC3_SEL,
221 GPIO_FMR_MIC5_SEL,
222 GPIO_TS_SLEEP,
223 GPIO_HAP_SHIFT_LVL_OE,
224 GPIO_HS_SW_DIR,
225 /* FLUID N IO expander */
226 GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
228 GPIO_EPM_5V_BOOST_EN,
229 GPIO_AUX_CAM_2P7_EN,
230 GPIO_LED_FLASH_EN,
231 GPIO_LED1_GREEN_N,
232 GPIO_LED2_RED_N,
233 GPIO_FRONT_CAM_RESET_N,
234 GPIO_EPM_LVLSFT_EN,
235 GPIO_N_ALTIMETER_RESET_N,
236 /* EPM expander */
237 GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
239 GPIO_PWR_MON_RESET_N,
240 GPIO_ADC1_PWDN_N,
241 GPIO_ADC2_PWDN_N,
242 GPIO_EPM_EXPANDER_IO4,
243 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
244 GPIO_ADC2_MUX_SPI_INT_N,
245 GPIO_EPM_EXPANDER_IO7,
246 GPIO_PWR_MON_ENABLE,
247 GPIO_EPM_SPI_ADC1_CS_N,
248 GPIO_EPM_SPI_ADC2_CS_N,
249 GPIO_EPM_EXPANDER_IO11,
250 GPIO_EPM_EXPANDER_IO12,
251 GPIO_EPM_EXPANDER_IO13,
252 GPIO_EPM_EXPANDER_IO14,
253 GPIO_EPM_EXPANDER_IO15,
254};
255
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530256struct pm8xxx_mpp_init_info {
257 unsigned mpp;
258 struct pm8xxx_mpp_config_data config;
259};
260
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530261#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530262{ \
263 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
264 .config = { \
265 .type = PM8XXX_MPP_TYPE_##_type, \
266 .level = _level, \
267 .control = PM8XXX_MPP_##_control, \
268 } \
269}
270
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530271#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
272{ \
273 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
274 .config = { \
275 .type = PM8XXX_MPP_TYPE_##_type, \
276 .level = _level, \
277 .control = PM8XXX_MPP_##_control, \
278 } \
279}
280
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700281/*
282 * The UI_INTx_N lines are pmic gpio lines which connect i2c
283 * gpio expanders to the pm8058.
284 */
285#define UI_INT1_N 25
286#define UI_INT2_N 34
287#define UI_INT3_N 14
288/*
289FM GPIO is GPIO 18 on PMIC 8058.
290As the index starts from 0 in the PMIC driver, and hence 17
291corresponds to GPIO 18 on PMIC 8058.
292*/
293#define FM_GPIO 17
294
295#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
296static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
297static void *sdc2_status_notify_cb_devid;
298#endif
299
300#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
301static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
302static void *sdc5_status_notify_cb_devid;
303#endif
304
305static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
306 [0] = {
307 .reg_base_addr = MSM_SAW0_BASE,
308
309#ifdef CONFIG_MSM_AVS_HW
310 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
311#endif
312 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
315 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
316
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
319 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
320
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
322 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
323 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
324
325 .awake_vlevel = 0x94,
326 .retention_vlevel = 0x81,
327 .collapse_vlevel = 0x20,
328 .retention_mid_vlevel = 0x94,
329 .collapse_mid_vlevel = 0x8C,
330
331 .vctl_timeout_us = 50,
332 },
333
334 [1] = {
335 .reg_base_addr = MSM_SAW1_BASE,
336
337#ifdef CONFIG_MSM_AVS_HW
338 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
339#endif
340 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
343 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
344
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
347 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
348
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
350 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
351 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
352
353 .awake_vlevel = 0x94,
354 .retention_vlevel = 0x81,
355 .collapse_vlevel = 0x20,
356 .retention_mid_vlevel = 0x94,
357 .collapse_mid_vlevel = 0x8C,
358
359 .vctl_timeout_us = 50,
360 },
361};
362
363static struct msm_spm_platform_data msm_spm_data[] __initdata = {
364 [0] = {
365 .reg_base_addr = MSM_SAW0_BASE,
366
367#ifdef CONFIG_MSM_AVS_HW
368 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
369#endif
370 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
373 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
374
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
377 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
378
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
380 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
381 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
382
383 .awake_vlevel = 0xA0,
384 .retention_vlevel = 0x89,
385 .collapse_vlevel = 0x20,
386 .retention_mid_vlevel = 0x89,
387 .collapse_mid_vlevel = 0x89,
388
389 .vctl_timeout_us = 50,
390 },
391
392 [1] = {
393 .reg_base_addr = MSM_SAW1_BASE,
394
395#ifdef CONFIG_MSM_AVS_HW
396 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
397#endif
398 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
401 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
402
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
405 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
406
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
408 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
409 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
410
411 .awake_vlevel = 0xA0,
412 .retention_vlevel = 0x89,
413 .collapse_vlevel = 0x20,
414 .retention_mid_vlevel = 0x89,
415 .collapse_mid_vlevel = 0x89,
416
417 .vctl_timeout_us = 50,
418 },
419};
420
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700421/*
422 * Consumer specific regulator names:
423 * regulator name consumer dev_name
424 */
425static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
426 REGULATOR_SUPPLY("8901_s0", NULL),
427};
428static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
429 REGULATOR_SUPPLY("8901_s1", NULL),
430};
431
432static struct regulator_init_data saw_s0_init_data = {
433 .constraints = {
434 .name = "8901_s0",
435 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700436 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 .max_uV = 1250000,
438 },
439 .consumer_supplies = vreg_consumers_8901_S0,
440 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
441};
442
443static struct regulator_init_data saw_s1_init_data = {
444 .constraints = {
445 .name = "8901_s1",
446 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700447 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448 .max_uV = 1250000,
449 },
450 .consumer_supplies = vreg_consumers_8901_S1,
451 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
452};
453
454static struct platform_device msm_device_saw_s0 = {
455 .name = "saw-regulator",
456 .id = 0,
457 .dev = {
458 .platform_data = &saw_s0_init_data,
459 },
460};
461
462static struct platform_device msm_device_saw_s1 = {
463 .name = "saw-regulator",
464 .id = 1,
465 .dev = {
466 .platform_data = &saw_s1_init_data,
467 },
468};
469
470/*
471 * The smc91x configuration varies depending on platform.
472 * The resources data structure is filled in at runtime.
473 */
474static struct resource smc91x_resources[] = {
475 [0] = {
476 .flags = IORESOURCE_MEM,
477 },
478 [1] = {
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static struct platform_device smc91x_device = {
484 .name = "smc91x",
485 .id = 0,
486 .num_resources = ARRAY_SIZE(smc91x_resources),
487 .resource = smc91x_resources,
488};
489
490static struct resource smsc911x_resources[] = {
491 [0] = {
492 .flags = IORESOURCE_MEM,
493 .start = 0x1b800000,
494 .end = 0x1b8000ff
495 },
496 [1] = {
497 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
498 },
499};
500
501static struct smsc911x_platform_config smsc911x_config = {
502 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
503 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
504 .flags = SMSC911X_USE_16BIT,
505 .has_reset_gpio = 1,
506 .reset_gpio = GPIO_ETHERNET_RESET_N
507};
508
509static struct platform_device smsc911x_device = {
510 .name = "smsc911x",
511 .id = 0,
512 .num_resources = ARRAY_SIZE(smsc911x_resources),
513 .resource = smsc911x_resources,
514 .dev = {
515 .platform_data = &smsc911x_config
516 }
517};
518
519#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
520 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
522 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
523
524#define QCE_SIZE 0x10000
525#define QCE_0_BASE 0x18500000
526
527#define QCE_HW_KEY_SUPPORT 0
528#define QCE_SHA_HMAC_SUPPORT 0
529#define QCE_SHARE_CE_RESOURCE 2
530#define QCE_CE_SHARED 1
531
532static struct resource qcrypto_resources[] = {
533 [0] = {
534 .start = QCE_0_BASE,
535 .end = QCE_0_BASE + QCE_SIZE - 1,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .name = "crypto_channels",
540 .start = DMOV_CE_IN_CHAN,
541 .end = DMOV_CE_OUT_CHAN,
542 .flags = IORESOURCE_DMA,
543 },
544 [2] = {
545 .name = "crypto_crci_in",
546 .start = DMOV_CE_IN_CRCI,
547 .end = DMOV_CE_IN_CRCI,
548 .flags = IORESOURCE_DMA,
549 },
550 [3] = {
551 .name = "crypto_crci_out",
552 .start = DMOV_CE_OUT_CRCI,
553 .end = DMOV_CE_OUT_CRCI,
554 .flags = IORESOURCE_DMA,
555 },
556 [4] = {
557 .name = "crypto_crci_hash",
558 .start = DMOV_CE_HASH_CRCI,
559 .end = DMOV_CE_HASH_CRCI,
560 .flags = IORESOURCE_DMA,
561 },
562};
563
564static struct resource qcedev_resources[] = {
565 [0] = {
566 .start = QCE_0_BASE,
567 .end = QCE_0_BASE + QCE_SIZE - 1,
568 .flags = IORESOURCE_MEM,
569 },
570 [1] = {
571 .name = "crypto_channels",
572 .start = DMOV_CE_IN_CHAN,
573 .end = DMOV_CE_OUT_CHAN,
574 .flags = IORESOURCE_DMA,
575 },
576 [2] = {
577 .name = "crypto_crci_in",
578 .start = DMOV_CE_IN_CRCI,
579 .end = DMOV_CE_IN_CRCI,
580 .flags = IORESOURCE_DMA,
581 },
582 [3] = {
583 .name = "crypto_crci_out",
584 .start = DMOV_CE_OUT_CRCI,
585 .end = DMOV_CE_OUT_CRCI,
586 .flags = IORESOURCE_DMA,
587 },
588 [4] = {
589 .name = "crypto_crci_hash",
590 .start = DMOV_CE_HASH_CRCI,
591 .end = DMOV_CE_HASH_CRCI,
592 .flags = IORESOURCE_DMA,
593 },
594};
595
596#endif
597
598#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
599 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
600
601static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
602 .ce_shared = QCE_CE_SHARED,
603 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
604 .hw_key_support = QCE_HW_KEY_SUPPORT,
605 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800606 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700607};
608
609static struct platform_device qcrypto_device = {
610 .name = "qcrypto",
611 .id = 0,
612 .num_resources = ARRAY_SIZE(qcrypto_resources),
613 .resource = qcrypto_resources,
614 .dev = {
615 .coherent_dma_mask = DMA_BIT_MASK(32),
616 .platform_data = &qcrypto_ce_hw_suppport,
617 },
618};
619#endif
620
621#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
622 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
623
624static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
625 .ce_shared = QCE_CE_SHARED,
626 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
627 .hw_key_support = QCE_HW_KEY_SUPPORT,
628 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800629 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700630};
631
632static struct platform_device qcedev_device = {
633 .name = "qce",
634 .id = 0,
635 .num_resources = ARRAY_SIZE(qcedev_resources),
636 .resource = qcedev_resources,
637 .dev = {
638 .coherent_dma_mask = DMA_BIT_MASK(32),
639 .platform_data = &qcedev_ce_hw_suppport,
640 },
641};
642#endif
643
644#if defined(CONFIG_HAPTIC_ISA1200) || \
645 defined(CONFIG_HAPTIC_ISA1200_MODULE)
646
647static const char *vregs_isa1200_name[] = {
648 "8058_s3",
649 "8901_l4",
650};
651
652static const int vregs_isa1200_val[] = {
653 1800000,/* uV */
654 2600000,
655};
656static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
657static struct msm_xo_voter *xo_handle_a1;
658
659static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800660{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700661 int i, rc = 0;
662
663 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
664 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
665 regulator_disable(vregs_isa1200[i]);
666 if (rc < 0) {
667 pr_err("%s: vreg %s %s failed (%d)\n",
668 __func__, vregs_isa1200_name[i],
669 vreg_on ? "enable" : "disable", rc);
670 goto vreg_fail;
671 }
672 }
673
674 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
675 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
676 if (rc < 0) {
677 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
678 __func__, vreg_on ? "" : "de-", rc);
679 goto vreg_fail;
680 }
681 return 0;
682
683vreg_fail:
684 while (i--)
685 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
686 regulator_disable(vregs_isa1200[i]);
687 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800688}
689
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700690static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800691{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700692 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700694 if (enable == true) {
695 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
696 vregs_isa1200[i] = regulator_get(NULL,
697 vregs_isa1200_name[i]);
698 if (IS_ERR(vregs_isa1200[i])) {
699 pr_err("%s: regulator get of %s failed (%ld)\n",
700 __func__, vregs_isa1200_name[i],
701 PTR_ERR(vregs_isa1200[i]));
702 rc = PTR_ERR(vregs_isa1200[i]);
703 goto vreg_get_fail;
704 }
705 rc = regulator_set_voltage(vregs_isa1200[i],
706 vregs_isa1200_val[i], vregs_isa1200_val[i]);
707 if (rc) {
708 pr_err("%s: regulator_set_voltage(%s) failed\n",
709 __func__, vregs_isa1200_name[i]);
710 goto vreg_get_fail;
711 }
712 }
Steve Muckle9161d302010-02-11 11:50:40 -0800713
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700714 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
715 if (rc) {
716 pr_err("%s: unable to request gpio %d (%d)\n",
717 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
718 goto vreg_get_fail;
719 }
Steve Muckle9161d302010-02-11 11:50:40 -0800720
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700721 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
722 if (rc) {
723 pr_err("%s: Unable to set direction\n", __func__);;
724 goto free_gpio;
725 }
726
727 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
728 if (IS_ERR(xo_handle_a1)) {
729 rc = PTR_ERR(xo_handle_a1);
730 pr_err("%s: failed to get the handle for A1(%d)\n",
731 __func__, rc);
732 goto gpio_set_dir;
733 }
734 } else {
735 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
736 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
737
738 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
739 regulator_put(vregs_isa1200[i]);
740
741 msm_xo_put(xo_handle_a1);
742 }
743
744 return 0;
745gpio_set_dir:
746 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
747free_gpio:
748 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
749vreg_get_fail:
750 while (i)
751 regulator_put(vregs_isa1200[--i]);
752 return rc;
753}
754
755#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530756#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700757static struct isa1200_platform_data isa1200_1_pdata = {
758 .name = "vibrator",
759 .power_on = isa1200_power,
760 .dev_setup = isa1200_dev_setup,
761 /*gpio to enable haptic*/
762 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530763 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700764 .max_timeout = 15000,
765 .mode_ctrl = PWM_GEN_MODE,
766 .pwm_fd = {
767 .pwm_div = 256,
768 },
769 .is_erm = false,
770 .smart_en = true,
771 .ext_clk_en = true,
772 .chip_en = 1,
773};
774
775static struct i2c_board_info msm_isa1200_board_info[] = {
776 {
777 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
778 .platform_data = &isa1200_1_pdata,
779 },
780};
781#endif
782
783#if defined(CONFIG_BATTERY_BQ27520) || \
784 defined(CONFIG_BATTERY_BQ27520_MODULE)
785static struct bq27520_platform_data bq27520_pdata = {
786 .name = "fuel-gauge",
787 .vreg_name = "8058_s3",
788 .vreg_value = 1800000,
789 .soc_int = GPIO_BATT_GAUGE_INT_N,
790 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
791 .chip_en = GPIO_BATT_GAUGE_EN,
792 .enable_dlog = 0, /* if enable coulomb counter logger */
793};
794
795static struct i2c_board_info msm_bq27520_board_info[] = {
796 {
797 I2C_BOARD_INFO("bq27520", 0xaa>>1),
798 .platform_data = &bq27520_pdata,
799 },
800};
801#endif
802
803static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
804 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
805 .idle_supported = 1,
806 .suspend_supported = 1,
807 .idle_enabled = 0,
808 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700809 },
810
811 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
812 .idle_supported = 1,
813 .suspend_supported = 1,
814 .idle_enabled = 0,
815 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700816 },
817
818 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
819 .idle_supported = 1,
820 .suspend_supported = 1,
821 .idle_enabled = 1,
822 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700823 },
824
825 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
826 .idle_supported = 1,
827 .suspend_supported = 1,
828 .idle_enabled = 0,
829 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700830 },
831
832 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
833 .idle_supported = 1,
834 .suspend_supported = 1,
835 .idle_enabled = 0,
836 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700837 },
838
839 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
840 .idle_supported = 1,
841 .suspend_supported = 1,
842 .idle_enabled = 1,
843 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700844 },
845};
846
847static struct msm_cpuidle_state msm_cstates[] __initdata = {
848 {0, 0, "C0", "WFI",
849 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
850
851 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
853
854 {0, 2, "C2", "POWER_COLLAPSE",
855 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
856
857 {1, 0, "C0", "WFI",
858 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
859
860 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
861 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
862};
863
864static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
865 {
866 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
867 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
868 true,
869 1, 8000, 100000, 1,
870 },
871
872 {
873 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
874 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
875 true,
876 1500, 5000, 60100000, 3000,
877 },
878
879 {
880 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
881 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
882 false,
883 1800, 5000, 60350000, 3500,
884 },
885 {
886 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
887 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
888 false,
889 3800, 4500, 65350000, 5500,
890 },
891
892 {
893 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
894 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
895 false,
896 2800, 2500, 66850000, 4800,
897 },
898
899 {
900 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
901 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
902 false,
903 4800, 2000, 71850000, 6800,
904 },
905
906 {
907 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
908 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
909 false,
910 6800, 500, 75850000, 8800,
911 },
912
913 {
914 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
915 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
916 false,
917 7800, 0, 76350000, 9800,
918 },
919};
920
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600921static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
922 .mode = MSM_PM_BOOT_CONFIG_TZ,
923};
924
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700925#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
926
927#define ISP1763_INT_GPIO 117
928#define ISP1763_RST_GPIO 152
929static struct resource isp1763_resources[] = {
930 [0] = {
931 .flags = IORESOURCE_MEM,
932 .start = 0x1D000000,
933 .end = 0x1D005FFF, /* 24KB */
934 },
935 [1] = {
936 .flags = IORESOURCE_IRQ,
937 },
938};
939static void __init msm8x60_cfg_isp1763(void)
940{
941 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
942 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
943}
944
945static int isp1763_setup_gpio(int enable)
946{
947 int status = 0;
948
949 if (enable) {
950 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
951 if (status) {
952 pr_err("%s:Failed to request GPIO %d\n",
953 __func__, ISP1763_INT_GPIO);
954 return status;
955 }
956 status = gpio_direction_input(ISP1763_INT_GPIO);
957 if (status) {
958 pr_err("%s:Failed to configure GPIO %d\n",
959 __func__, ISP1763_INT_GPIO);
960 goto gpio_free_int;
961 }
962 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
963 if (status) {
964 pr_err("%s:Failed to request GPIO %d\n",
965 __func__, ISP1763_RST_GPIO);
966 goto gpio_free_int;
967 }
968 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
969 if (status) {
970 pr_err("%s:Failed to configure GPIO %d\n",
971 __func__, ISP1763_RST_GPIO);
972 goto gpio_free_rst;
973 }
974 pr_debug("\nISP GPIO configuration done\n");
975 return status;
976 }
977
978gpio_free_rst:
979 gpio_free(ISP1763_RST_GPIO);
980gpio_free_int:
981 gpio_free(ISP1763_INT_GPIO);
982
983 return status;
984}
985static struct isp1763_platform_data isp1763_pdata = {
986 .reset_gpio = ISP1763_RST_GPIO,
987 .setup_gpio = isp1763_setup_gpio
988};
989
990static struct platform_device isp1763_device = {
991 .name = "isp1763_usb",
992 .num_resources = ARRAY_SIZE(isp1763_resources),
993 .resource = isp1763_resources,
994 .dev = {
995 .platform_data = &isp1763_pdata
996 }
997};
998#endif
999
1000#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301001static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001002static struct regulator *ldo6_3p3;
1003static struct regulator *ldo7_1p8;
1004static struct regulator *vdd_cx;
1005#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301006#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001007notify_vbus_state notify_vbus_state_func_ptr;
1008static int usb_phy_susp_dig_vol = 750000;
1009static int pmic_id_notif_supported;
1010
1011#ifdef CONFIG_USB_EHCI_MSM_72K
1012#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1013struct delayed_work pmic_id_det;
1014
1015static int __init usb_id_pin_rework_setup(char *support)
1016{
1017 if (strncmp(support, "true", 4) == 0)
1018 pmic_id_notif_supported = 1;
1019
1020 return 1;
1021}
1022__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1023
1024static void pmic_id_detect(struct work_struct *w)
1025{
1026 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1027 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1028
1029 if (notify_vbus_state_func_ptr)
1030 (*notify_vbus_state_func_ptr) (val);
1031}
1032
1033static irqreturn_t pmic_id_on_irq(int irq, void *data)
1034{
1035 /*
1036 * Spurious interrupts are observed on pmic gpio line
1037 * even though there is no state change on USB ID. Schedule the
1038 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001039 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001040 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001041
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001042 return IRQ_HANDLED;
1043}
1044
Anji jonnalaae745e92011-11-14 18:34:31 +05301045static int msm_hsusb_phy_id_setup_init(int init)
1046{
1047 unsigned ret;
1048
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301049 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1050 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1051 .level = PM8901_MPP_DIG_LEVEL_L5,
1052 };
1053
Anji jonnalaae745e92011-11-14 18:34:31 +05301054 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301055 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1056 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1057 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301058 if (ret < 0)
1059 pr_err("%s:MPP2 configuration failed\n", __func__);
1060 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301061 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1062 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1063 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301064 if (ret < 0)
1065 pr_err("%s:MPP2 un config failed\n", __func__);
1066 }
1067 return ret;
1068}
1069
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001070static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1071{
1072 unsigned ret = -ENODEV;
1073
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301074 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301075 .direction = PM_GPIO_DIR_IN,
1076 .pull = PM_GPIO_PULL_UP_1P5,
1077 .function = PM_GPIO_FUNC_NORMAL,
1078 .vin_sel = 2,
1079 .inv_int_pol = 0,
1080 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301081 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301082 .direction = PM_GPIO_DIR_IN,
1083 .pull = PM_GPIO_PULL_NO,
1084 .function = PM_GPIO_FUNC_NORMAL,
1085 .vin_sel = 2,
1086 .inv_int_pol = 0,
1087 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001088 if (!callback)
1089 return -EINVAL;
1090
1091 if (machine_is_msm8x60_fluid())
1092 return -ENOTSUPP;
1093
1094 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1095 pr_debug("%s: USB_ID pin is not routed to PMIC"
1096 "on V1 surf/ffa\n", __func__);
1097 return -ENOTSUPP;
1098 }
1099
Manu Gautam62158eb2011-11-24 16:20:46 +05301100 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1101 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001102 pr_debug("%s: USB_ID is not routed to PMIC"
1103 "on V2 ffa\n", __func__);
1104 return -ENOTSUPP;
1105 }
1106
1107 usb_phy_susp_dig_vol = 500000;
1108
1109 if (init) {
1110 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301111 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301112 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1113 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301114 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301115 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301116 __func__, ret);
1117 return ret;
1118 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001119 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1120 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1121 "msm_otg_id", NULL);
1122 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001123 pr_err("%s:pmic_usb_id interrupt registration failed",
1124 __func__);
1125 return ret;
1126 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301127 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001128 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301129 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001130 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301131 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1132 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301133 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301134 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301135 __func__, ret);
1136 return ret;
1137 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301138 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001139 cancel_delayed_work_sync(&pmic_id_det);
1140 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001141 }
1142 return 0;
1143}
1144#endif
1145
1146#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1147#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1148static int msm_hsusb_init_vddcx(int init)
1149{
1150 int ret = 0;
1151
1152 if (init) {
1153 vdd_cx = regulator_get(NULL, "8058_s1");
1154 if (IS_ERR(vdd_cx)) {
1155 return PTR_ERR(vdd_cx);
1156 }
1157
1158 ret = regulator_set_voltage(vdd_cx,
1159 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1160 USB_PHY_MAX_VDD_DIG_VOL);
1161 if (ret) {
1162 pr_err("%s: unable to set the voltage for regulator"
1163 "vdd_cx\n", __func__);
1164 regulator_put(vdd_cx);
1165 return ret;
1166 }
1167
1168 ret = regulator_enable(vdd_cx);
1169 if (ret) {
1170 pr_err("%s: unable to enable regulator"
1171 "vdd_cx\n", __func__);
1172 regulator_put(vdd_cx);
1173 }
1174 } else {
1175 ret = regulator_disable(vdd_cx);
1176 if (ret) {
1177 pr_err("%s: Unable to disable the regulator:"
1178 "vdd_cx\n", __func__);
1179 return ret;
1180 }
1181
1182 regulator_put(vdd_cx);
1183 }
1184
1185 return ret;
1186}
1187
1188static int msm_hsusb_config_vddcx(int high)
1189{
1190 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1191 int min_vol;
1192 int ret;
1193
1194 if (high)
1195 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1196 else
1197 min_vol = usb_phy_susp_dig_vol;
1198
1199 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1200 if (ret) {
1201 pr_err("%s: unable to set the voltage for regulator"
1202 "vdd_cx\n", __func__);
1203 return ret;
1204 }
1205
1206 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1207
1208 return ret;
1209}
1210
1211#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1212#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1213#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1214#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1215
1216#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1217#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1218#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1219#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1220static int msm_hsusb_ldo_init(int init)
1221{
1222 int rc = 0;
1223
1224 if (init) {
1225 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1226 if (IS_ERR(ldo6_3p3))
1227 return PTR_ERR(ldo6_3p3);
1228
1229 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1230 if (IS_ERR(ldo7_1p8)) {
1231 rc = PTR_ERR(ldo7_1p8);
1232 goto put_3p3;
1233 }
1234
1235 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1236 USB_PHY_3P3_VOL_MAX);
1237 if (rc) {
1238 pr_err("%s: Unable to set voltage level for"
1239 "ldo6_3p3 regulator\n", __func__);
1240 goto put_1p8;
1241 }
1242 rc = regulator_enable(ldo6_3p3);
1243 if (rc) {
1244 pr_err("%s: Unable to enable the regulator:"
1245 "ldo6_3p3\n", __func__);
1246 goto put_1p8;
1247 }
1248 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1249 USB_PHY_1P8_VOL_MAX);
1250 if (rc) {
1251 pr_err("%s: Unable to set voltage level for"
1252 "ldo7_1p8 regulator\n", __func__);
1253 goto disable_3p3;
1254 }
1255 rc = regulator_enable(ldo7_1p8);
1256 if (rc) {
1257 pr_err("%s: Unable to enable the regulator:"
1258 "ldo7_1p8\n", __func__);
1259 goto disable_3p3;
1260 }
1261
1262 return 0;
1263 }
1264
1265 regulator_disable(ldo7_1p8);
1266disable_3p3:
1267 regulator_disable(ldo6_3p3);
1268put_1p8:
1269 regulator_put(ldo7_1p8);
1270put_3p3:
1271 regulator_put(ldo6_3p3);
1272 return rc;
1273}
1274
1275static int msm_hsusb_ldo_enable(int on)
1276{
1277 int ret = 0;
1278
1279 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1280 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1281 return -ENODEV;
1282 }
1283
1284 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1285 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1286 return -ENODEV;
1287 }
1288
1289 if (on) {
1290 ret = regulator_set_optimum_mode(ldo7_1p8,
1291 USB_PHY_1P8_HPM_LOAD);
1292 if (ret < 0) {
1293 pr_err("%s: Unable to set HPM of the regulator:"
1294 "ldo7_1p8\n", __func__);
1295 return ret;
1296 }
1297 ret = regulator_set_optimum_mode(ldo6_3p3,
1298 USB_PHY_3P3_HPM_LOAD);
1299 if (ret < 0) {
1300 pr_err("%s: Unable to set HPM of the regulator:"
1301 "ldo6_3p3\n", __func__);
1302 regulator_set_optimum_mode(ldo7_1p8,
1303 USB_PHY_1P8_LPM_LOAD);
1304 return ret;
1305 }
1306 } else {
1307 ret = regulator_set_optimum_mode(ldo7_1p8,
1308 USB_PHY_1P8_LPM_LOAD);
1309 if (ret < 0)
1310 pr_err("%s: Unable to set LPM of the regulator:"
1311 "ldo7_1p8\n", __func__);
1312 ret = regulator_set_optimum_mode(ldo6_3p3,
1313 USB_PHY_3P3_LPM_LOAD);
1314 if (ret < 0)
1315 pr_err("%s: Unable to set LPM of the regulator:"
1316 "ldo6_3p3\n", __func__);
1317 }
1318
1319 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1320 return ret < 0 ? ret : 0;
1321 }
1322#endif
1323#ifdef CONFIG_USB_EHCI_MSM_72K
1324#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1325static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1326{
1327 static int vbus_is_on;
1328
1329 /* If VBUS is already on (or off), do nothing. */
1330 if (on == vbus_is_on)
1331 return;
1332 smb137b_otg_power(on);
1333 vbus_is_on = on;
1334}
1335#endif
1336static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1337{
1338 static struct regulator *votg_5v_switch;
1339 static struct regulator *ext_5v_reg;
1340 static int vbus_is_on;
1341
1342 /* If VBUS is already on (or off), do nothing. */
1343 if (on == vbus_is_on)
1344 return;
1345
1346 if (!votg_5v_switch) {
1347 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1348 if (IS_ERR(votg_5v_switch)) {
1349 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1350 return;
1351 }
1352 }
1353 if (!ext_5v_reg) {
1354 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1355 if (IS_ERR(ext_5v_reg)) {
1356 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1357 return;
1358 }
1359 }
1360 if (on) {
1361 if (regulator_enable(ext_5v_reg)) {
1362 pr_err("%s: Unable to enable the regulator:"
1363 " ext_5v_reg\n", __func__);
1364 return;
1365 }
1366 if (regulator_enable(votg_5v_switch)) {
1367 pr_err("%s: Unable to enable the regulator:"
1368 " votg_5v_switch\n", __func__);
1369 return;
1370 }
1371 } else {
1372 if (regulator_disable(votg_5v_switch))
1373 pr_err("%s: Unable to enable the regulator:"
1374 " votg_5v_switch\n", __func__);
1375 if (regulator_disable(ext_5v_reg))
1376 pr_err("%s: Unable to enable the regulator:"
1377 " ext_5v_reg\n", __func__);
1378 }
1379
1380 vbus_is_on = on;
1381}
1382
1383static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1384 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1385 .power_budget = 390,
1386};
1387#endif
1388
1389#ifdef CONFIG_BATTERY_MSM8X60
1390static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1391 int init)
1392{
1393 int ret = -ENOTSUPP;
1394
1395#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1396 if (machine_is_msm8x60_fluid()) {
1397 if (init)
1398 msm_charger_register_vbus_sn(callback);
1399 else
1400 msm_charger_unregister_vbus_sn(callback);
1401 return 0;
1402 }
1403#endif
1404 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1405 * hence, irrespective of either peripheral only mode or
1406 * OTG (host and peripheral) modes, can depend on pmic for
1407 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001408 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001409 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1410 && (machine_is_msm8x60_surf() ||
1411 pmic_id_notif_supported)) {
1412 if (init)
1413 ret = msm_charger_register_vbus_sn(callback);
1414 else {
1415 msm_charger_unregister_vbus_sn(callback);
1416 ret = 0;
1417 }
1418 } else {
1419#if !defined(CONFIG_USB_EHCI_MSM_72K)
1420 if (init)
1421 ret = msm_charger_register_vbus_sn(callback);
1422 else {
1423 msm_charger_unregister_vbus_sn(callback);
1424 ret = 0;
1425 }
1426#endif
1427 }
1428 return ret;
1429}
1430#endif
1431
1432#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1433static struct msm_otg_platform_data msm_otg_pdata = {
1434 /* if usb link is in sps there is no need for
1435 * usb pclk as dayatona fabric clock will be
1436 * used instead
1437 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001438 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1439 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1440 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301441 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001442#ifdef CONFIG_USB_EHCI_MSM_72K
1443 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301444 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001445#endif
1446#ifdef CONFIG_USB_EHCI_MSM_72K
1447 .vbus_power = msm_hsusb_vbus_power,
1448#endif
1449#ifdef CONFIG_BATTERY_MSM8X60
1450 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1451#endif
1452 .ldo_init = msm_hsusb_ldo_init,
1453 .ldo_enable = msm_hsusb_ldo_enable,
1454 .config_vddcx = msm_hsusb_config_vddcx,
1455 .init_vddcx = msm_hsusb_init_vddcx,
1456#ifdef CONFIG_BATTERY_MSM8X60
1457 .chg_vbus_draw = msm_charger_vbus_draw,
1458#endif
1459};
1460#endif
1461
1462#ifdef CONFIG_USB_GADGET_MSM_72K
1463static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1464 .is_phy_status_timer_on = 1,
1465};
1466#endif
1467
1468#ifdef CONFIG_USB_G_ANDROID
1469
1470#define PID_MAGIC_ID 0x71432909
1471#define SERIAL_NUM_MAGIC_ID 0x61945374
1472#define SERIAL_NUMBER_LENGTH 127
1473#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1474
1475struct magic_num_struct {
1476 uint32_t pid;
1477 uint32_t serial_num;
1478};
1479
1480struct dload_struct {
1481 uint32_t reserved1;
1482 uint32_t reserved2;
1483 uint32_t reserved3;
1484 uint16_t reserved4;
1485 uint16_t pid;
1486 char serial_number[SERIAL_NUMBER_LENGTH];
1487 uint16_t reserved5;
1488 struct magic_num_struct
1489 magic_struct;
1490};
1491
1492static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1493{
1494 struct dload_struct __iomem *dload = 0;
1495
1496 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1497 if (!dload) {
1498 pr_err("%s: cannot remap I/O memory region: %08x\n",
1499 __func__, DLOAD_USB_BASE_ADD);
1500 return -ENXIO;
1501 }
1502
1503 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1504 __func__, dload, pid, snum);
1505 /* update pid */
1506 dload->magic_struct.pid = PID_MAGIC_ID;
1507 dload->pid = pid;
1508
1509 /* update serial number */
1510 dload->magic_struct.serial_num = 0;
1511 if (!snum)
1512 return 0;
1513
1514 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1515 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1516 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1517
1518 iounmap(dload);
1519
1520 return 0;
1521}
1522
1523static struct android_usb_platform_data android_usb_pdata = {
1524 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1525};
1526
1527static struct platform_device android_usb_device = {
1528 .name = "android_usb",
1529 .id = -1,
1530 .dev = {
1531 .platform_data = &android_usb_pdata,
1532 },
1533};
1534
1535
1536#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001537
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001538#ifdef CONFIG_MSM_VPE
1539static struct resource msm_vpe_resources[] = {
1540 {
1541 .start = 0x05300000,
1542 .end = 0x05300000 + SZ_1M - 1,
1543 .flags = IORESOURCE_MEM,
1544 },
1545 {
1546 .start = INT_VPE,
1547 .end = INT_VPE,
1548 .flags = IORESOURCE_IRQ,
1549 },
1550};
1551
1552static struct platform_device msm_vpe_device = {
1553 .name = "msm_vpe",
1554 .id = 0,
1555 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1556 .resource = msm_vpe_resources,
1557};
1558#endif
1559
1560#ifdef CONFIG_MSM_CAMERA
1561#ifdef CONFIG_MSM_CAMERA_FLASH
1562#define VFE_CAMIF_TIMER1_GPIO 29
1563#define VFE_CAMIF_TIMER2_GPIO 30
1564#define VFE_CAMIF_TIMER3_GPIO_INT 31
1565#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1566static struct msm_camera_sensor_flash_src msm_flash_src = {
1567 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1568 ._fsrc.pmic_src.num_of_src = 2,
1569 ._fsrc.pmic_src.low_current = 100,
1570 ._fsrc.pmic_src.high_current = 300,
1571 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1572 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1573 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1574};
1575#ifdef CONFIG_IMX074
1576static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1577 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1578 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1579 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1580 .flash_recharge_duration = 50000,
1581 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1582};
1583#endif
1584#endif
1585
1586int msm_cam_gpio_tbl[] = {
1587 32,/*CAMIF_MCLK*/
1588 47,/*CAMIF_I2C_DATA*/
1589 48,/*CAMIF_I2C_CLK*/
1590 105,/*STANDBY*/
1591};
1592
1593enum msm_cam_stat{
1594 MSM_CAM_OFF,
1595 MSM_CAM_ON,
1596};
1597
1598static int config_gpio_table(enum msm_cam_stat stat)
1599{
1600 int rc = 0, i = 0;
1601 if (stat == MSM_CAM_ON) {
1602 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1603 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1604 if (unlikely(rc < 0)) {
1605 pr_err("%s not able to get gpio\n", __func__);
1606 for (i--; i >= 0; i--)
1607 gpio_free(msm_cam_gpio_tbl[i]);
1608 break;
1609 }
1610 }
1611 } else {
1612 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1613 gpio_free(msm_cam_gpio_tbl[i]);
1614 }
1615 return rc;
1616}
1617
1618static struct msm_camera_sensor_platform_info sensor_board_info = {
1619 .mount_angle = 0
1620};
1621
1622/*external regulator VREG_5V*/
1623static struct regulator *reg_flash_5V;
1624
1625static int config_camera_on_gpios_fluid(void)
1626{
1627 int rc = 0;
1628
1629 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1630 if (IS_ERR(reg_flash_5V)) {
1631 pr_err("'%s' regulator not found, rc=%ld\n",
1632 "8901_mpp0", IS_ERR(reg_flash_5V));
1633 return -ENODEV;
1634 }
1635
1636 rc = regulator_enable(reg_flash_5V);
1637 if (rc) {
1638 pr_err("'%s' regulator enable failed, rc=%d\n",
1639 "8901_mpp0", rc);
1640 regulator_put(reg_flash_5V);
1641 return rc;
1642 }
1643
1644#ifdef CONFIG_IMX074
1645 sensor_board_info.mount_angle = 90;
1646#endif
1647 rc = config_gpio_table(MSM_CAM_ON);
1648 if (rc < 0) {
1649 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1650 "failed\n", __func__);
1651 return rc;
1652 }
1653
1654 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1655 if (rc < 0) {
1656 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1657 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1658 regulator_disable(reg_flash_5V);
1659 regulator_put(reg_flash_5V);
1660 return rc;
1661 }
1662 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1663 msleep(20);
1664 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1665
1666
1667 /*Enable LED_FLASH_EN*/
1668 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1669 if (rc < 0) {
1670 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1671 "failed\n", __func__, GPIO_LED_FLASH_EN);
1672
1673 regulator_disable(reg_flash_5V);
1674 regulator_put(reg_flash_5V);
1675 config_gpio_table(MSM_CAM_OFF);
1676 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1677 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1678 return rc;
1679 }
1680 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1681 msleep(20);
1682 return rc;
1683}
1684
1685
1686static void config_camera_off_gpios_fluid(void)
1687{
1688 regulator_disable(reg_flash_5V);
1689 regulator_put(reg_flash_5V);
1690
1691 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1692 gpio_free(GPIO_LED_FLASH_EN);
1693
1694 config_gpio_table(MSM_CAM_OFF);
1695
1696 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1697 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1698}
1699static int config_camera_on_gpios(void)
1700{
1701 int rc = 0;
1702
1703 if (machine_is_msm8x60_fluid())
1704 return config_camera_on_gpios_fluid();
1705
1706 rc = config_gpio_table(MSM_CAM_ON);
1707 if (rc < 0) {
1708 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1709 "failed\n", __func__);
1710 return rc;
1711 }
1712
Jilai Wang971f97f2011-07-13 14:25:25 -04001713 if (!machine_is_msm8x60_dragon()) {
1714 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1715 if (rc < 0) {
1716 config_gpio_table(MSM_CAM_OFF);
1717 pr_err("%s: CAMSENSOR gpio %d request"
1718 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1719 return rc;
1720 }
1721 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1722 msleep(20);
1723 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001724 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001725
1726#ifdef CONFIG_MSM_CAMERA_FLASH
1727#ifdef CONFIG_IMX074
1728 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1729 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1730#endif
1731#endif
1732 return rc;
1733}
1734
1735static void config_camera_off_gpios(void)
1736{
1737 if (machine_is_msm8x60_fluid())
1738 return config_camera_off_gpios_fluid();
1739
1740
1741 config_gpio_table(MSM_CAM_OFF);
1742
Jilai Wang971f97f2011-07-13 14:25:25 -04001743 if (!machine_is_msm8x60_dragon()) {
1744 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1745 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1746 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001747}
1748
1749#ifdef CONFIG_QS_S5K4E1
1750
1751#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1752
1753static int config_camera_on_gpios_qs_cam_fluid(void)
1754{
1755 int rc = 0;
1756
1757 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1758 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1759 if (rc < 0) {
1760 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1761 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1762 return rc;
1763 }
1764 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1765 msleep(20);
1766 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1767 msleep(20);
1768
1769 /*
1770 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1771 * to enable 2.7V power to Camera
1772 */
1773 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1774 if (rc < 0) {
1775 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1776 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1777 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1778 gpio_free(QS_CAM_HC37_CAM_PD);
1779 return rc;
1780 }
1781 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1782 msleep(20);
1783 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1784 msleep(20);
1785
1786 rc = config_camera_on_gpios_fluid();
1787 if (rc < 0) {
1788 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1789 " failed\n", __func__);
1790 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1791 gpio_free(QS_CAM_HC37_CAM_PD);
1792 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1793 gpio_free(GPIO_AUX_CAM_2P7_EN);
1794 return rc;
1795 }
1796 return rc;
1797}
1798
1799static void config_camera_off_gpios_qs_cam_fluid(void)
1800{
1801 /*
1802 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1803 * to disable 2.7V power to Camera
1804 */
1805 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1806 gpio_free(GPIO_AUX_CAM_2P7_EN);
1807
1808 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1809 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1810 gpio_free(QS_CAM_HC37_CAM_PD);
1811
1812 config_camera_off_gpios_fluid();
1813 return;
1814}
1815
1816static int config_camera_on_gpios_qs_cam(void)
1817{
1818 int rc = 0;
1819
1820 if (machine_is_msm8x60_fluid())
1821 return config_camera_on_gpios_qs_cam_fluid();
1822
1823 rc = config_camera_on_gpios();
1824 return rc;
1825}
1826
1827static void config_camera_off_gpios_qs_cam(void)
1828{
1829 if (machine_is_msm8x60_fluid())
1830 return config_camera_off_gpios_qs_cam_fluid();
1831
1832 config_camera_off_gpios();
1833 return;
1834}
1835#endif
1836
1837static int config_camera_on_gpios_web_cam(void)
1838{
1839 int rc = 0;
1840 rc = config_gpio_table(MSM_CAM_ON);
1841 if (rc < 0) {
1842 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1843 "failed\n", __func__);
1844 return rc;
1845 }
1846
Jilai Wang53d27a82011-07-13 14:32:58 -04001847 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001848 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1849 if (rc < 0) {
1850 config_gpio_table(MSM_CAM_OFF);
1851 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1852 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1853 return rc;
1854 }
1855 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1856 }
1857 return rc;
1858}
1859
1860static void config_camera_off_gpios_web_cam(void)
1861{
1862 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001863 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001864 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1865 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1866 }
1867 return;
1868}
1869
1870#ifdef CONFIG_MSM_BUS_SCALING
1871static struct msm_bus_vectors cam_init_vectors[] = {
1872 {
1873 .src = MSM_BUS_MASTER_VFE,
1874 .dst = MSM_BUS_SLAVE_SMI,
1875 .ab = 0,
1876 .ib = 0,
1877 },
1878 {
1879 .src = MSM_BUS_MASTER_VFE,
1880 .dst = MSM_BUS_SLAVE_EBI_CH0,
1881 .ab = 0,
1882 .ib = 0,
1883 },
1884 {
1885 .src = MSM_BUS_MASTER_VPE,
1886 .dst = MSM_BUS_SLAVE_SMI,
1887 .ab = 0,
1888 .ib = 0,
1889 },
1890 {
1891 .src = MSM_BUS_MASTER_VPE,
1892 .dst = MSM_BUS_SLAVE_EBI_CH0,
1893 .ab = 0,
1894 .ib = 0,
1895 },
1896 {
1897 .src = MSM_BUS_MASTER_JPEG_ENC,
1898 .dst = MSM_BUS_SLAVE_SMI,
1899 .ab = 0,
1900 .ib = 0,
1901 },
1902 {
1903 .src = MSM_BUS_MASTER_JPEG_ENC,
1904 .dst = MSM_BUS_SLAVE_EBI_CH0,
1905 .ab = 0,
1906 .ib = 0,
1907 },
1908};
1909
1910static struct msm_bus_vectors cam_preview_vectors[] = {
1911 {
1912 .src = MSM_BUS_MASTER_VFE,
1913 .dst = MSM_BUS_SLAVE_SMI,
1914 .ab = 0,
1915 .ib = 0,
1916 },
1917 {
1918 .src = MSM_BUS_MASTER_VFE,
1919 .dst = MSM_BUS_SLAVE_EBI_CH0,
1920 .ab = 283115520,
1921 .ib = 452984832,
1922 },
1923 {
1924 .src = MSM_BUS_MASTER_VPE,
1925 .dst = MSM_BUS_SLAVE_SMI,
1926 .ab = 0,
1927 .ib = 0,
1928 },
1929 {
1930 .src = MSM_BUS_MASTER_VPE,
1931 .dst = MSM_BUS_SLAVE_EBI_CH0,
1932 .ab = 0,
1933 .ib = 0,
1934 },
1935 {
1936 .src = MSM_BUS_MASTER_JPEG_ENC,
1937 .dst = MSM_BUS_SLAVE_SMI,
1938 .ab = 0,
1939 .ib = 0,
1940 },
1941 {
1942 .src = MSM_BUS_MASTER_JPEG_ENC,
1943 .dst = MSM_BUS_SLAVE_EBI_CH0,
1944 .ab = 0,
1945 .ib = 0,
1946 },
1947};
1948
1949static struct msm_bus_vectors cam_video_vectors[] = {
1950 {
1951 .src = MSM_BUS_MASTER_VFE,
1952 .dst = MSM_BUS_SLAVE_SMI,
1953 .ab = 283115520,
1954 .ib = 452984832,
1955 },
1956 {
1957 .src = MSM_BUS_MASTER_VFE,
1958 .dst = MSM_BUS_SLAVE_EBI_CH0,
1959 .ab = 283115520,
1960 .ib = 452984832,
1961 },
1962 {
1963 .src = MSM_BUS_MASTER_VPE,
1964 .dst = MSM_BUS_SLAVE_SMI,
1965 .ab = 319610880,
1966 .ib = 511377408,
1967 },
1968 {
1969 .src = MSM_BUS_MASTER_VPE,
1970 .dst = MSM_BUS_SLAVE_EBI_CH0,
1971 .ab = 0,
1972 .ib = 0,
1973 },
1974 {
1975 .src = MSM_BUS_MASTER_JPEG_ENC,
1976 .dst = MSM_BUS_SLAVE_SMI,
1977 .ab = 0,
1978 .ib = 0,
1979 },
1980 {
1981 .src = MSM_BUS_MASTER_JPEG_ENC,
1982 .dst = MSM_BUS_SLAVE_EBI_CH0,
1983 .ab = 0,
1984 .ib = 0,
1985 },
1986};
1987
1988static struct msm_bus_vectors cam_snapshot_vectors[] = {
1989 {
1990 .src = MSM_BUS_MASTER_VFE,
1991 .dst = MSM_BUS_SLAVE_SMI,
1992 .ab = 566231040,
1993 .ib = 905969664,
1994 },
1995 {
1996 .src = MSM_BUS_MASTER_VFE,
1997 .dst = MSM_BUS_SLAVE_EBI_CH0,
1998 .ab = 69984000,
1999 .ib = 111974400,
2000 },
2001 {
2002 .src = MSM_BUS_MASTER_VPE,
2003 .dst = MSM_BUS_SLAVE_SMI,
2004 .ab = 0,
2005 .ib = 0,
2006 },
2007 {
2008 .src = MSM_BUS_MASTER_VPE,
2009 .dst = MSM_BUS_SLAVE_EBI_CH0,
2010 .ab = 0,
2011 .ib = 0,
2012 },
2013 {
2014 .src = MSM_BUS_MASTER_JPEG_ENC,
2015 .dst = MSM_BUS_SLAVE_SMI,
2016 .ab = 320864256,
2017 .ib = 513382810,
2018 },
2019 {
2020 .src = MSM_BUS_MASTER_JPEG_ENC,
2021 .dst = MSM_BUS_SLAVE_EBI_CH0,
2022 .ab = 320864256,
2023 .ib = 513382810,
2024 },
2025};
2026
2027static struct msm_bus_vectors cam_zsl_vectors[] = {
2028 {
2029 .src = MSM_BUS_MASTER_VFE,
2030 .dst = MSM_BUS_SLAVE_SMI,
2031 .ab = 566231040,
2032 .ib = 905969664,
2033 },
2034 {
2035 .src = MSM_BUS_MASTER_VFE,
2036 .dst = MSM_BUS_SLAVE_EBI_CH0,
2037 .ab = 706199040,
2038 .ib = 1129918464,
2039 },
2040 {
2041 .src = MSM_BUS_MASTER_VPE,
2042 .dst = MSM_BUS_SLAVE_SMI,
2043 .ab = 0,
2044 .ib = 0,
2045 },
2046 {
2047 .src = MSM_BUS_MASTER_VPE,
2048 .dst = MSM_BUS_SLAVE_EBI_CH0,
2049 .ab = 0,
2050 .ib = 0,
2051 },
2052 {
2053 .src = MSM_BUS_MASTER_JPEG_ENC,
2054 .dst = MSM_BUS_SLAVE_SMI,
2055 .ab = 320864256,
2056 .ib = 513382810,
2057 },
2058 {
2059 .src = MSM_BUS_MASTER_JPEG_ENC,
2060 .dst = MSM_BUS_SLAVE_EBI_CH0,
2061 .ab = 320864256,
2062 .ib = 513382810,
2063 },
2064};
2065
2066static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2067 {
2068 .src = MSM_BUS_MASTER_VFE,
2069 .dst = MSM_BUS_SLAVE_SMI,
2070 .ab = 212336640,
2071 .ib = 339738624,
2072 },
2073 {
2074 .src = MSM_BUS_MASTER_VFE,
2075 .dst = MSM_BUS_SLAVE_EBI_CH0,
2076 .ab = 25090560,
2077 .ib = 40144896,
2078 },
2079 {
2080 .src = MSM_BUS_MASTER_VPE,
2081 .dst = MSM_BUS_SLAVE_SMI,
2082 .ab = 239708160,
2083 .ib = 383533056,
2084 },
2085 {
2086 .src = MSM_BUS_MASTER_VPE,
2087 .dst = MSM_BUS_SLAVE_EBI_CH0,
2088 .ab = 79902720,
2089 .ib = 127844352,
2090 },
2091 {
2092 .src = MSM_BUS_MASTER_JPEG_ENC,
2093 .dst = MSM_BUS_SLAVE_SMI,
2094 .ab = 0,
2095 .ib = 0,
2096 },
2097 {
2098 .src = MSM_BUS_MASTER_JPEG_ENC,
2099 .dst = MSM_BUS_SLAVE_EBI_CH0,
2100 .ab = 0,
2101 .ib = 0,
2102 },
2103};
2104
2105static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2106 {
2107 .src = MSM_BUS_MASTER_VFE,
2108 .dst = MSM_BUS_SLAVE_SMI,
2109 .ab = 0,
2110 .ib = 0,
2111 },
2112 {
2113 .src = MSM_BUS_MASTER_VFE,
2114 .dst = MSM_BUS_SLAVE_EBI_CH0,
2115 .ab = 300902400,
2116 .ib = 481443840,
2117 },
2118 {
2119 .src = MSM_BUS_MASTER_VPE,
2120 .dst = MSM_BUS_SLAVE_SMI,
2121 .ab = 230307840,
2122 .ib = 368492544,
2123 },
2124 {
2125 .src = MSM_BUS_MASTER_VPE,
2126 .dst = MSM_BUS_SLAVE_EBI_CH0,
2127 .ab = 245113344,
2128 .ib = 392181351,
2129 },
2130 {
2131 .src = MSM_BUS_MASTER_JPEG_ENC,
2132 .dst = MSM_BUS_SLAVE_SMI,
2133 .ab = 106536960,
2134 .ib = 170459136,
2135 },
2136 {
2137 .src = MSM_BUS_MASTER_JPEG_ENC,
2138 .dst = MSM_BUS_SLAVE_EBI_CH0,
2139 .ab = 106536960,
2140 .ib = 170459136,
2141 },
2142};
2143
2144static struct msm_bus_paths cam_bus_client_config[] = {
2145 {
2146 ARRAY_SIZE(cam_init_vectors),
2147 cam_init_vectors,
2148 },
2149 {
2150 ARRAY_SIZE(cam_preview_vectors),
2151 cam_preview_vectors,
2152 },
2153 {
2154 ARRAY_SIZE(cam_video_vectors),
2155 cam_video_vectors,
2156 },
2157 {
2158 ARRAY_SIZE(cam_snapshot_vectors),
2159 cam_snapshot_vectors,
2160 },
2161 {
2162 ARRAY_SIZE(cam_zsl_vectors),
2163 cam_zsl_vectors,
2164 },
2165 {
2166 ARRAY_SIZE(cam_stereo_video_vectors),
2167 cam_stereo_video_vectors,
2168 },
2169 {
2170 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2171 cam_stereo_snapshot_vectors,
2172 },
2173};
2174
2175static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2176 cam_bus_client_config,
2177 ARRAY_SIZE(cam_bus_client_config),
2178 .name = "msm_camera",
2179};
2180#endif
2181
2182struct msm_camera_device_platform_data msm_camera_device_data = {
2183 .camera_gpio_on = config_camera_on_gpios,
2184 .camera_gpio_off = config_camera_off_gpios,
2185 .ioext.csiphy = 0x04800000,
2186 .ioext.csisz = 0x00000400,
2187 .ioext.csiirq = CSI_0_IRQ,
2188 .ioclk.mclk_clk_rate = 24000000,
2189 .ioclk.vfe_clk_rate = 228570000,
2190#ifdef CONFIG_MSM_BUS_SCALING
2191 .cam_bus_scale_table = &cam_bus_client_pdata,
2192#endif
2193};
2194
2195#ifdef CONFIG_QS_S5K4E1
2196struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2197 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2198 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2199 .ioext.csiphy = 0x04800000,
2200 .ioext.csisz = 0x00000400,
2201 .ioext.csiirq = CSI_0_IRQ,
2202 .ioclk.mclk_clk_rate = 24000000,
2203 .ioclk.vfe_clk_rate = 228570000,
2204#ifdef CONFIG_MSM_BUS_SCALING
2205 .cam_bus_scale_table = &cam_bus_client_pdata,
2206#endif
2207};
2208#endif
2209
2210struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2211 .camera_gpio_on = config_camera_on_gpios_web_cam,
2212 .camera_gpio_off = config_camera_off_gpios_web_cam,
2213 .ioext.csiphy = 0x04900000,
2214 .ioext.csisz = 0x00000400,
2215 .ioext.csiirq = CSI_1_IRQ,
2216 .ioclk.mclk_clk_rate = 24000000,
2217 .ioclk.vfe_clk_rate = 228570000,
2218#ifdef CONFIG_MSM_BUS_SCALING
2219 .cam_bus_scale_table = &cam_bus_client_pdata,
2220#endif
2221};
2222
2223struct resource msm_camera_resources[] = {
2224 {
2225 .start = 0x04500000,
2226 .end = 0x04500000 + SZ_1M - 1,
2227 .flags = IORESOURCE_MEM,
2228 },
2229 {
2230 .start = VFE_IRQ,
2231 .end = VFE_IRQ,
2232 .flags = IORESOURCE_IRQ,
2233 },
2234};
2235#ifdef CONFIG_MT9E013
2236static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2237 .mount_angle = 0
2238};
2239
2240static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2241 .flash_type = MSM_CAMERA_FLASH_LED,
2242 .flash_src = &msm_flash_src
2243};
2244
2245static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2246 .sensor_name = "mt9e013",
2247 .sensor_reset = 106,
2248 .sensor_pwd = 85,
2249 .vcm_pwd = 1,
2250 .vcm_enable = 0,
2251 .pdata = &msm_camera_device_data,
2252 .resource = msm_camera_resources,
2253 .num_resources = ARRAY_SIZE(msm_camera_resources),
2254 .flash_data = &flash_mt9e013,
2255 .strobe_flash_data = &strobe_flash_xenon,
2256 .sensor_platform_info = &mt9e013_sensor_8660_info,
2257 .csi_if = 1
2258};
2259struct platform_device msm_camera_sensor_mt9e013 = {
2260 .name = "msm_camera_mt9e013",
2261 .dev = {
2262 .platform_data = &msm_camera_sensor_mt9e013_data,
2263 },
2264};
2265#endif
2266
2267#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302268static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2269 .mount_angle = 180
2270};
2271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002272static struct msm_camera_sensor_flash_data flash_imx074 = {
2273 .flash_type = MSM_CAMERA_FLASH_LED,
2274 .flash_src = &msm_flash_src
2275};
2276
2277static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2278 .sensor_name = "imx074",
2279 .sensor_reset = 106,
2280 .sensor_pwd = 85,
2281 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2282 .vcm_enable = 1,
2283 .pdata = &msm_camera_device_data,
2284 .resource = msm_camera_resources,
2285 .num_resources = ARRAY_SIZE(msm_camera_resources),
2286 .flash_data = &flash_imx074,
2287 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302288 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289 .csi_if = 1
2290};
2291struct platform_device msm_camera_sensor_imx074 = {
2292 .name = "msm_camera_imx074",
2293 .dev = {
2294 .platform_data = &msm_camera_sensor_imx074_data,
2295 },
2296};
2297#endif
2298#ifdef CONFIG_WEBCAM_OV9726
2299
2300static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2301 .mount_angle = 0
2302};
2303
2304static struct msm_camera_sensor_flash_data flash_ov9726 = {
2305 .flash_type = MSM_CAMERA_FLASH_LED,
2306 .flash_src = &msm_flash_src
2307};
2308static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2309 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002310 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002311 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2312 .sensor_pwd = 85,
2313 .vcm_pwd = 1,
2314 .vcm_enable = 0,
2315 .pdata = &msm_camera_device_data_web_cam,
2316 .resource = msm_camera_resources,
2317 .num_resources = ARRAY_SIZE(msm_camera_resources),
2318 .flash_data = &flash_ov9726,
2319 .sensor_platform_info = &ov9726_sensor_8660_info,
2320 .csi_if = 1
2321};
2322struct platform_device msm_camera_sensor_webcam_ov9726 = {
2323 .name = "msm_camera_ov9726",
2324 .dev = {
2325 .platform_data = &msm_camera_sensor_ov9726_data,
2326 },
2327};
2328#endif
2329#ifdef CONFIG_WEBCAM_OV7692
2330static struct msm_camera_sensor_flash_data flash_ov7692 = {
2331 .flash_type = MSM_CAMERA_FLASH_LED,
2332 .flash_src = &msm_flash_src
2333};
2334static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2335 .sensor_name = "ov7692",
2336 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2337 .sensor_pwd = 85,
2338 .vcm_pwd = 1,
2339 .vcm_enable = 0,
2340 .pdata = &msm_camera_device_data_web_cam,
2341 .resource = msm_camera_resources,
2342 .num_resources = ARRAY_SIZE(msm_camera_resources),
2343 .flash_data = &flash_ov7692,
2344 .csi_if = 1
2345};
2346
2347static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2348 .name = "msm_camera_ov7692",
2349 .dev = {
2350 .platform_data = &msm_camera_sensor_ov7692_data,
2351 },
2352};
2353#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002354#ifdef CONFIG_VX6953
2355static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2356 .mount_angle = 270
2357};
2358
2359static struct msm_camera_sensor_flash_data flash_vx6953 = {
2360 .flash_type = MSM_CAMERA_FLASH_NONE,
2361 .flash_src = &msm_flash_src
2362};
2363
2364static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2365 .sensor_name = "vx6953",
2366 .sensor_reset = 63,
2367 .sensor_pwd = 63,
2368 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2369 .vcm_enable = 1,
2370 .pdata = &msm_camera_device_data,
2371 .resource = msm_camera_resources,
2372 .num_resources = ARRAY_SIZE(msm_camera_resources),
2373 .flash_data = &flash_vx6953,
2374 .sensor_platform_info = &vx6953_sensor_8660_info,
2375 .csi_if = 1
2376};
2377struct platform_device msm_camera_sensor_vx6953 = {
2378 .name = "msm_camera_vx6953",
2379 .dev = {
2380 .platform_data = &msm_camera_sensor_vx6953_data,
2381 },
2382};
2383#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002384#ifdef CONFIG_QS_S5K4E1
2385
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302386static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2387#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2388 .mount_angle = 90
2389#else
2390 .mount_angle = 0
2391#endif
2392};
2393
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002394static char eeprom_data[864];
2395static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2396 .flash_type = MSM_CAMERA_FLASH_LED,
2397 .flash_src = &msm_flash_src
2398};
2399
2400static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2401 .sensor_name = "qs_s5k4e1",
2402 .sensor_reset = 106,
2403 .sensor_pwd = 85,
2404 .vcm_pwd = 1,
2405 .vcm_enable = 0,
2406 .pdata = &msm_camera_device_data_qs_cam,
2407 .resource = msm_camera_resources,
2408 .num_resources = ARRAY_SIZE(msm_camera_resources),
2409 .flash_data = &flash_qs_s5k4e1,
2410 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302411 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002412 .csi_if = 1,
2413 .eeprom_data = eeprom_data,
2414};
2415struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2416 .name = "msm_camera_qs_s5k4e1",
2417 .dev = {
2418 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2419 },
2420};
2421#endif
2422static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2423 #ifdef CONFIG_MT9E013
2424 {
2425 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2426 },
2427 #endif
2428 #ifdef CONFIG_IMX074
2429 {
2430 I2C_BOARD_INFO("imx074", 0x1A),
2431 },
2432 #endif
2433 #ifdef CONFIG_WEBCAM_OV7692
2434 {
2435 I2C_BOARD_INFO("ov7692", 0x78),
2436 },
2437 #endif
2438 #ifdef CONFIG_WEBCAM_OV9726
2439 {
2440 I2C_BOARD_INFO("ov9726", 0x10),
2441 },
2442 #endif
2443 #ifdef CONFIG_QS_S5K4E1
2444 {
2445 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2446 },
2447 #endif
2448};
Jilai Wang971f97f2011-07-13 14:25:25 -04002449
2450static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002451 #ifdef CONFIG_WEBCAM_OV9726
2452 {
2453 I2C_BOARD_INFO("ov9726", 0x10),
2454 },
2455 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002456 #ifdef CONFIG_VX6953
2457 {
2458 I2C_BOARD_INFO("vx6953", 0x20),
2459 },
2460 #endif
2461};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002462#endif
2463
2464#ifdef CONFIG_MSM_GEMINI
2465static struct resource msm_gemini_resources[] = {
2466 {
2467 .start = 0x04600000,
2468 .end = 0x04600000 + SZ_1M - 1,
2469 .flags = IORESOURCE_MEM,
2470 },
2471 {
2472 .start = INT_JPEG,
2473 .end = INT_JPEG,
2474 .flags = IORESOURCE_IRQ,
2475 },
2476};
2477
2478static struct platform_device msm_gemini_device = {
2479 .name = "msm_gemini",
2480 .resource = msm_gemini_resources,
2481 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2482};
2483#endif
2484
2485#ifdef CONFIG_I2C_QUP
2486static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2487{
2488}
2489
2490static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2491 .clk_freq = 384000,
2492 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002493 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2494};
2495
2496static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2497 .clk_freq = 100000,
2498 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002499 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2500};
2501
2502static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2503 .clk_freq = 100000,
2504 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002505 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2506};
2507
2508static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2509 .clk_freq = 100000,
2510 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002511 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2512};
2513
2514static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2515 .clk_freq = 100000,
2516 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002517 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2518};
2519
2520static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2521 .clk_freq = 100000,
2522 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002523 .use_gsbi_shared_mode = 1,
2524 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2525};
2526#endif
2527
2528#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2529static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2530 .max_clock_speed = 24000000,
2531};
2532
2533static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2534 .max_clock_speed = 24000000,
2535};
2536#endif
2537
2538#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002539/* CODEC/TSSC SSBI */
2540static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2541 .controller_type = MSM_SBI_CTRL_SSBI,
2542};
2543#endif
2544
2545#ifdef CONFIG_BATTERY_MSM
2546/* Use basic value for fake MSM battery */
2547static struct msm_psy_batt_pdata msm_psy_batt_data = {
2548 .avail_chg_sources = AC_CHG,
2549};
2550
2551static struct platform_device msm_batt_device = {
2552 .name = "msm-battery",
2553 .id = -1,
2554 .dev.platform_data = &msm_psy_batt_data,
2555};
2556#endif
2557
2558#ifdef CONFIG_FB_MSM_LCDC_DSUB
2559/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2560 prim = 1024 x 600 x 4(bpp) x 2(pages)
2561 This is the difference. */
2562#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2563#else
2564#define MSM_FB_DSUB_PMEM_ADDER (0)
2565#endif
2566
2567/* Sensors DSPS platform data */
2568#ifdef CONFIG_MSM_DSPS
2569
2570static struct dsps_gpio_info dsps_surf_gpios[] = {
2571 {
2572 .name = "compass_rst_n",
2573 .num = GPIO_COMPASS_RST_N,
2574 .on_val = 1, /* device not in reset */
2575 .off_val = 0, /* device in reset */
2576 },
2577 {
2578 .name = "gpio_r_altimeter_reset_n",
2579 .num = GPIO_R_ALTIMETER_RESET_N,
2580 .on_val = 1, /* device not in reset */
2581 .off_val = 0, /* device in reset */
2582 }
2583};
2584
2585static struct dsps_gpio_info dsps_fluid_gpios[] = {
2586 {
2587 .name = "gpio_n_altimeter_reset_n",
2588 .num = GPIO_N_ALTIMETER_RESET_N,
2589 .on_val = 1, /* device not in reset */
2590 .off_val = 0, /* device in reset */
2591 }
2592};
2593
2594static void __init msm8x60_init_dsps(void)
2595{
2596 struct msm_dsps_platform_data *pdata =
2597 msm_dsps_device.dev.platform_data;
2598 /*
2599 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2600 * to the power supply and not controled via GPIOs. Fluid uses a
2601 * different IO-Expender (north) than used on surf/ffa.
2602 */
2603 if (machine_is_msm8x60_fluid()) {
2604 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002605 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2606 pdata->gpios = dsps_fluid_gpios;
2607 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2608 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002609 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2610 pdata->gpios = dsps_surf_gpios;
2611 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2612 }
2613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002614 platform_device_register(&msm_dsps_device);
2615}
2616#endif /* CONFIG_MSM_DSPS */
2617
2618#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002619#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002620#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002621#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002622#endif
2623
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002624#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2625#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2626#elif defined(CONFIG_FB_MSM_TVOUT)
2627#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2628#else
2629#define MSM_FB_EXT_BUFT_SIZE 0
2630#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002632#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2633/* 4 bpp x 2 page HDMI case */
2634#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2635#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002636/* Note: must be multiple of 4096 */
2637#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002638 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002639#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002640
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002641#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2642#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2643#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002644#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002645#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002646
Huaibin Yanga5419422011-12-08 23:52:10 -08002647#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2648#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2649#else
2650#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2651#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2652
2653#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2654#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2655#else
2656#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2657#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2658
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002659#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2660#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002661#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002662
2663#define MSM_SMI_BASE 0x38000000
2664#define MSM_SMI_SIZE 0x4000000
2665
2666#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002667#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668
2669#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2670#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2671#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2672
Olav Hauganb5be7992011-11-18 14:29:02 -08002673#define MSM_ION_SF_SIZE 0x1800000 /* 24MB */
2674#define MSM_ION_CAMERA_SIZE MSM_PMEM_ADSP_SIZE
2675#define MSM_ION_MM_SIZE 0x3800000 /* 56MB */
2676#define MSM_ION_MFC_SIZE SZ_8K
2677#define MSM_ION_WB_SIZE 0x600000 /* 6MB */
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002678
2679#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Olav Hauganb5be7992011-11-18 14:29:02 -08002680#define MSM_ION_HEAP_NUM 6
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002681#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002682#define MSM_ION_HEAP_NUM 1
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002683#endif
2684
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002685static unsigned fb_size;
2686static int __init fb_size_setup(char *p)
2687{
2688 fb_size = memparse(p, NULL);
2689 return 0;
2690}
2691early_param("fb_size", fb_size_setup);
2692
2693static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2694static int __init pmem_kernel_ebi1_size_setup(char *p)
2695{
2696 pmem_kernel_ebi1_size = memparse(p, NULL);
2697 return 0;
2698}
2699early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2700
2701#ifdef CONFIG_ANDROID_PMEM
2702static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2703static int __init pmem_sf_size_setup(char *p)
2704{
2705 pmem_sf_size = memparse(p, NULL);
2706 return 0;
2707}
2708early_param("pmem_sf_size", pmem_sf_size_setup);
2709
2710static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2711
2712static int __init pmem_adsp_size_setup(char *p)
2713{
2714 pmem_adsp_size = memparse(p, NULL);
2715 return 0;
2716}
2717early_param("pmem_adsp_size", pmem_adsp_size_setup);
2718
2719static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2720
2721static int __init pmem_audio_size_setup(char *p)
2722{
2723 pmem_audio_size = memparse(p, NULL);
2724 return 0;
2725}
2726early_param("pmem_audio_size", pmem_audio_size_setup);
2727#endif
2728
2729static struct resource msm_fb_resources[] = {
2730 {
2731 .flags = IORESOURCE_DMA,
2732 }
2733};
2734
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002735static int msm_fb_detect_panel(const char *name)
2736{
2737 if (machine_is_msm8x60_fluid()) {
2738 uint32_t soc_platform_version = socinfo_get_platform_version();
2739 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2740#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2741 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002742 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2743 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002744 return 0;
2745#endif
2746 } else { /*P3 and up use AUO panel */
2747#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2748 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002749 strnlen(LCDC_AUO_PANEL_NAME,
2750 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002751 return 0;
2752#endif
2753 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002754#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2755 } else if machine_is_msm8x60_dragon() {
2756 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002757 strnlen(LCDC_NT35582_PANEL_NAME,
2758 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002759 return 0;
2760#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002761 } else {
2762 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002763 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2764 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002765 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002766
2767#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2768 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2769 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2770 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2771 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2772 PANEL_NAME_MAX_LEN)))
2773 return 0;
2774
2775 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2776 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2777 PANEL_NAME_MAX_LEN)))
2778 return 0;
2779
2780 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2781 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2782 PANEL_NAME_MAX_LEN)))
2783 return 0;
2784#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002785 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002786
2787 if (!strncmp(name, HDMI_PANEL_NAME,
2788 strnlen(HDMI_PANEL_NAME,
2789 PANEL_NAME_MAX_LEN)))
2790 return 0;
2791
2792 if (!strncmp(name, TVOUT_PANEL_NAME,
2793 strnlen(TVOUT_PANEL_NAME,
2794 PANEL_NAME_MAX_LEN)))
2795 return 0;
2796
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002797 pr_warning("%s: not supported '%s'", __func__, name);
2798 return -ENODEV;
2799}
2800
2801static struct msm_fb_platform_data msm_fb_pdata = {
2802 .detect_client = msm_fb_detect_panel,
2803};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002804
2805static struct platform_device msm_fb_device = {
2806 .name = "msm_fb",
2807 .id = 0,
2808 .num_resources = ARRAY_SIZE(msm_fb_resources),
2809 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002810 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002811};
2812
2813#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002814#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002815static struct android_pmem_platform_data android_pmem_pdata = {
2816 .name = "pmem",
2817 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2818 .cached = 1,
2819 .memory_type = MEMTYPE_EBI1,
2820};
2821
2822static struct platform_device android_pmem_device = {
2823 .name = "android_pmem",
2824 .id = 0,
2825 .dev = {.platform_data = &android_pmem_pdata},
2826};
2827
2828static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2829 .name = "pmem_adsp",
2830 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2831 .cached = 0,
2832 .memory_type = MEMTYPE_EBI1,
2833};
2834
2835static struct platform_device android_pmem_adsp_device = {
2836 .name = "android_pmem",
2837 .id = 2,
2838 .dev = { .platform_data = &android_pmem_adsp_pdata },
2839};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002840#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002841static struct android_pmem_platform_data android_pmem_audio_pdata = {
2842 .name = "pmem_audio",
2843 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2844 .cached = 0,
2845 .memory_type = MEMTYPE_EBI1,
2846};
2847
2848static struct platform_device android_pmem_audio_device = {
2849 .name = "android_pmem",
2850 .id = 4,
2851 .dev = { .platform_data = &android_pmem_audio_pdata },
2852};
2853
Laura Abbott1e36a022011-06-22 17:08:13 -07002854#define PMEM_BUS_WIDTH(_bw) \
2855 { \
2856 .vectors = &(struct msm_bus_vectors){ \
2857 .src = MSM_BUS_MASTER_AMPSS_M0, \
2858 .dst = MSM_BUS_SLAVE_SMI, \
2859 .ib = (_bw), \
2860 .ab = 0, \
2861 }, \
2862 .num_paths = 1, \
2863 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002864
2865static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002866 [0] = PMEM_BUS_WIDTH(0), /* Off */
2867 [1] = PMEM_BUS_WIDTH(1), /* On */
2868};
2869
2870static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002871 .usecase = mem_smi_table,
2872 .num_usecases = ARRAY_SIZE(mem_smi_table),
2873 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002874};
2875
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002876int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002877{
2878 int bus_id = (int) data;
2879
2880 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002881 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002882}
2883
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002884int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002885{
2886 int bus_id = (int) data;
2887
2888 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002889 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002890}
2891
Alex Bird199980e2011-10-21 11:29:27 -07002892void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002893{
2894 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2895}
Olav Hauganee0f7802011-12-19 13:28:57 -08002896#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002897static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2898 .name = "pmem_smipool",
2899 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2900 .cached = 0,
2901 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002902 .request_region = request_smi_region,
2903 .release_region = release_smi_region,
2904 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002905 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002906};
2907static struct platform_device android_pmem_smipool_device = {
2908 .name = "android_pmem",
2909 .id = 7,
2910 .dev = { .platform_data = &android_pmem_smipool_pdata },
2911};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002912#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002913#endif
2914
2915#define GPIO_DONGLE_PWR_EN 258
2916static void setup_display_power(void);
2917static int lcdc_vga_enabled;
2918static int vga_enable_request(int enable)
2919{
2920 if (enable)
2921 lcdc_vga_enabled = 1;
2922 else
2923 lcdc_vga_enabled = 0;
2924 setup_display_power();
2925
2926 return 0;
2927}
2928
2929#define GPIO_BACKLIGHT_PWM0 0
2930#define GPIO_BACKLIGHT_PWM1 1
2931
2932static int pmic_backlight_gpio[2]
2933 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2934static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2935 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2936 .vga_switch = vga_enable_request,
2937};
2938
2939static struct platform_device lcdc_samsung_panel_device = {
2940 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2941 .id = 0,
2942 .dev = {
2943 .platform_data = &lcdc_samsung_panel_data,
2944 }
2945};
2946#if (!defined(CONFIG_SPI_QUP)) && \
2947 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2948 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2949
2950static int lcdc_spi_gpio_array_num[] = {
2951 LCDC_SPI_GPIO_CLK,
2952 LCDC_SPI_GPIO_CS,
2953 LCDC_SPI_GPIO_MOSI,
2954};
2955
2956static uint32_t lcdc_spi_gpio_config_data[] = {
2957 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2958 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2959 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2960 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2961 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2962 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2963};
2964
2965static void lcdc_config_spi_gpios(int enable)
2966{
2967 int n;
2968 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2969 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2970}
2971#endif
2972
2973#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2974#ifdef CONFIG_SPI_QUP
2975static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2976 {
2977 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2978 .mode = SPI_MODE_3,
2979 .bus_num = 1,
2980 .chip_select = 0,
2981 .max_speed_hz = 10800000,
2982 }
2983};
2984#endif /* CONFIG_SPI_QUP */
2985
2986static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2987#ifndef CONFIG_SPI_QUP
2988 .panel_config_gpio = lcdc_config_spi_gpios,
2989 .gpio_num = lcdc_spi_gpio_array_num,
2990#endif
2991};
2992
2993static struct platform_device lcdc_samsung_oled_panel_device = {
2994 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2995 .id = 0,
2996 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2997};
2998#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2999
3000#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
3001#ifdef CONFIG_SPI_QUP
3002static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3003 {
3004 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3005 .mode = SPI_MODE_3,
3006 .bus_num = 1,
3007 .chip_select = 0,
3008 .max_speed_hz = 10800000,
3009 }
3010};
3011#endif
3012
3013static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3014#ifndef CONFIG_SPI_QUP
3015 .panel_config_gpio = lcdc_config_spi_gpios,
3016 .gpio_num = lcdc_spi_gpio_array_num,
3017#endif
3018};
3019
3020static struct platform_device lcdc_auo_wvga_panel_device = {
3021 .name = LCDC_AUO_PANEL_NAME,
3022 .id = 0,
3023 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3024};
3025#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3026
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003027#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3028
3029#define GPIO_NT35582_RESET 94
3030#define GPIO_NT35582_BL_EN_HW_PIN 24
3031#define GPIO_NT35582_BL_EN \
3032 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3033
3034static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3035
3036static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3037 .gpio_num = lcdc_nt35582_pmic_gpio,
3038};
3039
3040static struct platform_device lcdc_nt35582_panel_device = {
3041 .name = LCDC_NT35582_PANEL_NAME,
3042 .id = 0,
3043 .dev = {
3044 .platform_data = &lcdc_nt35582_panel_data,
3045 }
3046};
3047
3048static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3049 {
3050 .modalias = "lcdc_nt35582_spi",
3051 .mode = SPI_MODE_0,
3052 .bus_num = 0,
3053 .chip_select = 0,
3054 .max_speed_hz = 1100000,
3055 }
3056};
3057#endif
3058
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003059#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3060static struct resource hdmi_msm_resources[] = {
3061 {
3062 .name = "hdmi_msm_qfprom_addr",
3063 .start = 0x00700000,
3064 .end = 0x007060FF,
3065 .flags = IORESOURCE_MEM,
3066 },
3067 {
3068 .name = "hdmi_msm_hdmi_addr",
3069 .start = 0x04A00000,
3070 .end = 0x04A00FFF,
3071 .flags = IORESOURCE_MEM,
3072 },
3073 {
3074 .name = "hdmi_msm_irq",
3075 .start = HDMI_IRQ,
3076 .end = HDMI_IRQ,
3077 .flags = IORESOURCE_IRQ,
3078 },
3079};
3080
3081static int hdmi_enable_5v(int on);
3082static int hdmi_core_power(int on, int show);
3083static int hdmi_cec_power(int on);
3084
3085static struct msm_hdmi_platform_data hdmi_msm_data = {
3086 .irq = HDMI_IRQ,
3087 .enable_5v = hdmi_enable_5v,
3088 .core_power = hdmi_core_power,
3089 .cec_power = hdmi_cec_power,
3090};
3091
3092static struct platform_device hdmi_msm_device = {
3093 .name = "hdmi_msm",
3094 .id = 0,
3095 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3096 .resource = hdmi_msm_resources,
3097 .dev.platform_data = &hdmi_msm_data,
3098};
3099#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3100
3101#ifdef CONFIG_FB_MSM_MIPI_DSI
3102static struct platform_device mipi_dsi_toshiba_panel_device = {
3103 .name = "mipi_toshiba",
3104 .id = 0,
3105};
3106
3107#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3108
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003109static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003110 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003111 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003112};
3113
3114static struct platform_device mipi_dsi_novatek_panel_device = {
3115 .name = "mipi_novatek",
3116 .id = 0,
3117 .dev = {
3118 .platform_data = &novatek_pdata,
3119 }
3120};
3121#endif
3122
3123static void __init msm8x60_allocate_memory_regions(void)
3124{
3125 void *addr;
3126 unsigned long size;
3127
3128 size = MSM_FB_SIZE;
3129 addr = alloc_bootmem_align(size, 0x1000);
3130 msm_fb_resources[0].start = __pa(addr);
3131 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3132 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3133 size, addr, __pa(addr));
3134
3135}
3136
3137#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3138 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3139/*virtual key support */
3140static ssize_t tma300_vkeys_show(struct kobject *kobj,
3141 struct kobj_attribute *attr, char *buf)
3142{
3143 return sprintf(buf,
3144 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3145 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3146 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3147 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3148 "\n");
3149}
3150
3151static struct kobj_attribute tma300_vkeys_attr = {
3152 .attr = {
3153 .mode = S_IRUGO,
3154 },
3155 .show = &tma300_vkeys_show,
3156};
3157
3158static struct attribute *tma300_properties_attrs[] = {
3159 &tma300_vkeys_attr.attr,
3160 NULL
3161};
3162
3163static struct attribute_group tma300_properties_attr_group = {
3164 .attrs = tma300_properties_attrs,
3165};
3166
3167static struct kobject *properties_kobj;
3168
3169
3170
3171#define CYTTSP_TS_GPIO_IRQ 61
3172static int cyttsp_platform_init(struct i2c_client *client)
3173{
3174 int rc = -EINVAL;
3175 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3176
3177 if (machine_is_msm8x60_fluid()) {
3178 pm8058_l5 = regulator_get(NULL, "8058_l5");
3179 if (IS_ERR(pm8058_l5)) {
3180 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3181 __func__, PTR_ERR(pm8058_l5));
3182 rc = PTR_ERR(pm8058_l5);
3183 return rc;
3184 }
3185 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3186 if (rc) {
3187 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3188 __func__, rc);
3189 goto reg_l5_put;
3190 }
3191
3192 rc = regulator_enable(pm8058_l5);
3193 if (rc) {
3194 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3195 __func__, rc);
3196 goto reg_l5_put;
3197 }
3198 }
3199 /* vote for s3 to enable i2c communication lines */
3200 pm8058_s3 = regulator_get(NULL, "8058_s3");
3201 if (IS_ERR(pm8058_s3)) {
3202 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3203 __func__, PTR_ERR(pm8058_s3));
3204 rc = PTR_ERR(pm8058_s3);
3205 goto reg_l5_disable;
3206 }
3207
3208 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3209 if (rc) {
3210 pr_err("%s: regulator_set_voltage() = %d\n",
3211 __func__, rc);
3212 goto reg_s3_put;
3213 }
3214
3215 rc = regulator_enable(pm8058_s3);
3216 if (rc) {
3217 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3218 __func__, rc);
3219 goto reg_s3_put;
3220 }
3221
3222 /* wait for vregs to stabilize */
3223 usleep_range(10000, 10000);
3224
3225 /* check this device active by reading first byte/register */
3226 rc = i2c_smbus_read_byte_data(client, 0x01);
3227 if (rc < 0) {
3228 pr_err("%s: i2c sanity check failed\n", __func__);
3229 goto reg_s3_disable;
3230 }
3231
3232 /* virtual keys */
3233 if (machine_is_msm8x60_fluid()) {
3234 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3235 properties_kobj = kobject_create_and_add("board_properties",
3236 NULL);
3237 if (properties_kobj)
3238 rc = sysfs_create_group(properties_kobj,
3239 &tma300_properties_attr_group);
3240 if (!properties_kobj || rc)
3241 pr_err("%s: failed to create board_properties\n",
3242 __func__);
3243 }
3244 return CY_OK;
3245
3246reg_s3_disable:
3247 regulator_disable(pm8058_s3);
3248reg_s3_put:
3249 regulator_put(pm8058_s3);
3250reg_l5_disable:
3251 if (machine_is_msm8x60_fluid())
3252 regulator_disable(pm8058_l5);
3253reg_l5_put:
3254 if (machine_is_msm8x60_fluid())
3255 regulator_put(pm8058_l5);
3256 return rc;
3257}
3258
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303259/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3260static int cyttsp_platform_suspend(struct i2c_client *client)
3261{
3262 msleep(20);
3263
3264 return CY_OK;
3265}
3266
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003267static int cyttsp_platform_resume(struct i2c_client *client)
3268{
3269 /* add any special code to strobe a wakeup pin or chip reset */
3270 msleep(10);
3271
3272 return CY_OK;
3273}
3274
3275static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3276 .flags = 0x04,
3277 .gen = CY_GEN3, /* or */
3278 .use_st = CY_USE_ST,
3279 .use_mt = CY_USE_MT,
3280 .use_hndshk = CY_SEND_HNDSHK,
3281 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303282 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003283 .use_gestures = CY_USE_GESTURES,
3284 /* activate up to 4 groups
3285 * and set active distance
3286 */
3287 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3288 CY_GEST_GRP3 | CY_GEST_GRP4 |
3289 CY_ACT_DIST,
3290 /* change act_intrvl to customize the Active power state
3291 * scanning/processing refresh interval for Operating mode
3292 */
3293 .act_intrvl = CY_ACT_INTRVL_DFLT,
3294 /* change tch_tmout to customize the touch timeout for the
3295 * Active power state for Operating mode
3296 */
3297 .tch_tmout = CY_TCH_TMOUT_DFLT,
3298 /* change lp_intrvl to customize the Low Power power state
3299 * scanning/processing refresh interval for Operating mode
3300 */
3301 .lp_intrvl = CY_LP_INTRVL_DFLT,
3302 .sleep_gpio = -1,
3303 .resout_gpio = -1,
3304 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3305 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303306 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003307 .init = cyttsp_platform_init,
3308};
3309
3310static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3311 .panel_maxx = 1083,
3312 .panel_maxy = 659,
3313 .disp_minx = 30,
3314 .disp_maxx = 1053,
3315 .disp_miny = 30,
3316 .disp_maxy = 629,
3317 .correct_fw_ver = 8,
3318 .fw_fname = "cyttsp_8660_ffa.hex",
3319 .flags = 0x00,
3320 .gen = CY_GEN2, /* or */
3321 .use_st = CY_USE_ST,
3322 .use_mt = CY_USE_MT,
3323 .use_hndshk = CY_SEND_HNDSHK,
3324 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303325 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003326 .use_gestures = CY_USE_GESTURES,
3327 /* activate up to 4 groups
3328 * and set active distance
3329 */
3330 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3331 CY_GEST_GRP3 | CY_GEST_GRP4 |
3332 CY_ACT_DIST,
3333 /* change act_intrvl to customize the Active power state
3334 * scanning/processing refresh interval for Operating mode
3335 */
3336 .act_intrvl = CY_ACT_INTRVL_DFLT,
3337 /* change tch_tmout to customize the touch timeout for the
3338 * Active power state for Operating mode
3339 */
3340 .tch_tmout = CY_TCH_TMOUT_DFLT,
3341 /* change lp_intrvl to customize the Low Power power state
3342 * scanning/processing refresh interval for Operating mode
3343 */
3344 .lp_intrvl = CY_LP_INTRVL_DFLT,
3345 .sleep_gpio = -1,
3346 .resout_gpio = -1,
3347 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3348 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303349 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003350 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303351 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003352};
3353static void cyttsp_set_params(void)
3354{
3355 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3356 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3357 cyttsp_fluid_pdata.panel_maxx = 539;
3358 cyttsp_fluid_pdata.panel_maxy = 994;
3359 cyttsp_fluid_pdata.disp_minx = 30;
3360 cyttsp_fluid_pdata.disp_maxx = 509;
3361 cyttsp_fluid_pdata.disp_miny = 60;
3362 cyttsp_fluid_pdata.disp_maxy = 859;
3363 cyttsp_fluid_pdata.correct_fw_ver = 4;
3364 } else {
3365 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3366 cyttsp_fluid_pdata.panel_maxx = 550;
3367 cyttsp_fluid_pdata.panel_maxy = 1013;
3368 cyttsp_fluid_pdata.disp_minx = 35;
3369 cyttsp_fluid_pdata.disp_maxx = 515;
3370 cyttsp_fluid_pdata.disp_miny = 69;
3371 cyttsp_fluid_pdata.disp_maxy = 869;
3372 cyttsp_fluid_pdata.correct_fw_ver = 5;
3373 }
3374
3375}
3376
3377static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3378 {
3379 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3380 .platform_data = &cyttsp_fluid_pdata,
3381#ifndef CY_USE_TIMER
3382 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3383#endif /* CY_USE_TIMER */
3384 },
3385};
3386
3387static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3388 {
3389 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3390 .platform_data = &cyttsp_tmg240_pdata,
3391#ifndef CY_USE_TIMER
3392 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3393#endif /* CY_USE_TIMER */
3394 },
3395};
3396#endif
3397
3398static struct regulator *vreg_tmg200;
3399
3400#define TS_PEN_IRQ_GPIO 61
3401static int tmg200_power(int vreg_on)
3402{
3403 int rc = -EINVAL;
3404
3405 if (!vreg_tmg200) {
3406 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3407 __func__, rc);
3408 return rc;
3409 }
3410
3411 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3412 regulator_disable(vreg_tmg200);
3413 if (rc < 0)
3414 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3415 __func__, vreg_on ? "enable" : "disable", rc);
3416
3417 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003418 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003419
3420 return rc;
3421}
3422
3423static int tmg200_dev_setup(bool enable)
3424{
3425 int rc;
3426
3427 if (enable) {
3428 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3429 if (IS_ERR(vreg_tmg200)) {
3430 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3431 __func__, PTR_ERR(vreg_tmg200));
3432 rc = PTR_ERR(vreg_tmg200);
3433 return rc;
3434 }
3435
3436 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3437 if (rc) {
3438 pr_err("%s: regulator_set_voltage() = %d\n",
3439 __func__, rc);
3440 goto reg_put;
3441 }
3442 } else {
3443 /* put voltage sources */
3444 regulator_put(vreg_tmg200);
3445 }
3446 return 0;
3447reg_put:
3448 regulator_put(vreg_tmg200);
3449 return rc;
3450}
3451
3452static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3453 .ts_name = "msm_tmg200_ts",
3454 .dis_min_x = 0,
3455 .dis_max_x = 1023,
3456 .dis_min_y = 0,
3457 .dis_max_y = 599,
3458 .min_tid = 0,
3459 .max_tid = 255,
3460 .min_touch = 0,
3461 .max_touch = 255,
3462 .min_width = 0,
3463 .max_width = 255,
3464 .power_on = tmg200_power,
3465 .dev_setup = tmg200_dev_setup,
3466 .nfingers = 2,
3467 .irq_gpio = TS_PEN_IRQ_GPIO,
3468 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3469};
3470
3471static struct i2c_board_info cy8ctmg200_board_info[] = {
3472 {
3473 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3474 .platform_data = &cy8ctmg200_pdata,
3475 }
3476};
3477
Zhang Chang Ken211df572011-07-05 19:16:39 -04003478static struct regulator *vreg_tma340;
3479
3480static int tma340_power(int vreg_on)
3481{
3482 int rc = -EINVAL;
3483
3484 if (!vreg_tma340) {
3485 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3486 __func__, rc);
3487 return rc;
3488 }
3489
3490 rc = vreg_on ? regulator_enable(vreg_tma340) :
3491 regulator_disable(vreg_tma340);
3492 if (rc < 0)
3493 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3494 __func__, vreg_on ? "enable" : "disable", rc);
3495
3496 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003497 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003498
3499 return rc;
3500}
3501
3502static struct kobject *tma340_prop_kobj;
3503
3504static int tma340_dragon_dev_setup(bool enable)
3505{
3506 int rc;
3507
3508 if (enable) {
3509 vreg_tma340 = regulator_get(NULL, "8901_l2");
3510 if (IS_ERR(vreg_tma340)) {
3511 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3512 __func__, PTR_ERR(vreg_tma340));
3513 rc = PTR_ERR(vreg_tma340);
3514 return rc;
3515 }
3516
3517 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3518 if (rc) {
3519 pr_err("%s: regulator_set_voltage() = %d\n",
3520 __func__, rc);
3521 goto reg_put;
3522 }
3523 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3524 tma340_prop_kobj = kobject_create_and_add("board_properties",
3525 NULL);
3526 if (tma340_prop_kobj) {
3527 rc = sysfs_create_group(tma340_prop_kobj,
3528 &tma300_properties_attr_group);
3529 if (rc) {
3530 kobject_put(tma340_prop_kobj);
3531 pr_err("%s: failed to create board_properties\n",
3532 __func__);
3533 goto reg_put;
3534 }
3535 }
3536
3537 } else {
3538 /* put voltage sources */
3539 regulator_put(vreg_tma340);
3540 /* destroy virtual keys */
3541 if (tma340_prop_kobj) {
3542 sysfs_remove_group(tma340_prop_kobj,
3543 &tma300_properties_attr_group);
3544 kobject_put(tma340_prop_kobj);
3545 }
3546 }
3547 return 0;
3548reg_put:
3549 regulator_put(vreg_tma340);
3550 return rc;
3551}
3552
3553
3554static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3555 .ts_name = "cy8ctma340",
3556 .dis_min_x = 0,
3557 .dis_max_x = 479,
3558 .dis_min_y = 0,
3559 .dis_max_y = 799,
3560 .min_tid = 0,
3561 .max_tid = 255,
3562 .min_touch = 0,
3563 .max_touch = 255,
3564 .min_width = 0,
3565 .max_width = 255,
3566 .power_on = tma340_power,
3567 .dev_setup = tma340_dragon_dev_setup,
3568 .nfingers = 2,
3569 .irq_gpio = TS_PEN_IRQ_GPIO,
3570 .resout_gpio = -1,
3571};
3572
3573static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3574 {
3575 I2C_BOARD_INFO("cy8ctma340", 0x24),
3576 .platform_data = &cy8ctma340_dragon_pdata,
3577 }
3578};
3579
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003580#ifdef CONFIG_SERIAL_MSM_HS
3581static int configure_uart_gpios(int on)
3582{
3583 int ret = 0, i;
3584 int uart_gpios[] = {53, 54, 55, 56};
3585 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3586 if (on) {
3587 ret = msm_gpiomux_get(uart_gpios[i]);
3588 if (unlikely(ret))
3589 break;
3590 } else {
3591 ret = msm_gpiomux_put(uart_gpios[i]);
3592 if (unlikely(ret))
3593 return ret;
3594 }
3595 }
3596 if (ret)
3597 for (; i >= 0; i--)
3598 msm_gpiomux_put(uart_gpios[i]);
3599 return ret;
3600}
3601static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3602 .inject_rx_on_wakeup = 1,
3603 .rx_to_inject = 0xFD,
3604 .gpio_config = configure_uart_gpios,
3605};
3606#endif
3607
3608
3609#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3610
3611static struct gpio_led gpio_exp_leds_config[] = {
3612 {
3613 .name = "left_led1:green",
3614 .gpio = GPIO_LEFT_LED_1,
3615 .active_low = 1,
3616 .retain_state_suspended = 0,
3617 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3618 },
3619 {
3620 .name = "left_led2:red",
3621 .gpio = GPIO_LEFT_LED_2,
3622 .active_low = 1,
3623 .retain_state_suspended = 0,
3624 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3625 },
3626 {
3627 .name = "left_led3:green",
3628 .gpio = GPIO_LEFT_LED_3,
3629 .active_low = 1,
3630 .retain_state_suspended = 0,
3631 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3632 },
3633 {
3634 .name = "wlan_led:orange",
3635 .gpio = GPIO_LEFT_LED_WLAN,
3636 .active_low = 1,
3637 .retain_state_suspended = 0,
3638 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3639 },
3640 {
3641 .name = "left_led5:green",
3642 .gpio = GPIO_LEFT_LED_5,
3643 .active_low = 1,
3644 .retain_state_suspended = 0,
3645 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3646 },
3647 {
3648 .name = "right_led1:green",
3649 .gpio = GPIO_RIGHT_LED_1,
3650 .active_low = 1,
3651 .retain_state_suspended = 0,
3652 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3653 },
3654 {
3655 .name = "right_led2:red",
3656 .gpio = GPIO_RIGHT_LED_2,
3657 .active_low = 1,
3658 .retain_state_suspended = 0,
3659 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3660 },
3661 {
3662 .name = "right_led3:green",
3663 .gpio = GPIO_RIGHT_LED_3,
3664 .active_low = 1,
3665 .retain_state_suspended = 0,
3666 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3667 },
3668 {
3669 .name = "bt_led:blue",
3670 .gpio = GPIO_RIGHT_LED_BT,
3671 .active_low = 1,
3672 .retain_state_suspended = 0,
3673 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3674 },
3675 {
3676 .name = "right_led5:green",
3677 .gpio = GPIO_RIGHT_LED_5,
3678 .active_low = 1,
3679 .retain_state_suspended = 0,
3680 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3681 },
3682};
3683
3684static struct gpio_led_platform_data gpio_leds_pdata = {
3685 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3686 .leds = gpio_exp_leds_config,
3687};
3688
3689static struct platform_device gpio_leds = {
3690 .name = "leds-gpio",
3691 .id = -1,
3692 .dev = {
3693 .platform_data = &gpio_leds_pdata,
3694 },
3695};
3696
3697static struct gpio_led fluid_gpio_leds[] = {
3698 {
3699 .name = "dual_led:green",
3700 .gpio = GPIO_LED1_GREEN_N,
3701 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3702 .active_low = 1,
3703 .retain_state_suspended = 0,
3704 },
3705 {
3706 .name = "dual_led:red",
3707 .gpio = GPIO_LED2_RED_N,
3708 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3709 .active_low = 1,
3710 .retain_state_suspended = 0,
3711 },
3712};
3713
3714static struct gpio_led_platform_data gpio_led_pdata = {
3715 .leds = fluid_gpio_leds,
3716 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3717};
3718
3719static struct platform_device fluid_leds_gpio = {
3720 .name = "leds-gpio",
3721 .id = -1,
3722 .dev = {
3723 .platform_data = &gpio_led_pdata,
3724 },
3725};
3726
3727#endif
3728
3729#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3730
3731static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3732 .phys_addr_base = 0x00106000,
3733 .reg_offsets = {
3734 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3735 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3736 },
3737 .phys_size = SZ_8K,
3738 .log_len = 4096, /* log's buffer length in bytes */
3739 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3740};
3741
3742static struct platform_device msm_rpm_log_device = {
3743 .name = "msm_rpm_log",
3744 .id = -1,
3745 .dev = {
3746 .platform_data = &msm_rpm_log_pdata,
3747 },
3748};
3749#endif
3750
3751#ifdef CONFIG_BATTERY_MSM8X60
3752static struct msm_charger_platform_data msm_charger_data = {
3753 .safety_time = 180,
3754 .update_time = 1,
3755 .max_voltage = 4200,
3756 .min_voltage = 3200,
3757};
3758
3759static struct platform_device msm_charger_device = {
3760 .name = "msm-charger",
3761 .id = -1,
3762 .dev = {
3763 .platform_data = &msm_charger_data,
3764 }
3765};
3766#endif
3767
3768/*
3769 * Consumer specific regulator names:
3770 * regulator name consumer dev_name
3771 */
3772static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3773 REGULATOR_SUPPLY("8058_l0", NULL),
3774};
3775static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3776 REGULATOR_SUPPLY("8058_l1", NULL),
3777};
3778static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3779 REGULATOR_SUPPLY("8058_l2", NULL),
3780};
3781static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3782 REGULATOR_SUPPLY("8058_l3", NULL),
3783};
3784static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3785 REGULATOR_SUPPLY("8058_l4", NULL),
3786};
3787static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3788 REGULATOR_SUPPLY("8058_l5", NULL),
3789};
3790static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3791 REGULATOR_SUPPLY("8058_l6", NULL),
3792};
3793static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3794 REGULATOR_SUPPLY("8058_l7", NULL),
3795};
3796static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3797 REGULATOR_SUPPLY("8058_l8", NULL),
3798};
3799static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3800 REGULATOR_SUPPLY("8058_l9", NULL),
3801};
3802static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3803 REGULATOR_SUPPLY("8058_l10", NULL),
3804};
3805static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3806 REGULATOR_SUPPLY("8058_l11", NULL),
3807};
3808static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3809 REGULATOR_SUPPLY("8058_l12", NULL),
3810};
3811static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3812 REGULATOR_SUPPLY("8058_l13", NULL),
3813};
3814static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3815 REGULATOR_SUPPLY("8058_l14", NULL),
3816};
3817static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3818 REGULATOR_SUPPLY("8058_l15", NULL),
3819};
3820static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3821 REGULATOR_SUPPLY("8058_l16", NULL),
3822};
3823static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3824 REGULATOR_SUPPLY("8058_l17", NULL),
3825};
3826static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3827 REGULATOR_SUPPLY("8058_l18", NULL),
3828};
3829static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3830 REGULATOR_SUPPLY("8058_l19", NULL),
3831};
3832static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3833 REGULATOR_SUPPLY("8058_l20", NULL),
3834};
3835static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3836 REGULATOR_SUPPLY("8058_l21", NULL),
3837};
3838static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3839 REGULATOR_SUPPLY("8058_l22", NULL),
3840};
3841static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3842 REGULATOR_SUPPLY("8058_l23", NULL),
3843};
3844static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3845 REGULATOR_SUPPLY("8058_l24", NULL),
3846};
3847static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3848 REGULATOR_SUPPLY("8058_l25", NULL),
3849};
3850static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3851 REGULATOR_SUPPLY("8058_s0", NULL),
3852};
3853static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3854 REGULATOR_SUPPLY("8058_s1", NULL),
3855};
3856static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3857 REGULATOR_SUPPLY("8058_s2", NULL),
3858};
3859static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3860 REGULATOR_SUPPLY("8058_s3", NULL),
3861};
3862static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3863 REGULATOR_SUPPLY("8058_s4", NULL),
3864};
3865static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3866 REGULATOR_SUPPLY("8058_lvs0", NULL),
3867};
3868static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3869 REGULATOR_SUPPLY("8058_lvs1", NULL),
3870};
3871static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3872 REGULATOR_SUPPLY("8058_ncp", NULL),
3873};
3874
3875static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3876 REGULATOR_SUPPLY("8901_l0", NULL),
3877};
3878static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3879 REGULATOR_SUPPLY("8901_l1", NULL),
3880};
3881static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3882 REGULATOR_SUPPLY("8901_l2", NULL),
3883};
3884static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3885 REGULATOR_SUPPLY("8901_l3", NULL),
3886};
3887static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3888 REGULATOR_SUPPLY("8901_l4", NULL),
3889};
3890static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3891 REGULATOR_SUPPLY("8901_l5", NULL),
3892};
3893static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3894 REGULATOR_SUPPLY("8901_l6", NULL),
3895};
3896static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3897 REGULATOR_SUPPLY("8901_s2", NULL),
3898};
3899static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3900 REGULATOR_SUPPLY("8901_s3", NULL),
3901};
3902static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3903 REGULATOR_SUPPLY("8901_s4", NULL),
3904};
3905static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3906 REGULATOR_SUPPLY("8901_lvs0", NULL),
3907};
3908static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3909 REGULATOR_SUPPLY("8901_lvs1", NULL),
3910};
3911static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3912 REGULATOR_SUPPLY("8901_lvs2", NULL),
3913};
3914static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3915 REGULATOR_SUPPLY("8901_lvs3", NULL),
3916};
3917static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3918 REGULATOR_SUPPLY("8901_mvs0", NULL),
3919};
3920
David Collins6f032ba2011-08-31 14:08:15 -07003921/* Pin control regulators */
3922static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3923 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3924};
3925static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3926 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3927};
3928static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3929 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3930};
3931static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3932 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3933};
3934static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3935 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3936};
3937static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3938 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3939};
3940
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003941#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3942 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003943 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003944 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003945 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003946 .init_data = { \
3947 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003948 .valid_modes_mask = _modes, \
3949 .valid_ops_mask = _ops, \
3950 .min_uV = _min_uV, \
3951 .max_uV = _max_uV, \
3952 .input_uV = _min_uV, \
3953 .apply_uV = _apply_uV, \
3954 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003955 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003956 .consumer_supplies = vreg_consumers_##_id, \
3957 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003958 ARRAY_SIZE(vreg_consumers_##_id), \
3959 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003960 .id = RPM_VREG_ID_##_id, \
3961 .default_uV = _default_uV, \
3962 .peak_uA = _peak_uA, \
3963 .avg_uA = _avg_uA, \
3964 .pull_down_enable = _pull_down, \
3965 .pin_ctrl = _pin_ctrl, \
3966 .freq = RPM_VREG_FREQ_##_freq, \
3967 .pin_fn = _pin_fn, \
3968 .force_mode = _force_mode, \
3969 .state = _state, \
3970 .sleep_selectable = _sleep_selectable, \
3971 }
3972
3973/* Pin control initialization */
3974#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3975 { \
3976 .init_data = { \
3977 .constraints = { \
3978 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3979 .always_on = _always_on, \
3980 }, \
3981 .num_consumer_supplies = \
3982 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3983 .consumer_supplies = vreg_consumers_##_id##_PC, \
3984 }, \
3985 .id = RPM_VREG_ID_##_id##_PC, \
3986 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003987 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003988 }
3989
3990/*
3991 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3992 * via the peak_uA value specified in the table below. If the value is less
3993 * than the high power min threshold for the regulator, then the regulator will
3994 * be set to LPM. Otherwise, it will be set to HPM.
3995 *
3996 * This value can be further overridden by specifying an initial mode via
3997 * .init_data.constraints.initial_mode.
3998 */
3999
David Collins6f032ba2011-08-31 14:08:15 -07004000#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4001 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004002 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4003 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4004 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4005 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4006 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004007 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4008 RPM_VREG_PIN_FN_8660_ENABLE, \
4009 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004010 _sleep_selectable, _always_on)
4011
David Collins6f032ba2011-08-31 14:08:15 -07004012#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4013 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004014 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4015 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4016 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4017 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4018 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004019 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4020 RPM_VREG_PIN_FN_8660_ENABLE, \
4021 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4022 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004023
David Collins6f032ba2011-08-31 14:08:15 -07004024#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004025 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4026 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004027 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4028 RPM_VREG_PIN_FN_8660_ENABLE, \
4029 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4030 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004031
David Collins6f032ba2011-08-31 14:08:15 -07004032#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004033 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4034 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004035 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4036 RPM_VREG_PIN_FN_8660_ENABLE, \
4037 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4038 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004039
David Collins6f032ba2011-08-31 14:08:15 -07004040#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4041#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4042#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4043#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4044#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004045
David Collins6f032ba2011-08-31 14:08:15 -07004046/* RPM early regulator constraints */
4047static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4048 /* ID a_on pd ss min_uV max_uV init_ip freq */
4049 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4050 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004051};
4052
David Collins6f032ba2011-08-31 14:08:15 -07004053/* RPM regulator constraints */
4054static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4055 /* ID a_on pd ss min_uV max_uV init_ip */
4056 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4057 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4058 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4059 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4060 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4061 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4062 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4063 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4064 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4065 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4066 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4067 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4068 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4069 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4070 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4071 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4072 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4073 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4074 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4075 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4076 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4077 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4078 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4079 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4080 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4081 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004082
David Collins6f032ba2011-08-31 14:08:15 -07004083 /* ID a_on pd ss min_uV max_uV init_ip freq */
4084 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4085 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4086 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4087
4088 /* ID a_on pd ss */
4089 RPM_VS(PM8058_LVS0, 0, 1, 0),
4090 RPM_VS(PM8058_LVS1, 0, 1, 0),
4091
4092 /* ID a_on pd ss min_uV max_uV */
4093 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4094
4095 /* ID a_on pd ss min_uV max_uV init_ip */
4096 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4097 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4098 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4099 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4100 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4101 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4102 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4103
4104 /* ID a_on pd ss min_uV max_uV init_ip freq */
4105 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4106 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4107 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4108
4109 /* ID a_on pd ss */
4110 RPM_VS(PM8901_LVS0, 1, 1, 0),
4111 RPM_VS(PM8901_LVS1, 0, 1, 0),
4112 RPM_VS(PM8901_LVS2, 0, 1, 0),
4113 RPM_VS(PM8901_LVS3, 0, 1, 0),
4114 RPM_VS(PM8901_MVS0, 0, 1, 0),
4115
4116 /* ID a_on pin_func pin_ctrl */
4117 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4118 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4119 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4120 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4121 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4122 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4123};
4124
4125static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4126 .init_data = rpm_regulator_early_init_data,
4127 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4128 .version = RPM_VREG_VERSION_8660,
4129 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4130 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4131};
4132
4133static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4134 .init_data = rpm_regulator_init_data,
4135 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4136 .version = RPM_VREG_VERSION_8660,
4137};
4138
4139static struct platform_device rpm_regulator_early_device = {
4140 .name = "rpm-regulator",
4141 .id = 0,
4142 .dev = {
4143 .platform_data = &rpm_regulator_early_pdata,
4144 },
4145};
4146
4147static struct platform_device rpm_regulator_device = {
4148 .name = "rpm-regulator",
4149 .id = 1,
4150 .dev = {
4151 .platform_data = &rpm_regulator_pdata,
4152 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004153};
4154
4155static struct platform_device *early_regulators[] __initdata = {
4156 &msm_device_saw_s0,
4157 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004158 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004159};
4160
4161static struct platform_device *early_devices[] __initdata = {
4162#ifdef CONFIG_MSM_BUS_SCALING
4163 &msm_bus_apps_fabric,
4164 &msm_bus_sys_fabric,
4165 &msm_bus_mm_fabric,
4166 &msm_bus_sys_fpb,
4167 &msm_bus_cpss_fpb,
4168#endif
4169 &msm_device_dmov_adm0,
4170 &msm_device_dmov_adm1,
4171};
4172
4173#if (defined(CONFIG_MARIMBA_CORE)) && \
4174 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4175
4176static int bluetooth_power(int);
4177static struct platform_device msm_bt_power_device = {
4178 .name = "bt_power",
4179 .id = -1,
4180 .dev = {
4181 .platform_data = &bluetooth_power,
4182 },
4183};
4184#endif
4185
4186static struct platform_device msm_tsens_device = {
4187 .name = "tsens-tm",
4188 .id = -1,
4189};
4190
4191static struct platform_device *rumi_sim_devices[] __initdata = {
4192 &smc91x_device,
4193 &msm_device_uart_dm12,
4194#ifdef CONFIG_I2C_QUP
4195 &msm_gsbi3_qup_i2c_device,
4196 &msm_gsbi4_qup_i2c_device,
4197 &msm_gsbi7_qup_i2c_device,
4198 &msm_gsbi8_qup_i2c_device,
4199 &msm_gsbi9_qup_i2c_device,
4200 &msm_gsbi12_qup_i2c_device,
4201#endif
4202#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004203 &msm_device_ssbi3,
4204#endif
4205#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004206#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004207 &android_pmem_device,
4208 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004209 &android_pmem_smipool_device,
4210#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004211 &android_pmem_audio_device,
4212#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004213#ifdef CONFIG_MSM_ROTATOR
4214 &msm_rotator_device,
4215#endif
4216 &msm_fb_device,
4217 &msm_kgsl_3d0,
4218 &msm_kgsl_2d0,
4219 &msm_kgsl_2d1,
4220 &lcdc_samsung_panel_device,
4221#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4222 &hdmi_msm_device,
4223#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4224#ifdef CONFIG_MSM_CAMERA
4225#ifdef CONFIG_MT9E013
4226 &msm_camera_sensor_mt9e013,
4227#endif
4228#ifdef CONFIG_IMX074
4229 &msm_camera_sensor_imx074,
4230#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004231#ifdef CONFIG_VX6953
4232 &msm_camera_sensor_vx6953,
4233#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004234#ifdef CONFIG_WEBCAM_OV7692
4235 &msm_camera_sensor_webcam_ov7692,
4236#endif
4237#ifdef CONFIG_WEBCAM_OV9726
4238 &msm_camera_sensor_webcam_ov9726,
4239#endif
4240#ifdef CONFIG_QS_S5K4E1
4241 &msm_camera_sensor_qs_s5k4e1,
4242#endif
4243#endif
4244#ifdef CONFIG_MSM_GEMINI
4245 &msm_gemini_device,
4246#endif
4247#ifdef CONFIG_MSM_VPE
4248 &msm_vpe_device,
4249#endif
4250 &msm_device_vidc,
4251};
4252
4253#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4254enum {
4255 SX150X_CORE,
4256 SX150X_DOCKING,
4257 SX150X_SURF,
4258 SX150X_LEFT_FHA,
4259 SX150X_RIGHT_FHA,
4260 SX150X_SOUTH,
4261 SX150X_NORTH,
4262 SX150X_CORE_FLUID,
4263};
4264
4265static struct sx150x_platform_data sx150x_data[] __initdata = {
4266 [SX150X_CORE] = {
4267 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4268 .oscio_is_gpo = false,
4269 .io_pullup_ena = 0x0c08,
4270 .io_pulldn_ena = 0x4060,
4271 .io_open_drain_ena = 0x000c,
4272 .io_polarity = 0,
4273 .irq_summary = -1, /* see fixup_i2c_configs() */
4274 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4275 },
4276 [SX150X_DOCKING] = {
4277 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4278 .oscio_is_gpo = false,
4279 .io_pullup_ena = 0x5e06,
4280 .io_pulldn_ena = 0x81b8,
4281 .io_open_drain_ena = 0,
4282 .io_polarity = 0,
4283 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4284 UI_INT2_N),
4285 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4286 GPIO_DOCKING_EXPANDER_BASE -
4287 GPIO_EXPANDER_GPIO_BASE,
4288 },
4289 [SX150X_SURF] = {
4290 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4291 .oscio_is_gpo = false,
4292 .io_pullup_ena = 0,
4293 .io_pulldn_ena = 0,
4294 .io_open_drain_ena = 0,
4295 .io_polarity = 0,
4296 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4297 UI_INT1_N),
4298 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4299 GPIO_SURF_EXPANDER_BASE -
4300 GPIO_EXPANDER_GPIO_BASE,
4301 },
4302 [SX150X_LEFT_FHA] = {
4303 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4304 .oscio_is_gpo = false,
4305 .io_pullup_ena = 0,
4306 .io_pulldn_ena = 0x40,
4307 .io_open_drain_ena = 0,
4308 .io_polarity = 0,
4309 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4310 UI_INT3_N),
4311 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4312 GPIO_LEFT_KB_EXPANDER_BASE -
4313 GPIO_EXPANDER_GPIO_BASE,
4314 },
4315 [SX150X_RIGHT_FHA] = {
4316 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4317 .oscio_is_gpo = true,
4318 .io_pullup_ena = 0,
4319 .io_pulldn_ena = 0,
4320 .io_open_drain_ena = 0,
4321 .io_polarity = 0,
4322 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4323 UI_INT3_N),
4324 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4325 GPIO_RIGHT_KB_EXPANDER_BASE -
4326 GPIO_EXPANDER_GPIO_BASE,
4327 },
4328 [SX150X_SOUTH] = {
4329 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4330 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4331 GPIO_SOUTH_EXPANDER_BASE -
4332 GPIO_EXPANDER_GPIO_BASE,
4333 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4334 },
4335 [SX150X_NORTH] = {
4336 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4337 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4338 GPIO_NORTH_EXPANDER_BASE -
4339 GPIO_EXPANDER_GPIO_BASE,
4340 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4341 .oscio_is_gpo = true,
4342 .io_open_drain_ena = 0x30,
4343 },
4344 [SX150X_CORE_FLUID] = {
4345 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4346 .oscio_is_gpo = false,
4347 .io_pullup_ena = 0x0408,
4348 .io_pulldn_ena = 0x4060,
4349 .io_open_drain_ena = 0x0008,
4350 .io_polarity = 0,
4351 .irq_summary = -1, /* see fixup_i2c_configs() */
4352 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4353 },
4354};
4355
4356#ifdef CONFIG_SENSORS_MSM_ADC
4357/* Configuration of EPM expander is done when client
4358 * request an adc read
4359 */
4360static struct sx150x_platform_data sx150x_epmdata = {
4361 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4362 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4363 GPIO_EPM_EXPANDER_BASE -
4364 GPIO_EXPANDER_GPIO_BASE,
4365 .irq_summary = -1,
4366};
4367#endif
4368
4369/* sx150x_low_power_cfg
4370 *
4371 * This data and init function are used to put unused gpio-expander output
4372 * lines into their low-power states at boot. The init
4373 * function must be deferred until a later init stage because the i2c
4374 * gpio expander drivers do not probe until after they are registered
4375 * (see register_i2c_devices) and the work-queues for those registrations
4376 * are processed. Because these lines are unused, there is no risk of
4377 * competing with a device driver for the gpio.
4378 *
4379 * gpio lines whose low-power states are input are naturally in their low-
4380 * power configurations once probed, see the platform data structures above.
4381 */
4382struct sx150x_low_power_cfg {
4383 unsigned gpio;
4384 unsigned val;
4385};
4386
4387static struct sx150x_low_power_cfg
4388common_sx150x_lp_cfgs[] __initdata = {
4389 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4390 {GPIO_EXT_GPS_LNA_EN, 0},
4391 {GPIO_MSM_WAKES_BT, 0},
4392 {GPIO_USB_UICC_EN, 0},
4393 {GPIO_BATT_GAUGE_EN, 0},
4394};
4395
4396static struct sx150x_low_power_cfg
4397surf_ffa_sx150x_lp_cfgs[] __initdata = {
4398 {GPIO_MIPI_DSI_RST_N, 0},
4399 {GPIO_DONGLE_PWR_EN, 0},
4400 {GPIO_CAP_TS_SLEEP, 1},
4401 {GPIO_WEB_CAMIF_RESET_N, 0},
4402};
4403
4404static void __init
4405cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4406{
4407 unsigned n;
4408 int rc;
4409
4410 for (n = 0; n < nelems; ++n) {
4411 rc = gpio_request(cfgs[n].gpio, NULL);
4412 if (!rc) {
4413 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4414 gpio_free(cfgs[n].gpio);
4415 }
4416
4417 if (rc) {
4418 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4419 __func__, cfgs[n].gpio, rc);
4420 }
Steve Muckle9161d302010-02-11 11:50:40 -08004421 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004422}
4423
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004424static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004425{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004426 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4427 ARRAY_SIZE(common_sx150x_lp_cfgs));
4428 if (!machine_is_msm8x60_fluid())
4429 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4430 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4431 return 0;
4432}
4433module_init(cfg_sx150xs_low_power);
4434
4435#ifdef CONFIG_I2C
4436static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4437 {
4438 I2C_BOARD_INFO("sx1509q", 0x3e),
4439 .platform_data = &sx150x_data[SX150X_CORE]
4440 },
4441};
4442
4443static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4444 {
4445 I2C_BOARD_INFO("sx1509q", 0x3f),
4446 .platform_data = &sx150x_data[SX150X_DOCKING]
4447 },
4448};
4449
4450static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4451 {
4452 I2C_BOARD_INFO("sx1509q", 0x70),
4453 .platform_data = &sx150x_data[SX150X_SURF]
4454 }
4455};
4456
4457static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4458 {
4459 I2C_BOARD_INFO("sx1508q", 0x21),
4460 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4461 },
4462 {
4463 I2C_BOARD_INFO("sx1508q", 0x22),
4464 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4465 }
4466};
4467
4468static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4469 {
4470 I2C_BOARD_INFO("sx1508q", 0x23),
4471 .platform_data = &sx150x_data[SX150X_SOUTH]
4472 },
4473 {
4474 I2C_BOARD_INFO("sx1508q", 0x20),
4475 .platform_data = &sx150x_data[SX150X_NORTH]
4476 }
4477};
4478
4479static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4480 {
4481 I2C_BOARD_INFO("sx1509q", 0x3e),
4482 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4483 },
4484};
4485
4486#ifdef CONFIG_SENSORS_MSM_ADC
4487static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4488 {
4489 I2C_BOARD_INFO("sx1509q", 0x3e),
4490 .platform_data = &sx150x_epmdata
4491 },
4492};
4493#endif
4494#endif
4495#endif
4496
4497#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004498
4499static struct adc_access_fn xoadc_fn = {
4500 pm8058_xoadc_select_chan_and_start_conv,
4501 pm8058_xoadc_read_adc_code,
4502 pm8058_xoadc_get_properties,
4503 pm8058_xoadc_slot_request,
4504 pm8058_xoadc_restore_slot,
4505 pm8058_xoadc_calibrate,
4506};
4507
4508#if defined(CONFIG_I2C) && \
4509 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4510static struct regulator *vreg_adc_epm1;
4511
4512static struct i2c_client *epm_expander_i2c_register_board(void)
4513
4514{
4515 struct i2c_adapter *i2c_adap;
4516 struct i2c_client *client = NULL;
4517 i2c_adap = i2c_get_adapter(0x0);
4518
4519 if (i2c_adap == NULL)
4520 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4521
4522 if (i2c_adap != NULL)
4523 client = i2c_new_device(i2c_adap,
4524 &fluid_expanders_i2c_epm_info[0]);
4525 return client;
4526
4527}
4528
4529static unsigned int msm_adc_gpio_configure_expander_enable(void)
4530{
4531 int rc = 0;
4532 static struct i2c_client *epm_i2c_client;
4533
4534 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4535
4536 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4537
4538 if (IS_ERR(vreg_adc_epm1)) {
4539 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4540 return 0;
4541 }
4542
4543 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4544 if (rc)
4545 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4546 "regulator set voltage failed\n");
4547
4548 rc = regulator_enable(vreg_adc_epm1);
4549 if (rc) {
4550 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4551 "Error while enabling regulator for epm s3 %d\n", rc);
4552 return rc;
4553 }
4554
4555 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4556 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4557
4558 msleep(1000);
4559
4560 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4561 if (!rc) {
4562 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4563 "Configure 5v boost\n");
4564 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4565 } else {
4566 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4567 "Error for epm 5v boost en\n");
4568 goto exit_vreg_epm;
4569 }
4570
4571 msleep(500);
4572
4573 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4574 if (!rc) {
4575 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4576 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4577 "Configure epm 3.3v\n");
4578 } else {
4579 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4580 "Error for gpio 3.3ven\n");
4581 goto exit_vreg_epm;
4582 }
4583 msleep(500);
4584
4585 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4586 "Trying to request EPM LVLSFT_EN\n");
4587 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4588 if (!rc) {
4589 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4590 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4591 "Configure the lvlsft\n");
4592 } else {
4593 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4594 "Error for epm lvlsft_en\n");
4595 goto exit_vreg_epm;
4596 }
4597
4598 msleep(500);
4599
4600 if (!epm_i2c_client)
4601 epm_i2c_client = epm_expander_i2c_register_board();
4602
4603 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4604 if (!rc)
4605 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4606 if (rc) {
4607 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4608 ": GPIO PWR MON Enable issue\n");
4609 goto exit_vreg_epm;
4610 }
4611
4612 msleep(1000);
4613
4614 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4615 if (!rc) {
4616 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4617 if (rc) {
4618 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4619 ": ADC1_PWDN error direction out\n");
4620 goto exit_vreg_epm;
4621 }
4622 }
4623
4624 msleep(100);
4625
4626 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4627 if (!rc) {
4628 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4629 if (rc) {
4630 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4631 ": ADC2_PWD error direction out\n");
4632 goto exit_vreg_epm;
4633 }
4634 }
4635
4636 msleep(1000);
4637
4638 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4639 if (!rc) {
4640 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4641 if (rc) {
4642 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4643 "Gpio request problem %d\n", rc);
4644 goto exit_vreg_epm;
4645 }
4646 }
4647
4648 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4649 if (!rc) {
4650 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4651 if (rc) {
4652 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4653 ": EPM_SPI_ADC1_CS_N error\n");
4654 goto exit_vreg_epm;
4655 }
4656 }
4657
4658 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4659 if (!rc) {
4660 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4661 if (rc) {
4662 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4663 ": EPM_SPI_ADC2_Cs_N error\n");
4664 goto exit_vreg_epm;
4665 }
4666 }
4667
4668 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4669 "the power monitor reset for epm\n");
4670
4671 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4672 if (!rc) {
4673 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4674 if (rc) {
4675 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4676 ": Error in the power mon reset\n");
4677 goto exit_vreg_epm;
4678 }
4679 }
4680
4681 msleep(1000);
4682
4683 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4684
4685 msleep(500);
4686
4687 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4688
4689 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4690
4691 return rc;
4692
4693exit_vreg_epm:
4694 regulator_disable(vreg_adc_epm1);
4695
4696 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4697 " rc = %d.\n", rc);
4698 return rc;
4699};
4700
4701static unsigned int msm_adc_gpio_configure_expander_disable(void)
4702{
4703 int rc = 0;
4704
4705 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4706 gpio_free(GPIO_PWR_MON_RESET_N);
4707
4708 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4709 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4710
4711 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4712 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4713
4714 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4715 gpio_free(GPIO_PWR_MON_START);
4716
4717 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4718 gpio_free(GPIO_ADC1_PWDN_N);
4719
4720 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4721 gpio_free(GPIO_ADC2_PWDN_N);
4722
4723 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4724 gpio_free(GPIO_PWR_MON_ENABLE);
4725
4726 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4727 gpio_free(GPIO_EPM_LVLSFT_EN);
4728
4729 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4730 gpio_free(GPIO_EPM_5V_BOOST_EN);
4731
4732 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4733 gpio_free(GPIO_EPM_3_3V_EN);
4734
4735 rc = regulator_disable(vreg_adc_epm1);
4736 if (rc)
4737 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4738 "Error while enabling regulator for epm s3 %d\n", rc);
4739 regulator_put(vreg_adc_epm1);
4740
4741 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4742 return rc;
4743};
4744
4745unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4746{
4747 int rc = 0;
4748
4749 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4750 cs_enable);
4751
4752 if (cs_enable < 16) {
4753 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4754 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4755 } else {
4756 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4757 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4758 }
4759 return rc;
4760};
4761
4762unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4763{
4764 int rc = 0;
4765
4766 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4767
4768 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4769
4770 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4771
4772 return rc;
4773};
4774#endif
4775
4776static struct msm_adc_channels msm_adc_channels_data[] = {
4777 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4778 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4779 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4780 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4781 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4782 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4783 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4784 CHAN_PATH_TYPE4,
4785 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4786 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4787 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4788 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4789 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4790 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4791 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4792 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4793 CHAN_PATH_TYPE12,
4794 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4795 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4796 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4797 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4798 CHAN_PATH_TYPE_NONE,
4799 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4800 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4801 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4802 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4803 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4804 scale_xtern_chgr_cur},
4805 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4806 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4807 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4808 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4809 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4810 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4811 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4812 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4813 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4814 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4815 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4816 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4817};
4818
4819static char *msm_adc_fluid_device_names[] = {
4820 "ADS_ADC1",
4821 "ADS_ADC2",
4822};
4823
4824static struct msm_adc_platform_data msm_adc_pdata = {
4825 .channel = msm_adc_channels_data,
4826 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4827#if defined(CONFIG_I2C) && \
4828 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4829 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4830 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4831 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4832 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4833#endif
4834};
4835
4836static struct platform_device msm_adc_device = {
4837 .name = "msm_adc",
4838 .id = -1,
4839 .dev = {
4840 .platform_data = &msm_adc_pdata,
4841 },
4842};
4843
4844static void pmic8058_xoadc_mpp_config(void)
4845{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304846 int rc, i;
4847 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304848 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304849 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304850 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304851 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304852 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304853 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304854 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304855 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304856 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304857 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304858 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4859 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304860 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004861
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304862 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4863 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4864 &xoadc_mpps[i].config);
4865 if (rc) {
4866 pr_err("%s: Config MPP %d of PM8058 failed\n",
4867 __func__, xoadc_mpps[i].mpp);
4868 }
4869 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004870}
4871
4872static struct regulator *vreg_ldo18_adc;
4873
4874static int pmic8058_xoadc_vreg_config(int on)
4875{
4876 int rc;
4877
4878 if (on) {
4879 rc = regulator_enable(vreg_ldo18_adc);
4880 if (rc)
4881 pr_err("%s: Enable of regulator ldo18_adc "
4882 "failed\n", __func__);
4883 } else {
4884 rc = regulator_disable(vreg_ldo18_adc);
4885 if (rc)
4886 pr_err("%s: Disable of regulator ldo18_adc "
4887 "failed\n", __func__);
4888 }
4889
4890 return rc;
4891}
4892
4893static int pmic8058_xoadc_vreg_setup(void)
4894{
4895 int rc;
4896
4897 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4898 if (IS_ERR(vreg_ldo18_adc)) {
4899 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4900 __func__, PTR_ERR(vreg_ldo18_adc));
4901 rc = PTR_ERR(vreg_ldo18_adc);
4902 goto fail;
4903 }
4904
4905 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4906 if (rc) {
4907 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4908 goto fail;
4909 }
4910
4911 return rc;
4912fail:
4913 regulator_put(vreg_ldo18_adc);
4914 return rc;
4915}
4916
4917static void pmic8058_xoadc_vreg_shutdown(void)
4918{
4919 regulator_put(vreg_ldo18_adc);
4920}
4921
4922/* usec. For this ADC,
4923 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4924 * Each channel has different configuration, thus at the time of starting
4925 * the conversion, xoadc will return actual conversion time
4926 * */
4927static struct adc_properties pm8058_xoadc_data = {
4928 .adc_reference = 2200, /* milli-voltage for this adc */
4929 .bitresolution = 15,
4930 .bipolar = 0,
4931 .conversiontime = 54,
4932};
4933
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304934static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004935 .xoadc_prop = &pm8058_xoadc_data,
4936 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4937 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4938 .xoadc_num = XOADC_PMIC_0,
4939 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4940 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4941};
4942#endif
4943
4944#ifdef CONFIG_MSM_SDIO_AL
4945
4946static unsigned mdm2ap_status = 140;
4947
4948static int configure_mdm2ap_status(int on)
4949{
4950 int ret = 0;
4951 if (on)
4952 ret = msm_gpiomux_get(mdm2ap_status);
4953 else
4954 ret = msm_gpiomux_put(mdm2ap_status);
4955
4956 if (ret)
4957 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4958 on);
4959
4960 return ret;
4961}
4962
4963
4964static int get_mdm2ap_status(void)
4965{
4966 return gpio_get_value(mdm2ap_status);
4967}
4968
4969static struct sdio_al_platform_data sdio_al_pdata = {
4970 .config_mdm2ap_status = configure_mdm2ap_status,
4971 .get_mdm2ap_status = get_mdm2ap_status,
4972 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004973 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004974 .peer_sdioc_version_major = 0x0004,
4975 .peer_sdioc_boot_version_minor = 0x0001,
4976 .peer_sdioc_boot_version_major = 0x0003
4977};
4978
4979struct platform_device msm_device_sdio_al = {
4980 .name = "msm_sdio_al",
4981 .id = -1,
4982 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004983 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004984 .platform_data = &sdio_al_pdata,
4985 },
4986};
4987
4988#endif /* CONFIG_MSM_SDIO_AL */
4989
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304990#define GPIO_VREG_ID_EXT_5V 0
4991
4992static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4993 REGULATOR_SUPPLY("ext_5v", NULL),
4994 REGULATOR_SUPPLY("8901_mpp0", NULL),
4995};
4996
4997#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4998 [GPIO_VREG_ID_##_id] = { \
4999 .init_data = { \
5000 .constraints = { \
5001 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5002 }, \
5003 .num_consumer_supplies = \
5004 ARRAY_SIZE(vreg_consumers_##_id), \
5005 .consumer_supplies = vreg_consumers_##_id, \
5006 }, \
5007 .regulator_name = _reg_name, \
5008 .active_low = _active_low, \
5009 .gpio_label = _gpio_label, \
5010 .gpio = _gpio, \
5011 }
5012
5013/* GPIO regulator constraints */
5014static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5015 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5016 PM8901_MPP_PM_TO_SYS(0), 0),
5017};
5018
5019/* GPIO regulator */
5020static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5021 .name = GPIO_REGULATOR_DEV_NAME,
5022 .id = PM8901_MPP_PM_TO_SYS(0),
5023 .dev = {
5024 .platform_data =
5025 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5026 },
5027};
5028
5029static void __init pm8901_vreg_mpp0_init(void)
5030{
5031 int rc;
5032
5033 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5034 .mpp = PM8901_MPP_PM_TO_SYS(0),
5035 .config = {
5036 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5037 .level = PM8901_MPP_DIG_LEVEL_VPH,
5038 },
5039 };
5040
5041 /*
5042 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5043 * implies that the regulator connected to MPP0 is enabled when
5044 * MPP0 is low.
5045 */
5046 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5047 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5048 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5049 } else {
5050 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5051 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5052 }
5053
5054 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5055 if (rc)
5056 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5057}
5058
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005059static struct platform_device *charm_devices[] __initdata = {
5060 &msm_charm_modem,
5061#ifdef CONFIG_MSM_SDIO_AL
5062 &msm_device_sdio_al,
5063#endif
5064};
5065
Lei Zhou338cab82011-08-19 13:38:17 -04005066#ifdef CONFIG_SND_SOC_MSM8660_APQ
5067static struct platform_device *dragon_alsa_devices[] __initdata = {
5068 &msm_pcm,
5069 &msm_pcm_routing,
5070 &msm_cpudai0,
5071 &msm_cpudai1,
5072 &msm_cpudai_hdmi_rx,
5073 &msm_cpudai_bt_rx,
5074 &msm_cpudai_bt_tx,
5075 &msm_cpudai_fm_rx,
5076 &msm_cpudai_fm_tx,
5077 &msm_cpu_fe,
5078 &msm_stub_codec,
5079 &msm_lpa_pcm,
5080};
5081#endif
5082
5083static struct platform_device *asoc_devices[] __initdata = {
5084 &asoc_msm_pcm,
5085 &asoc_msm_dai0,
5086 &asoc_msm_dai1,
5087};
5088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005089static struct platform_device *surf_devices[] __initdata = {
5090 &msm_device_smd,
5091 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005092 &msm_pil_q6v3,
Stephen Boyd4eb885b2011-09-29 01:16:03 -07005093 &msm_pil_modem,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005094 &msm_pil_tzapps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005095#ifdef CONFIG_I2C_QUP
5096 &msm_gsbi3_qup_i2c_device,
5097 &msm_gsbi4_qup_i2c_device,
5098 &msm_gsbi7_qup_i2c_device,
5099 &msm_gsbi8_qup_i2c_device,
5100 &msm_gsbi9_qup_i2c_device,
5101 &msm_gsbi12_qup_i2c_device,
5102#endif
5103#ifdef CONFIG_SERIAL_MSM_HS
5104 &msm_device_uart_dm1,
5105#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305106#ifdef CONFIG_MSM_SSBI
5107 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305108 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305109#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005110#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005111 &msm_device_ssbi3,
5112#endif
5113#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5114 &isp1763_device,
5115#endif
5116
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005117#if defined (CONFIG_MSM_8x60_VOIP)
5118 &asoc_msm_mvs,
5119 &asoc_mvs_dai0,
5120 &asoc_mvs_dai1,
5121#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005122
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005123#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5124 &msm_device_otg,
5125#endif
5126#ifdef CONFIG_USB_GADGET_MSM_72K
5127 &msm_device_gadget_peripheral,
5128#endif
5129#ifdef CONFIG_USB_G_ANDROID
5130 &android_usb_device,
5131#endif
5132#ifdef CONFIG_BATTERY_MSM
5133 &msm_batt_device,
5134#endif
5135#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005136#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005137 &android_pmem_device,
5138 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005139 &android_pmem_smipool_device,
5140#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005141 &android_pmem_audio_device,
5142#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005143#ifdef CONFIG_MSM_ROTATOR
5144 &msm_rotator_device,
5145#endif
5146 &msm_fb_device,
5147 &msm_kgsl_3d0,
5148 &msm_kgsl_2d0,
5149 &msm_kgsl_2d1,
5150 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005151#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5152 &lcdc_nt35582_panel_device,
5153#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005154#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5155 &lcdc_samsung_oled_panel_device,
5156#endif
5157#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5158 &lcdc_auo_wvga_panel_device,
5159#endif
5160#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5161 &hdmi_msm_device,
5162#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5163#ifdef CONFIG_FB_MSM_MIPI_DSI
5164 &mipi_dsi_toshiba_panel_device,
5165 &mipi_dsi_novatek_panel_device,
5166#endif
5167#ifdef CONFIG_MSM_CAMERA
5168#ifdef CONFIG_MT9E013
5169 &msm_camera_sensor_mt9e013,
5170#endif
5171#ifdef CONFIG_IMX074
5172 &msm_camera_sensor_imx074,
5173#endif
5174#ifdef CONFIG_WEBCAM_OV7692
5175 &msm_camera_sensor_webcam_ov7692,
5176#endif
5177#ifdef CONFIG_WEBCAM_OV9726
5178 &msm_camera_sensor_webcam_ov9726,
5179#endif
5180#ifdef CONFIG_QS_S5K4E1
5181 &msm_camera_sensor_qs_s5k4e1,
5182#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005183#ifdef CONFIG_VX6953
5184 &msm_camera_sensor_vx6953,
5185#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005186#endif
5187#ifdef CONFIG_MSM_GEMINI
5188 &msm_gemini_device,
5189#endif
5190#ifdef CONFIG_MSM_VPE
5191 &msm_vpe_device,
5192#endif
5193
5194#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5195 &msm_rpm_log_device,
5196#endif
5197#if defined(CONFIG_MSM_RPM_STATS_LOG)
5198 &msm_rpm_stat_device,
5199#endif
5200 &msm_device_vidc,
5201#if (defined(CONFIG_MARIMBA_CORE)) && \
5202 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5203 &msm_bt_power_device,
5204#endif
5205#ifdef CONFIG_SENSORS_MSM_ADC
5206 &msm_adc_device,
5207#endif
David Collins6f032ba2011-08-31 14:08:15 -07005208 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005209
5210#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5211 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5212 &qcrypto_device,
5213#endif
5214
5215#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5216 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5217 &qcedev_device,
5218#endif
5219
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005220
5221#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5222#ifdef CONFIG_MSM_USE_TSIF1
5223 &msm_device_tsif[1],
5224#else
5225 &msm_device_tsif[0],
5226#endif /* CONFIG_MSM_USE_TSIF1 */
5227#endif /* CONFIG_TSIF */
5228
5229#ifdef CONFIG_HW_RANDOM_MSM
5230 &msm_device_rng,
5231#endif
5232
5233 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005234 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005235#ifdef CONFIG_ION_MSM
5236 &ion_dev,
5237#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005238 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005239};
5240
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005241#ifdef CONFIG_ION_MSM
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005242static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005243 .nr = MSM_ION_HEAP_NUM,
5244 .heaps = {
5245 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005246 .id = ION_SYSTEM_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005247 .type = ION_HEAP_TYPE_SYSTEM,
5248 .name = ION_VMALLOC_HEAP_NAME,
5249 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005250#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5251 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005252 .id = ION_SF_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005253 .type = ION_HEAP_TYPE_CARVEOUT,
Olav Hauganb5be7992011-11-18 14:29:02 -08005254 .name = ION_SF_HEAP_NAME,
5255 .size = MSM_ION_SF_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005256 .memory_type = ION_EBI_TYPE,
5257 },
5258 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005259 .id = ION_CP_MM_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005260 .type = ION_HEAP_TYPE_CARVEOUT,
Olav Hauganb5be7992011-11-18 14:29:02 -08005261 .name = ION_MM_HEAP_NAME,
5262 .size = MSM_ION_MM_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005263 .memory_type = ION_SMI_TYPE,
Olav Hauganee0f7802011-12-19 13:28:57 -08005264 .request_region = request_smi_region,
5265 .release_region = release_smi_region,
5266 .setup_region = setup_smi_region,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005267 },
Olav Hauganb5be7992011-11-18 14:29:02 -08005268 {
5269 .id = ION_CAMERA_HEAP_ID,
5270 .type = ION_HEAP_TYPE_CARVEOUT,
5271 .name = ION_CAMERA_HEAP_NAME,
5272 .size = MSM_ION_CAMERA_SIZE,
5273 .memory_type = ION_EBI_TYPE,
5274 },
5275 {
5276 .id = ION_CP_MFC_HEAP_ID,
5277 .type = ION_HEAP_TYPE_CARVEOUT,
5278 .name = ION_MFC_HEAP_NAME,
5279 .size = MSM_ION_MFC_SIZE,
5280 .memory_type = ION_SMI_TYPE,
5281 .request_region = request_smi_region,
5282 .release_region = release_smi_region,
5283 .setup_region = setup_smi_region,
5284 },
5285 {
5286 .id = ION_CP_WB_HEAP_ID,
5287 .type = ION_HEAP_TYPE_CARVEOUT,
5288 .name = ION_WB_HEAP_NAME,
5289 .size = MSM_ION_WB_SIZE,
5290 .memory_type = ION_EBI_TYPE,
5291 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005292#endif
5293 }
5294};
5295
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005296static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005297 .name = "ion-msm",
5298 .id = 1,
5299 .dev = { .platform_data = &ion_pdata },
5300};
5301#endif
5302
5303
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005304static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5305 /* Kernel SMI memory pool for video core, used for firmware */
5306 /* and encoder, decoder scratch buffers */
5307 /* Kernel SMI memory pool should always precede the user space */
5308 /* SMI memory pool, as the video core will use offset address */
5309 /* from the Firmware base */
5310 [MEMTYPE_SMI_KERNEL] = {
5311 .start = KERNEL_SMI_BASE,
5312 .limit = KERNEL_SMI_SIZE,
5313 .size = KERNEL_SMI_SIZE,
5314 .flags = MEMTYPE_FLAGS_FIXED,
5315 },
5316 /* User space SMI memory pool for video core */
5317 /* used for encoder, decoder input & output buffers */
5318 [MEMTYPE_SMI] = {
5319 .start = USER_SMI_BASE,
5320 .limit = USER_SMI_SIZE,
5321 .flags = MEMTYPE_FLAGS_FIXED,
5322 },
5323 [MEMTYPE_EBI0] = {
5324 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5325 },
5326 [MEMTYPE_EBI1] = {
5327 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5328 },
5329};
5330
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005331static void reserve_ion_memory(void)
5332{
5333#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
Olav Hauganb5be7992011-11-18 14:29:02 -08005334 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_SF_SIZE;
5335 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_SIZE;
5336 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MFC_SIZE;
5337 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_CAMERA_SIZE;
5338 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_WB_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005339#endif
5340}
5341
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005342static void __init size_pmem_devices(void)
5343{
5344#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005345#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005346 android_pmem_adsp_pdata.size = pmem_adsp_size;
5347 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005348 android_pmem_pdata.size = pmem_sf_size;
5349#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005350 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5351#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005352}
5353
5354static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5355{
5356 msm8x60_reserve_table[p->memory_type].size += p->size;
5357}
5358
5359static void __init reserve_pmem_memory(void)
5360{
5361#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005362#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005363 reserve_memory_for(&android_pmem_adsp_pdata);
5364 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005365 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005366#endif
5367 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005368 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5369#endif
5370}
5371
Huaibin Yanga5419422011-12-08 23:52:10 -08005372static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005373
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005374static void __init msm8x60_calculate_reserve_sizes(void)
5375{
5376 size_pmem_devices();
5377 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005378 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005379 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005380}
5381
5382static int msm8x60_paddr_to_memtype(unsigned int paddr)
5383{
5384 if (paddr >= 0x40000000 && paddr < 0x60000000)
5385 return MEMTYPE_EBI1;
5386 if (paddr >= 0x38000000 && paddr < 0x40000000)
5387 return MEMTYPE_SMI;
5388 return MEMTYPE_NONE;
5389}
5390
5391static struct reserve_info msm8x60_reserve_info __initdata = {
5392 .memtype_reserve_table = msm8x60_reserve_table,
5393 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5394 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5395};
5396
5397static void __init msm8x60_reserve(void)
5398{
5399 reserve_info = &msm8x60_reserve_info;
5400 msm_reserve();
5401}
5402
5403#define EXT_CHG_VALID_MPP 10
5404#define EXT_CHG_VALID_MPP_2 11
5405
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305406static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305407 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305408 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305409 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305410 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5411};
5412
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005413#ifdef CONFIG_ISL9519_CHARGER
5414static int isl_detection_setup(void)
5415{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305416 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005417
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305418 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5419 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5420 &isl_mpp[i].config);
5421 if (ret) {
5422 pr_err("%s: Config MPP %d of PM8058 failed\n",
5423 __func__, isl_mpp[i].mpp);
5424 return ret;
5425 }
5426 }
5427
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005428 return ret;
5429}
5430
5431static struct isl_platform_data isl_data __initdata = {
5432 .chgcurrent = 700,
5433 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5434 .chg_detection_config = isl_detection_setup,
5435 .max_system_voltage = 4200,
5436 .min_system_voltage = 3200,
5437 .term_current = 120,
5438 .input_current = 2048,
5439};
5440
5441static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5442 {
5443 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305444 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005445 .platform_data = &isl_data,
5446 },
5447};
5448#endif
5449
5450#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5451static int smb137b_detection_setup(void)
5452{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305453 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005454
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305455 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5456 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5457 &isl_mpp[i].config);
5458 if (ret) {
5459 pr_err("%s: Config MPP %d of PM8058 failed\n",
5460 __func__, isl_mpp[i].mpp);
5461 return ret;
5462 }
5463 }
5464
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005465 return ret;
5466}
5467
5468static struct smb137b_platform_data smb137b_data __initdata = {
5469 .chg_detection_config = smb137b_detection_setup,
5470 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5471 .batt_mah_rating = 950,
5472};
5473
5474static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5475 {
5476 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305477 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005478 .platform_data = &smb137b_data,
5479 },
5480};
5481#endif
5482
5483#ifdef CONFIG_PMIC8058
5484#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305485#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005486
5487static int pm8058_gpios_init(void)
5488{
5489 int i;
5490 int rc;
5491 struct pm8058_gpio_cfg {
5492 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305493 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005494 };
5495
5496 struct pm8058_gpio_cfg gpio_cfgs[] = {
5497 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305498 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005499 {
5500 .direction = PM_GPIO_DIR_IN,
5501 .pull = PM_GPIO_PULL_DN,
5502 .vin_sel = 2,
5503 .function = PM_GPIO_FUNC_NORMAL,
5504 .inv_int_pol = 0,
5505 },
5506 },
5507#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5508 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305509 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005510 {
5511 .direction = PM_GPIO_DIR_IN,
5512 .pull = PM_GPIO_PULL_UP_30,
5513 .vin_sel = 2,
5514 .function = PM_GPIO_FUNC_NORMAL,
5515 .inv_int_pol = 0,
5516 },
5517 },
5518#endif
5519 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305520 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005521 {
5522 .direction = PM_GPIO_DIR_IN,
5523 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305524 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005525 .function = PM_GPIO_FUNC_NORMAL,
5526 .inv_int_pol = 0,
5527 },
5528 },
5529 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305530 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005531 {
5532 .direction = PM_GPIO_DIR_IN,
5533 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305534 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005535 .function = PM_GPIO_FUNC_NORMAL,
5536 .inv_int_pol = 0,
5537 },
5538 },
5539 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305540 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005541 {
5542 .direction = PM_GPIO_DIR_IN,
5543 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305544 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005545 .function = PM_GPIO_FUNC_NORMAL,
5546 .inv_int_pol = 0,
5547 },
5548 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005549 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305550 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005551 {
5552 .direction = PM_GPIO_DIR_OUT,
5553 .output_value = 1,
5554 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5555 .pull = PM_GPIO_PULL_DN,
5556 .out_strength = PM_GPIO_STRENGTH_HIGH,
5557 .function = PM_GPIO_FUNC_NORMAL,
5558 .vin_sel = 2,
5559 .inv_int_pol = 0,
5560 }
5561 },
5562 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305563 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005564 {
5565 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305566 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005567 .function = PM_GPIO_FUNC_NORMAL,
5568 .vin_sel = 2,
5569 .inv_int_pol = 0,
5570 }
5571 },
5572 };
5573
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305574#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5575 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305576 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305577 .direction = PM_GPIO_DIR_IN,
5578 .pull = PM_GPIO_PULL_UP_1P5,
5579 .vin_sel = 2,
5580 .function = PM_GPIO_FUNC_NORMAL,
5581 };
5582#endif
5583
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005584#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305585 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305586 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305587 .direction = PM_GPIO_DIR_OUT,
5588 .pull = PM_GPIO_PULL_NO,
5589 .out_strength = PM_GPIO_STRENGTH_HIGH,
5590 .function = PM_GPIO_FUNC_NORMAL,
5591 .inv_int_pol = 0,
5592 .vin_sel = 2,
5593 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5594 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005595 };
5596#endif
5597
5598#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5599 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305600 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005601 {
5602 .direction = PM_GPIO_DIR_IN,
5603 .pull = PM_GPIO_PULL_UP_1P5,
5604 .vin_sel = 2,
5605 .function = PM_GPIO_FUNC_NORMAL,
5606 .inv_int_pol = 0,
5607 }
5608 };
5609#endif
5610
5611#if defined(CONFIG_QS_S5K4E1)
5612 {
5613 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305614 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005615 {
5616 .direction = PM_GPIO_DIR_OUT,
5617 .output_value = 0,
5618 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5619 .pull = PM_GPIO_PULL_DN,
5620 .out_strength = PM_GPIO_STRENGTH_HIGH,
5621 .function = PM_GPIO_FUNC_NORMAL,
5622 .vin_sel = 2,
5623 .inv_int_pol = 0,
5624 }
5625 };
5626#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005627#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5628 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305629 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005630 {
5631 .direction = PM_GPIO_DIR_OUT,
5632 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5633 .output_value = 1,
5634 .pull = PM_GPIO_PULL_UP_30,
5635 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305636 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005637 .out_strength = PM_GPIO_STRENGTH_HIGH,
5638 .function = PM_GPIO_FUNC_NORMAL,
5639 .inv_int_pol = 0,
5640 }
5641 };
5642#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005643#if defined(CONFIG_HAPTIC_ISA1200) || \
5644 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5645 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305646 rc = pm8xxx_gpio_config(
5647 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5648 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005649 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305650 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005651 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305652 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305653 rc = pm8xxx_gpio_config(
5654 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5655 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305656 if (rc < 0) {
5657 pr_err("%s: pmic haptics ldo gpio config failed\n",
5658 __func__);
5659 }
5660
5661 }
5662#endif
5663
5664#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5665 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5666 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5667 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305668 rc = pm8xxx_gpio_config(
5669 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5670 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305671 if (rc < 0) {
5672 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5673 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005674 }
5675 }
5676#endif
5677
5678#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5679 /* Line_in only for 8660 ffa & surf */
5680 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005681 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005682 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305683 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005684 &line_in_gpio_cfg.cfg);
5685 if (rc < 0) {
5686 pr_err("%s pmic line_in gpio config failed\n",
5687 __func__);
5688 return rc;
5689 }
5690 }
5691#endif
5692
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005693#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5694 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305695 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005696 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5697 if (rc < 0) {
5698 pr_err("%s pmic gpio config failed\n", __func__);
5699 return rc;
5700 }
5701 }
5702#endif
5703
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005704#if defined(CONFIG_QS_S5K4E1)
5705 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5706 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305707 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005708 &qs_hc37_cam_pd_gpio_cfg.cfg);
5709 if (rc < 0) {
5710 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5711 __func__);
5712 return rc;
5713 }
5714 }
5715 }
5716#endif
5717
5718 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305719 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005720 &gpio_cfgs[i].cfg);
5721 if (rc < 0) {
5722 pr_err("%s pmic gpio config failed\n",
5723 __func__);
5724 return rc;
5725 }
5726 }
5727
5728 return 0;
5729}
5730
5731static const unsigned int ffa_keymap[] = {
5732 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5733 KEY(0, 1, KEY_UP), /* NAV - UP */
5734 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5735 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5736
5737 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5738 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5739 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5740 KEY(1, 3, KEY_VOLUMEDOWN),
5741
5742 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5743
5744 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5745 KEY(4, 1, KEY_UP), /* USER_UP */
5746 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5747 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5748 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5749
5750 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5751 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5752 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5753 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5754 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5755};
5756
Zhang Chang Ken683be172011-08-10 17:45:34 -04005757static const unsigned int dragon_keymap[] = {
5758 KEY(0, 0, KEY_MENU),
5759 KEY(0, 2, KEY_1),
5760 KEY(0, 3, KEY_4),
5761 KEY(0, 4, KEY_7),
5762
5763 KEY(1, 0, KEY_UP),
5764 KEY(1, 1, KEY_LEFT),
5765 KEY(1, 2, KEY_DOWN),
5766 KEY(1, 3, KEY_5),
5767 KEY(1, 4, KEY_8),
5768
5769 KEY(2, 0, KEY_HOME),
5770 KEY(2, 1, KEY_REPLY),
5771 KEY(2, 2, KEY_2),
5772 KEY(2, 3, KEY_6),
5773 KEY(2, 4, KEY_0),
5774
5775 KEY(3, 0, KEY_VOLUMEUP),
5776 KEY(3, 1, KEY_RIGHT),
5777 KEY(3, 2, KEY_3),
5778 KEY(3, 3, KEY_9),
5779 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5780
5781 KEY(4, 0, KEY_VOLUMEDOWN),
5782 KEY(4, 1, KEY_BACK),
5783 KEY(4, 2, KEY_CAMERA),
5784 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5785};
5786
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005787static struct matrix_keymap_data ffa_keymap_data = {
5788 .keymap_size = ARRAY_SIZE(ffa_keymap),
5789 .keymap = ffa_keymap,
5790};
5791
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305792static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005793 .input_name = "ffa-keypad",
5794 .input_phys_device = "ffa-keypad/input0",
5795 .num_rows = 6,
5796 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305797 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5798 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5799 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005800 .scan_delay_ms = 32,
5801 .row_hold_ns = 91500,
5802 .wakeup = 1,
5803 .keymap_data = &ffa_keymap_data,
5804};
5805
Zhang Chang Ken683be172011-08-10 17:45:34 -04005806static struct matrix_keymap_data dragon_keymap_data = {
5807 .keymap_size = ARRAY_SIZE(dragon_keymap),
5808 .keymap = dragon_keymap,
5809};
5810
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305811static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005812 .input_name = "dragon-keypad",
5813 .input_phys_device = "dragon-keypad/input0",
5814 .num_rows = 6,
5815 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305816 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5817 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5818 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005819 .scan_delay_ms = 32,
5820 .row_hold_ns = 91500,
5821 .wakeup = 1,
5822 .keymap_data = &dragon_keymap_data,
5823};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305824
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005825static const unsigned int fluid_keymap[] = {
5826 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5827 KEY(0, 1, KEY_UP), /* NAV - UP */
5828 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5829 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5830
5831 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5832 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5833 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5834 KEY(1, 3, KEY_VOLUMEUP),
5835
5836 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5837
5838 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5839 KEY(4, 1, KEY_UP), /* USER_UP */
5840 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5841 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5842 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5843
Jilai Wang9a895102011-07-12 14:00:35 -04005844 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005845 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5846 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5847 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5848 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5849};
5850
5851static struct matrix_keymap_data fluid_keymap_data = {
5852 .keymap_size = ARRAY_SIZE(fluid_keymap),
5853 .keymap = fluid_keymap,
5854};
5855
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305856static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005857 .input_name = "fluid-keypad",
5858 .input_phys_device = "fluid-keypad/input0",
5859 .num_rows = 6,
5860 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305861 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5862 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5863 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005864 .scan_delay_ms = 32,
5865 .row_hold_ns = 91500,
5866 .wakeup = 1,
5867 .keymap_data = &fluid_keymap_data,
5868};
5869
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305870static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005871 .initial_vibrate_ms = 500,
5872 .level_mV = 3000,
5873 .max_timeout_ms = 15000,
5874};
5875
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305876static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5877 .rtc_write_enable = false,
5878 .rtc_alarm_powerup = false,
5879};
5880
5881static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5882 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005883 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305884 .wakeup = 1,
5885};
5886
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005887#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5888
5889static struct othc_accessory_info othc_accessories[] = {
5890 {
5891 .accessory = OTHC_SVIDEO_OUT,
5892 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5893 | OTHC_ADC_DETECT,
5894 .key_code = SW_VIDEOOUT_INSERT,
5895 .enabled = false,
5896 .adc_thres = {
5897 .min_threshold = 20,
5898 .max_threshold = 40,
5899 },
5900 },
5901 {
5902 .accessory = OTHC_ANC_HEADPHONE,
5903 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5904 OTHC_SWITCH_DETECT,
5905 .gpio = PM8058_LINE_IN_DET_GPIO,
5906 .active_low = 1,
5907 .key_code = SW_HEADPHONE_INSERT,
5908 .enabled = true,
5909 },
5910 {
5911 .accessory = OTHC_ANC_HEADSET,
5912 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5913 .gpio = PM8058_LINE_IN_DET_GPIO,
5914 .active_low = 1,
5915 .key_code = SW_HEADPHONE_INSERT,
5916 .enabled = true,
5917 },
5918 {
5919 .accessory = OTHC_HEADPHONE,
5920 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5921 .key_code = SW_HEADPHONE_INSERT,
5922 .enabled = true,
5923 },
5924 {
5925 .accessory = OTHC_MICROPHONE,
5926 .detect_flags = OTHC_GPIO_DETECT,
5927 .gpio = PM8058_LINE_IN_DET_GPIO,
5928 .active_low = 1,
5929 .key_code = SW_MICROPHONE_INSERT,
5930 .enabled = true,
5931 },
5932 {
5933 .accessory = OTHC_HEADSET,
5934 .detect_flags = OTHC_MICBIAS_DETECT,
5935 .key_code = SW_HEADPHONE_INSERT,
5936 .enabled = true,
5937 },
5938};
5939
5940static struct othc_switch_info switch_info[] = {
5941 {
5942 .min_adc_threshold = 0,
5943 .max_adc_threshold = 100,
5944 .key_code = KEY_PLAYPAUSE,
5945 },
5946 {
5947 .min_adc_threshold = 100,
5948 .max_adc_threshold = 200,
5949 .key_code = KEY_REWIND,
5950 },
5951 {
5952 .min_adc_threshold = 200,
5953 .max_adc_threshold = 500,
5954 .key_code = KEY_FASTFORWARD,
5955 },
5956};
5957
5958static struct othc_n_switch_config switch_config = {
5959 .voltage_settling_time_ms = 0,
5960 .num_adc_samples = 3,
5961 .adc_channel = CHANNEL_ADC_HDSET,
5962 .switch_info = switch_info,
5963 .num_keys = ARRAY_SIZE(switch_info),
5964 .default_sw_en = true,
5965 .default_sw_idx = 0,
5966};
5967
5968static struct hsed_bias_config hsed_bias_config = {
5969 /* HSED mic bias config info */
5970 .othc_headset = OTHC_HEADSET_NO,
5971 .othc_lowcurr_thresh_uA = 100,
5972 .othc_highcurr_thresh_uA = 600,
5973 .othc_hyst_prediv_us = 7800,
5974 .othc_period_clkdiv_us = 62500,
5975 .othc_hyst_clk_us = 121000,
5976 .othc_period_clk_us = 312500,
5977 .othc_wakeup = 1,
5978};
5979
5980static struct othc_hsed_config hsed_config_1 = {
5981 .hsed_bias_config = &hsed_bias_config,
5982 /*
5983 * The detection delay and switch reporting delay are
5984 * required to encounter a hardware bug (spurious switch
5985 * interrupts on slow insertion/removal of the headset).
5986 * This will introduce a delay in reporting the accessory
5987 * insertion and removal to the userspace.
5988 */
5989 .detection_delay_ms = 1500,
5990 /* Switch info */
5991 .switch_debounce_ms = 1500,
5992 .othc_support_n_switch = false,
5993 .switch_config = &switch_config,
5994 .ir_gpio = -1,
5995 /* Accessory info */
5996 .accessories_support = true,
5997 .accessories = othc_accessories,
5998 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
5999};
6000
6001static struct othc_regulator_config othc_reg = {
6002 .regulator = "8058_l5",
6003 .max_uV = 2850000,
6004 .min_uV = 2850000,
6005};
6006
6007/* MIC_BIAS0 is configured as normal MIC BIAS */
6008static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
6009 .micbias_select = OTHC_MICBIAS_0,
6010 .micbias_capability = OTHC_MICBIAS,
6011 .micbias_enable = OTHC_SIGNAL_OFF,
6012 .micbias_regulator = &othc_reg,
6013};
6014
6015/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
6016static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6017 .micbias_select = OTHC_MICBIAS_1,
6018 .micbias_capability = OTHC_MICBIAS_HSED,
6019 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6020 .micbias_regulator = &othc_reg,
6021 .hsed_config = &hsed_config_1,
6022 .hsed_name = "8660_handset",
6023};
6024
6025/* MIC_BIAS2 is configured as normal MIC BIAS */
6026static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6027 .micbias_select = OTHC_MICBIAS_2,
6028 .micbias_capability = OTHC_MICBIAS,
6029 .micbias_enable = OTHC_SIGNAL_OFF,
6030 .micbias_regulator = &othc_reg,
6031};
6032
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006033
6034static void __init msm8x60_init_pm8058_othc(void)
6035{
6036 int i;
6037
6038 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6039 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6040 machine_is_msm8x60_fusn_ffa()) {
6041 /* 3-switch headset supported only by V2 FFA and FLUID */
6042 hsed_config_1.accessories_adc_support = true,
6043 /* ADC based accessory detection works only on V2 and FLUID */
6044 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6045 hsed_config_1.othc_support_n_switch = true;
6046 }
6047
6048 /* IR GPIO is absent on FLUID */
6049 if (machine_is_msm8x60_fluid())
6050 hsed_config_1.ir_gpio = -1;
6051
6052 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6053 if (machine_is_msm8x60_fluid()) {
6054 switch (othc_accessories[i].accessory) {
6055 case OTHC_ANC_HEADPHONE:
6056 case OTHC_ANC_HEADSET:
6057 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6058 break;
6059 case OTHC_MICROPHONE:
6060 othc_accessories[i].enabled = false;
6061 break;
6062 case OTHC_SVIDEO_OUT:
6063 othc_accessories[i].enabled = true;
6064 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6065 break;
6066 }
6067 }
6068 }
6069}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006070
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006071
6072static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6073{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306074 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006075 .direction = PM_GPIO_DIR_OUT,
6076 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6077 .output_value = 0,
6078 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306079 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006080 .out_strength = PM_GPIO_STRENGTH_HIGH,
6081 .function = PM_GPIO_FUNC_2,
6082 };
6083
6084 int rc = -EINVAL;
6085 int id, mode, max_mA;
6086
6087 id = mode = max_mA = 0;
6088 switch (ch) {
6089 case 0:
6090 case 1:
6091 case 2:
6092 if (on) {
6093 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306094 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6095 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006096 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306097 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006098 __func__, id, rc);
6099 }
6100 break;
6101
6102 case 6:
6103 id = PM_PWM_LED_FLASH;
6104 mode = PM_PWM_CONF_PWM1;
6105 max_mA = 300;
6106 break;
6107
6108 case 7:
6109 id = PM_PWM_LED_FLASH1;
6110 mode = PM_PWM_CONF_PWM1;
6111 max_mA = 300;
6112 break;
6113
6114 default:
6115 break;
6116 }
6117
6118 if (ch >= 6 && ch <= 7) {
6119 if (!on) {
6120 mode = PM_PWM_CONF_NONE;
6121 max_mA = 0;
6122 }
6123 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6124 if (rc)
6125 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6126 __func__, ch, rc);
6127 }
6128 return rc;
6129
6130}
6131
6132static struct pm8058_pwm_pdata pm8058_pwm_data = {
6133 .config = pm8058_pwm_config,
6134};
6135
6136#define PM8058_GPIO_INT 88
6137
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006138static struct pmic8058_led pmic8058_flash_leds[] = {
6139 [0] = {
6140 .name = "camera:flash0",
6141 .max_brightness = 15,
6142 .id = PMIC8058_ID_FLASH_LED_0,
6143 },
6144 [1] = {
6145 .name = "camera:flash1",
6146 .max_brightness = 15,
6147 .id = PMIC8058_ID_FLASH_LED_1,
6148 },
6149};
6150
6151static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6152 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6153 .leds = pmic8058_flash_leds,
6154};
6155
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006156static struct pmic8058_led pmic8058_dragon_leds[] = {
6157 [0] = {
6158 /* RED */
6159 .name = "led_drv0",
6160 .max_brightness = 15,
6161 .id = PMIC8058_ID_LED_0,
6162 },/* 300 mA flash led0 drv sink */
6163 [1] = {
6164 /* Yellow */
6165 .name = "led_drv1",
6166 .max_brightness = 15,
6167 .id = PMIC8058_ID_LED_1,
6168 },/* 300 mA flash led0 drv sink */
6169 [2] = {
6170 /* Green */
6171 .name = "led_drv2",
6172 .max_brightness = 15,
6173 .id = PMIC8058_ID_LED_2,
6174 },/* 300 mA flash led0 drv sink */
6175 [3] = {
6176 .name = "led_psensor",
6177 .max_brightness = 15,
6178 .id = PMIC8058_ID_LED_KB_LIGHT,
6179 },/* 300 mA flash led0 drv sink */
6180};
6181
6182static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6183 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6184 .leds = pmic8058_dragon_leds,
6185};
6186
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006187static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6188 [0] = {
6189 .name = "led:drv0",
6190 .max_brightness = 15,
6191 .id = PMIC8058_ID_FLASH_LED_0,
6192 },/* 300 mA flash led0 drv sink */
6193 [1] = {
6194 .name = "led:drv1",
6195 .max_brightness = 15,
6196 .id = PMIC8058_ID_FLASH_LED_1,
6197 },/* 300 mA flash led1 sink */
6198 [2] = {
6199 .name = "led:drv2",
6200 .max_brightness = 20,
6201 .id = PMIC8058_ID_LED_0,
6202 },/* 40 mA led0 sink */
6203 [3] = {
6204 .name = "keypad:drv",
6205 .max_brightness = 15,
6206 .id = PMIC8058_ID_LED_KB_LIGHT,
6207 },/* 300 mA keypad drv sink */
6208};
6209
6210static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6211 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6212 .leds = pmic8058_fluid_flash_leds,
6213};
6214
Terence Hampson90508a92011-08-09 10:40:08 -04006215static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306216 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006217 .max_source_current = 1800,
6218 .charger_type = CHG_TYPE_AC,
6219};
6220
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306221static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6222 .charger_data_valid = false,
6223};
6224
6225static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6226 .priority = 0,
6227};
6228
6229static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6230 .irq_base = PM8058_IRQ_BASE,
6231 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6232 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6233};
6234
6235static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6236 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6237};
6238
6239static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6240 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006241};
6242
6243static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306244 .irq_pdata = &pm8058_irq_pdata,
6245 .gpio_pdata = &pm8058_gpio_pdata,
6246 .mpp_pdata = &pm8058_mpp_pdata,
6247 .rtc_pdata = &pm8058_rtc_pdata,
6248 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6249 .othc0_pdata = &othc_config_pdata_0,
6250 .othc1_pdata = &othc_config_pdata_1,
6251 .othc2_pdata = &othc_config_pdata_2,
6252 .pwm_pdata = &pm8058_pwm_data,
6253 .misc_pdata = &pm8058_misc_pdata,
6254#ifdef CONFIG_SENSORS_MSM_ADC
6255 .xoadc_pdata = &pm8058_xoadc_pdata,
6256#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006257};
6258
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306259#ifdef CONFIG_MSM_SSBI
6260static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6261 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6262 .slave = {
6263 .name = "pm8058-core",
6264 .platform_data = &pm8058_platform_data,
6265 },
6266};
6267#endif
6268#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006269
6270#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6271 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6272#define TDISC_I2C_SLAVE_ADDR 0x67
6273#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6274#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6275
6276static const char *vregs_tdisc_name[] = {
6277 "8058_l5",
6278 "8058_s3",
6279};
6280
6281static const int vregs_tdisc_val[] = {
6282 2850000,/* uV */
6283 1800000,
6284};
6285static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6286
6287static int tdisc_shinetsu_setup(void)
6288{
6289 int rc, i;
6290
6291 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6292 if (rc) {
6293 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6294 __func__);
6295 return rc;
6296 }
6297
6298 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6299 if (rc) {
6300 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6301 __func__);
6302 goto fail_gpio_oe;
6303 }
6304
6305 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6306 if (rc) {
6307 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6308 __func__);
6309 gpio_free(GPIO_JOYSTICK_EN);
6310 goto fail_gpio_oe;
6311 }
6312
6313 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6314 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6315 if (IS_ERR(vregs_tdisc[i])) {
6316 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6317 __func__, vregs_tdisc_name[i],
6318 PTR_ERR(vregs_tdisc[i]));
6319 rc = PTR_ERR(vregs_tdisc[i]);
6320 goto vreg_get_fail;
6321 }
6322
6323 rc = regulator_set_voltage(vregs_tdisc[i],
6324 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6325 if (rc) {
6326 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6327 __func__, rc);
6328 goto vreg_set_voltage_fail;
6329 }
6330 }
6331
6332 return rc;
6333vreg_set_voltage_fail:
6334 i++;
6335vreg_get_fail:
6336 while (i)
6337 regulator_put(vregs_tdisc[--i]);
6338fail_gpio_oe:
6339 gpio_free(PMIC_GPIO_TDISC);
6340 return rc;
6341}
6342
6343static void tdisc_shinetsu_release(void)
6344{
6345 int i;
6346
6347 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6348 regulator_put(vregs_tdisc[i]);
6349
6350 gpio_free(PMIC_GPIO_TDISC);
6351 gpio_free(GPIO_JOYSTICK_EN);
6352}
6353
6354static int tdisc_shinetsu_enable(void)
6355{
6356 int i, rc = -EINVAL;
6357
6358 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6359 rc = regulator_enable(vregs_tdisc[i]);
6360 if (rc < 0) {
6361 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6362 __func__, vregs_tdisc_name[i], rc);
6363 goto vreg_fail;
6364 }
6365 }
6366
6367 /* Enable the OE (output enable) gpio */
6368 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6369 /* voltage and gpio stabilization delay */
6370 msleep(50);
6371
6372 return 0;
6373vreg_fail:
6374 while (i)
6375 regulator_disable(vregs_tdisc[--i]);
6376 return rc;
6377}
6378
6379static int tdisc_shinetsu_disable(void)
6380{
6381 int i, rc;
6382
6383 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6384 rc = regulator_disable(vregs_tdisc[i]);
6385 if (rc < 0) {
6386 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6387 __func__, vregs_tdisc_name[i], rc);
6388 goto tdisc_reg_fail;
6389 }
6390 }
6391
6392 /* Disable the OE (output enable) gpio */
6393 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6394
6395 return 0;
6396
6397tdisc_reg_fail:
6398 while (i)
6399 regulator_enable(vregs_tdisc[--i]);
6400 return rc;
6401}
6402
6403static struct tdisc_abs_values tdisc_abs = {
6404 .x_max = 32,
6405 .y_max = 32,
6406 .x_min = -32,
6407 .y_min = -32,
6408 .pressure_max = 32,
6409 .pressure_min = 0,
6410};
6411
6412static struct tdisc_platform_data tdisc_data = {
6413 .tdisc_setup = tdisc_shinetsu_setup,
6414 .tdisc_release = tdisc_shinetsu_release,
6415 .tdisc_enable = tdisc_shinetsu_enable,
6416 .tdisc_disable = tdisc_shinetsu_disable,
6417 .tdisc_wakeup = 0,
6418 .tdisc_gpio = PMIC_GPIO_TDISC,
6419 .tdisc_report_keys = true,
6420 .tdisc_report_relative = true,
6421 .tdisc_report_absolute = false,
6422 .tdisc_report_wheel = false,
6423 .tdisc_reverse_x = false,
6424 .tdisc_reverse_y = true,
6425 .tdisc_abs = &tdisc_abs,
6426};
6427
6428static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6429 {
6430 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6431 .irq = TDISC_INT,
6432 .platform_data = &tdisc_data,
6433 },
6434};
6435#endif
6436
6437#define PM_GPIO_CDC_RST_N 20
6438#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6439
6440static struct regulator *vreg_timpani_1;
6441static struct regulator *vreg_timpani_2;
6442
6443static unsigned int msm_timpani_setup_power(void)
6444{
6445 int rc;
6446
6447 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6448 if (IS_ERR(vreg_timpani_1)) {
6449 pr_err("%s: Unable to get 8058_l0\n", __func__);
6450 return -ENODEV;
6451 }
6452
6453 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6454 if (IS_ERR(vreg_timpani_2)) {
6455 pr_err("%s: Unable to get 8058_s3\n", __func__);
6456 regulator_put(vreg_timpani_1);
6457 return -ENODEV;
6458 }
6459
6460 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6461 if (rc) {
6462 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6463 goto fail;
6464 }
6465
6466 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6467 if (rc) {
6468 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6469 goto fail;
6470 }
6471
6472 rc = regulator_enable(vreg_timpani_1);
6473 if (rc) {
6474 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6475 goto fail;
6476 }
6477
6478 /* The settings for LDO0 should be set such that
6479 * it doesn't require to reset the timpani. */
6480 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6481 if (rc < 0) {
6482 pr_err("Timpani regulator optimum mode setting failed\n");
6483 goto fail;
6484 }
6485
6486 rc = regulator_enable(vreg_timpani_2);
6487 if (rc) {
6488 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6489 regulator_disable(vreg_timpani_1);
6490 goto fail;
6491 }
6492
6493 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6494 if (rc) {
6495 pr_err("%s: GPIO Request %d failed\n", __func__,
6496 GPIO_CDC_RST_N);
6497 regulator_disable(vreg_timpani_1);
6498 regulator_disable(vreg_timpani_2);
6499 goto fail;
6500 } else {
6501 gpio_direction_output(GPIO_CDC_RST_N, 1);
6502 usleep_range(1000, 1050);
6503 gpio_direction_output(GPIO_CDC_RST_N, 0);
6504 usleep_range(1000, 1050);
6505 gpio_direction_output(GPIO_CDC_RST_N, 1);
6506 gpio_free(GPIO_CDC_RST_N);
6507 }
6508 return rc;
6509
6510fail:
6511 regulator_put(vreg_timpani_1);
6512 regulator_put(vreg_timpani_2);
6513 return rc;
6514}
6515
6516static void msm_timpani_shutdown_power(void)
6517{
6518 int rc;
6519
6520 rc = regulator_disable(vreg_timpani_1);
6521 if (rc)
6522 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6523
6524 regulator_put(vreg_timpani_1);
6525
6526 rc = regulator_disable(vreg_timpani_2);
6527 if (rc)
6528 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6529
6530 regulator_put(vreg_timpani_2);
6531}
6532
6533/* Power analog function of codec */
6534static struct regulator *vreg_timpani_cdc_apwr;
6535static int msm_timpani_codec_power(int vreg_on)
6536{
6537 int rc = 0;
6538
6539 if (!vreg_timpani_cdc_apwr) {
6540
6541 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6542
6543 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6544 pr_err("%s: vreg_get failed (%ld)\n",
6545 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6546 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6547 return rc;
6548 }
6549 }
6550
6551 if (vreg_on) {
6552
6553 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6554 2200000, 2200000);
6555 if (rc) {
6556 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6557 __func__);
6558 goto vreg_fail;
6559 }
6560
6561 rc = regulator_enable(vreg_timpani_cdc_apwr);
6562 if (rc) {
6563 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6564 goto vreg_fail;
6565 }
6566 } else {
6567 rc = regulator_disable(vreg_timpani_cdc_apwr);
6568 if (rc) {
6569 pr_err("%s: vreg_disable failed %d\n",
6570 __func__, rc);
6571 goto vreg_fail;
6572 }
6573 }
6574
6575 return 0;
6576
6577vreg_fail:
6578 regulator_put(vreg_timpani_cdc_apwr);
6579 vreg_timpani_cdc_apwr = NULL;
6580 return rc;
6581}
6582
6583static struct marimba_codec_platform_data timpani_codec_pdata = {
6584 .marimba_codec_power = msm_timpani_codec_power,
6585};
6586
6587#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6588#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6589
6590static struct marimba_platform_data timpani_pdata = {
6591 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6592 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6593 .marimba_setup = msm_timpani_setup_power,
6594 .marimba_shutdown = msm_timpani_shutdown_power,
6595 .codec = &timpani_codec_pdata,
6596 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6597};
6598
6599#define TIMPANI_I2C_SLAVE_ADDR 0xD
6600
6601static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6602 {
6603 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6604 .platform_data = &timpani_pdata,
6605 },
6606};
6607
Lei Zhou338cab82011-08-19 13:38:17 -04006608#ifdef CONFIG_SND_SOC_WM8903
6609static struct wm8903_platform_data wm8903_pdata = {
6610 .gpio_cfg[2] = 0x3A8,
6611};
6612
6613#define WM8903_I2C_SLAVE_ADDR 0x34
6614static struct i2c_board_info wm8903_codec_i2c_info[] = {
6615 {
6616 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6617 .platform_data = &wm8903_pdata,
6618 },
6619};
6620#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006621#ifdef CONFIG_PMIC8901
6622
6623#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006624/*
6625 * Consumer specific regulator names:
6626 * regulator name consumer dev_name
6627 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006628static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6629 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6630};
6631static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6632 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6633};
6634
6635#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306636 _always_on) \
6637 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006638 .init_data = { \
6639 .constraints = { \
6640 .valid_modes_mask = _modes, \
6641 .valid_ops_mask = _ops, \
6642 .min_uV = _min_uV, \
6643 .max_uV = _max_uV, \
6644 .input_uV = _min_uV, \
6645 .apply_uV = _apply_uV, \
6646 .always_on = _always_on, \
6647 }, \
6648 .consumer_supplies = vreg_consumers_8901_##_id, \
6649 .num_consumer_supplies = \
6650 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6651 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306652 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006653 }
6654
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006655#define PM8901_VREG_INIT_VS(_id) \
6656 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306657 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006658
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306659static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006660 PM8901_VREG_INIT_VS(USB_OTG),
6661 PM8901_VREG_INIT_VS(HDMI_MVS),
6662};
6663
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306664static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6665 .priority = 1,
6666};
6667
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306668static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6669 .irq_base = PM8901_IRQ_BASE,
6670 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6671 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6672};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006673
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306674static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6675 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006676};
6677
6678static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306679 .irq_pdata = &pm8901_irq_pdata,
6680 .mpp_pdata = &pm8901_mpp_pdata,
6681 .regulator_pdatas = pm8901_vreg_init,
6682 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306683 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006684};
6685
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306686static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6687 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6688 .slave = {
6689 .name = "pm8901-core",
6690 .platform_data = &pm8901_platform_data,
6691 },
6692};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006693#endif /* CONFIG_PMIC8901 */
6694
6695#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6696 || defined(CONFIG_GPIO_SX150X_MODULE))
6697
6698static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006699static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006700
6701struct bahama_config_register{
6702 u8 reg;
6703 u8 value;
6704 u8 mask;
6705};
6706
6707enum version{
6708 VER_1_0,
6709 VER_2_0,
6710 VER_UNSUPPORTED = 0xFF
6711};
6712
6713static u8 read_bahama_ver(void)
6714{
6715 int rc;
6716 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6717 u8 bahama_version;
6718
6719 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6720 if (rc < 0) {
6721 printk(KERN_ERR
6722 "%s: version read failed: %d\n",
6723 __func__, rc);
6724 return VER_UNSUPPORTED;
6725 } else {
6726 printk(KERN_INFO
6727 "%s: version read got: 0x%x\n",
6728 __func__, bahama_version);
6729 }
6730
6731 switch (bahama_version) {
6732 case 0x08: /* varient of bahama v1 */
6733 case 0x10:
6734 case 0x00:
6735 return VER_1_0;
6736 case 0x09: /* variant of bahama v2 */
6737 return VER_2_0;
6738 default:
6739 return VER_UNSUPPORTED;
6740 }
6741}
6742
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006743static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006744static unsigned int msm_bahama_setup_power(void)
6745{
6746 int rc = 0;
6747 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006748
6749 if (machine_is_msm8x60_dragon())
6750 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6751
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006752 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6753
6754 if (IS_ERR(vreg_bahama)) {
6755 rc = PTR_ERR(vreg_bahama);
6756 pr_err("%s: regulator_get %s = %d\n", __func__,
6757 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006758 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006759 }
6760
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006761 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6762 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006763 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6764 msm_bahama_regulator, rc);
6765 goto unget;
6766 }
6767
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006768 rc = regulator_enable(vreg_bahama);
6769 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006770 pr_err("%s: regulator_enable %s = %d\n", __func__,
6771 msm_bahama_regulator, rc);
6772 goto unget;
6773 }
6774
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006775 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6776 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006777 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006778 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006779 goto unenable;
6780 }
6781
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006782 gpio_direction_output(msm_bahama_sys_rst, 0);
6783 usleep_range(1000, 1050);
6784 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6785 usleep_range(1000, 1050);
6786 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006787 return rc;
6788
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006789unenable:
6790 regulator_disable(vreg_bahama);
6791unget:
6792 regulator_put(vreg_bahama);
6793 return rc;
6794};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006795
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006796static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006797{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006798 if (msm_bahama_setup_power_enable) {
6799 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6800 gpio_free(msm_bahama_sys_rst);
6801 regulator_disable(vreg_bahama);
6802 regulator_put(vreg_bahama);
6803 msm_bahama_setup_power_enable = 0;
6804 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006805
6806 return 0;
6807};
6808
6809static unsigned int msm_bahama_core_config(int type)
6810{
6811 int rc = 0;
6812
6813 if (type == BAHAMA_ID) {
6814
6815 int i;
6816 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6817
6818 const struct bahama_config_register v20_init[] = {
6819 /* reg, value, mask */
6820 { 0xF4, 0x84, 0xFF }, /* AREG */
6821 { 0xF0, 0x04, 0xFF } /* DREG */
6822 };
6823
6824 if (read_bahama_ver() == VER_2_0) {
6825 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6826 u8 value = v20_init[i].value;
6827 rc = marimba_write_bit_mask(&config,
6828 v20_init[i].reg,
6829 &value,
6830 sizeof(v20_init[i].value),
6831 v20_init[i].mask);
6832 if (rc < 0) {
6833 printk(KERN_ERR
6834 "%s: reg %d write failed: %d\n",
6835 __func__, v20_init[i].reg, rc);
6836 return rc;
6837 }
6838 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6839 " mask 0x%02x\n",
6840 __func__, v20_init[i].reg,
6841 v20_init[i].value, v20_init[i].mask);
6842 }
6843 }
6844 }
6845 printk(KERN_INFO "core type: %d\n", type);
6846
6847 return rc;
6848}
6849
6850static struct regulator *fm_regulator_s3;
6851static struct msm_xo_voter *fm_clock;
6852
6853static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6854{
6855 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306856 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006857 .direction = PM_GPIO_DIR_IN,
6858 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306859 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006860 .function = PM_GPIO_FUNC_NORMAL,
6861 .inv_int_pol = 0,
6862 };
6863
6864 if (!fm_regulator_s3) {
6865 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6866 if (IS_ERR(fm_regulator_s3)) {
6867 rc = PTR_ERR(fm_regulator_s3);
6868 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6869 __func__, rc);
6870 goto out;
6871 }
6872 }
6873
6874
6875 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6876 if (rc < 0) {
6877 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6878 __func__, rc);
6879 goto fm_fail_put;
6880 }
6881
6882 rc = regulator_enable(fm_regulator_s3);
6883 if (rc < 0) {
6884 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6885 __func__, rc);
6886 goto fm_fail_put;
6887 }
6888
6889 /*Vote for XO clock*/
6890 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6891
6892 if (IS_ERR(fm_clock)) {
6893 rc = PTR_ERR(fm_clock);
6894 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6895 __func__, rc);
6896 goto fm_fail_switch;
6897 }
6898
6899 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6900 if (rc < 0) {
6901 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6902 __func__, rc);
6903 goto fm_fail_vote;
6904 }
6905
6906 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306907 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006908 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306909 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006910 __func__, rc);
6911 goto fm_fail_clock;
6912 }
6913 goto out;
6914
6915fm_fail_clock:
6916 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6917fm_fail_vote:
6918 msm_xo_put(fm_clock);
6919fm_fail_switch:
6920 regulator_disable(fm_regulator_s3);
6921fm_fail_put:
6922 regulator_put(fm_regulator_s3);
6923out:
6924 return rc;
6925};
6926
6927static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6928{
6929 int rc = 0;
6930 if (fm_regulator_s3 != NULL) {
6931 rc = regulator_disable(fm_regulator_s3);
6932 if (rc < 0) {
6933 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6934 __func__, rc);
6935 }
6936 regulator_put(fm_regulator_s3);
6937 fm_regulator_s3 = NULL;
6938 }
6939 printk(KERN_ERR "%s: Voting off for XO", __func__);
6940
6941 if (fm_clock != NULL) {
6942 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6943 if (rc < 0) {
6944 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6945 __func__, rc);
6946 }
6947 msm_xo_put(fm_clock);
6948 }
6949 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6950}
6951
6952/* Slave id address for FM/CDC/QMEMBIST
6953 * Values can be programmed using Marimba slave id 0
6954 * should there be a conflict with other I2C devices
6955 * */
6956#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6957#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6958
6959static struct marimba_fm_platform_data marimba_fm_pdata = {
6960 .fm_setup = fm_radio_setup,
6961 .fm_shutdown = fm_radio_shutdown,
6962 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6963 .is_fm_soc_i2s_master = false,
6964 .config_i2s_gpio = NULL,
6965};
6966
6967/*
6968Just initializing the BAHAMA related slave
6969*/
6970static struct marimba_platform_data marimba_pdata = {
6971 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6972 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6973 .bahama_setup = msm_bahama_setup_power,
6974 .bahama_shutdown = msm_bahama_shutdown_power,
6975 .bahama_core_config = msm_bahama_core_config,
6976 .fm = &marimba_fm_pdata,
6977 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6978};
6979
6980
6981static struct i2c_board_info msm_marimba_board_info[] = {
6982 {
6983 I2C_BOARD_INFO("marimba", 0xc),
6984 .platform_data = &marimba_pdata,
6985 }
6986};
6987#endif /* CONFIG_MAIMBA_CORE */
6988
6989#ifdef CONFIG_I2C
6990#define I2C_SURF 1
6991#define I2C_FFA (1 << 1)
6992#define I2C_RUMI (1 << 2)
6993#define I2C_SIM (1 << 3)
6994#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04006995#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006996
6997struct i2c_registry {
6998 u8 machs;
6999 int bus;
7000 struct i2c_board_info *info;
7001 int len;
7002};
7003
7004static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007005#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7006 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007007 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007008 MSM_GSBI8_QUP_I2C_BUS_ID,
7009 core_expander_i2c_info,
7010 ARRAY_SIZE(core_expander_i2c_info),
7011 },
7012 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007013 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007014 MSM_GSBI8_QUP_I2C_BUS_ID,
7015 docking_expander_i2c_info,
7016 ARRAY_SIZE(docking_expander_i2c_info),
7017 },
7018 {
7019 I2C_SURF,
7020 MSM_GSBI8_QUP_I2C_BUS_ID,
7021 surf_expanders_i2c_info,
7022 ARRAY_SIZE(surf_expanders_i2c_info),
7023 },
7024 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007025 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007026 MSM_GSBI3_QUP_I2C_BUS_ID,
7027 fha_expanders_i2c_info,
7028 ARRAY_SIZE(fha_expanders_i2c_info),
7029 },
7030 {
7031 I2C_FLUID,
7032 MSM_GSBI3_QUP_I2C_BUS_ID,
7033 fluid_expanders_i2c_info,
7034 ARRAY_SIZE(fluid_expanders_i2c_info),
7035 },
7036 {
7037 I2C_FLUID,
7038 MSM_GSBI8_QUP_I2C_BUS_ID,
7039 fluid_core_expander_i2c_info,
7040 ARRAY_SIZE(fluid_core_expander_i2c_info),
7041 },
7042#endif
7043#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7044 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7045 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007046 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007047 MSM_GSBI3_QUP_I2C_BUS_ID,
7048 msm_i2c_gsbi3_tdisc_info,
7049 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7050 },
7051#endif
7052 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007053 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007054 MSM_GSBI3_QUP_I2C_BUS_ID,
7055 cy8ctmg200_board_info,
7056 ARRAY_SIZE(cy8ctmg200_board_info),
7057 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007058 {
7059 I2C_DRAGON,
7060 MSM_GSBI3_QUP_I2C_BUS_ID,
7061 cy8ctma340_dragon_board_info,
7062 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7063 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007064#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7065 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7066 {
7067 I2C_FLUID,
7068 MSM_GSBI3_QUP_I2C_BUS_ID,
7069 cyttsp_fluid_info,
7070 ARRAY_SIZE(cyttsp_fluid_info),
7071 },
7072 {
7073 I2C_FFA | I2C_SURF,
7074 MSM_GSBI3_QUP_I2C_BUS_ID,
7075 cyttsp_ffa_info,
7076 ARRAY_SIZE(cyttsp_ffa_info),
7077 },
7078#endif
7079#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007080 {
7081 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007082 MSM_GSBI4_QUP_I2C_BUS_ID,
7083 msm_camera_boardinfo,
7084 ARRAY_SIZE(msm_camera_boardinfo),
7085 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007086 {
7087 I2C_DRAGON,
7088 MSM_GSBI4_QUP_I2C_BUS_ID,
7089 msm_camera_dragon_boardinfo,
7090 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7091 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007092#endif
7093 {
7094 I2C_SURF | I2C_FFA | I2C_FLUID,
7095 MSM_GSBI7_QUP_I2C_BUS_ID,
7096 msm_i2c_gsbi7_timpani_info,
7097 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7098 },
7099#if defined(CONFIG_MARIMBA_CORE)
7100 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007101 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007102 MSM_GSBI7_QUP_I2C_BUS_ID,
7103 msm_marimba_board_info,
7104 ARRAY_SIZE(msm_marimba_board_info),
7105 },
7106#endif /* CONFIG_MARIMBA_CORE */
7107#ifdef CONFIG_ISL9519_CHARGER
7108 {
7109 I2C_SURF | I2C_FFA,
7110 MSM_GSBI8_QUP_I2C_BUS_ID,
7111 isl_charger_i2c_info,
7112 ARRAY_SIZE(isl_charger_i2c_info),
7113 },
7114#endif
7115#if defined(CONFIG_HAPTIC_ISA1200) || \
7116 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7117 {
7118 I2C_FLUID,
7119 MSM_GSBI8_QUP_I2C_BUS_ID,
7120 msm_isa1200_board_info,
7121 ARRAY_SIZE(msm_isa1200_board_info),
7122 },
7123#endif
7124#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7125 {
7126 I2C_FLUID,
7127 MSM_GSBI8_QUP_I2C_BUS_ID,
7128 smb137b_charger_i2c_info,
7129 ARRAY_SIZE(smb137b_charger_i2c_info),
7130 },
7131#endif
7132#if defined(CONFIG_BATTERY_BQ27520) || \
7133 defined(CONFIG_BATTERY_BQ27520_MODULE)
7134 {
7135 I2C_FLUID,
7136 MSM_GSBI8_QUP_I2C_BUS_ID,
7137 msm_bq27520_board_info,
7138 ARRAY_SIZE(msm_bq27520_board_info),
7139 },
7140#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007141#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7142 {
7143 I2C_DRAGON,
7144 MSM_GSBI8_QUP_I2C_BUS_ID,
7145 wm8903_codec_i2c_info,
7146 ARRAY_SIZE(wm8903_codec_i2c_info),
7147 },
7148#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007149};
7150#endif /* CONFIG_I2C */
7151
7152static void fixup_i2c_configs(void)
7153{
7154#ifdef CONFIG_I2C
7155#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7156 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7157 sx150x_data[SX150X_CORE].irq_summary =
7158 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007159 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7160 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007161 sx150x_data[SX150X_CORE].irq_summary =
7162 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7163 else if (machine_is_msm8x60_fluid())
7164 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7165 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7166#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007167#endif
7168}
7169
7170static void register_i2c_devices(void)
7171{
7172#ifdef CONFIG_I2C
7173 u8 mach_mask = 0;
7174 int i;
7175
7176 /* Build the matching 'supported_machs' bitmask */
7177 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7178 mach_mask = I2C_SURF;
7179 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7180 mach_mask = I2C_FFA;
7181 else if (machine_is_msm8x60_rumi3())
7182 mach_mask = I2C_RUMI;
7183 else if (machine_is_msm8x60_sim())
7184 mach_mask = I2C_SIM;
7185 else if (machine_is_msm8x60_fluid())
7186 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007187 else if (machine_is_msm8x60_dragon())
7188 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007189 else
7190 pr_err("unmatched machine ID in register_i2c_devices\n");
7191
7192 /* Run the array and install devices as appropriate */
7193 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7194 if (msm8x60_i2c_devices[i].machs & mach_mask)
7195 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7196 msm8x60_i2c_devices[i].info,
7197 msm8x60_i2c_devices[i].len);
7198 }
7199#endif
7200}
7201
7202static void __init msm8x60_init_uart12dm(void)
7203{
7204#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7205 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7206 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7207
7208 if (!fpga_mem)
7209 pr_err("%s(): Error getting memory\n", __func__);
7210
7211 /* Advanced mode */
7212 writew(0xFFFF, fpga_mem + 0x15C);
7213 /* FPGA_UART_SEL */
7214 writew(0, fpga_mem + 0x172);
7215 /* FPGA_GPIO_CONFIG_117 */
7216 writew(1, fpga_mem + 0xEA);
7217 /* FPGA_GPIO_CONFIG_118 */
7218 writew(1, fpga_mem + 0xEC);
7219 mb();
7220 iounmap(fpga_mem);
7221#endif
7222}
7223
7224#define MSM_GSBI9_PHYS 0x19900000
7225#define GSBI_DUAL_MODE_CODE 0x60
7226
7227static void __init msm8x60_init_buses(void)
7228{
7229#ifdef CONFIG_I2C_QUP
7230 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7231 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7232 writel_relaxed(0x6 << 4, gsbi_mem);
7233 /* Ensure protocol code is written before proceeding further */
7234 mb();
7235 iounmap(gsbi_mem);
7236
7237 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7238 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7239 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7240 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7241
7242#ifdef CONFIG_MSM_GSBI9_UART
7243 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7244 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7245 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7246 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7247 iounmap(gsbi_mem);
7248 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7249 }
7250#endif
7251 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7252 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7253#endif
7254#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7255 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7256#endif
7257#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007258 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7259#endif
7260
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307261#ifdef CONFIG_MSM_SSBI
7262 msm_device_ssbi_pmic1.dev.platform_data =
7263 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307264 msm_device_ssbi_pmic2.dev.platform_data =
7265 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307266#endif
7267
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007268 if (machine_is_msm8x60_fluid()) {
7269#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7270 (defined(CONFIG_SMB137B_CHARGER) || \
7271 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7272 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7273#endif
7274#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7275 msm_gsbi10_qup_spi_device.dev.platform_data =
7276 &msm_gsbi10_qup_spi_pdata;
7277#endif
7278 }
7279
7280#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7281 /*
7282 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7283 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7284 * and ID notifications are available only on V2 surf and FFA
7285 * with a hardware workaround.
7286 */
7287 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7288 (machine_is_msm8x60_surf() ||
7289 (machine_is_msm8x60_ffa() &&
7290 pmic_id_notif_supported)))
7291 msm_otg_pdata.phy_can_powercollapse = 1;
7292 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7293#endif
7294
7295#ifdef CONFIG_USB_GADGET_MSM_72K
7296 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7297#endif
7298
7299#ifdef CONFIG_SERIAL_MSM_HS
7300 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7301 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7302#endif
7303#ifdef CONFIG_MSM_GSBI9_UART
7304 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7305 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7306 if (IS_ERR(msm_device_uart_gsbi9))
7307 pr_err("%s(): Failed to create uart gsbi9 device\n",
7308 __func__);
7309 }
7310#endif
7311
7312#ifdef CONFIG_MSM_BUS_SCALING
7313
7314 /* RPM calls are only enabled on V2 */
7315 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7316 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7317 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7318 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7319 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7320 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7321 }
7322
7323 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7324 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7325 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7326 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7327 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7328#endif
7329}
7330
7331static void __init msm8x60_map_io(void)
7332{
7333 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7334 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007335
7336 if (socinfo_init() < 0)
7337 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007338}
7339
7340/*
7341 * Most segments of the EBI2 bus are disabled by default.
7342 */
7343static void __init msm8x60_init_ebi2(void)
7344{
7345 uint32_t ebi2_cfg;
7346 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007347 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7348
7349 if (IS_ERR(mem_clk)) {
7350 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7351 "msm_ebi2", "mem_clk");
7352 return;
7353 }
7354 clk_enable(mem_clk);
7355 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007356
7357 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7358 if (ebi2_cfg_ptr != 0) {
7359 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7360
7361 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007362 machine_is_msm8x60_fluid() ||
7363 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007364 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7365 else if (machine_is_msm8x60_sim())
7366 ebi2_cfg |= (1 << 4); /* CS2 */
7367 else if (machine_is_msm8x60_rumi3())
7368 ebi2_cfg |= (1 << 5); /* CS3 */
7369
7370 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7371 iounmap(ebi2_cfg_ptr);
7372 }
7373
7374 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007375 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007376 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7377 if (ebi2_cfg_ptr != 0) {
7378 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7379 writel_relaxed(0UL, ebi2_cfg_ptr);
7380
7381 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7382 * LAN9221 Ethernet controller reads and writes.
7383 * The lowest 4 bits are the read delay, the next
7384 * 4 are the write delay. */
7385 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7386#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7387 /*
7388 * RECOVERY=5, HOLD_WR=1
7389 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7390 * WAIT_WR=1, WAIT_RD=2
7391 */
7392 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7393 /*
7394 * HOLD_RD=1
7395 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7396 */
7397 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7398#else
7399 /* EBI2 CS3 muxed address/data,
7400 * two cyc addr enable */
7401 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7402
7403#endif
7404 iounmap(ebi2_cfg_ptr);
7405 }
7406 }
7407}
7408
7409static void __init msm8x60_configure_smc91x(void)
7410{
7411 if (machine_is_msm8x60_sim()) {
7412
7413 smc91x_resources[0].start = 0x1b800300;
7414 smc91x_resources[0].end = 0x1b8003ff;
7415
7416 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7417 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7418
7419 } else if (machine_is_msm8x60_rumi3()) {
7420
7421 smc91x_resources[0].start = 0x1d000300;
7422 smc91x_resources[0].end = 0x1d0003ff;
7423
7424 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7425 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7426 }
7427}
7428
7429static void __init msm8x60_init_tlmm(void)
7430{
7431 if (machine_is_msm8x60_rumi3())
7432 msm_gpio_install_direct_irq(0, 0, 1);
7433}
7434
7435#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7436 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7437 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7438 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7439 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7440
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007441/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007442#define MAX_SDCC_CONTROLLER 5
7443
7444struct msm_sdcc_gpio {
7445 /* maximum 10 GPIOs per SDCC controller */
7446 s16 no;
7447 /* name of this GPIO */
7448 const char *name;
7449 bool always_on;
7450 bool is_enabled;
7451};
7452
7453#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7454static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7455 {159, "sdc1_dat_0"},
7456 {160, "sdc1_dat_1"},
7457 {161, "sdc1_dat_2"},
7458 {162, "sdc1_dat_3"},
7459#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7460 {163, "sdc1_dat_4"},
7461 {164, "sdc1_dat_5"},
7462 {165, "sdc1_dat_6"},
7463 {166, "sdc1_dat_7"},
7464#endif
7465 {167, "sdc1_clk"},
7466 {168, "sdc1_cmd"}
7467};
7468#endif
7469
7470#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7471static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7472 {143, "sdc2_dat_0"},
7473 {144, "sdc2_dat_1", 1},
7474 {145, "sdc2_dat_2"},
7475 {146, "sdc2_dat_3"},
7476#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7477 {147, "sdc2_dat_4"},
7478 {148, "sdc2_dat_5"},
7479 {149, "sdc2_dat_6"},
7480 {150, "sdc2_dat_7"},
7481#endif
7482 {151, "sdc2_cmd"},
7483 {152, "sdc2_clk", 1}
7484};
7485#endif
7486
7487#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7488static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7489 {95, "sdc5_cmd"},
7490 {96, "sdc5_dat_3"},
7491 {97, "sdc5_clk", 1},
7492 {98, "sdc5_dat_2"},
7493 {99, "sdc5_dat_1", 1},
7494 {100, "sdc5_dat_0"}
7495};
7496#endif
7497
7498struct msm_sdcc_pad_pull_cfg {
7499 enum msm_tlmm_pull_tgt pull;
7500 u32 pull_val;
7501};
7502
7503struct msm_sdcc_pad_drv_cfg {
7504 enum msm_tlmm_hdrive_tgt drv;
7505 u32 drv_val;
7506};
7507
7508#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7509static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7510 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7511 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7512 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7513};
7514
7515static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7516 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7517 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7518};
7519
7520static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7521 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7522 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7523 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7524};
7525
7526static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7527 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7528 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7529};
7530#endif
7531
7532#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7533static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7534 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7535 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7536 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7537};
7538
7539static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7540 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7541 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7542};
7543
7544static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7545 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7546 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7547 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7548};
7549
7550static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7551 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7552 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7553};
7554#endif
7555
7556struct msm_sdcc_pin_cfg {
7557 /*
7558 * = 1 if controller pins are using gpios
7559 * = 0 if controller has dedicated MSM pins
7560 */
7561 u8 is_gpio;
7562 u8 cfg_sts;
7563 u8 gpio_data_size;
7564 struct msm_sdcc_gpio *gpio_data;
7565 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7566 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7567 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7568 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7569 u8 pad_drv_data_size;
7570 u8 pad_pull_data_size;
7571 u8 sdio_lpm_gpio_cfg;
7572};
7573
7574
7575static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7576#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7577 [0] = {
7578 .is_gpio = 1,
7579 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7580 .gpio_data = sdc1_gpio_cfg
7581 },
7582#endif
7583#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7584 [1] = {
7585 .is_gpio = 1,
7586 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7587 .gpio_data = sdc2_gpio_cfg
7588 },
7589#endif
7590#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7591 [2] = {
7592 .is_gpio = 0,
7593 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7594 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7595 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7596 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7597 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7598 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7599 },
7600#endif
7601#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7602 [3] = {
7603 .is_gpio = 0,
7604 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7605 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7606 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7607 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7608 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7609 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7610 },
7611#endif
7612#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7613 [4] = {
7614 .is_gpio = 1,
7615 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7616 .gpio_data = sdc5_gpio_cfg
7617 }
7618#endif
7619};
7620
7621static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7622{
7623 int rc = 0;
7624 struct msm_sdcc_pin_cfg *curr;
7625 int n;
7626
7627 curr = &sdcc_pin_cfg_data[dev_id - 1];
7628 if (!curr->gpio_data)
7629 goto out;
7630
7631 for (n = 0; n < curr->gpio_data_size; n++) {
7632 if (enable) {
7633
7634 if (curr->gpio_data[n].always_on &&
7635 curr->gpio_data[n].is_enabled)
7636 continue;
7637 pr_debug("%s: enable: %s\n", __func__,
7638 curr->gpio_data[n].name);
7639 rc = gpio_request(curr->gpio_data[n].no,
7640 curr->gpio_data[n].name);
7641 if (rc) {
7642 pr_err("%s: gpio_request(%d, %s)"
7643 "failed", __func__,
7644 curr->gpio_data[n].no,
7645 curr->gpio_data[n].name);
7646 goto free_gpios;
7647 }
7648 /* set direction as output for all GPIOs */
7649 rc = gpio_direction_output(
7650 curr->gpio_data[n].no, 1);
7651 if (rc) {
7652 pr_err("%s: gpio_direction_output"
7653 "(%d, 1) failed\n", __func__,
7654 curr->gpio_data[n].no);
7655 goto free_gpios;
7656 }
7657 curr->gpio_data[n].is_enabled = 1;
7658 } else {
7659 /*
7660 * now free this GPIO which will put GPIO
7661 * in low power mode and will also put GPIO
7662 * in input mode
7663 */
7664 if (curr->gpio_data[n].always_on)
7665 continue;
7666 pr_debug("%s: disable: %s\n", __func__,
7667 curr->gpio_data[n].name);
7668 gpio_free(curr->gpio_data[n].no);
7669 curr->gpio_data[n].is_enabled = 0;
7670 }
7671 }
7672 curr->cfg_sts = enable;
7673 goto out;
7674
7675free_gpios:
7676 for (; n >= 0; n--)
7677 gpio_free(curr->gpio_data[n].no);
7678out:
7679 return rc;
7680}
7681
7682static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7683{
7684 int rc = 0;
7685 struct msm_sdcc_pin_cfg *curr;
7686 int n;
7687
7688 curr = &sdcc_pin_cfg_data[dev_id - 1];
7689 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7690 goto out;
7691
7692 if (enable) {
7693 /*
7694 * set up the normal driver strength and
7695 * pull config for pads
7696 */
7697 for (n = 0; n < curr->pad_drv_data_size; n++) {
7698 if (curr->sdio_lpm_gpio_cfg) {
7699 if (curr->pad_drv_on_data[n].drv ==
7700 TLMM_HDRV_SDC4_DATA)
7701 continue;
7702 }
7703 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7704 curr->pad_drv_on_data[n].drv_val);
7705 }
7706 for (n = 0; n < curr->pad_pull_data_size; n++) {
7707 if (curr->sdio_lpm_gpio_cfg) {
7708 if (curr->pad_pull_on_data[n].pull ==
7709 TLMM_PULL_SDC4_DATA)
7710 continue;
7711 }
7712 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7713 curr->pad_pull_on_data[n].pull_val);
7714 }
7715 } else {
7716 /* set the low power config for pads */
7717 for (n = 0; n < curr->pad_drv_data_size; n++) {
7718 if (curr->sdio_lpm_gpio_cfg) {
7719 if (curr->pad_drv_off_data[n].drv ==
7720 TLMM_HDRV_SDC4_DATA)
7721 continue;
7722 }
7723 msm_tlmm_set_hdrive(
7724 curr->pad_drv_off_data[n].drv,
7725 curr->pad_drv_off_data[n].drv_val);
7726 }
7727 for (n = 0; n < curr->pad_pull_data_size; n++) {
7728 if (curr->sdio_lpm_gpio_cfg) {
7729 if (curr->pad_pull_off_data[n].pull ==
7730 TLMM_PULL_SDC4_DATA)
7731 continue;
7732 }
7733 msm_tlmm_set_pull(
7734 curr->pad_pull_off_data[n].pull,
7735 curr->pad_pull_off_data[n].pull_val);
7736 }
7737 }
7738 curr->cfg_sts = enable;
7739out:
7740 return rc;
7741}
7742
7743struct sdcc_reg {
7744 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7745 const char *reg_name;
7746 /*
7747 * is set voltage supported for this regulator?
7748 * 0 = not supported, 1 = supported
7749 */
7750 unsigned char set_voltage_sup;
7751 /* voltage level to be set */
7752 unsigned int level;
7753 /* VDD/VCC/VCCQ voltage regulator handle */
7754 struct regulator *reg;
7755 /* is this regulator enabled? */
7756 bool enabled;
7757 /* is this regulator needs to be always on? */
7758 bool always_on;
7759 /* is operating power mode setting required for this regulator? */
7760 bool op_pwr_mode_sup;
7761 /* Load values for low power and high power mode */
7762 unsigned int lpm_uA;
7763 unsigned int hpm_uA;
7764};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007765/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007766static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7767/* only SDCC1 requires VCCQ voltage */
7768static struct sdcc_reg sdcc_vccq_reg_data[1];
7769/* all SDCC controllers may require voting for VDD PAD voltage */
7770static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7771
7772struct sdcc_reg_data {
7773 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7774 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7775 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7776 unsigned char sts; /* regulator enable/disable status */
7777};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007778/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007779static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7780
7781static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7782{
7783 int rc = 0;
7784
7785 /* Get the regulator handle */
7786 vreg->reg = regulator_get(NULL, vreg->reg_name);
7787 if (IS_ERR(vreg->reg)) {
7788 rc = PTR_ERR(vreg->reg);
7789 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7790 __func__, vreg->reg_name, rc);
7791 goto out;
7792 }
7793
7794 /* Set the voltage level if required */
7795 if (vreg->set_voltage_sup) {
7796 rc = regulator_set_voltage(vreg->reg, vreg->level,
7797 vreg->level);
7798 if (rc) {
7799 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7800 __func__, vreg->reg_name, rc);
7801 goto vreg_put;
7802 }
7803 }
7804 goto out;
7805
7806vreg_put:
7807 regulator_put(vreg->reg);
7808out:
7809 return rc;
7810}
7811
7812static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7813{
7814 regulator_put(vreg->reg);
7815}
7816
7817/* this init function should be called only once for each SDCC */
7818static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7819{
7820 int rc = 0;
7821 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7822 struct sdcc_reg_data *curr;
7823
7824 curr = &sdcc_vreg_data[dev_id - 1];
7825 curr_vdd_reg = curr->vdd_data;
7826 curr_vccq_reg = curr->vccq_data;
7827 curr_vddp_reg = curr->vddp_data;
7828
7829 if (init) {
7830 /*
7831 * get the regulator handle from voltage regulator framework
7832 * and then try to set the voltage level for the regulator
7833 */
7834 if (curr_vdd_reg) {
7835 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7836 if (rc)
7837 goto out;
7838 }
7839 if (curr_vccq_reg) {
7840 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7841 if (rc)
7842 goto vdd_reg_deinit;
7843 }
7844 if (curr_vddp_reg) {
7845 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7846 if (rc)
7847 goto vccq_reg_deinit;
7848 }
7849 goto out;
7850 } else
7851 /* deregister with all regulators from regulator framework */
7852 goto vddp_reg_deinit;
7853
7854vddp_reg_deinit:
7855 if (curr_vddp_reg)
7856 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7857vccq_reg_deinit:
7858 if (curr_vccq_reg)
7859 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7860vdd_reg_deinit:
7861 if (curr_vdd_reg)
7862 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7863out:
7864 return rc;
7865}
7866
7867static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7868{
7869 int rc;
7870
7871 if (!vreg->enabled) {
7872 rc = regulator_enable(vreg->reg);
7873 if (rc) {
7874 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7875 __func__, vreg->reg_name, rc);
7876 goto out;
7877 }
7878 vreg->enabled = 1;
7879 }
7880
7881 /* Put always_on regulator in HPM (high power mode) */
7882 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7883 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7884 if (rc < 0) {
7885 pr_err("%s: reg=%s: HPM setting failed"
7886 " hpm_uA=%d, rc=%d\n",
7887 __func__, vreg->reg_name,
7888 vreg->hpm_uA, rc);
7889 goto vreg_disable;
7890 }
7891 rc = 0;
7892 }
7893 goto out;
7894
7895vreg_disable:
7896 regulator_disable(vreg->reg);
7897 vreg->enabled = 0;
7898out:
7899 return rc;
7900}
7901
7902static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7903{
7904 int rc;
7905
7906 /* Never disable always_on regulator */
7907 if (!vreg->always_on) {
7908 rc = regulator_disable(vreg->reg);
7909 if (rc) {
7910 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7911 __func__, vreg->reg_name, rc);
7912 goto out;
7913 }
7914 vreg->enabled = 0;
7915 }
7916
7917 /* Put always_on regulator in LPM (low power mode) */
7918 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7919 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7920 if (rc < 0) {
7921 pr_err("%s: reg=%s: LPM setting failed"
7922 " lpm_uA=%d, rc=%d\n",
7923 __func__,
7924 vreg->reg_name,
7925 vreg->lpm_uA, rc);
7926 goto out;
7927 }
7928 rc = 0;
7929 }
7930
7931out:
7932 return rc;
7933}
7934
7935static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7936{
7937 int rc = 0;
7938 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7939 struct sdcc_reg_data *curr;
7940
7941 curr = &sdcc_vreg_data[dev_id - 1];
7942 curr_vdd_reg = curr->vdd_data;
7943 curr_vccq_reg = curr->vccq_data;
7944 curr_vddp_reg = curr->vddp_data;
7945
7946 /* check if regulators are initialized or not? */
7947 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7948 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7949 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7950 /* initialize voltage regulators required for this SDCC */
7951 rc = msm_sdcc_vreg_init(dev_id, 1);
7952 if (rc) {
7953 pr_err("%s: regulator init failed = %d\n",
7954 __func__, rc);
7955 goto out;
7956 }
7957 }
7958
7959 if (curr->sts == enable)
7960 goto out;
7961
7962 if (curr_vdd_reg) {
7963 if (enable)
7964 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7965 else
7966 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7967 if (rc)
7968 goto out;
7969 }
7970
7971 if (curr_vccq_reg) {
7972 if (enable)
7973 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7974 else
7975 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7976 if (rc)
7977 goto out;
7978 }
7979
7980 if (curr_vddp_reg) {
7981 if (enable)
7982 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
7983 else
7984 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
7985 if (rc)
7986 goto out;
7987 }
7988 curr->sts = enable;
7989
7990out:
7991 return rc;
7992}
7993
7994static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
7995{
7996 u32 rc_pin_cfg = 0;
7997 u32 rc_vreg_cfg = 0;
7998 u32 rc = 0;
7999 struct platform_device *pdev;
8000 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8001
8002 pdev = container_of(dv, struct platform_device, dev);
8003
8004 /* setup gpio/pad */
8005 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8006 if (curr_pin_cfg->cfg_sts == !!vdd)
8007 goto setup_vreg;
8008
8009 if (curr_pin_cfg->is_gpio)
8010 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
8011 else
8012 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
8013
8014setup_vreg:
8015 /* setup voltage regulators */
8016 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8017
8018 if (rc_pin_cfg || rc_vreg_cfg)
8019 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8020
8021 return rc;
8022}
8023
8024static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8025{
8026 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8027 struct platform_device *pdev;
8028
8029 pdev = container_of(dv, struct platform_device, dev);
8030 /* setup gpio/pad */
8031 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8032
8033 if (curr_pin_cfg->cfg_sts == active)
8034 return;
8035
8036 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8037 if (curr_pin_cfg->is_gpio)
8038 msm_sdcc_setup_gpio(pdev->id, active);
8039 else
8040 msm_sdcc_setup_pad(pdev->id, active);
8041 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8042}
8043
8044static int msm_sdc3_get_wpswitch(struct device *dev)
8045{
8046 struct platform_device *pdev;
8047 int status;
8048 pdev = container_of(dev, struct platform_device, dev);
8049
8050 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8051 if (status) {
8052 pr_err("%s:Failed to request GPIO %d\n",
8053 __func__, GPIO_SDC_WP);
8054 } else {
8055 status = gpio_direction_input(GPIO_SDC_WP);
8056 if (!status) {
8057 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8058 pr_info("%s: WP Status for Slot %d = %d\n",
8059 __func__, pdev->id, status);
8060 }
8061 gpio_free(GPIO_SDC_WP);
8062 }
8063 return status;
8064}
8065
8066#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8067int sdc5_register_status_notify(void (*callback)(int, void *),
8068 void *dev_id)
8069{
8070 sdc5_status_notify_cb = callback;
8071 sdc5_status_notify_cb_devid = dev_id;
8072 return 0;
8073}
8074#endif
8075
8076#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8077int sdc2_register_status_notify(void (*callback)(int, void *),
8078 void *dev_id)
8079{
8080 sdc2_status_notify_cb = callback;
8081 sdc2_status_notify_cb_devid = dev_id;
8082 return 0;
8083}
8084#endif
8085
8086/* Interrupt handler for SDC2 and SDC5 detection
8087 * This function uses dual-edge interrputs settings in order
8088 * to get SDIO detection when the GPIO is rising and SDIO removal
8089 * when the GPIO is falling */
8090static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8091{
8092 int status;
8093
8094 if (!machine_is_msm8x60_fusion() &&
8095 !machine_is_msm8x60_fusn_ffa())
8096 return IRQ_NONE;
8097
8098 status = gpio_get_value(MDM2AP_SYNC);
8099 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8100 __func__, status);
8101
8102#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8103 if (sdc2_status_notify_cb) {
8104 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8105 sdc2_status_notify_cb(status,
8106 sdc2_status_notify_cb_devid);
8107 }
8108#endif
8109
8110#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8111 if (sdc5_status_notify_cb) {
8112 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8113 sdc5_status_notify_cb(status,
8114 sdc5_status_notify_cb_devid);
8115 }
8116#endif
8117 return IRQ_HANDLED;
8118}
8119
8120static int msm8x60_multi_sdio_init(void)
8121{
8122 int ret, irq_num;
8123
8124 if (!machine_is_msm8x60_fusion() &&
8125 !machine_is_msm8x60_fusn_ffa())
8126 return 0;
8127
8128 ret = msm_gpiomux_get(MDM2AP_SYNC);
8129 if (ret) {
8130 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8131 __func__, MDM2AP_SYNC, ret);
8132 return ret;
8133 }
8134
8135 irq_num = gpio_to_irq(MDM2AP_SYNC);
8136
8137 ret = request_irq(irq_num,
8138 msm8x60_multi_sdio_slot_status_irq,
8139 IRQ_TYPE_EDGE_BOTH,
8140 "sdio_multidetection", NULL);
8141
8142 if (ret) {
8143 pr_err("%s:Failed to request irq, ret=%d\n",
8144 __func__, ret);
8145 return ret;
8146 }
8147
8148 return ret;
8149}
8150
8151#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8152#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8153static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8154{
8155 int status;
8156
8157 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8158 , "SD_HW_Detect");
8159 if (status) {
8160 pr_err("%s:Failed to request GPIO %d\n", __func__,
8161 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8162 } else {
8163 status = gpio_direction_input(
8164 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8165 if (!status)
8166 status = !(gpio_get_value_cansleep(
8167 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8168 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8169 }
8170 return (unsigned int) status;
8171}
8172#endif
8173#endif
8174
8175#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8176static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8177{
8178 struct platform_device *pdev;
8179 enum msm_mpm_pin pin;
8180 int ret = 0;
8181
8182 pdev = container_of(dev, struct platform_device, dev);
8183
8184 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8185 if (pdev->id == 4)
8186 pin = MSM_MPM_PIN_SDC4_DAT1;
8187 else
8188 return -EINVAL;
8189
8190 switch (mode) {
8191 case SDC_DAT1_DISABLE:
8192 ret = msm_mpm_enable_pin(pin, 0);
8193 break;
8194 case SDC_DAT1_ENABLE:
8195 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8196 ret = msm_mpm_enable_pin(pin, 1);
8197 break;
8198 case SDC_DAT1_ENWAKE:
8199 ret = msm_mpm_set_pin_wake(pin, 1);
8200 break;
8201 case SDC_DAT1_DISWAKE:
8202 ret = msm_mpm_set_pin_wake(pin, 0);
8203 break;
8204 default:
8205 ret = -EINVAL;
8206 break;
8207 }
8208 return ret;
8209}
8210#endif
8211#endif
8212
8213#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8214static struct mmc_platform_data msm8x60_sdc1_data = {
8215 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8216 .translate_vdd = msm_sdcc_setup_power,
8217#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8218 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8219#else
8220 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8221#endif
8222 .msmsdcc_fmin = 400000,
8223 .msmsdcc_fmid = 24000000,
8224 .msmsdcc_fmax = 48000000,
8225 .nonremovable = 1,
8226 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008227};
8228#endif
8229
8230#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8231static struct mmc_platform_data msm8x60_sdc2_data = {
8232 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8233 .translate_vdd = msm_sdcc_setup_power,
8234 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8235 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8236 .msmsdcc_fmin = 400000,
8237 .msmsdcc_fmid = 24000000,
8238 .msmsdcc_fmax = 48000000,
8239 .nonremovable = 0,
8240 .pclk_src_dfab = 1,
8241 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008242#ifdef CONFIG_MSM_SDIO_AL
8243 .is_sdio_al_client = 1,
8244#endif
8245};
8246#endif
8247
8248#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8249static struct mmc_platform_data msm8x60_sdc3_data = {
8250 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8251 .translate_vdd = msm_sdcc_setup_power,
8252 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8253 .wpswitch = msm_sdc3_get_wpswitch,
8254#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8255 .status = msm8x60_sdcc_slot_status,
8256 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8257 PMIC_GPIO_SDC3_DET - 1),
8258 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8259#endif
8260 .msmsdcc_fmin = 400000,
8261 .msmsdcc_fmid = 24000000,
8262 .msmsdcc_fmax = 48000000,
8263 .nonremovable = 0,
8264 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008265};
8266#endif
8267
8268#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8269static struct mmc_platform_data msm8x60_sdc4_data = {
8270 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8271 .translate_vdd = msm_sdcc_setup_power,
8272 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8273 .msmsdcc_fmin = 400000,
8274 .msmsdcc_fmid = 24000000,
8275 .msmsdcc_fmax = 48000000,
8276 .nonremovable = 0,
8277 .pclk_src_dfab = 1,
8278 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008279};
8280#endif
8281
8282#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8283static struct mmc_platform_data msm8x60_sdc5_data = {
8284 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8285 .translate_vdd = msm_sdcc_setup_power,
8286 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8287 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8288 .msmsdcc_fmin = 400000,
8289 .msmsdcc_fmid = 24000000,
8290 .msmsdcc_fmax = 48000000,
8291 .nonremovable = 0,
8292 .pclk_src_dfab = 1,
8293 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008294#ifdef CONFIG_MSM_SDIO_AL
8295 .is_sdio_al_client = 1,
8296#endif
8297};
8298#endif
8299
8300static void __init msm8x60_init_mmc(void)
8301{
8302#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8303 /* SDCC1 : eMMC card connected */
8304 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8305 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8306 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8307 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308308 sdcc_vreg_data[0].vdd_data->always_on = 1;
8309 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8310 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8311 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008312
8313 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8314 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8315 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8316 sdcc_vreg_data[0].vccq_data->always_on = 1;
8317
8318 msm_add_sdcc(1, &msm8x60_sdc1_data);
8319#endif
8320#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8321 /*
8322 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8323 * and no card is connected on 8660 SURF/FFA/FLUID.
8324 */
8325 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8326 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8327 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8328 sdcc_vreg_data[1].vdd_data->level = 1800000;
8329
8330 sdcc_vreg_data[1].vccq_data = NULL;
8331
8332 if (machine_is_msm8x60_fusion())
8333 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8334 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8335#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8336 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8337 msm_sdcc_setup_gpio(2, 1);
8338#endif
8339 msm_add_sdcc(2, &msm8x60_sdc2_data);
8340 }
8341#endif
8342#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8343 /* SDCC3 : External card slot connected */
8344 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8345 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8346 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8347 sdcc_vreg_data[2].vdd_data->level = 2850000;
8348 sdcc_vreg_data[2].vdd_data->always_on = 1;
8349 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8350 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8351 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8352
8353 sdcc_vreg_data[2].vccq_data = NULL;
8354
8355 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8356 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8357 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8358 sdcc_vreg_data[2].vddp_data->level = 2850000;
8359 sdcc_vreg_data[2].vddp_data->always_on = 1;
8360 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8361 /* Sleep current required is ~300 uA. But min. RPM
8362 * vote can be in terms of mA (min. 1 mA).
8363 * So let's vote for 2 mA during sleep.
8364 */
8365 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8366 /* Max. Active current required is 16 mA */
8367 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8368
8369 if (machine_is_msm8x60_fluid())
8370 msm8x60_sdc3_data.wpswitch = NULL;
8371 msm_add_sdcc(3, &msm8x60_sdc3_data);
8372#endif
8373#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8374 /* SDCC4 : WLAN WCN1314 chip is connected */
8375 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8376 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8377 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8378 sdcc_vreg_data[3].vdd_data->level = 1800000;
8379
8380 sdcc_vreg_data[3].vccq_data = NULL;
8381
8382 msm_add_sdcc(4, &msm8x60_sdc4_data);
8383#endif
8384#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8385 /*
8386 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8387 * and no card is connected on 8660 SURF/FFA/FLUID.
8388 */
8389 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8390 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8391 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8392 sdcc_vreg_data[4].vdd_data->level = 1800000;
8393
8394 sdcc_vreg_data[4].vccq_data = NULL;
8395
8396 if (machine_is_msm8x60_fusion())
8397 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8398 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8399#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8400 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8401 msm_sdcc_setup_gpio(5, 1);
8402#endif
8403 msm_add_sdcc(5, &msm8x60_sdc5_data);
8404 }
8405#endif
8406}
8407
8408#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8409static inline void display_common_power(int on) {}
8410#else
8411
8412#define _GET_REGULATOR(var, name) do { \
8413 if (var == NULL) { \
8414 var = regulator_get(NULL, name); \
8415 if (IS_ERR(var)) { \
8416 pr_err("'%s' regulator not found, rc=%ld\n", \
8417 name, PTR_ERR(var)); \
8418 var = NULL; \
8419 } \
8420 } \
8421} while (0)
8422
8423static int dsub_regulator(int on)
8424{
8425 static struct regulator *dsub_reg;
8426 static struct regulator *mpp0_reg;
8427 static int dsub_reg_enabled;
8428 int rc = 0;
8429
8430 _GET_REGULATOR(dsub_reg, "8901_l3");
8431 if (IS_ERR(dsub_reg)) {
8432 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8433 __func__, PTR_ERR(dsub_reg));
8434 return PTR_ERR(dsub_reg);
8435 }
8436
8437 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8438 if (IS_ERR(mpp0_reg)) {
8439 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8440 __func__, PTR_ERR(mpp0_reg));
8441 return PTR_ERR(mpp0_reg);
8442 }
8443
8444 if (on && !dsub_reg_enabled) {
8445 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8446 if (rc) {
8447 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8448 " err=%d", __func__, rc);
8449 goto dsub_regulator_err;
8450 }
8451 rc = regulator_enable(dsub_reg);
8452 if (rc) {
8453 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8454 " err=%d", __func__, rc);
8455 goto dsub_regulator_err;
8456 }
8457 rc = regulator_enable(mpp0_reg);
8458 if (rc) {
8459 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8460 " err=%d", __func__, rc);
8461 goto dsub_regulator_err;
8462 }
8463 dsub_reg_enabled = 1;
8464 } else if (!on && dsub_reg_enabled) {
8465 rc = regulator_disable(dsub_reg);
8466 if (rc)
8467 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8468 " err=%d", __func__, rc);
8469 rc = regulator_disable(mpp0_reg);
8470 if (rc)
8471 printk(KERN_WARNING "%s: failed to disable reg "
8472 "8901_mpp0 err=%d", __func__, rc);
8473 dsub_reg_enabled = 0;
8474 }
8475
8476 return rc;
8477
8478dsub_regulator_err:
8479 regulator_put(mpp0_reg);
8480 regulator_put(dsub_reg);
8481 return rc;
8482}
8483
8484static int display_power_on;
8485static void setup_display_power(void)
8486{
8487 if (display_power_on)
8488 if (lcdc_vga_enabled) {
8489 dsub_regulator(1);
8490 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8491 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8492 if (machine_is_msm8x60_ffa() ||
8493 machine_is_msm8x60_fusn_ffa())
8494 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8495 } else {
8496 dsub_regulator(0);
8497 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8498 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8499 if (machine_is_msm8x60_ffa() ||
8500 machine_is_msm8x60_fusn_ffa())
8501 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8502 }
8503 else {
8504 dsub_regulator(0);
8505 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8506 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8507 /* BACKLIGHT */
8508 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8509 /* LVDS */
8510 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8511 }
8512}
8513
8514#define _GET_REGULATOR(var, name) do { \
8515 if (var == NULL) { \
8516 var = regulator_get(NULL, name); \
8517 if (IS_ERR(var)) { \
8518 pr_err("'%s' regulator not found, rc=%ld\n", \
8519 name, PTR_ERR(var)); \
8520 var = NULL; \
8521 } \
8522 } \
8523} while (0)
8524
8525#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8526
8527static void display_common_power(int on)
8528{
8529 int rc;
8530 static struct regulator *display_reg;
8531
8532 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8533 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8534 if (on) {
8535 /* LVDS */
8536 _GET_REGULATOR(display_reg, "8901_l2");
8537 if (!display_reg)
8538 return;
8539 rc = regulator_set_voltage(display_reg,
8540 3300000, 3300000);
8541 if (rc)
8542 goto out;
8543 rc = regulator_enable(display_reg);
8544 if (rc)
8545 goto out;
8546 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8547 "LVDS_STDN_OUT_N");
8548 if (rc) {
8549 printk(KERN_ERR "%s: LVDS gpio %d request"
8550 "failed\n", __func__,
8551 GPIO_LVDS_SHUTDOWN_N);
8552 goto out2;
8553 }
8554
8555 /* BACKLIGHT */
8556 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8557 if (rc) {
8558 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8559 "failed\n", __func__,
8560 GPIO_BACKLIGHT_EN);
8561 goto out3;
8562 }
8563
8564 if (machine_is_msm8x60_ffa() ||
8565 machine_is_msm8x60_fusn_ffa()) {
8566 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8567 "DONGLE_PWR_EN");
8568 if (rc) {
8569 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8570 " %d request failed\n", __func__,
8571 GPIO_DONGLE_PWR_EN);
8572 goto out4;
8573 }
8574 }
8575
8576 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8577 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8578 if (machine_is_msm8x60_ffa() ||
8579 machine_is_msm8x60_fusn_ffa())
8580 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8581 mdelay(20);
8582 display_power_on = 1;
8583 setup_display_power();
8584 } else {
8585 if (display_power_on) {
8586 display_power_on = 0;
8587 setup_display_power();
8588 mdelay(20);
8589 if (machine_is_msm8x60_ffa() ||
8590 machine_is_msm8x60_fusn_ffa())
8591 gpio_free(GPIO_DONGLE_PWR_EN);
8592 goto out4;
8593 }
8594 }
8595 }
8596#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8597 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8598 else if (machine_is_msm8x60_fluid()) {
8599 static struct regulator *fluid_reg;
8600 static struct regulator *fluid_reg2;
8601
8602 if (on) {
8603 _GET_REGULATOR(fluid_reg, "8901_l2");
8604 if (!fluid_reg)
8605 return;
8606 _GET_REGULATOR(fluid_reg2, "8058_s3");
8607 if (!fluid_reg2) {
8608 regulator_put(fluid_reg);
8609 return;
8610 }
8611 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8612 if (rc) {
8613 regulator_put(fluid_reg2);
8614 regulator_put(fluid_reg);
8615 return;
8616 }
8617 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8618 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8619 regulator_enable(fluid_reg);
8620 regulator_enable(fluid_reg2);
8621 msleep(20);
8622 gpio_direction_output(GPIO_RESX_N, 0);
8623 udelay(10);
8624 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8625 display_power_on = 1;
8626 setup_display_power();
8627 } else {
8628 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8629 gpio_free(GPIO_RESX_N);
8630 msleep(20);
8631 regulator_disable(fluid_reg2);
8632 regulator_disable(fluid_reg);
8633 regulator_put(fluid_reg2);
8634 regulator_put(fluid_reg);
8635 display_power_on = 0;
8636 setup_display_power();
8637 fluid_reg = NULL;
8638 fluid_reg2 = NULL;
8639 }
8640 }
8641#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008642#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8643 else if (machine_is_msm8x60_dragon()) {
8644 static struct regulator *dragon_reg;
8645 static struct regulator *dragon_reg2;
8646
8647 if (on) {
8648 _GET_REGULATOR(dragon_reg, "8901_l2");
8649 if (!dragon_reg)
8650 return;
8651 _GET_REGULATOR(dragon_reg2, "8058_l16");
8652 if (!dragon_reg2) {
8653 regulator_put(dragon_reg);
8654 dragon_reg = NULL;
8655 return;
8656 }
8657
8658 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8659 if (rc) {
8660 pr_err("%s: gpio %d request failed with rc=%d\n",
8661 __func__, GPIO_NT35582_BL_EN, rc);
8662 regulator_put(dragon_reg);
8663 regulator_put(dragon_reg2);
8664 dragon_reg = NULL;
8665 dragon_reg2 = NULL;
8666 return;
8667 }
8668
8669 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8670 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8671 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8672 pr_err("%s: config gpio '%d' failed!\n",
8673 __func__, GPIO_NT35582_RESET);
8674 gpio_free(GPIO_NT35582_BL_EN);
8675 regulator_put(dragon_reg);
8676 regulator_put(dragon_reg2);
8677 dragon_reg = NULL;
8678 dragon_reg2 = NULL;
8679 return;
8680 }
8681
8682 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8683 if (rc) {
8684 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8685 __func__, GPIO_NT35582_RESET, rc);
8686 gpio_free(GPIO_NT35582_BL_EN);
8687 regulator_put(dragon_reg);
8688 regulator_put(dragon_reg2);
8689 dragon_reg = NULL;
8690 dragon_reg2 = NULL;
8691 return;
8692 }
8693
8694 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8695 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8696 regulator_enable(dragon_reg);
8697 regulator_enable(dragon_reg2);
8698 msleep(20);
8699
8700 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8701 msleep(20);
8702 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8703 msleep(20);
8704 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8705 msleep(50);
8706
8707 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8708
8709 display_power_on = 1;
8710 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8711 gpio_free(GPIO_NT35582_RESET);
8712 gpio_free(GPIO_NT35582_BL_EN);
8713 regulator_disable(dragon_reg2);
8714 regulator_disable(dragon_reg);
8715 regulator_put(dragon_reg2);
8716 regulator_put(dragon_reg);
8717 display_power_on = 0;
8718 dragon_reg = NULL;
8719 dragon_reg2 = NULL;
8720 }
8721 }
8722#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008723 return;
8724
8725out4:
8726 gpio_free(GPIO_BACKLIGHT_EN);
8727out3:
8728 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8729out2:
8730 regulator_disable(display_reg);
8731out:
8732 regulator_put(display_reg);
8733 display_reg = NULL;
8734}
8735#undef _GET_REGULATOR
8736#endif
8737
8738static int mipi_dsi_panel_power(int on);
8739
8740#define LCDC_NUM_GPIO 28
8741#define LCDC_GPIO_START 0
8742
8743static void lcdc_samsung_panel_power(int on)
8744{
8745 int n, ret = 0;
8746
8747 display_common_power(on);
8748
8749 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8750 if (on) {
8751 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8752 if (unlikely(ret)) {
8753 pr_err("%s not able to get gpio\n", __func__);
8754 break;
8755 }
8756 } else
8757 gpio_free(LCDC_GPIO_START + n);
8758 }
8759
8760 if (ret) {
8761 for (n--; n >= 0; n--)
8762 gpio_free(LCDC_GPIO_START + n);
8763 }
8764
8765 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8766}
8767
8768#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8769#define _GET_REGULATOR(var, name) do { \
8770 var = regulator_get(NULL, name); \
8771 if (IS_ERR(var)) { \
8772 pr_err("'%s' regulator not found, rc=%ld\n", \
8773 name, IS_ERR(var)); \
8774 var = NULL; \
8775 return -ENODEV; \
8776 } \
8777} while (0)
8778
8779static int hdmi_enable_5v(int on)
8780{
8781 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8782 static struct regulator *reg_8901_mpp0; /* External 5V */
8783 static int prev_on;
8784 int rc;
8785
8786 if (on == prev_on)
8787 return 0;
8788
8789 if (!reg_8901_hdmi_mvs)
8790 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8791 if (!reg_8901_mpp0)
8792 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8793
8794 if (on) {
8795 rc = regulator_enable(reg_8901_mpp0);
8796 if (rc) {
8797 pr_err("'%s' regulator enable failed, rc=%d\n",
8798 "reg_8901_mpp0", rc);
8799 return rc;
8800 }
8801 rc = regulator_enable(reg_8901_hdmi_mvs);
8802 if (rc) {
8803 pr_err("'%s' regulator enable failed, rc=%d\n",
8804 "8901_hdmi_mvs", rc);
8805 return rc;
8806 }
8807 pr_info("%s(on): success\n", __func__);
8808 } else {
8809 rc = regulator_disable(reg_8901_hdmi_mvs);
8810 if (rc)
8811 pr_warning("'%s' regulator disable failed, rc=%d\n",
8812 "8901_hdmi_mvs", rc);
8813 rc = regulator_disable(reg_8901_mpp0);
8814 if (rc)
8815 pr_warning("'%s' regulator disable failed, rc=%d\n",
8816 "reg_8901_mpp0", rc);
8817 pr_info("%s(off): success\n", __func__);
8818 }
8819
8820 prev_on = on;
8821
8822 return 0;
8823}
8824
8825static int hdmi_core_power(int on, int show)
8826{
8827 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8828 static int prev_on;
8829 int rc;
8830
8831 if (on == prev_on)
8832 return 0;
8833
8834 if (!reg_8058_l16)
8835 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8836
8837 if (on) {
8838 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8839 if (!rc)
8840 rc = regulator_enable(reg_8058_l16);
8841 if (rc) {
8842 pr_err("'%s' regulator enable failed, rc=%d\n",
8843 "8058_l16", rc);
8844 return rc;
8845 }
8846 rc = gpio_request(170, "HDMI_DDC_CLK");
8847 if (rc) {
8848 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8849 "HDMI_DDC_CLK", 170, rc);
8850 goto error1;
8851 }
8852 rc = gpio_request(171, "HDMI_DDC_DATA");
8853 if (rc) {
8854 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8855 "HDMI_DDC_DATA", 171, rc);
8856 goto error2;
8857 }
8858 rc = gpio_request(172, "HDMI_HPD");
8859 if (rc) {
8860 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8861 "HDMI_HPD", 172, rc);
8862 goto error3;
8863 }
8864 pr_info("%s(on): success\n", __func__);
8865 } else {
8866 gpio_free(170);
8867 gpio_free(171);
8868 gpio_free(172);
8869 rc = regulator_disable(reg_8058_l16);
8870 if (rc)
8871 pr_warning("'%s' regulator disable failed, rc=%d\n",
8872 "8058_l16", rc);
8873 pr_info("%s(off): success\n", __func__);
8874 }
8875
8876 prev_on = on;
8877
8878 return 0;
8879
8880error3:
8881 gpio_free(171);
8882error2:
8883 gpio_free(170);
8884error1:
8885 regulator_disable(reg_8058_l16);
8886 return rc;
8887}
8888
8889static int hdmi_cec_power(int on)
8890{
8891 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8892 static int prev_on;
8893 int rc;
8894
8895 if (on == prev_on)
8896 return 0;
8897
8898 if (!reg_8901_l3)
8899 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8900
8901 if (on) {
8902 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8903 if (!rc)
8904 rc = regulator_enable(reg_8901_l3);
8905 if (rc) {
8906 pr_err("'%s' regulator enable failed, rc=%d\n",
8907 "8901_l3", rc);
8908 return rc;
8909 }
8910 rc = gpio_request(169, "HDMI_CEC_VAR");
8911 if (rc) {
8912 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8913 "HDMI_CEC_VAR", 169, rc);
8914 goto error;
8915 }
8916 pr_info("%s(on): success\n", __func__);
8917 } else {
8918 gpio_free(169);
8919 rc = regulator_disable(reg_8901_l3);
8920 if (rc)
8921 pr_warning("'%s' regulator disable failed, rc=%d\n",
8922 "8901_l3", rc);
8923 pr_info("%s(off): success\n", __func__);
8924 }
8925
8926 prev_on = on;
8927
8928 return 0;
8929error:
8930 regulator_disable(reg_8901_l3);
8931 return rc;
8932}
8933
8934#undef _GET_REGULATOR
8935
8936#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8937
8938static int lcdc_panel_power(int on)
8939{
8940 int flag_on = !!on;
8941 static int lcdc_power_save_on;
8942
8943 if (lcdc_power_save_on == flag_on)
8944 return 0;
8945
8946 lcdc_power_save_on = flag_on;
8947
8948 lcdc_samsung_panel_power(on);
8949
8950 return 0;
8951}
8952
8953#ifdef CONFIG_MSM_BUS_SCALING
Nagamalleswararao Ganji5fabbd62011-11-06 23:10:43 -08008954
8955static struct msm_bus_vectors rotator_init_vectors[] = {
8956 {
8957 .src = MSM_BUS_MASTER_ROTATOR,
8958 .dst = MSM_BUS_SLAVE_SMI,
8959 .ab = 0,
8960 .ib = 0,
8961 },
8962 {
8963 .src = MSM_BUS_MASTER_ROTATOR,
8964 .dst = MSM_BUS_SLAVE_EBI_CH0,
8965 .ab = 0,
8966 .ib = 0,
8967 },
8968};
8969
8970static struct msm_bus_vectors rotator_ui_vectors[] = {
8971 {
8972 .src = MSM_BUS_MASTER_ROTATOR,
8973 .dst = MSM_BUS_SLAVE_SMI,
8974 .ab = 0,
8975 .ib = 0,
8976 },
8977 {
8978 .src = MSM_BUS_MASTER_ROTATOR,
8979 .dst = MSM_BUS_SLAVE_EBI_CH0,
8980 .ab = (1024 * 600 * 4 * 2 * 60),
8981 .ib = (1024 * 600 * 4 * 2 * 60 * 1.5),
8982 },
8983};
8984
8985static struct msm_bus_vectors rotator_vga_vectors[] = {
8986 {
8987 .src = MSM_BUS_MASTER_ROTATOR,
8988 .dst = MSM_BUS_SLAVE_SMI,
8989 .ab = (640 * 480 * 2 * 2 * 30),
8990 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
8991 },
8992 {
8993 .src = MSM_BUS_MASTER_ROTATOR,
8994 .dst = MSM_BUS_SLAVE_EBI_CH0,
8995 .ab = (640 * 480 * 2 * 2 * 30),
8996 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
8997 },
8998};
8999
9000static struct msm_bus_vectors rotator_720p_vectors[] = {
9001 {
9002 .src = MSM_BUS_MASTER_ROTATOR,
9003 .dst = MSM_BUS_SLAVE_SMI,
9004 .ab = (1280 * 736 * 2 * 2 * 30),
9005 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9006 },
9007 {
9008 .src = MSM_BUS_MASTER_ROTATOR,
9009 .dst = MSM_BUS_SLAVE_EBI_CH0,
9010 .ab = (1280 * 736 * 2 * 2 * 30),
9011 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9012 },
9013};
9014
9015static struct msm_bus_vectors rotator_1080p_vectors[] = {
9016 {
9017 .src = MSM_BUS_MASTER_ROTATOR,
9018 .dst = MSM_BUS_SLAVE_SMI,
9019 .ab = (1920 * 1088 * 2 * 2 * 30),
9020 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9021 },
9022 {
9023 .src = MSM_BUS_MASTER_ROTATOR,
9024 .dst = MSM_BUS_SLAVE_EBI_CH0,
9025 .ab = (1920 * 1088 * 2 * 2 * 30),
9026 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9027 },
9028};
9029
9030static struct msm_bus_paths rotator_bus_scale_usecases[] = {
9031 {
9032 ARRAY_SIZE(rotator_init_vectors),
9033 rotator_init_vectors,
9034 },
9035 {
9036 ARRAY_SIZE(rotator_ui_vectors),
9037 rotator_ui_vectors,
9038 },
9039 {
9040 ARRAY_SIZE(rotator_vga_vectors),
9041 rotator_vga_vectors,
9042 },
9043 {
9044 ARRAY_SIZE(rotator_720p_vectors),
9045 rotator_720p_vectors,
9046 },
9047 {
9048 ARRAY_SIZE(rotator_1080p_vectors),
9049 rotator_1080p_vectors,
9050 },
9051};
9052
9053struct msm_bus_scale_pdata rotator_bus_scale_pdata = {
9054 rotator_bus_scale_usecases,
9055 ARRAY_SIZE(rotator_bus_scale_usecases),
9056 .name = "rotator",
9057};
9058
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009059static struct msm_bus_vectors mdp_init_vectors[] = {
9060 /* For now, 0th array entry is reserved.
9061 * Please leave 0 as is and don't use it
9062 */
9063 {
9064 .src = MSM_BUS_MASTER_MDP_PORT0,
9065 .dst = MSM_BUS_SLAVE_SMI,
9066 .ab = 0,
9067 .ib = 0,
9068 },
9069 /* Master and slaves can be from different fabrics */
9070 {
9071 .src = MSM_BUS_MASTER_MDP_PORT0,
9072 .dst = MSM_BUS_SLAVE_EBI_CH0,
9073 .ab = 0,
9074 .ib = 0,
9075 },
9076};
9077
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009078#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9079static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
9080 /* If HDMI is used as primary */
9081 {
9082 .src = MSM_BUS_MASTER_MDP_PORT0,
9083 .dst = MSM_BUS_SLAVE_SMI,
9084 .ab = 2000000000,
9085 .ib = 2000000000,
9086 },
9087 /* Master and slaves can be from different fabrics */
9088 {
9089 .src = MSM_BUS_MASTER_MDP_PORT0,
9090 .dst = MSM_BUS_SLAVE_EBI_CH0,
9091 .ab = 2000000000,
9092 .ib = 2000000000,
9093 },
9094};
9095
9096static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9097 {
9098 ARRAY_SIZE(mdp_init_vectors),
9099 mdp_init_vectors,
9100 },
9101 {
9102 ARRAY_SIZE(hdmi_as_primary_vectors),
9103 hdmi_as_primary_vectors,
9104 },
9105 {
9106 ARRAY_SIZE(hdmi_as_primary_vectors),
9107 hdmi_as_primary_vectors,
9108 },
9109 {
9110 ARRAY_SIZE(hdmi_as_primary_vectors),
9111 hdmi_as_primary_vectors,
9112 },
9113 {
9114 ARRAY_SIZE(hdmi_as_primary_vectors),
9115 hdmi_as_primary_vectors,
9116 },
9117 {
9118 ARRAY_SIZE(hdmi_as_primary_vectors),
9119 hdmi_as_primary_vectors,
9120 },
9121};
9122#else
9123#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009124static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9125 /* Default case static display/UI/2d/3d if FB SMI */
9126 {
9127 .src = MSM_BUS_MASTER_MDP_PORT0,
9128 .dst = MSM_BUS_SLAVE_SMI,
9129 .ab = 388800000,
9130 .ib = 486000000,
9131 },
9132 /* Master and slaves can be from different fabrics */
9133 {
9134 .src = MSM_BUS_MASTER_MDP_PORT0,
9135 .dst = MSM_BUS_SLAVE_EBI_CH0,
9136 .ab = 0,
9137 .ib = 0,
9138 },
9139};
9140
9141static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9142 /* Default case static display/UI/2d/3d if FB SMI */
9143 {
9144 .src = MSM_BUS_MASTER_MDP_PORT0,
9145 .dst = MSM_BUS_SLAVE_SMI,
9146 .ab = 0,
9147 .ib = 0,
9148 },
9149 /* Master and slaves can be from different fabrics */
9150 {
9151 .src = MSM_BUS_MASTER_MDP_PORT0,
9152 .dst = MSM_BUS_SLAVE_EBI_CH0,
9153 .ab = 388800000,
9154 .ib = 486000000 * 2,
9155 },
9156};
9157static struct msm_bus_vectors mdp_vga_vectors[] = {
9158 /* VGA and less video */
9159 {
9160 .src = MSM_BUS_MASTER_MDP_PORT0,
9161 .dst = MSM_BUS_SLAVE_SMI,
9162 .ab = 458092800,
9163 .ib = 572616000,
9164 },
9165 {
9166 .src = MSM_BUS_MASTER_MDP_PORT0,
9167 .dst = MSM_BUS_SLAVE_EBI_CH0,
9168 .ab = 458092800,
9169 .ib = 572616000 * 2,
9170 },
9171};
9172static struct msm_bus_vectors mdp_720p_vectors[] = {
9173 /* 720p and less video */
9174 {
9175 .src = MSM_BUS_MASTER_MDP_PORT0,
9176 .dst = MSM_BUS_SLAVE_SMI,
9177 .ab = 471744000,
9178 .ib = 589680000,
9179 },
9180 /* Master and slaves can be from different fabrics */
9181 {
9182 .src = MSM_BUS_MASTER_MDP_PORT0,
9183 .dst = MSM_BUS_SLAVE_EBI_CH0,
9184 .ab = 471744000,
9185 .ib = 589680000 * 2,
9186 },
9187};
9188
9189static struct msm_bus_vectors mdp_1080p_vectors[] = {
9190 /* 1080p and less video */
9191 {
9192 .src = MSM_BUS_MASTER_MDP_PORT0,
9193 .dst = MSM_BUS_SLAVE_SMI,
9194 .ab = 575424000,
9195 .ib = 719280000,
9196 },
9197 /* Master and slaves can be from different fabrics */
9198 {
9199 .src = MSM_BUS_MASTER_MDP_PORT0,
9200 .dst = MSM_BUS_SLAVE_EBI_CH0,
9201 .ab = 575424000,
9202 .ib = 719280000 * 2,
9203 },
9204};
9205
9206#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009207static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9208 /* Default case static display/UI/2d/3d if FB SMI */
9209 {
9210 .src = MSM_BUS_MASTER_MDP_PORT0,
9211 .dst = MSM_BUS_SLAVE_SMI,
9212 .ab = 175110000,
9213 .ib = 218887500,
9214 },
9215 /* Master and slaves can be from different fabrics */
9216 {
9217 .src = MSM_BUS_MASTER_MDP_PORT0,
9218 .dst = MSM_BUS_SLAVE_EBI_CH0,
9219 .ab = 0,
9220 .ib = 0,
9221 },
9222};
9223
9224static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9225 /* Default case static display/UI/2d/3d if FB SMI */
9226 {
9227 .src = MSM_BUS_MASTER_MDP_PORT0,
9228 .dst = MSM_BUS_SLAVE_SMI,
9229 .ab = 0,
9230 .ib = 0,
9231 },
9232 /* Master and slaves can be from different fabrics */
9233 {
9234 .src = MSM_BUS_MASTER_MDP_PORT0,
9235 .dst = MSM_BUS_SLAVE_EBI_CH0,
9236 .ab = 216000000,
9237 .ib = 270000000 * 2,
9238 },
9239};
9240static struct msm_bus_vectors mdp_vga_vectors[] = {
9241 /* VGA and less video */
9242 {
9243 .src = MSM_BUS_MASTER_MDP_PORT0,
9244 .dst = MSM_BUS_SLAVE_SMI,
9245 .ab = 216000000,
9246 .ib = 270000000,
9247 },
9248 {
9249 .src = MSM_BUS_MASTER_MDP_PORT0,
9250 .dst = MSM_BUS_SLAVE_EBI_CH0,
9251 .ab = 216000000,
9252 .ib = 270000000 * 2,
9253 },
9254};
9255
9256static struct msm_bus_vectors mdp_720p_vectors[] = {
9257 /* 720p and less video */
9258 {
9259 .src = MSM_BUS_MASTER_MDP_PORT0,
9260 .dst = MSM_BUS_SLAVE_SMI,
9261 .ab = 230400000,
9262 .ib = 288000000,
9263 },
9264 /* Master and slaves can be from different fabrics */
9265 {
9266 .src = MSM_BUS_MASTER_MDP_PORT0,
9267 .dst = MSM_BUS_SLAVE_EBI_CH0,
9268 .ab = 230400000,
9269 .ib = 288000000 * 2,
9270 },
9271};
9272
9273static struct msm_bus_vectors mdp_1080p_vectors[] = {
9274 /* 1080p and less video */
9275 {
9276 .src = MSM_BUS_MASTER_MDP_PORT0,
9277 .dst = MSM_BUS_SLAVE_SMI,
9278 .ab = 334080000,
9279 .ib = 417600000,
9280 },
9281 /* Master and slaves can be from different fabrics */
9282 {
9283 .src = MSM_BUS_MASTER_MDP_PORT0,
9284 .dst = MSM_BUS_SLAVE_EBI_CH0,
9285 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009286 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009287 },
9288};
9289
9290#endif
9291static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9292 {
9293 ARRAY_SIZE(mdp_init_vectors),
9294 mdp_init_vectors,
9295 },
9296 {
9297 ARRAY_SIZE(mdp_sd_smi_vectors),
9298 mdp_sd_smi_vectors,
9299 },
9300 {
9301 ARRAY_SIZE(mdp_sd_ebi_vectors),
9302 mdp_sd_ebi_vectors,
9303 },
9304 {
9305 ARRAY_SIZE(mdp_vga_vectors),
9306 mdp_vga_vectors,
9307 },
9308 {
9309 ARRAY_SIZE(mdp_720p_vectors),
9310 mdp_720p_vectors,
9311 },
9312 {
9313 ARRAY_SIZE(mdp_1080p_vectors),
9314 mdp_1080p_vectors,
9315 },
9316};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009317#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009318static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9319 mdp_bus_scale_usecases,
9320 ARRAY_SIZE(mdp_bus_scale_usecases),
9321 .name = "mdp",
9322};
9323
9324#endif
9325#ifdef CONFIG_MSM_BUS_SCALING
9326static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9327 /* For now, 0th array entry is reserved.
9328 * Please leave 0 as is and don't use it
9329 */
9330 {
9331 .src = MSM_BUS_MASTER_MDP_PORT0,
9332 .dst = MSM_BUS_SLAVE_SMI,
9333 .ab = 0,
9334 .ib = 0,
9335 },
9336 /* Master and slaves can be from different fabrics */
9337 {
9338 .src = MSM_BUS_MASTER_MDP_PORT0,
9339 .dst = MSM_BUS_SLAVE_EBI_CH0,
9340 .ab = 0,
9341 .ib = 0,
9342 },
9343};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009344#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9345static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9346 /* For now, 0th array entry is reserved.
9347 * Please leave 0 as is and don't use it
9348 */
9349 {
9350 .src = MSM_BUS_MASTER_MDP_PORT0,
9351 .dst = MSM_BUS_SLAVE_SMI,
9352 .ab = 2000000000,
9353 .ib = 2000000000,
9354 },
9355 /* Master and slaves can be from different fabrics */
9356 {
9357 .src = MSM_BUS_MASTER_MDP_PORT0,
9358 .dst = MSM_BUS_SLAVE_EBI_CH0,
9359 .ab = 2000000000,
9360 .ib = 2000000000,
9361 },
9362};
9363#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009364static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9365 /* For now, 0th array entry is reserved.
9366 * Please leave 0 as is and don't use it
9367 */
9368 {
9369 .src = MSM_BUS_MASTER_MDP_PORT0,
9370 .dst = MSM_BUS_SLAVE_SMI,
9371 .ab = 566092800,
9372 .ib = 707616000,
9373 },
9374 /* Master and slaves can be from different fabrics */
9375 {
9376 .src = MSM_BUS_MASTER_MDP_PORT0,
9377 .dst = MSM_BUS_SLAVE_EBI_CH0,
9378 .ab = 566092800,
9379 .ib = 707616000,
9380 },
9381};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009382#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009383static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9384 {
9385 ARRAY_SIZE(dtv_bus_init_vectors),
9386 dtv_bus_init_vectors,
9387 },
9388 {
9389 ARRAY_SIZE(dtv_bus_def_vectors),
9390 dtv_bus_def_vectors,
9391 },
9392};
9393static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9394 dtv_bus_scale_usecases,
9395 ARRAY_SIZE(dtv_bus_scale_usecases),
9396 .name = "dtv",
9397};
9398
9399static struct lcdc_platform_data dtv_pdata = {
9400 .bus_scale_table = &dtv_bus_scale_pdata,
9401};
9402#endif
9403
9404
9405static struct lcdc_platform_data lcdc_pdata = {
9406 .lcdc_power_save = lcdc_panel_power,
9407};
9408
9409
9410#define MDP_VSYNC_GPIO 28
9411
9412/*
9413 * MIPI_DSI only use 8058_LDO0 which need always on
9414 * therefore it need to be put at low power mode if
9415 * it was not used instead of turn it off.
9416 */
9417static int mipi_dsi_panel_power(int on)
9418{
9419 int flag_on = !!on;
9420 static int mipi_dsi_power_save_on;
9421 static struct regulator *ldo0;
9422 int rc = 0;
9423
9424 if (mipi_dsi_power_save_on == flag_on)
9425 return 0;
9426
9427 mipi_dsi_power_save_on = flag_on;
9428
9429 if (ldo0 == NULL) { /* init */
9430 ldo0 = regulator_get(NULL, "8058_l0");
9431 if (IS_ERR(ldo0)) {
9432 pr_debug("%s: LDO0 failed\n", __func__);
9433 rc = PTR_ERR(ldo0);
9434 return rc;
9435 }
9436
9437 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9438 if (rc)
9439 goto out;
9440
9441 rc = regulator_enable(ldo0);
9442 if (rc)
9443 goto out;
9444 }
9445
9446 if (on) {
9447 /* set ldo0 to HPM */
9448 rc = regulator_set_optimum_mode(ldo0, 100000);
9449 if (rc < 0)
9450 goto out;
9451 } else {
9452 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309453 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009454 if (rc < 0)
9455 goto out;
9456 }
9457
9458 return 0;
9459out:
9460 regulator_disable(ldo0);
9461 regulator_put(ldo0);
9462 ldo0 = NULL;
9463 return rc;
9464}
9465
9466static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9467 .vsync_gpio = MDP_VSYNC_GPIO,
9468 .dsi_power_save = mipi_dsi_panel_power,
9469};
9470
9471#ifdef CONFIG_FB_MSM_TVOUT
9472static struct regulator *reg_8058_l13;
9473
9474static int atv_dac_power(int on)
9475{
9476 int rc = 0;
9477 #define _GET_REGULATOR(var, name) do { \
9478 var = regulator_get(NULL, name); \
9479 if (IS_ERR(var)) { \
9480 pr_info("'%s' regulator not found, rc=%ld\n", \
9481 name, IS_ERR(var)); \
9482 var = NULL; \
9483 return -ENODEV; \
9484 } \
9485 } while (0)
9486
9487 if (!reg_8058_l13)
9488 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9489 #undef _GET_REGULATOR
9490
9491 if (on) {
9492 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9493 if (rc) {
9494 pr_info("%s: '%s' regulator set voltage failed,\
9495 rc=%d\n", __func__, "8058_l13", rc);
9496 return rc;
9497 }
9498
9499 rc = regulator_enable(reg_8058_l13);
9500 if (rc) {
9501 pr_err("%s: '%s' regulator enable failed,\
9502 rc=%d\n", __func__, "8058_l13", rc);
9503 return rc;
9504 }
9505 } else {
9506 rc = regulator_force_disable(reg_8058_l13);
9507 if (rc)
9508 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9509 __func__, "8058_l13", rc);
9510 }
9511 return rc;
9512
9513}
9514#endif
9515
9516#ifdef CONFIG_FB_MSM_MIPI_DSI
9517int mdp_core_clk_rate_table[] = {
9518 85330000,
9519 85330000,
9520 160000000,
9521 200000000,
9522};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009523#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9524int mdp_core_clk_rate_table[] = {
9525 200000000,
9526 200000000,
9527 200000000,
9528 200000000,
9529};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009530#else
9531int mdp_core_clk_rate_table[] = {
9532 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009533 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009534 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009535 200000000,
9536};
9537#endif
9538
9539static struct msm_panel_common_pdata mdp_pdata = {
9540 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009541#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9542 .mdp_core_clk_rate = 200000000,
9543#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009544 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009545#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009546 .mdp_core_clk_table = mdp_core_clk_rate_table,
9547 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9548#ifdef CONFIG_MSM_BUS_SCALING
9549 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9550#endif
9551 .mdp_rev = MDP_REV_41,
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009552#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
9553 .mem_hid = ION_CP_WB_HEAP_ID,
9554#else
9555 .mem_hid = MEMTYPE_EBI1,
9556#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009557};
9558
Huaibin Yanga5419422011-12-08 23:52:10 -08009559static void __init reserve_mdp_memory(void)
9560{
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009561 mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9562 mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9563#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
9564 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9565 mdp_pdata.ov0_wb_size;
9566 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9567 mdp_pdata.ov1_wb_size;
9568#endif
Huaibin Yanga5419422011-12-08 23:52:10 -08009569}
9570
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009571#ifdef CONFIG_FB_MSM_TVOUT
9572
9573#ifdef CONFIG_MSM_BUS_SCALING
9574static struct msm_bus_vectors atv_bus_init_vectors[] = {
9575 /* For now, 0th array entry is reserved.
9576 * Please leave 0 as is and don't use it
9577 */
9578 {
9579 .src = MSM_BUS_MASTER_MDP_PORT0,
9580 .dst = MSM_BUS_SLAVE_SMI,
9581 .ab = 0,
9582 .ib = 0,
9583 },
9584 /* Master and slaves can be from different fabrics */
9585 {
9586 .src = MSM_BUS_MASTER_MDP_PORT0,
9587 .dst = MSM_BUS_SLAVE_EBI_CH0,
9588 .ab = 0,
9589 .ib = 0,
9590 },
9591};
9592static struct msm_bus_vectors atv_bus_def_vectors[] = {
9593 /* For now, 0th array entry is reserved.
9594 * Please leave 0 as is and don't use it
9595 */
9596 {
9597 .src = MSM_BUS_MASTER_MDP_PORT0,
9598 .dst = MSM_BUS_SLAVE_SMI,
9599 .ab = 236390400,
9600 .ib = 265939200,
9601 },
9602 /* Master and slaves can be from different fabrics */
9603 {
9604 .src = MSM_BUS_MASTER_MDP_PORT0,
9605 .dst = MSM_BUS_SLAVE_EBI_CH0,
9606 .ab = 236390400,
9607 .ib = 265939200,
9608 },
9609};
9610static struct msm_bus_paths atv_bus_scale_usecases[] = {
9611 {
9612 ARRAY_SIZE(atv_bus_init_vectors),
9613 atv_bus_init_vectors,
9614 },
9615 {
9616 ARRAY_SIZE(atv_bus_def_vectors),
9617 atv_bus_def_vectors,
9618 },
9619};
9620static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9621 atv_bus_scale_usecases,
9622 ARRAY_SIZE(atv_bus_scale_usecases),
9623 .name = "atv",
9624};
9625#endif
9626
9627static struct tvenc_platform_data atv_pdata = {
9628 .poll = 0,
9629 .pm_vid_en = atv_dac_power,
9630#ifdef CONFIG_MSM_BUS_SCALING
9631 .bus_scale_table = &atv_bus_scale_pdata,
9632#endif
9633};
9634#endif
9635
9636static void __init msm_fb_add_devices(void)
9637{
9638#ifdef CONFIG_FB_MSM_LCDC_DSUB
9639 mdp_pdata.mdp_core_clk_table = NULL;
9640 mdp_pdata.num_mdp_clk = 0;
9641 mdp_pdata.mdp_core_clk_rate = 200000000;
9642#endif
9643 if (machine_is_msm8x60_rumi3())
9644 msm_fb_register_device("mdp", NULL);
9645 else
9646 msm_fb_register_device("mdp", &mdp_pdata);
9647
9648 msm_fb_register_device("lcdc", &lcdc_pdata);
9649 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9650#ifdef CONFIG_MSM_BUS_SCALING
9651 msm_fb_register_device("dtv", &dtv_pdata);
9652#endif
9653#ifdef CONFIG_FB_MSM_TVOUT
9654 msm_fb_register_device("tvenc", &atv_pdata);
9655 msm_fb_register_device("tvout_device", NULL);
9656#endif
9657}
9658
9659#if (defined(CONFIG_MARIMBA_CORE)) && \
9660 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9661
9662static const struct {
9663 char *name;
9664 int vmin;
9665 int vmax;
9666} bt_regs_info[] = {
9667 { "8058_s3", 1800000, 1800000 },
9668 { "8058_s2", 1300000, 1300000 },
9669 { "8058_l8", 2900000, 3050000 },
9670};
9671
9672static struct {
9673 bool enabled;
9674} bt_regs_status[] = {
9675 { false },
9676 { false },
9677 { false },
9678};
9679static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9680
9681static int bahama_bt(int on)
9682{
9683 int rc;
9684 int i;
9685 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9686
9687 struct bahama_variant_register {
9688 const size_t size;
9689 const struct bahama_config_register *set;
9690 };
9691
9692 const struct bahama_config_register *p;
9693
9694 u8 version;
9695
9696 const struct bahama_config_register v10_bt_on[] = {
9697 { 0xE9, 0x00, 0xFF },
9698 { 0xF4, 0x80, 0xFF },
9699 { 0xE4, 0x00, 0xFF },
9700 { 0xE5, 0x00, 0x0F },
9701#ifdef CONFIG_WLAN
9702 { 0xE6, 0x38, 0x7F },
9703 { 0xE7, 0x06, 0xFF },
9704#endif
9705 { 0xE9, 0x21, 0xFF },
9706 { 0x01, 0x0C, 0x1F },
9707 { 0x01, 0x08, 0x1F },
9708 };
9709
9710 const struct bahama_config_register v20_bt_on_fm_off[] = {
9711 { 0x11, 0x0C, 0xFF },
9712 { 0x13, 0x01, 0xFF },
9713 { 0xF4, 0x80, 0xFF },
9714 { 0xF0, 0x00, 0xFF },
9715 { 0xE9, 0x00, 0xFF },
9716#ifdef CONFIG_WLAN
9717 { 0x81, 0x00, 0x7F },
9718 { 0x82, 0x00, 0xFF },
9719 { 0xE6, 0x38, 0x7F },
9720 { 0xE7, 0x06, 0xFF },
9721#endif
9722 { 0xE9, 0x21, 0xFF },
9723 };
9724
9725 const struct bahama_config_register v20_bt_on_fm_on[] = {
9726 { 0x11, 0x0C, 0xFF },
9727 { 0x13, 0x01, 0xFF },
9728 { 0xF4, 0x86, 0xFF },
9729 { 0xF0, 0x06, 0xFF },
9730 { 0xE9, 0x00, 0xFF },
9731#ifdef CONFIG_WLAN
9732 { 0x81, 0x00, 0x7F },
9733 { 0x82, 0x00, 0xFF },
9734 { 0xE6, 0x38, 0x7F },
9735 { 0xE7, 0x06, 0xFF },
9736#endif
9737 { 0xE9, 0x21, 0xFF },
9738 };
9739
9740 const struct bahama_config_register v10_bt_off[] = {
9741 { 0xE9, 0x00, 0xFF },
9742 };
9743
9744 const struct bahama_config_register v20_bt_off_fm_off[] = {
9745 { 0xF4, 0x84, 0xFF },
9746 { 0xF0, 0x04, 0xFF },
9747 { 0xE9, 0x00, 0xFF }
9748 };
9749
9750 const struct bahama_config_register v20_bt_off_fm_on[] = {
9751 { 0xF4, 0x86, 0xFF },
9752 { 0xF0, 0x06, 0xFF },
9753 { 0xE9, 0x00, 0xFF }
9754 };
9755 const struct bahama_variant_register bt_bahama[2][3] = {
9756 {
9757 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9758 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9759 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9760 },
9761 {
9762 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9763 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9764 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9765 }
9766 };
9767
9768 u8 offset = 0; /* index into bahama configs */
9769
9770 on = on ? 1 : 0;
9771 version = read_bahama_ver();
9772
9773 if (version == VER_UNSUPPORTED) {
9774 dev_err(&msm_bt_power_device.dev,
9775 "%s: unsupported version\n",
9776 __func__);
9777 return -EIO;
9778 }
9779
9780 if (version == VER_2_0) {
9781 if (marimba_get_fm_status(&config))
9782 offset = 0x01;
9783 }
9784
9785 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9786 if (on && (version == VER_2_0)) {
9787 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9788 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9789 && (bt_regs_status[i].enabled == true)) {
9790 if (regulator_disable(bt_regs[i])) {
9791 dev_err(&msm_bt_power_device.dev,
9792 "%s: regulator disable failed",
9793 __func__);
9794 }
9795 bt_regs_status[i].enabled = false;
9796 break;
9797 }
9798 }
9799 }
9800
9801 p = bt_bahama[on][version + offset].set;
9802
9803 dev_info(&msm_bt_power_device.dev,
9804 "%s: found version %d\n", __func__, version);
9805
9806 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9807 u8 value = (p+i)->value;
9808 rc = marimba_write_bit_mask(&config,
9809 (p+i)->reg,
9810 &value,
9811 sizeof((p+i)->value),
9812 (p+i)->mask);
9813 if (rc < 0) {
9814 dev_err(&msm_bt_power_device.dev,
9815 "%s: reg %d write failed: %d\n",
9816 __func__, (p+i)->reg, rc);
9817 return rc;
9818 }
9819 dev_dbg(&msm_bt_power_device.dev,
9820 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9821 __func__, (p+i)->reg,
9822 value, (p+i)->mask);
9823 }
9824 /* Update BT Status */
9825 if (on)
9826 marimba_set_bt_status(&config, true);
9827 else
9828 marimba_set_bt_status(&config, false);
9829
9830 return 0;
9831}
9832
9833static int bluetooth_use_regulators(int on)
9834{
9835 int i, recover = -1, rc = 0;
9836
9837 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9838 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9839 bt_regs_info[i].name) :
9840 (regulator_put(bt_regs[i]), NULL);
9841 if (IS_ERR(bt_regs[i])) {
9842 rc = PTR_ERR(bt_regs[i]);
9843 dev_err(&msm_bt_power_device.dev,
9844 "regulator %s get failed (%d)\n",
9845 bt_regs_info[i].name, rc);
9846 recover = i - 1;
9847 bt_regs[i] = NULL;
9848 break;
9849 }
9850
9851 if (!on)
9852 continue;
9853
9854 rc = regulator_set_voltage(bt_regs[i],
9855 bt_regs_info[i].vmin,
9856 bt_regs_info[i].vmax);
9857 if (rc < 0) {
9858 dev_err(&msm_bt_power_device.dev,
9859 "regulator %s voltage set (%d)\n",
9860 bt_regs_info[i].name, rc);
9861 recover = i;
9862 break;
9863 }
9864 }
9865
9866 if (on && (recover > -1))
9867 for (i = recover; i >= 0; i--) {
9868 regulator_put(bt_regs[i]);
9869 bt_regs[i] = NULL;
9870 }
9871
9872 return rc;
9873}
9874
9875static int bluetooth_switch_regulators(int on)
9876{
9877 int i, rc = 0;
9878
9879 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9880 if (on && (bt_regs_status[i].enabled == false)) {
9881 rc = regulator_enable(bt_regs[i]);
9882 if (rc < 0) {
9883 dev_err(&msm_bt_power_device.dev,
9884 "regulator %s %s failed (%d)\n",
9885 bt_regs_info[i].name,
9886 "enable", rc);
9887 if (i > 0) {
9888 while (--i) {
9889 regulator_disable(bt_regs[i]);
9890 bt_regs_status[i].enabled
9891 = false;
9892 }
9893 break;
9894 }
9895 }
9896 bt_regs_status[i].enabled = true;
9897 } else if (!on && (bt_regs_status[i].enabled == true)) {
9898 rc = regulator_disable(bt_regs[i]);
9899 if (rc < 0) {
9900 dev_err(&msm_bt_power_device.dev,
9901 "regulator %s %s failed (%d)\n",
9902 bt_regs_info[i].name,
9903 "disable", rc);
9904 break;
9905 }
9906 bt_regs_status[i].enabled = false;
9907 }
9908 }
9909 return rc;
9910}
9911
9912static struct msm_xo_voter *bt_clock;
9913
9914static int bluetooth_power(int on)
9915{
9916 int rc = 0;
9917 int id;
9918
9919 /* In case probe function fails, cur_connv_type would be -1 */
9920 id = adie_get_detected_connectivity_type();
9921 if (id != BAHAMA_ID) {
9922 pr_err("%s: unexpected adie connectivity type: %d\n",
9923 __func__, id);
9924 return -ENODEV;
9925 }
9926
9927 if (on) {
9928
9929 rc = bluetooth_use_regulators(1);
9930 if (rc < 0)
9931 goto out;
9932
9933 rc = bluetooth_switch_regulators(1);
9934
9935 if (rc < 0)
9936 goto fail_put;
9937
9938 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9939
9940 if (IS_ERR(bt_clock)) {
9941 pr_err("Couldn't get TCXO_D0 voter\n");
9942 goto fail_switch;
9943 }
9944
9945 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9946
9947 if (rc < 0) {
9948 pr_err("Failed to vote for TCXO_DO ON\n");
9949 goto fail_vote;
9950 }
9951
9952 rc = bahama_bt(1);
9953
9954 if (rc < 0)
9955 goto fail_clock;
9956
9957 msleep(10);
9958
9959 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9960
9961 if (rc < 0) {
9962 pr_err("Failed to vote for TCXO_DO pin control\n");
9963 goto fail_vote;
9964 }
9965 } else {
9966 /* check for initial RFKILL block (power off) */
9967 /* some RFKILL versions/configurations rfkill_register */
9968 /* calls here for an initial set_block */
9969 /* avoid calling i2c and regulator before unblock (on) */
9970 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9971 dev_info(&msm_bt_power_device.dev,
9972 "%s: initialized OFF/blocked\n", __func__);
9973 goto out;
9974 }
9975
9976 bahama_bt(0);
9977
9978fail_clock:
9979 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
9980fail_vote:
9981 msm_xo_put(bt_clock);
9982fail_switch:
9983 bluetooth_switch_regulators(0);
9984fail_put:
9985 bluetooth_use_regulators(0);
9986 }
9987
9988out:
9989 if (rc < 0)
9990 on = 0;
9991 dev_info(&msm_bt_power_device.dev,
9992 "Bluetooth power switch: state %d result %d\n", on, rc);
9993
9994 return rc;
9995}
9996
9997#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
9998
9999static void __init msm8x60_cfg_smsc911x(void)
10000{
10001 smsc911x_resources[1].start =
10002 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10003 smsc911x_resources[1].end =
10004 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10005}
10006
10007#ifdef CONFIG_MSM_RPM
10008static struct msm_rpm_platform_data msm_rpm_data = {
10009 .reg_base_addrs = {
10010 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
10011 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
10012 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
10013 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
10014 },
10015
10016 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
10017 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
10018 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
10019 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
10020 .msm_apps_ipc_rpm_val = 4,
10021};
10022#endif
10023
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010024void msm_fusion_setup_pinctrl(void)
10025{
10026 struct msm_xo_voter *a1;
10027
10028 if (socinfo_get_platform_subtype() == 0x3) {
10029 /*
10030 * Vote for the A1 clock to be in pin control mode before
10031 * the external images are loaded.
10032 */
10033 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
10034 BUG_ON(!a1);
10035 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
10036 }
10037}
10038
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010039struct msm_board_data {
10040 struct msm_gpiomux_configs *gpiomux_cfgs;
10041};
10042
10043static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
10044 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10045};
10046
10047static struct msm_board_data msm8x60_sim_board_data __initdata = {
10048 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10049};
10050
10051static struct msm_board_data msm8x60_surf_board_data __initdata = {
10052 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10053};
10054
10055static struct msm_board_data msm8x60_ffa_board_data __initdata = {
10056 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10057};
10058
10059static struct msm_board_data msm8x60_fluid_board_data __initdata = {
10060 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
10061};
10062
10063static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
10064 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10065};
10066
10067static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
10068 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10069};
10070
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010071static struct msm_board_data msm8x60_dragon_board_data __initdata = {
10072 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
10073};
10074
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010075static void __init msm8x60_init(struct msm_board_data *board_data)
10076{
10077 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010078#ifdef CONFIG_USB_EHCI_MSM_72K
10079 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
10080 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
10081 .level = PM8901_MPP_DIG_LEVEL_L5,
10082 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
10083 };
10084#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010085 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070010086
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010087 /*
10088 * Initialize RPM first as other drivers and devices may need
10089 * it for their initialization.
10090 */
10091#ifdef CONFIG_MSM_RPM
10092 BUG_ON(msm_rpm_init(&msm_rpm_data));
10093#endif
10094 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
10095 ARRAY_SIZE(msm_rpmrs_levels)));
10096 if (msm_xo_init())
10097 pr_err("Failed to initialize XO votes\n");
10098
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010099 msm8x60_check_2d_hardware();
10100
10101 /* Change SPM handling of core 1 if PMM 8160 is present. */
10102 soc_platform_version = socinfo_get_platform_version();
10103 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
10104 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
10105 struct msm_spm_platform_data *spm_data;
10106
10107 spm_data = &msm_spm_data_v1[1];
10108 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10109 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10110
10111 spm_data = &msm_spm_data[1];
10112 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10113 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10114 }
10115
10116 /*
10117 * Initialize SPM before acpuclock as the latter calls into SPM
10118 * driver to set ACPU voltages.
10119 */
10120 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10121 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
10122 else
10123 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
10124
10125 /*
10126 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10127 * devices so that the RPM doesn't drop into a low power mode that an
10128 * un-reworked SURF cannot resume from.
10129 */
10130 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010131 int i;
10132
10133 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10134 if (rpm_regulator_init_data[i].id
10135 == RPM_VREG_ID_PM8901_L4
10136 || rpm_regulator_init_data[i].id
10137 == RPM_VREG_ID_PM8901_L6)
10138 rpm_regulator_init_data[i]
10139 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010140 }
10141
10142 /*
10143 * Disable regulator info printing so that regulator registration
10144 * messages do not enter the kmsg log.
10145 */
10146 regulator_suppress_info_printing();
10147
10148 /* Initialize regulators needed for clock_init. */
10149 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10150
Stephen Boydbb600ae2011-08-02 20:11:40 -070010151 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010152
10153 /* Buses need to be initialized before early-device registration
10154 * to get the platform data for fabrics.
10155 */
10156 msm8x60_init_buses();
10157 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10158 /* CPU frequency control is not supported on simulated targets. */
10159 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010160 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010161
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010162 /*
10163 * Enable EBI2 only for boards which make use of it. Leave
10164 * it disabled for all others for additional power savings.
10165 */
10166 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10167 machine_is_msm8x60_rumi3() ||
10168 machine_is_msm8x60_sim() ||
10169 machine_is_msm8x60_fluid() ||
10170 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010171 msm8x60_init_ebi2();
10172 msm8x60_init_tlmm();
10173 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10174 msm8x60_init_uart12dm();
10175 msm8x60_init_mmc();
10176
10177#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10178 msm8x60_init_pm8058_othc();
10179#endif
10180
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010181 if (machine_is_msm8x60_fluid())
10182 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10183 else if (machine_is_msm8x60_dragon())
10184 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10185 else
10186 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010187
Jilai Wang53d27a82011-07-13 14:32:58 -040010188 /* Specify reset pin for OV9726 */
10189 if (machine_is_msm8x60_dragon()) {
10190 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10191 ov9726_sensor_8660_info.mount_angle = 270;
10192 }
10193
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010194#ifdef CONFIG_BATTERY_MSM8X60
10195 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10196 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10197 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10198 platform_device_register(&msm_charger_device);
10199#endif
10200
10201 if (machine_is_msm8x60_dragon())
10202 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10203 if (!machine_is_msm8x60_fluid())
10204 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10205
10206 /* configure pmic leds */
10207 if (machine_is_msm8x60_fluid())
10208 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10209 else if (machine_is_msm8x60_dragon())
10210 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10211 else
10212 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10213
10214 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10215 machine_is_msm8x60_dragon()) {
10216 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10217 }
10218
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010219 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10220 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010221 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010222 msm8x60_cfg_smsc911x();
10223 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10224 platform_add_devices(msm_footswitch_devices,
10225 msm_num_footswitch_devices);
10226 platform_add_devices(surf_devices,
10227 ARRAY_SIZE(surf_devices));
10228
10229#ifdef CONFIG_MSM_DSPS
10230 if (machine_is_msm8x60_fluid()) {
10231 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10232 msm8x60_init_dsps();
10233 }
10234#endif
10235
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010236 pm8901_vreg_mpp0_init();
10237
10238 platform_device_register(&msm8x60_8901_mpp_vreg);
10239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010240#ifdef CONFIG_USB_EHCI_MSM_72K
10241 /*
10242 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10243 * fluid
10244 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010245 if (machine_is_msm8x60_fluid())
10246 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10247 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010248#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010249
10250#ifdef CONFIG_SND_SOC_MSM8660_APQ
10251 if (machine_is_msm8x60_dragon())
10252 platform_add_devices(dragon_alsa_devices,
10253 ARRAY_SIZE(dragon_alsa_devices));
10254 else
10255#endif
10256 platform_add_devices(asoc_devices,
10257 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010258 } else {
10259 msm8x60_configure_smc91x();
10260 platform_add_devices(rumi_sim_devices,
10261 ARRAY_SIZE(rumi_sim_devices));
10262 }
10263#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010264 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10265 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010266 msm8x60_cfg_isp1763();
10267#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010268
10269 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10270 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010272
10273#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10274 if (machine_is_msm8x60_fluid())
10275 platform_device_register(&msm_gsbi10_qup_spi_device);
10276 else
10277 platform_device_register(&msm_gsbi1_qup_spi_device);
10278#endif
10279
10280#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10281 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10282 if (machine_is_msm8x60_fluid())
10283 cyttsp_set_params();
10284#endif
10285 if (!machine_is_msm8x60_sim())
10286 msm_fb_add_devices();
10287 fixup_i2c_configs();
10288 register_i2c_devices();
10289
Terence Hampson1c73fef2011-07-19 17:10:49 -040010290 if (machine_is_msm8x60_dragon())
10291 smsc911x_config.reset_gpio
10292 = GPIO_ETHERNET_RESET_N_DRAGON;
10293
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010294 platform_device_register(&smsc911x_device);
10295
10296#if (defined(CONFIG_SPI_QUP)) && \
10297 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010298 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10299 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010300
10301 if (machine_is_msm8x60_fluid()) {
10302#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10303 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10304 spi_register_board_info(lcdc_samsung_spi_board_info,
10305 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10306 } else
10307#endif
10308 {
10309#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10310 spi_register_board_info(lcdc_auo_spi_board_info,
10311 ARRAY_SIZE(lcdc_auo_spi_board_info));
10312#endif
10313 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010314#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10315 } else if (machine_is_msm8x60_dragon()) {
10316 spi_register_board_info(lcdc_nt35582_spi_board_info,
10317 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10318#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010319 }
10320#endif
10321
10322 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10323 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10324 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10325 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010326 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010327
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010328 pm8058_gpios_init();
10329
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010330#ifdef CONFIG_SENSORS_MSM_ADC
10331 if (machine_is_msm8x60_fluid()) {
10332 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10333 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10334 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10335 msm_adc_pdata.gpio_config = APROC_CONFIG;
10336 else
10337 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10338 }
10339 msm_adc_pdata.target_hw = MSM_8x60;
10340#endif
10341#ifdef CONFIG_MSM8X60_AUDIO
10342 msm_snddev_init();
10343#endif
10344#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10345 if (machine_is_msm8x60_fluid())
10346 platform_device_register(&fluid_leds_gpio);
10347 else
10348 platform_device_register(&gpio_leds);
10349#endif
10350
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010351 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010352
10353 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10354 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010355}
10356
10357static void __init msm8x60_rumi3_init(void)
10358{
10359 msm8x60_init(&msm8x60_rumi3_board_data);
10360}
10361
10362static void __init msm8x60_sim_init(void)
10363{
10364 msm8x60_init(&msm8x60_sim_board_data);
10365}
10366
10367static void __init msm8x60_surf_init(void)
10368{
10369 msm8x60_init(&msm8x60_surf_board_data);
10370}
10371
10372static void __init msm8x60_ffa_init(void)
10373{
10374 msm8x60_init(&msm8x60_ffa_board_data);
10375}
10376
10377static void __init msm8x60_fluid_init(void)
10378{
10379 msm8x60_init(&msm8x60_fluid_board_data);
10380}
10381
10382static void __init msm8x60_charm_surf_init(void)
10383{
10384 msm8x60_init(&msm8x60_charm_surf_board_data);
10385}
10386
10387static void __init msm8x60_charm_ffa_init(void)
10388{
10389 msm8x60_init(&msm8x60_charm_ffa_board_data);
10390}
10391
10392static void __init msm8x60_charm_init_early(void)
10393{
10394 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010395}
10396
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010397static void __init msm8x60_dragon_init(void)
10398{
10399 msm8x60_init(&msm8x60_dragon_board_data);
10400}
10401
Steve Mucklea55df6e2010-01-07 12:43:24 -080010402MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10403 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010404 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010405 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010406 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010407 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010408 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010409 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010410MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010411
10412MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10413 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010414 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010415 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010416 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010417 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010418 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010419 .init_early = msm8x60_charm_init_early,
10420MACHINE_END
10421
10422MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10423 .map_io = msm8x60_map_io,
10424 .reserve = msm8x60_reserve,
10425 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010426 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010427 .init_machine = msm8x60_surf_init,
10428 .timer = &msm_timer,
10429 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010430MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010431
10432MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10433 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010434 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010435 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010436 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010437 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010438 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010439 .init_early = msm8x60_charm_init_early,
10440MACHINE_END
10441
10442MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10443 .map_io = msm8x60_map_io,
10444 .reserve = msm8x60_reserve,
10445 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010446 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010447 .init_machine = msm8x60_fluid_init,
10448 .timer = &msm_timer,
10449 .init_early = msm8x60_charm_init_early,
10450MACHINE_END
10451
10452MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10453 .map_io = msm8x60_map_io,
10454 .reserve = msm8x60_reserve,
10455 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010456 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010457 .init_machine = msm8x60_charm_surf_init,
10458 .timer = &msm_timer,
10459 .init_early = msm8x60_charm_init_early,
10460MACHINE_END
10461
10462MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10463 .map_io = msm8x60_map_io,
10464 .reserve = msm8x60_reserve,
10465 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010466 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010467 .init_machine = msm8x60_charm_ffa_init,
10468 .timer = &msm_timer,
10469 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010470MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010471
10472MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10473 .map_io = msm8x60_map_io,
10474 .reserve = msm8x60_reserve,
10475 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010476 .handle_irq = gic_handle_irq,
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010477 .init_machine = msm8x60_dragon_init,
10478 .timer = &msm_timer,
10479 .init_early = msm8x60_charm_init_early,
10480MACHINE_END