| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 1 | /* | 
 | 2 |  * Regulator Driver for Freescale MC13783 PMIC | 
 | 3 |  * | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 4 |  * Copyright 2010 Yong Shen <yong.shen@linaro.org> | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 5 |  * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 6 |  * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com> | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 7 |  * | 
 | 8 |  * This program is free software; you can redistribute it and/or modify | 
 | 9 |  * it under the terms of the GNU General Public License version 2 as | 
 | 10 |  * published by the Free Software Foundation. | 
 | 11 |  */ | 
 | 12 |  | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 13 | #include <linux/mfd/mc13783.h> | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 14 | #include <linux/regulator/machine.h> | 
 | 15 | #include <linux/regulator/driver.h> | 
 | 16 | #include <linux/platform_device.h> | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 17 | #include <linux/kernel.h> | 
| Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 18 | #include <linux/slab.h> | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 19 | #include <linux/init.h> | 
 | 20 | #include <linux/err.h> | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 21 | #include "mc13xxx.h" | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 22 |  | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 23 | #define MC13783_REG_SWITCHERS5			29 | 
 | 24 | #define MC13783_REG_SWITCHERS5_SW3EN			(1 << 20) | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 25 | #define MC13783_REG_SWITCHERS5_SW3VSEL			18 | 
 | 26 | #define MC13783_REG_SWITCHERS5_SW3VSEL_M		(3 << 18) | 
 | 27 |  | 
 | 28 | #define MC13783_REG_REGULATORSETTING0		30 | 
 | 29 | #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL		2 | 
 | 30 | #define MC13783_REG_REGULATORSETTING0_VDIGVSEL		4 | 
 | 31 | #define MC13783_REG_REGULATORSETTING0_VGENVSEL		6 | 
 | 32 | #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL	9 | 
 | 33 | #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL	11 | 
 | 34 | #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL		13 | 
 | 35 | #define MC13783_REG_REGULATORSETTING0_VSIMVSEL		14 | 
 | 36 | #define MC13783_REG_REGULATORSETTING0_VESIMVSEL		15 | 
 | 37 | #define MC13783_REG_REGULATORSETTING0_VCAMVSEL		16 | 
 | 38 |  | 
 | 39 | #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M	(3 << 2) | 
 | 40 | #define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M	(3 << 4) | 
 | 41 | #define MC13783_REG_REGULATORSETTING0_VGENVSEL_M	(7 << 6) | 
 | 42 | #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M	(3 << 9) | 
 | 43 | #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M	(3 << 11) | 
 | 44 | #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M	(1 << 13) | 
 | 45 | #define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M	(1 << 14) | 
 | 46 | #define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M	(1 << 15) | 
 | 47 | #define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M	(7 << 16) | 
 | 48 |  | 
 | 49 | #define MC13783_REG_REGULATORSETTING1		31 | 
 | 50 | #define MC13783_REG_REGULATORSETTING1_VVIBVSEL		0 | 
 | 51 | #define MC13783_REG_REGULATORSETTING1_VRF1VSEL		2 | 
 | 52 | #define MC13783_REG_REGULATORSETTING1_VRF2VSEL		4 | 
 | 53 | #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL		6 | 
 | 54 | #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL		9 | 
 | 55 |  | 
 | 56 | #define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M	(3 << 0) | 
 | 57 | #define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M	(3 << 2) | 
 | 58 | #define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M	(3 << 4) | 
 | 59 | #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M	(7 << 6) | 
 | 60 | #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M	(7 << 9) | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 61 |  | 
 | 62 | #define MC13783_REG_REGULATORMODE0		32 | 
 | 63 | #define MC13783_REG_REGULATORMODE0_VAUDIOEN		(1 << 0) | 
 | 64 | #define MC13783_REG_REGULATORMODE0_VIOHIEN		(1 << 3) | 
 | 65 | #define MC13783_REG_REGULATORMODE0_VIOLOEN		(1 << 6) | 
 | 66 | #define MC13783_REG_REGULATORMODE0_VDIGEN		(1 << 9) | 
 | 67 | #define MC13783_REG_REGULATORMODE0_VGENEN		(1 << 12) | 
 | 68 | #define MC13783_REG_REGULATORMODE0_VRFDIGEN		(1 << 15) | 
 | 69 | #define MC13783_REG_REGULATORMODE0_VRFREFEN		(1 << 18) | 
 | 70 | #define MC13783_REG_REGULATORMODE0_VRFCPEN		(1 << 21) | 
 | 71 |  | 
 | 72 | #define MC13783_REG_REGULATORMODE1		33 | 
 | 73 | #define MC13783_REG_REGULATORMODE1_VSIMEN		(1 << 0) | 
 | 74 | #define MC13783_REG_REGULATORMODE1_VESIMEN		(1 << 3) | 
 | 75 | #define MC13783_REG_REGULATORMODE1_VCAMEN		(1 << 6) | 
 | 76 | #define MC13783_REG_REGULATORMODE1_VRFBGEN		(1 << 9) | 
 | 77 | #define MC13783_REG_REGULATORMODE1_VVIBEN		(1 << 11) | 
 | 78 | #define MC13783_REG_REGULATORMODE1_VRF1EN		(1 << 12) | 
 | 79 | #define MC13783_REG_REGULATORMODE1_VRF2EN		(1 << 15) | 
 | 80 | #define MC13783_REG_REGULATORMODE1_VMMC1EN		(1 << 18) | 
 | 81 | #define MC13783_REG_REGULATORMODE1_VMMC2EN		(1 << 21) | 
 | 82 |  | 
 | 83 | #define MC13783_REG_POWERMISC			34 | 
 | 84 | #define MC13783_REG_POWERMISC_GPO1EN			(1 << 6) | 
 | 85 | #define MC13783_REG_POWERMISC_GPO2EN			(1 << 8) | 
 | 86 | #define MC13783_REG_POWERMISC_GPO3EN			(1 << 10) | 
 | 87 | #define MC13783_REG_POWERMISC_GPO4EN			(1 << 12) | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 88 | #define MC13783_REG_POWERMISC_PWGT1SPIEN		(1 << 15) | 
 | 89 | #define MC13783_REG_POWERMISC_PWGT2SPIEN		(1 << 16) | 
 | 90 |  | 
 | 91 | #define MC13783_REG_POWERMISC_PWGTSPI_M			(3 << 15) | 
 | 92 |  | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 93 |  | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 94 | /* Voltage Values */ | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 95 | static const int mc13783_sw3_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 96 | 	5000000, 5000000, 5000000, 5500000, | 
 | 97 | }; | 
 | 98 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 99 | static const int mc13783_vaudio_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 100 | 	2775000, | 
 | 101 | }; | 
 | 102 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 103 | static const int mc13783_viohi_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 104 | 	2775000, | 
 | 105 | }; | 
 | 106 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 107 | static const int mc13783_violo_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 108 | 	1200000, 1300000, 1500000, 1800000, | 
 | 109 | }; | 
 | 110 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 111 | static const int mc13783_vdig_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 112 | 	1200000, 1300000, 1500000, 1800000, | 
 | 113 | }; | 
 | 114 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 115 | static const int mc13783_vgen_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 116 | 	1200000, 1300000, 1500000, 1800000, | 
 | 117 | 	1100000, 2000000, 2775000, 2400000, | 
 | 118 | }; | 
 | 119 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 120 | static const int mc13783_vrfdig_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 121 | 	1200000, 1500000, 1800000, 1875000, | 
 | 122 | }; | 
 | 123 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 124 | static const int mc13783_vrfref_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 125 | 	2475000, 2600000, 2700000, 2775000, | 
 | 126 | }; | 
 | 127 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 128 | static const int mc13783_vrfcp_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 129 | 	2700000, 2775000, | 
 | 130 | }; | 
 | 131 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 132 | static const int mc13783_vsim_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 133 | 	1800000, 2900000, 3000000, | 
 | 134 | }; | 
 | 135 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 136 | static const int mc13783_vesim_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 137 | 	1800000, 2900000, | 
 | 138 | }; | 
 | 139 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 140 | static const int mc13783_vcam_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 141 | 	1500000, 1800000, 2500000, 2550000, | 
 | 142 | 	2600000, 2750000, 2800000, 3000000, | 
 | 143 | }; | 
 | 144 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 145 | static const int mc13783_vrfbg_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 146 | 	1250000, | 
 | 147 | }; | 
 | 148 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 149 | static const int mc13783_vvib_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 150 | 	1300000, 1800000, 2000000, 3000000, | 
 | 151 | }; | 
 | 152 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 153 | static const int mc13783_vmmc_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 154 | 	1600000, 1800000, 2000000, 2600000, | 
 | 155 | 	2700000, 2800000, 2900000, 3000000, | 
 | 156 | }; | 
 | 157 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 158 | static const int mc13783_vrf_val[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 159 | 	1500000, 1875000, 2700000, 2775000, | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 160 | }; | 
 | 161 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 162 | static const int mc13783_gpo_val[] = { | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 163 | 	3100000, | 
 | 164 | }; | 
 | 165 |  | 
| Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 166 | static const int mc13783_pwgtdrv_val[] = { | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 167 | 	5500000, | 
 | 168 | }; | 
 | 169 |  | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 170 | static struct regulator_ops mc13783_gpo_regulator_ops; | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 171 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 172 | #define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages)	\ | 
 | 173 | 	MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \ | 
 | 174 | 			mc13xxx_regulator_ops) | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 175 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 176 | #define MC13783_FIXED_DEFINE(prefix, name, reg, voltages)		\ | 
 | 177 | 	MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \ | 
 | 178 | 			mc13xxx_fixed_regulator_ops) | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 179 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 180 | #define MC13783_GPO_DEFINE(prefix, name, reg, voltages)		\ | 
 | 181 | 	MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \ | 
 | 182 | 			mc13783_gpo_regulator_ops) | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 183 |  | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 184 | #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages)		\ | 
| Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 185 | 	MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages) | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 186 | #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages)		\ | 
| Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 187 | 	MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages) | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 188 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 189 | static struct mc13xxx_regulator mc13783_regulators[] = { | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 190 | 	MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val), | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 191 |  | 
| Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 192 | 	MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val), | 
 | 193 | 	MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val), | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 194 | 	MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0,	\ | 
 | 195 | 			    mc13783_violo_val), | 
 | 196 | 	MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0,	\ | 
 | 197 | 			    mc13783_vdig_val), | 
 | 198 | 	MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0,	\ | 
 | 199 | 			    mc13783_vgen_val), | 
 | 200 | 	MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0,	\ | 
 | 201 | 			    mc13783_vrfdig_val), | 
 | 202 | 	MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0,	\ | 
 | 203 | 			    mc13783_vrfref_val), | 
 | 204 | 	MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0,	\ | 
 | 205 | 			    mc13783_vrfcp_val), | 
 | 206 | 	MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0,	\ | 
 | 207 | 			    mc13783_vsim_val), | 
 | 208 | 	MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0,	\ | 
 | 209 | 			    mc13783_vesim_val), | 
 | 210 | 	MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0,	\ | 
 | 211 | 			    mc13783_vcam_val), | 
| Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 212 | 	MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val), | 
| Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 213 | 	MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1,	\ | 
 | 214 | 			    mc13783_vvib_val), | 
 | 215 | 	MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1,	\ | 
 | 216 | 			    mc13783_vrf_val), | 
 | 217 | 	MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1,	\ | 
 | 218 | 			    mc13783_vrf_val), | 
 | 219 | 	MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1,	\ | 
 | 220 | 			    mc13783_vmmc_val), | 
 | 221 | 	MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1,	\ | 
 | 222 | 			    mc13783_vmmc_val), | 
| Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 223 | 	MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val), | 
 | 224 | 	MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val), | 
 | 225 | 	MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val), | 
 | 226 | 	MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val), | 
 | 227 | 	MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val), | 
 | 228 | 	MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val), | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 229 | }; | 
 | 230 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 231 | static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask, | 
 | 232 | 		u32 val) | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 233 | { | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 234 | 	struct mc13xxx *mc13783 = priv->mc13xxx; | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 235 | 	int ret; | 
 | 236 | 	u32 valread; | 
 | 237 |  | 
 | 238 | 	BUG_ON(val & ~mask); | 
 | 239 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 240 | 	ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread); | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 241 | 	if (ret) | 
 | 242 | 		return ret; | 
 | 243 |  | 
 | 244 | 	/* Update the stored state for Power Gates. */ | 
 | 245 | 	priv->powermisc_pwgt_state = | 
 | 246 | 				(priv->powermisc_pwgt_state & ~mask) | val; | 
 | 247 | 	priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M; | 
 | 248 |  | 
 | 249 | 	/* Construct the new register value */ | 
 | 250 | 	valread = (valread & ~mask) | val; | 
 | 251 | 	/* Overwrite the PWGTxEN with the stored version */ | 
 | 252 | 	valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) | | 
 | 253 | 						priv->powermisc_pwgt_state; | 
 | 254 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 255 | 	return mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread); | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 256 | } | 
 | 257 |  | 
 | 258 | static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev) | 
 | 259 | { | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 260 | 	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); | 
 | 261 | 	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 262 | 	int id = rdev_get_id(rdev); | 
 | 263 | 	int ret; | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 264 | 	u32 en_val = mc13xxx_regulators[id].enable_bit; | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 265 |  | 
 | 266 | 	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | 
 | 267 |  | 
 | 268 | 	/* Power Gate enable value is 0 */ | 
| Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 269 | 	if (id == MC13783_REG_PWGT1SPI || | 
 | 270 | 	    id == MC13783_REG_PWGT2SPI) | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 271 | 		en_val = 0; | 
 | 272 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 273 | 	mc13xxx_lock(priv->mc13xxx); | 
 | 274 | 	ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit, | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 275 | 					en_val); | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 276 | 	mc13xxx_unlock(priv->mc13xxx); | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 277 |  | 
 | 278 | 	return ret; | 
 | 279 | } | 
 | 280 |  | 
 | 281 | static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev) | 
 | 282 | { | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 283 | 	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); | 
 | 284 | 	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 285 | 	int id = rdev_get_id(rdev); | 
 | 286 | 	int ret; | 
 | 287 | 	u32 dis_val = 0; | 
 | 288 |  | 
 | 289 | 	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | 
 | 290 |  | 
 | 291 | 	/* Power Gate disable value is 1 */ | 
| Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 292 | 	if (id == MC13783_REG_PWGT1SPI || | 
 | 293 | 	    id == MC13783_REG_PWGT2SPI) | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 294 | 		dis_val = mc13xxx_regulators[id].enable_bit; | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 295 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 296 | 	mc13xxx_lock(priv->mc13xxx); | 
 | 297 | 	ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit, | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 298 | 					dis_val); | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 299 | 	mc13xxx_unlock(priv->mc13xxx); | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 300 |  | 
 | 301 | 	return ret; | 
 | 302 | } | 
 | 303 |  | 
 | 304 | static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev) | 
 | 305 | { | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 306 | 	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); | 
 | 307 | 	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 308 | 	int ret, id = rdev_get_id(rdev); | 
 | 309 | 	unsigned int val; | 
 | 310 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 311 | 	mc13xxx_lock(priv->mc13xxx); | 
 | 312 | 	ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val); | 
 | 313 | 	mc13xxx_unlock(priv->mc13xxx); | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 314 |  | 
 | 315 | 	if (ret) | 
 | 316 | 		return ret; | 
 | 317 |  | 
 | 318 | 	/* Power Gates state is stored in powermisc_pwgt_state | 
 | 319 | 	 * where the meaning of bits is negated */ | 
 | 320 | 	val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) | | 
 | 321 | 	      (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M); | 
 | 322 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 323 | 	return (val & mc13xxx_regulators[id].enable_bit) != 0; | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 324 | } | 
 | 325 |  | 
 | 326 | static struct regulator_ops mc13783_gpo_regulator_ops = { | 
 | 327 | 	.enable = mc13783_gpo_regulator_enable, | 
 | 328 | 	.disable = mc13783_gpo_regulator_disable, | 
 | 329 | 	.is_enabled = mc13783_gpo_regulator_is_enabled, | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 330 | 	.list_voltage = mc13xxx_regulator_list_voltage, | 
 | 331 | 	.set_voltage = mc13xxx_fixed_regulator_set_voltage, | 
 | 332 | 	.get_voltage = mc13xxx_fixed_regulator_get_voltage, | 
| Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 333 | }; | 
 | 334 |  | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 335 | static int __devinit mc13783_regulator_probe(struct platform_device *pdev) | 
 | 336 | { | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 337 | 	struct mc13xxx_regulator_priv *priv; | 
 | 338 | 	struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent); | 
| Samuel Ortiz | c8a03c9 | 2011-04-08 01:55:01 +0200 | [diff] [blame] | 339 | 	struct mc13783_regulator_platform_data *pdata = | 
 | 340 | 		dev_get_platdata(&pdev->dev); | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 341 | 	struct mc13783_regulator_init_data *init_data; | 
 | 342 | 	int i, ret; | 
 | 343 |  | 
| Wanlong Gao | c719864 | 2011-04-17 08:53:57 +0800 | [diff] [blame] | 344 | 	dev_dbg(&pdev->dev, "%s id %d\n", __func__, pdev->id); | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 345 |  | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 346 | 	priv = kzalloc(sizeof(*priv) + | 
 | 347 | 			pdata->num_regulators * sizeof(priv->regulators[0]), | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 348 | 			GFP_KERNEL); | 
 | 349 | 	if (!priv) | 
 | 350 | 		return -ENOMEM; | 
 | 351 |  | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 352 | 	priv->mc13xxx_regulators = mc13783_regulators; | 
 | 353 | 	priv->mc13xxx = mc13783; | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 354 |  | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 355 | 	for (i = 0; i < pdata->num_regulators; i++) { | 
 | 356 | 		init_data = &pdata->regulators[i]; | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 357 | 		priv->regulators[i] = regulator_register( | 
 | 358 | 				&mc13783_regulators[init_data->id].desc, | 
 | 359 | 				&pdev->dev, init_data->init_data, priv); | 
 | 360 |  | 
 | 361 | 		if (IS_ERR(priv->regulators[i])) { | 
 | 362 | 			dev_err(&pdev->dev, "failed to register regulator %s\n", | 
 | 363 | 				mc13783_regulators[i].desc.name); | 
 | 364 | 			ret = PTR_ERR(priv->regulators[i]); | 
 | 365 | 			goto err; | 
 | 366 | 		} | 
 | 367 | 	} | 
 | 368 |  | 
 | 369 | 	platform_set_drvdata(pdev, priv); | 
 | 370 |  | 
 | 371 | 	return 0; | 
 | 372 | err: | 
 | 373 | 	while (--i >= 0) | 
 | 374 | 		regulator_unregister(priv->regulators[i]); | 
 | 375 |  | 
 | 376 | 	kfree(priv); | 
 | 377 |  | 
 | 378 | 	return ret; | 
 | 379 | } | 
 | 380 |  | 
 | 381 | static int __devexit mc13783_regulator_remove(struct platform_device *pdev) | 
 | 382 | { | 
| Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 383 | 	struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev); | 
| Samuel Ortiz | c8a03c9 | 2011-04-08 01:55:01 +0200 | [diff] [blame] | 384 | 	struct mc13783_regulator_platform_data *pdata = | 
 | 385 | 		dev_get_platdata(&pdev->dev); | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 386 | 	int i; | 
 | 387 |  | 
| Axel Lin | 58d5765 | 2010-04-19 09:58:02 +0800 | [diff] [blame] | 388 | 	platform_set_drvdata(pdev, NULL); | 
 | 389 |  | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 390 | 	for (i = 0; i < pdata->num_regulators; i++) | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 391 | 		regulator_unregister(priv->regulators[i]); | 
 | 392 |  | 
| Axel Lin | 58d5765 | 2010-04-19 09:58:02 +0800 | [diff] [blame] | 393 | 	kfree(priv); | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 394 | 	return 0; | 
 | 395 | } | 
 | 396 |  | 
 | 397 | static struct platform_driver mc13783_regulator_driver = { | 
 | 398 | 	.driver	= { | 
 | 399 | 		.name	= "mc13783-regulator", | 
 | 400 | 		.owner	= THIS_MODULE, | 
 | 401 | 	}, | 
 | 402 | 	.remove		= __devexit_p(mc13783_regulator_remove), | 
| Alberto Panizzo | 735eb93 | 2009-12-14 18:53:35 +0100 | [diff] [blame] | 403 | 	.probe		= mc13783_regulator_probe, | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 404 | }; | 
 | 405 |  | 
 | 406 | static int __init mc13783_regulator_init(void) | 
 | 407 | { | 
| Alberto Panizzo | 735eb93 | 2009-12-14 18:53:35 +0100 | [diff] [blame] | 408 | 	return platform_driver_register(&mc13783_regulator_driver); | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 409 | } | 
 | 410 | subsys_initcall(mc13783_regulator_init); | 
 | 411 |  | 
 | 412 | static void __exit mc13783_regulator_exit(void) | 
 | 413 | { | 
 | 414 | 	platform_driver_unregister(&mc13783_regulator_driver); | 
 | 415 | } | 
 | 416 | module_exit(mc13783_regulator_exit); | 
 | 417 |  | 
| Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 418 | MODULE_LICENSE("GPL v2"); | 
| Axel Lin | 1dcc434 | 2010-05-06 11:33:36 +0800 | [diff] [blame] | 419 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); | 
| Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 420 | MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC"); | 
 | 421 | MODULE_ALIAS("platform:mc13783-regulator"); |