blob: 200c31a2730e0c2fce4a1167596ef90d487721a9 [file] [log] [blame]
eric miao8f58de72007-12-19 17:14:02 +08001#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
6
Russell Kinga09e64f2008-08-05 16:14:15 +01007#include <mach/udc.h>
8#include <mach/pxafb.h>
9#include <mach/mmc.h>
10#include <mach/irda.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010011#include <mach/ohci.h>
12#include <mach/pxa27x_keypad.h>
13#include <mach/pxa2xx_spi.h>
14#include <mach/camera.h>
15#include <mach/audio.h>
Eric Miao75e874c2009-12-16 21:35:52 +080016#include <mach/hardware.h>
Haojian Zhuang82b95ec2009-09-10 13:55:23 +080017#include <plat/i2c.h>
18#include <plat/pxa3xx_nand.h>
eric miao8f58de72007-12-19 17:14:02 +080019
20#include "devices.h"
Philipp Zabelbc3a5952008-06-02 18:49:27 +010021#include "generic.h"
eric miao8f58de72007-12-19 17:14:02 +080022
23void __init pxa_register_device(struct platform_device *dev, void *data)
24{
25 int ret;
26
27 dev->dev.platform_data = data;
28
29 ret = platform_device_register(dev);
30 if (ret)
31 dev_err(&dev->dev, "unable to register device: %d\n", ret);
32}
33
34static struct resource pxamci_resources[] = {
35 [0] = {
36 .start = 0x41100000,
37 .end = 0x41100fff,
38 .flags = IORESOURCE_MEM,
39 },
40 [1] = {
41 .start = IRQ_MMC,
42 .end = IRQ_MMC,
43 .flags = IORESOURCE_IRQ,
44 },
45 [2] = {
46 .start = 21,
47 .end = 21,
48 .flags = IORESOURCE_DMA,
49 },
50 [3] = {
51 .start = 22,
52 .end = 22,
53 .flags = IORESOURCE_DMA,
54 },
55};
56
57static u64 pxamci_dmamask = 0xffffffffUL;
58
59struct platform_device pxa_device_mci = {
60 .name = "pxa2xx-mci",
Bridge Wufafc9d32007-12-21 19:00:13 +080061 .id = 0,
eric miao8f58de72007-12-19 17:14:02 +080062 .dev = {
63 .dma_mask = &pxamci_dmamask,
64 .coherent_dma_mask = 0xffffffff,
65 },
66 .num_resources = ARRAY_SIZE(pxamci_resources),
67 .resource = pxamci_resources,
68};
69
70void __init pxa_set_mci_info(struct pxamci_platform_data *info)
71{
72 pxa_register_device(&pxa_device_mci, info);
73}
74
75
Philipp Zabel12576292009-05-26 22:03:32 +020076static struct pxa2xx_udc_mach_info pxa_udc_info = {
77 .gpio_pullup = -1,
78 .gpio_vbus = -1,
79};
eric miao8f58de72007-12-19 17:14:02 +080080
81void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
82{
83 memcpy(&pxa_udc_info, info, sizeof *info);
84}
85
86static struct resource pxa2xx_udc_resources[] = {
87 [0] = {
88 .start = 0x40600000,
89 .end = 0x4060ffff,
90 .flags = IORESOURCE_MEM,
91 },
92 [1] = {
93 .start = IRQ_USB,
94 .end = IRQ_USB,
95 .flags = IORESOURCE_IRQ,
96 },
97};
98
99static u64 udc_dma_mask = ~(u32)0;
100
Philipp Zabel7a857622008-06-22 23:36:39 +0100101struct platform_device pxa25x_device_udc = {
102 .name = "pxa25x-udc",
103 .id = -1,
104 .resource = pxa2xx_udc_resources,
105 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
106 .dev = {
107 .platform_data = &pxa_udc_info,
108 .dma_mask = &udc_dma_mask,
109 }
110};
111
112struct platform_device pxa27x_device_udc = {
113 .name = "pxa27x-udc",
eric miao8f58de72007-12-19 17:14:02 +0800114 .id = -1,
115 .resource = pxa2xx_udc_resources,
116 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
117 .dev = {
118 .platform_data = &pxa_udc_info,
119 .dma_mask = &udc_dma_mask,
120 }
121};
122
123static struct resource pxafb_resources[] = {
124 [0] = {
125 .start = 0x44000000,
126 .end = 0x4400ffff,
127 .flags = IORESOURCE_MEM,
128 },
129 [1] = {
130 .start = IRQ_LCD,
131 .end = IRQ_LCD,
132 .flags = IORESOURCE_IRQ,
133 },
134};
135
136static u64 fb_dma_mask = ~(u64)0;
137
138struct platform_device pxa_device_fb = {
139 .name = "pxa2xx-fb",
140 .id = -1,
141 .dev = {
142 .dma_mask = &fb_dma_mask,
143 .coherent_dma_mask = 0xffffffff,
144 },
145 .num_resources = ARRAY_SIZE(pxafb_resources),
146 .resource = pxafb_resources,
147};
148
149void __init set_pxa_fb_info(struct pxafb_mach_info *info)
150{
151 pxa_register_device(&pxa_device_fb, info);
152}
153
154void __init set_pxa_fb_parent(struct device *parent_dev)
155{
156 pxa_device_fb.dev.parent = parent_dev;
157}
158
159static struct resource pxa_resource_ffuart[] = {
160 {
Eric Miao02f65262008-11-28 14:08:53 +0800161 .start = 0x40100000,
162 .end = 0x40100023,
eric miao8f58de72007-12-19 17:14:02 +0800163 .flags = IORESOURCE_MEM,
164 }, {
165 .start = IRQ_FFUART,
166 .end = IRQ_FFUART,
167 .flags = IORESOURCE_IRQ,
168 }
169};
170
Russell Kingcc155c62009-11-09 13:34:08 +0800171struct platform_device pxa_device_ffuart = {
eric miao8f58de72007-12-19 17:14:02 +0800172 .name = "pxa2xx-uart",
173 .id = 0,
174 .resource = pxa_resource_ffuart,
175 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
176};
177
Russell Kingcc155c62009-11-09 13:34:08 +0800178void __init pxa_set_ffuart_info(void *info)
179{
180 pxa_register_device(&pxa_device_ffuart, info);
181}
182
eric miao8f58de72007-12-19 17:14:02 +0800183static struct resource pxa_resource_btuart[] = {
184 {
Eric Miao02f65262008-11-28 14:08:53 +0800185 .start = 0x40200000,
186 .end = 0x40200023,
eric miao8f58de72007-12-19 17:14:02 +0800187 .flags = IORESOURCE_MEM,
188 }, {
189 .start = IRQ_BTUART,
190 .end = IRQ_BTUART,
191 .flags = IORESOURCE_IRQ,
192 }
193};
194
195struct platform_device pxa_device_btuart = {
196 .name = "pxa2xx-uart",
197 .id = 1,
198 .resource = pxa_resource_btuart,
199 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
200};
201
Russell Kingcc155c62009-11-09 13:34:08 +0800202void __init pxa_set_btuart_info(void *info)
203{
204 pxa_register_device(&pxa_device_btuart, info);
205}
206
eric miao8f58de72007-12-19 17:14:02 +0800207static struct resource pxa_resource_stuart[] = {
208 {
Eric Miao02f65262008-11-28 14:08:53 +0800209 .start = 0x40700000,
210 .end = 0x40700023,
eric miao8f58de72007-12-19 17:14:02 +0800211 .flags = IORESOURCE_MEM,
212 }, {
213 .start = IRQ_STUART,
214 .end = IRQ_STUART,
215 .flags = IORESOURCE_IRQ,
216 }
217};
218
219struct platform_device pxa_device_stuart = {
220 .name = "pxa2xx-uart",
221 .id = 2,
222 .resource = pxa_resource_stuart,
223 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
224};
225
Russell Kingcc155c62009-11-09 13:34:08 +0800226void __init pxa_set_stuart_info(void *info)
227{
228 pxa_register_device(&pxa_device_stuart, info);
229}
230
eric miao8f58de72007-12-19 17:14:02 +0800231static struct resource pxa_resource_hwuart[] = {
232 {
Eric Miao02f65262008-11-28 14:08:53 +0800233 .start = 0x41600000,
234 .end = 0x4160002F,
eric miao8f58de72007-12-19 17:14:02 +0800235 .flags = IORESOURCE_MEM,
236 }, {
237 .start = IRQ_HWUART,
238 .end = IRQ_HWUART,
239 .flags = IORESOURCE_IRQ,
240 }
241};
242
243struct platform_device pxa_device_hwuart = {
244 .name = "pxa2xx-uart",
245 .id = 3,
246 .resource = pxa_resource_hwuart,
247 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
248};
249
Russell Kingcc155c62009-11-09 13:34:08 +0800250void __init pxa_set_hwuart_info(void *info)
251{
252 if (cpu_is_pxa255())
253 pxa_register_device(&pxa_device_hwuart, info);
254 else
255 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
256}
257
eric miao8f58de72007-12-19 17:14:02 +0800258static struct resource pxai2c_resources[] = {
259 {
260 .start = 0x40301680,
261 .end = 0x403016a3,
262 .flags = IORESOURCE_MEM,
263 }, {
264 .start = IRQ_I2C,
265 .end = IRQ_I2C,
266 .flags = IORESOURCE_IRQ,
267 },
268};
269
270struct platform_device pxa_device_i2c = {
271 .name = "pxa2xx-i2c",
272 .id = 0,
273 .resource = pxai2c_resources,
274 .num_resources = ARRAY_SIZE(pxai2c_resources),
275};
276
277void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
278{
279 pxa_register_device(&pxa_device_i2c, info);
280}
281
Eric Miao99464292008-11-28 15:01:55 +0800282#ifdef CONFIG_PXA27x
283static struct resource pxa27x_resources_i2c_power[] = {
284 {
285 .start = 0x40f00180,
286 .end = 0x40f001a3,
287 .flags = IORESOURCE_MEM,
288 }, {
289 .start = IRQ_PWRI2C,
290 .end = IRQ_PWRI2C,
291 .flags = IORESOURCE_IRQ,
292 },
293};
294
295struct platform_device pxa27x_device_i2c_power = {
296 .name = "pxa2xx-i2c",
297 .id = 1,
298 .resource = pxa27x_resources_i2c_power,
299 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
300};
301#endif
302
303#ifdef CONFIG_PXA3xx
304static struct resource pxa3xx_resources_i2c_power[] = {
305 {
306 .start = 0x40f500c0,
307 .end = 0x40f500d3,
308 .flags = IORESOURCE_MEM,
309 }, {
310 .start = IRQ_PWRI2C,
311 .end = IRQ_PWRI2C,
312 .flags = IORESOURCE_IRQ,
313 },
314};
315
316struct platform_device pxa3xx_device_i2c_power = {
Eric Miaof23d4912009-04-13 14:43:25 +0800317 .name = "pxa3xx-pwri2c",
Eric Miao99464292008-11-28 15:01:55 +0800318 .id = 1,
319 .resource = pxa3xx_resources_i2c_power,
320 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
321};
322#endif
323
eric miao8f58de72007-12-19 17:14:02 +0800324static struct resource pxai2s_resources[] = {
325 {
326 .start = 0x40400000,
327 .end = 0x40400083,
328 .flags = IORESOURCE_MEM,
329 }, {
330 .start = IRQ_I2S,
331 .end = IRQ_I2S,
332 .flags = IORESOURCE_IRQ,
333 },
334};
335
336struct platform_device pxa_device_i2s = {
337 .name = "pxa2xx-i2s",
338 .id = -1,
339 .resource = pxai2s_resources,
340 .num_resources = ARRAY_SIZE(pxai2s_resources),
341};
342
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000343struct platform_device pxa_device_asoc_ssp1 = {
344 .name = "pxa-ssp-dai",
345 .id = 0,
346};
347
348struct platform_device pxa_device_asoc_ssp2= {
349 .name = "pxa-ssp-dai",
350 .id = 1,
351};
352
353struct platform_device pxa_device_asoc_ssp3 = {
354 .name = "pxa-ssp-dai",
355 .id = 2,
356};
357
358struct platform_device pxa_device_asoc_ssp4 = {
359 .name = "pxa-ssp-dai",
360 .id = 3,
361};
362
363struct platform_device pxa_device_asoc_platform = {
364 .name = "pxa-pcm-audio",
365 .id = -1,
366};
367
eric miao8f58de72007-12-19 17:14:02 +0800368static u64 pxaficp_dmamask = ~(u32)0;
369
370struct platform_device pxa_device_ficp = {
371 .name = "pxa2xx-ir",
372 .id = -1,
373 .dev = {
374 .dma_mask = &pxaficp_dmamask,
375 .coherent_dma_mask = 0xffffffff,
376 },
377};
378
379void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
380{
381 pxa_register_device(&pxa_device_ficp, info);
382}
383
Robert Jarzmik72493142008-11-13 23:50:56 +0100384static struct resource pxa_rtc_resources[] = {
385 [0] = {
386 .start = 0x40900000,
387 .end = 0x40900000 + 0x3b,
388 .flags = IORESOURCE_MEM,
389 },
390 [1] = {
391 .start = IRQ_RTC1Hz,
392 .end = IRQ_RTC1Hz,
393 .flags = IORESOURCE_IRQ,
394 },
395 [2] = {
396 .start = IRQ_RTCAlrm,
397 .end = IRQ_RTCAlrm,
398 .flags = IORESOURCE_IRQ,
399 },
400};
401
402struct platform_device sa1100_device_rtc = {
eric miao8f58de72007-12-19 17:14:02 +0800403 .name = "sa1100-rtc",
404 .id = -1,
405};
406
Robert Jarzmik72493142008-11-13 23:50:56 +0100407struct platform_device pxa_device_rtc = {
408 .name = "pxa-rtc",
409 .id = -1,
410 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
411 .resource = pxa_rtc_resources,
412};
413
Mark Brown9f19d632008-06-10 12:30:05 +0100414static struct resource pxa_ac97_resources[] = {
415 [0] = {
416 .start = 0x40500000,
417 .end = 0x40500000 + 0xfff,
418 .flags = IORESOURCE_MEM,
419 },
420 [1] = {
421 .start = IRQ_AC97,
422 .end = IRQ_AC97,
423 .flags = IORESOURCE_IRQ,
424 },
425};
426
427static u64 pxa_ac97_dmamask = 0xffffffffUL;
428
429struct platform_device pxa_device_ac97 = {
430 .name = "pxa2xx-ac97",
431 .id = -1,
432 .dev = {
433 .dma_mask = &pxa_ac97_dmamask,
434 .coherent_dma_mask = 0xffffffff,
435 },
436 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
437 .resource = pxa_ac97_resources,
438};
439
440void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
441{
442 pxa_register_device(&pxa_device_ac97, ops);
443}
444
eric miao8f58de72007-12-19 17:14:02 +0800445#ifdef CONFIG_PXA25x
446
eric miao75540c12008-04-13 21:44:04 +0100447static struct resource pxa25x_resource_pwm0[] = {
448 [0] = {
449 .start = 0x40b00000,
450 .end = 0x40b0000f,
451 .flags = IORESOURCE_MEM,
452 },
453};
454
455struct platform_device pxa25x_device_pwm0 = {
456 .name = "pxa25x-pwm",
457 .id = 0,
458 .resource = pxa25x_resource_pwm0,
459 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
460};
461
462static struct resource pxa25x_resource_pwm1[] = {
463 [0] = {
464 .start = 0x40c00000,
465 .end = 0x40c0000f,
466 .flags = IORESOURCE_MEM,
467 },
468};
469
470struct platform_device pxa25x_device_pwm1 = {
471 .name = "pxa25x-pwm",
472 .id = 1,
473 .resource = pxa25x_resource_pwm1,
474 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
475};
476
eric miao8f58de72007-12-19 17:14:02 +0800477static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
478
479static struct resource pxa25x_resource_ssp[] = {
480 [0] = {
481 .start = 0x41000000,
482 .end = 0x4100001f,
483 .flags = IORESOURCE_MEM,
484 },
485 [1] = {
486 .start = IRQ_SSP,
487 .end = IRQ_SSP,
488 .flags = IORESOURCE_IRQ,
489 },
490 [2] = {
491 /* DRCMR for RX */
492 .start = 13,
493 .end = 13,
494 .flags = IORESOURCE_DMA,
495 },
496 [3] = {
497 /* DRCMR for TX */
498 .start = 14,
499 .end = 14,
500 .flags = IORESOURCE_DMA,
501 },
502};
503
504struct platform_device pxa25x_device_ssp = {
505 .name = "pxa25x-ssp",
506 .id = 0,
507 .dev = {
508 .dma_mask = &pxa25x_ssp_dma_mask,
509 .coherent_dma_mask = DMA_BIT_MASK(32),
510 },
511 .resource = pxa25x_resource_ssp,
512 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
513};
514
515static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
516
517static struct resource pxa25x_resource_nssp[] = {
518 [0] = {
519 .start = 0x41400000,
520 .end = 0x4140002f,
521 .flags = IORESOURCE_MEM,
522 },
523 [1] = {
524 .start = IRQ_NSSP,
525 .end = IRQ_NSSP,
526 .flags = IORESOURCE_IRQ,
527 },
528 [2] = {
529 /* DRCMR for RX */
530 .start = 15,
531 .end = 15,
532 .flags = IORESOURCE_DMA,
533 },
534 [3] = {
535 /* DRCMR for TX */
536 .start = 16,
537 .end = 16,
538 .flags = IORESOURCE_DMA,
539 },
540};
541
542struct platform_device pxa25x_device_nssp = {
543 .name = "pxa25x-nssp",
544 .id = 1,
545 .dev = {
546 .dma_mask = &pxa25x_nssp_dma_mask,
547 .coherent_dma_mask = DMA_BIT_MASK(32),
548 },
549 .resource = pxa25x_resource_nssp,
550 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
551};
552
553static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
554
555static struct resource pxa25x_resource_assp[] = {
556 [0] = {
557 .start = 0x41500000,
558 .end = 0x4150002f,
559 .flags = IORESOURCE_MEM,
560 },
561 [1] = {
562 .start = IRQ_ASSP,
563 .end = IRQ_ASSP,
564 .flags = IORESOURCE_IRQ,
565 },
566 [2] = {
567 /* DRCMR for RX */
568 .start = 23,
569 .end = 23,
570 .flags = IORESOURCE_DMA,
571 },
572 [3] = {
573 /* DRCMR for TX */
574 .start = 24,
575 .end = 24,
576 .flags = IORESOURCE_DMA,
577 },
578};
579
580struct platform_device pxa25x_device_assp = {
581 /* ASSP is basically equivalent to NSSP */
582 .name = "pxa25x-nssp",
583 .id = 2,
584 .dev = {
585 .dma_mask = &pxa25x_assp_dma_mask,
586 .coherent_dma_mask = DMA_BIT_MASK(32),
587 },
588 .resource = pxa25x_resource_assp,
589 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
590};
591#endif /* CONFIG_PXA25x */
592
593#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
594
eric miao37320982008-01-23 13:39:13 +0800595static struct resource pxa27x_resource_keypad[] = {
596 [0] = {
597 .start = 0x41500000,
598 .end = 0x4150004c,
599 .flags = IORESOURCE_MEM,
600 },
601 [1] = {
602 .start = IRQ_KEYPAD,
603 .end = IRQ_KEYPAD,
604 .flags = IORESOURCE_IRQ,
605 },
606};
607
608struct platform_device pxa27x_device_keypad = {
609 .name = "pxa27x-keypad",
610 .id = -1,
611 .resource = pxa27x_resource_keypad,
612 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
613};
614
615void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
616{
617 pxa_register_device(&pxa27x_device_keypad, info);
618}
619
eric miaoec68e452007-12-12 09:29:33 +0800620static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
621
622static struct resource pxa27x_resource_ohci[] = {
623 [0] = {
624 .start = 0x4C000000,
625 .end = 0x4C00ff6f,
626 .flags = IORESOURCE_MEM,
627 },
628 [1] = {
629 .start = IRQ_USBH1,
630 .end = IRQ_USBH1,
631 .flags = IORESOURCE_IRQ,
632 },
633};
634
635struct platform_device pxa27x_device_ohci = {
636 .name = "pxa27x-ohci",
637 .id = -1,
638 .dev = {
639 .dma_mask = &pxa27x_ohci_dma_mask,
640 .coherent_dma_mask = DMA_BIT_MASK(32),
641 },
642 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
643 .resource = pxa27x_resource_ohci,
644};
645
646void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
647{
648 pxa_register_device(&pxa27x_device_ohci, info);
649}
650
eric miao8f58de72007-12-19 17:14:02 +0800651static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
652
653static struct resource pxa27x_resource_ssp1[] = {
654 [0] = {
655 .start = 0x41000000,
656 .end = 0x4100003f,
657 .flags = IORESOURCE_MEM,
658 },
659 [1] = {
660 .start = IRQ_SSP,
661 .end = IRQ_SSP,
662 .flags = IORESOURCE_IRQ,
663 },
664 [2] = {
665 /* DRCMR for RX */
666 .start = 13,
667 .end = 13,
668 .flags = IORESOURCE_DMA,
669 },
670 [3] = {
671 /* DRCMR for TX */
672 .start = 14,
673 .end = 14,
674 .flags = IORESOURCE_DMA,
675 },
676};
677
678struct platform_device pxa27x_device_ssp1 = {
679 .name = "pxa27x-ssp",
680 .id = 0,
681 .dev = {
682 .dma_mask = &pxa27x_ssp1_dma_mask,
683 .coherent_dma_mask = DMA_BIT_MASK(32),
684 },
685 .resource = pxa27x_resource_ssp1,
686 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
687};
688
689static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
690
691static struct resource pxa27x_resource_ssp2[] = {
692 [0] = {
693 .start = 0x41700000,
694 .end = 0x4170003f,
695 .flags = IORESOURCE_MEM,
696 },
697 [1] = {
698 .start = IRQ_SSP2,
699 .end = IRQ_SSP2,
700 .flags = IORESOURCE_IRQ,
701 },
702 [2] = {
703 /* DRCMR for RX */
704 .start = 15,
705 .end = 15,
706 .flags = IORESOURCE_DMA,
707 },
708 [3] = {
709 /* DRCMR for TX */
710 .start = 16,
711 .end = 16,
712 .flags = IORESOURCE_DMA,
713 },
714};
715
716struct platform_device pxa27x_device_ssp2 = {
717 .name = "pxa27x-ssp",
718 .id = 1,
719 .dev = {
720 .dma_mask = &pxa27x_ssp2_dma_mask,
721 .coherent_dma_mask = DMA_BIT_MASK(32),
722 },
723 .resource = pxa27x_resource_ssp2,
724 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
725};
726
727static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
728
729static struct resource pxa27x_resource_ssp3[] = {
730 [0] = {
731 .start = 0x41900000,
732 .end = 0x4190003f,
733 .flags = IORESOURCE_MEM,
734 },
735 [1] = {
736 .start = IRQ_SSP3,
737 .end = IRQ_SSP3,
738 .flags = IORESOURCE_IRQ,
739 },
740 [2] = {
741 /* DRCMR for RX */
742 .start = 66,
743 .end = 66,
744 .flags = IORESOURCE_DMA,
745 },
746 [3] = {
747 /* DRCMR for TX */
748 .start = 67,
749 .end = 67,
750 .flags = IORESOURCE_DMA,
751 },
752};
753
754struct platform_device pxa27x_device_ssp3 = {
755 .name = "pxa27x-ssp",
756 .id = 2,
757 .dev = {
758 .dma_mask = &pxa27x_ssp3_dma_mask,
759 .coherent_dma_mask = DMA_BIT_MASK(32),
760 },
761 .resource = pxa27x_resource_ssp3,
762 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
763};
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200764
eric miao75540c12008-04-13 21:44:04 +0100765static struct resource pxa27x_resource_pwm0[] = {
766 [0] = {
767 .start = 0x40b00000,
768 .end = 0x40b0001f,
769 .flags = IORESOURCE_MEM,
770 },
771};
772
773struct platform_device pxa27x_device_pwm0 = {
774 .name = "pxa27x-pwm",
775 .id = 0,
776 .resource = pxa27x_resource_pwm0,
777 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
778};
779
780static struct resource pxa27x_resource_pwm1[] = {
781 [0] = {
782 .start = 0x40c00000,
783 .end = 0x40c0001f,
784 .flags = IORESOURCE_MEM,
785 },
786};
787
788struct platform_device pxa27x_device_pwm1 = {
789 .name = "pxa27x-pwm",
790 .id = 1,
791 .resource = pxa27x_resource_pwm1,
792 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
793};
794
Guennadi Liakhovetski3f3acef2008-04-11 22:19:45 +0200795static struct resource pxa27x_resource_camera[] = {
796 [0] = {
797 .start = 0x50000000,
798 .end = 0x50000fff,
799 .flags = IORESOURCE_MEM,
800 },
801 [1] = {
802 .start = IRQ_CAMERA,
803 .end = IRQ_CAMERA,
804 .flags = IORESOURCE_IRQ,
805 },
806};
807
808static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
809
810static struct platform_device pxa27x_device_camera = {
811 .name = "pxa27x-camera",
812 .id = 0, /* This is used to put cameras on this interface */
813 .dev = {
814 .dma_mask = &pxa27x_dma_mask_camera,
815 .coherent_dma_mask = 0xffffffff,
816 },
817 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
818 .resource = pxa27x_resource_camera,
819};
820
821void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
822{
823 pxa_register_device(&pxa27x_device_camera, info);
824}
eric miao8f58de72007-12-19 17:14:02 +0800825#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
826
827#ifdef CONFIG_PXA3xx
828static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
829
830static struct resource pxa3xx_resource_ssp4[] = {
831 [0] = {
832 .start = 0x41a00000,
833 .end = 0x41a0003f,
834 .flags = IORESOURCE_MEM,
835 },
836 [1] = {
837 .start = IRQ_SSP4,
838 .end = IRQ_SSP4,
839 .flags = IORESOURCE_IRQ,
840 },
841 [2] = {
842 /* DRCMR for RX */
843 .start = 2,
844 .end = 2,
845 .flags = IORESOURCE_DMA,
846 },
847 [3] = {
848 /* DRCMR for TX */
849 .start = 3,
850 .end = 3,
851 .flags = IORESOURCE_DMA,
852 },
853};
854
855struct platform_device pxa3xx_device_ssp4 = {
856 /* PXA3xx SSP is basically equivalent to PXA27x */
857 .name = "pxa27x-ssp",
858 .id = 3,
859 .dev = {
860 .dma_mask = &pxa3xx_ssp4_dma_mask,
861 .coherent_dma_mask = DMA_BIT_MASK(32),
862 },
863 .resource = pxa3xx_resource_ssp4,
864 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
865};
Bridge Wu8d33b052007-12-21 19:15:36 +0800866
867static struct resource pxa3xx_resources_mci2[] = {
868 [0] = {
869 .start = 0x42000000,
870 .end = 0x42000fff,
871 .flags = IORESOURCE_MEM,
872 },
873 [1] = {
874 .start = IRQ_MMC2,
875 .end = IRQ_MMC2,
876 .flags = IORESOURCE_IRQ,
877 },
878 [2] = {
879 .start = 93,
880 .end = 93,
881 .flags = IORESOURCE_DMA,
882 },
883 [3] = {
884 .start = 94,
885 .end = 94,
886 .flags = IORESOURCE_DMA,
887 },
888};
889
890struct platform_device pxa3xx_device_mci2 = {
891 .name = "pxa2xx-mci",
892 .id = 1,
893 .dev = {
894 .dma_mask = &pxamci_dmamask,
895 .coherent_dma_mask = 0xffffffff,
896 },
897 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
898 .resource = pxa3xx_resources_mci2,
899};
900
901void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
902{
903 pxa_register_device(&pxa3xx_device_mci2, info);
904}
905
Bridge Wu5a1f21b2007-12-21 19:27:08 +0800906static struct resource pxa3xx_resources_mci3[] = {
907 [0] = {
908 .start = 0x42500000,
909 .end = 0x42500fff,
910 .flags = IORESOURCE_MEM,
911 },
912 [1] = {
913 .start = IRQ_MMC3,
914 .end = IRQ_MMC3,
915 .flags = IORESOURCE_IRQ,
916 },
917 [2] = {
918 .start = 100,
919 .end = 100,
920 .flags = IORESOURCE_DMA,
921 },
922 [3] = {
923 .start = 101,
924 .end = 101,
925 .flags = IORESOURCE_DMA,
926 },
927};
928
929struct platform_device pxa3xx_device_mci3 = {
930 .name = "pxa2xx-mci",
931 .id = 2,
932 .dev = {
933 .dma_mask = &pxamci_dmamask,
934 .coherent_dma_mask = 0xffffffff,
935 },
936 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
937 .resource = pxa3xx_resources_mci3,
938};
939
940void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
941{
942 pxa_register_device(&pxa3xx_device_mci3, info);
943}
944
Eric Miao9ae819a2008-06-02 15:22:03 +0800945static struct resource pxa3xx_resources_nand[] = {
946 [0] = {
947 .start = 0x43100000,
948 .end = 0x43100053,
949 .flags = IORESOURCE_MEM,
950 },
951 [1] = {
952 .start = IRQ_NAND,
953 .end = IRQ_NAND,
954 .flags = IORESOURCE_IRQ,
955 },
956 [2] = {
957 /* DRCMR for Data DMA */
958 .start = 97,
959 .end = 97,
960 .flags = IORESOURCE_DMA,
961 },
962 [3] = {
963 /* DRCMR for Command DMA */
964 .start = 99,
965 .end = 99,
966 .flags = IORESOURCE_DMA,
967 },
968};
969
970static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
971
972struct platform_device pxa3xx_device_nand = {
973 .name = "pxa3xx-nand",
974 .id = -1,
975 .dev = {
976 .dma_mask = &pxa3xx_nand_dma_mask,
977 .coherent_dma_mask = DMA_BIT_MASK(32),
978 },
979 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
980 .resource = pxa3xx_resources_nand,
981};
982
983void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
984{
985 pxa_register_device(&pxa3xx_device_nand, info);
986}
Daniel Mack1ff2c332009-07-09 19:04:49 +0200987
988static struct resource pxa3xx_resources_gcu[] = {
989 {
990 .start = 0x54000000,
991 .end = 0x54000fff,
992 .flags = IORESOURCE_MEM,
993 },
994 {
995 .start = IRQ_GCU,
996 .end = IRQ_GCU,
997 .flags = IORESOURCE_IRQ,
998 },
999};
1000
1001static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
1002
1003struct platform_device pxa3xx_device_gcu = {
1004 .name = "pxa3xx-gcu",
1005 .id = -1,
1006 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
1007 .resource = pxa3xx_resources_gcu,
1008 .dev = {
1009 .dma_mask = &pxa3xx_gcu_dmamask,
1010 .coherent_dma_mask = 0xffffffff,
1011 },
1012};
1013
eric miao8f58de72007-12-19 17:14:02 +08001014#endif /* CONFIG_PXA3xx */
Guennadi Liakhovetskie1722742008-06-13 09:17:31 +01001015
1016/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1017 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1018void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1019{
1020 struct platform_device *pd;
1021
1022 pd = platform_device_alloc("pxa2xx-spi", id);
1023 if (pd == NULL) {
1024 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1025 id);
1026 return;
1027 }
1028
1029 pd->dev.platform_data = info;
1030 platform_device_add(pd);
1031}