| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
 | 2 |  * Machine dependent access functions for RTC registers. | 
 | 3 |  */ | 
 | 4 | #ifndef _ASM_MC146818RTC_H | 
 | 5 | #define _ASM_MC146818RTC_H | 
 | 6 |  | 
 | 7 | #include <asm/io.h> | 
 | 8 | #include <asm/system.h> | 
 | 9 | #include <linux/mc146818rtc.h> | 
 | 10 |  | 
 | 11 | #ifndef RTC_PORT | 
 | 12 | #define RTC_PORT(x)	(0x70 + (x)) | 
 | 13 | #define RTC_ALWAYS_BCD	1	/* RTC operates in binary mode */ | 
 | 14 | #endif | 
 | 15 |  | 
 | 16 | #ifdef __HAVE_ARCH_CMPXCHG | 
 | 17 | /* | 
 | 18 |  * This lock provides nmi access to the CMOS/RTC registers.  It has some | 
 | 19 |  * special properties.  It is owned by a CPU and stores the index register | 
 | 20 |  * currently being accessed (if owned).  The idea here is that it works | 
 | 21 |  * like a normal lock (normally).  However, in an NMI, the NMI code will | 
 | 22 |  * first check to see if its CPU owns the lock, meaning that the NMI | 
 | 23 |  * interrupted during the read/write of the device.  If it does, it goes ahead | 
 | 24 |  * and performs the access and then restores the index register.  If it does | 
 | 25 |  * not, it locks normally. | 
 | 26 |  * | 
 | 27 |  * Note that since we are working with NMIs, we need this lock even in | 
 | 28 |  * a non-SMP machine just to mark that the lock is owned. | 
 | 29 |  * | 
 | 30 |  * This only works with compare-and-swap.  There is no other way to | 
 | 31 |  * atomically claim the lock and set the owner. | 
 | 32 |  */ | 
 | 33 | #include <linux/smp.h> | 
 | 34 | extern volatile unsigned long cmos_lock; | 
 | 35 |  | 
 | 36 | /* | 
 | 37 |  * All of these below must be called with interrupts off, preempt | 
 | 38 |  * disabled, etc. | 
 | 39 |  */ | 
 | 40 |  | 
 | 41 | static inline void lock_cmos(unsigned char reg) | 
 | 42 | { | 
 | 43 | 	unsigned long new; | 
 | 44 | 	new = ((smp_processor_id()+1) << 8) | reg; | 
 | 45 | 	for (;;) { | 
 | 46 | 		if (cmos_lock) | 
 | 47 | 			continue; | 
 | 48 | 		if (__cmpxchg(&cmos_lock, 0, new, sizeof(cmos_lock)) == 0) | 
 | 49 | 			return; | 
 | 50 | 	} | 
 | 51 | } | 
 | 52 |  | 
 | 53 | static inline void unlock_cmos(void) | 
 | 54 | { | 
 | 55 | 	cmos_lock = 0; | 
 | 56 | } | 
 | 57 | static inline int do_i_have_lock_cmos(void) | 
 | 58 | { | 
 | 59 | 	return (cmos_lock >> 8) == (smp_processor_id()+1); | 
 | 60 | } | 
 | 61 | static inline unsigned char current_lock_cmos_reg(void) | 
 | 62 | { | 
 | 63 | 	return cmos_lock & 0xff; | 
 | 64 | } | 
 | 65 | #define lock_cmos_prefix(reg) \ | 
 | 66 | 	do {					\ | 
 | 67 | 		unsigned long cmos_flags;	\ | 
 | 68 | 		local_irq_save(cmos_flags);	\ | 
 | 69 | 		lock_cmos(reg) | 
 | 70 | #define lock_cmos_suffix(reg) \ | 
 | 71 | 		unlock_cmos();			\ | 
 | 72 | 		local_irq_restore(cmos_flags);	\ | 
 | 73 | 	} while (0) | 
 | 74 | #else | 
 | 75 | #define lock_cmos_prefix(reg) do {} while (0) | 
 | 76 | #define lock_cmos_suffix(reg) do {} while (0) | 
 | 77 | #define lock_cmos(reg) | 
 | 78 | #define unlock_cmos() | 
 | 79 | #define do_i_have_lock_cmos() 0 | 
 | 80 | #define current_lock_cmos_reg() 0 | 
 | 81 | #endif | 
 | 82 |  | 
 | 83 | /* | 
 | 84 |  * The yet supported machines all access the RTC index register via | 
 | 85 |  * an ISA port access but the way to access the date register differs ... | 
 | 86 |  */ | 
 | 87 | #define CMOS_READ(addr) rtc_cmos_read(addr) | 
 | 88 | #define CMOS_WRITE(val, addr) rtc_cmos_write(val, addr) | 
 | 89 | unsigned char rtc_cmos_read(unsigned char addr); | 
 | 90 | void rtc_cmos_write(unsigned char val, unsigned char addr); | 
 | 91 |  | 
 | 92 | #define RTC_IRQ 8 | 
 | 93 |  | 
 | 94 | #endif /* _ASM_MC146818RTC_H */ |