blob: 9113f60d65f64cc1e4122620974b8a571dd8870c [file] [log] [blame]
Michael Hennerichdc26aec2008-11-18 17:48:22 +08001/*
2 * File: arch/blackfin/mach-bf538/boards/ezkit.c
3 * Based on: arch/blackfin/mach-bf537/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created:
7 * Description:
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2008 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31#include <linux/device.h>
32#include <linux/platform_device.h>
33#include <linux/mtd/mtd.h>
Barry Songf1cb6462009-08-03 04:40:36 +000034#include <linux/mtd/physmap.h>
Michael Hennerichdc26aec2008-11-18 17:48:22 +080035#include <linux/mtd/partitions.h>
36#include <linux/spi/spi.h>
37#include <linux/spi/flash.h>
38#include <linux/irq.h>
39#include <linux/interrupt.h>
40#include <asm/bfin5xx_spi.h>
41#include <asm/dma.h>
42#include <asm/gpio.h>
43#include <asm/nand.h>
44#include <asm/portmux.h>
45#include <asm/dpmc.h>
46#include <linux/input.h>
47
48/*
49 * Name the Board for the /proc/cpuinfo
50 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080051const char bfin_board_name[] = "ADI BF538-EZKIT";
Michael Hennerichdc26aec2008-11-18 17:48:22 +080052
53/*
54 * Driver needs to know address, irq and flag pin.
55 */
56
57
58#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
59static struct platform_device rtc_device = {
60 .name = "rtc-bfin",
61 .id = -1,
62};
63#endif
64
65#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
66static struct resource bfin_uart_resources[] = {
67#ifdef CONFIG_SERIAL_BFIN_UART0
68 {
69 .start = 0xFFC00400,
70 .end = 0xFFC004FF,
71 .flags = IORESOURCE_MEM,
72 },
73#endif
74#ifdef CONFIG_SERIAL_BFIN_UART1
75 {
76 .start = 0xFFC02000,
77 .end = 0xFFC020FF,
78 .flags = IORESOURCE_MEM,
79 },
80#endif
81#ifdef CONFIG_SERIAL_BFIN_UART2
82 {
83 .start = 0xFFC02100,
84 .end = 0xFFC021FF,
85 .flags = IORESOURCE_MEM,
86 },
87#endif
88};
89
90static struct platform_device bfin_uart_device = {
91 .name = "bfin-uart",
92 .id = 1,
93 .num_resources = ARRAY_SIZE(bfin_uart_resources),
94 .resource = bfin_uart_resources,
95};
96#endif
97
98#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Michael Hennerichdc26aec2008-11-18 17:48:22 +080099#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +0800100static struct resource bfin_sir0_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800101 {
102 .start = 0xFFC00400,
103 .end = 0xFFC004FF,
104 .flags = IORESOURCE_MEM,
105 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800106 {
107 .start = IRQ_UART0_RX,
108 .end = IRQ_UART0_RX+1,
109 .flags = IORESOURCE_IRQ,
110 },
111 {
112 .start = CH_UART0_RX,
113 .end = CH_UART0_RX+1,
114 .flags = IORESOURCE_DMA,
115 },
116};
117static struct platform_device bfin_sir0_device = {
118 .name = "bfin_sir",
119 .id = 0,
120 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
121 .resource = bfin_sir0_resources,
122};
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800123#endif
124#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +0800125static struct resource bfin_sir1_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800126 {
127 .start = 0xFFC02000,
128 .end = 0xFFC020FF,
129 .flags = IORESOURCE_MEM,
130 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800131 {
132 .start = IRQ_UART1_RX,
133 .end = IRQ_UART1_RX+1,
134 .flags = IORESOURCE_IRQ,
135 },
136 {
137 .start = CH_UART1_RX,
138 .end = CH_UART1_RX+1,
139 .flags = IORESOURCE_DMA,
140 },
141};
142static struct platform_device bfin_sir1_device = {
143 .name = "bfin_sir",
144 .id = 1,
145 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
146 .resource = bfin_sir1_resources,
147};
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800148#endif
149#ifdef CONFIG_BFIN_SIR2
Graf Yang42bd8bc2009-01-07 23:14:39 +0800150static struct resource bfin_sir2_resources[] = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800151 {
152 .start = 0xFFC02100,
153 .end = 0xFFC021FF,
154 .flags = IORESOURCE_MEM,
155 },
Graf Yang42bd8bc2009-01-07 23:14:39 +0800156 {
157 .start = IRQ_UART2_RX,
158 .end = IRQ_UART2_RX+1,
159 .flags = IORESOURCE_IRQ,
160 },
161 {
162 .start = CH_UART2_RX,
163 .end = CH_UART2_RX+1,
164 .flags = IORESOURCE_DMA,
165 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800166};
Graf Yang42bd8bc2009-01-07 23:14:39 +0800167static struct platform_device bfin_sir2_device = {
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800168 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +0800169 .id = 2,
170 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
171 .resource = bfin_sir2_resources,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800172};
173#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +0800174#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800175
176/*
177 * USB-LAN EzExtender board
178 * Driver needs to know address, irq and flag pin.
179 */
180#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000181#include <linux/smc91x.h>
182
183static struct smc91x_platdata smc91x_info = {
184 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
185 .leda = RPC_LED_100_10,
186 .ledb = RPC_LED_TX_RX,
187};
188
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800189static struct resource smc91x_resources[] = {
190 {
191 .name = "smc91x-regs",
192 .start = 0x20310300,
193 .end = 0x20310300 + 16,
194 .flags = IORESOURCE_MEM,
195 }, {
196 .start = IRQ_PF0,
197 .end = IRQ_PF0,
198 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
199 },
200};
201static struct platform_device smc91x_device = {
202 .name = "smc91x",
203 .id = 0,
204 .num_resources = ARRAY_SIZE(smc91x_resources),
205 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000206 .dev = {
207 .platform_data = &smc91x_info,
208 },
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800209};
210#endif
211
212#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
213/* all SPI peripherals info goes here */
214#if defined(CONFIG_MTD_M25P80) \
215 || defined(CONFIG_MTD_M25P80_MODULE)
216/* SPI flash chip (m25p16) */
217static struct mtd_partition bfin_spi_flash_partitions[] = {
218 {
219 .name = "bootloader(spi)",
220 .size = 0x00040000,
221 .offset = 0,
222 .mask_flags = MTD_CAP_ROM
223 }, {
224 .name = "linux kernel(spi)",
225 .size = 0x1c0000,
226 .offset = 0x40000
227 }
228};
229
230static struct flash_platform_data bfin_spi_flash_data = {
231 .name = "m25p80",
232 .parts = bfin_spi_flash_partitions,
233 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
234 .type = "m25p16",
235};
236
237static struct bfin5xx_spi_chip spi_flash_chip_info = {
238 .enable_dma = 0, /* use dma transfer with this chip*/
239 .bits_per_word = 8,
240 .cs_change_per_word = 0,
241};
242#endif
243
244#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
245#include <linux/spi/ad7879.h>
246static const struct ad7879_platform_data bfin_ad7879_ts_info = {
247 .model = 7879, /* Model = AD7879 */
248 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
249 .pressure_max = 10000,
250 .pressure_min = 0,
251 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
252 .acquisition_time = 1, /* 4us acquisition time per sample */
253 .median = 2, /* do 8 measurements */
254 .averaging = 1, /* take the average of 4 middle samples */
255 .pen_down_acc_interval = 255, /* 9.4 ms */
256 .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
257 .gpio_default = 1, /* During initialization set GPIO = HIGH */
258};
259#endif
260
261#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
262static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
263 .enable_dma = 0,
264 .bits_per_word = 16,
265};
266#endif
267
268#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
269#include <asm/bfin-lq035q1.h>
270
271static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
272 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
273 .use_bl = 0, /* let something else control the LCD Blacklight */
274 .gpio_bl = GPIO_PF7,
275};
276
277static struct resource bfin_lq035q1_resources[] = {
278 {
279 .start = IRQ_PPI_ERROR,
280 .end = IRQ_PPI_ERROR,
281 .flags = IORESOURCE_IRQ,
282 },
283};
284
285static struct platform_device bfin_lq035q1_device = {
286 .name = "bfin-lq035q1",
287 .id = -1,
288 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
289 .resource = bfin_lq035q1_resources,
290 .dev = {
291 .platform_data = &bfin_lq035q1_data,
292 },
293};
294#endif
295
296#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
297static struct bfin5xx_spi_chip spidev_chip_info = {
298 .enable_dma = 0,
299 .bits_per_word = 8,
300};
301#endif
302
303#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
304static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
305 .enable_dma = 0,
306 .bits_per_word = 8,
307};
308#endif
309
310static struct spi_board_info bf538_spi_board_info[] __initdata = {
311#if defined(CONFIG_MTD_M25P80) \
312 || defined(CONFIG_MTD_M25P80_MODULE)
313 {
314 /* the modalias must be the same as spi device driver name */
315 .modalias = "m25p80", /* Name of spi_driver for this device */
316 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
317 .bus_num = 0, /* Framework bus number */
318 .chip_select = 1, /* SPI_SSEL1*/
319 .platform_data = &bfin_spi_flash_data,
320 .controller_data = &spi_flash_chip_info,
321 .mode = SPI_MODE_3,
322 },
323#endif
324#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
325 {
326 .modalias = "ad7879",
327 .platform_data = &bfin_ad7879_ts_info,
328 .irq = IRQ_PF3,
329 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
330 .bus_num = 0,
331 .chip_select = 1,
332 .controller_data = &spi_ad7879_chip_info,
333 .mode = SPI_CPHA | SPI_CPOL,
334 },
335#endif
336#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
337 {
338 .modalias = "bfin-lq035q1-spi",
339 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
340 .bus_num = 0,
341 .chip_select = 2,
342 .controller_data = &lq035q1_spi_chip_info,
343 .mode = SPI_CPHA | SPI_CPOL,
344 },
345#endif
346#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
347 {
348 .modalias = "spidev",
349 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
350 .bus_num = 0,
351 .chip_select = 1,
352 .controller_data = &spidev_chip_info,
353 },
354#endif
355};
356
357/* SPI (0) */
358static struct resource bfin_spi0_resource[] = {
359 [0] = {
360 .start = SPI0_REGBASE,
361 .end = SPI0_REGBASE + 0xFF,
362 .flags = IORESOURCE_MEM,
363 },
364 [1] = {
365 .start = CH_SPI0,
366 .end = CH_SPI0,
Yi Li53122692009-06-05 12:11:11 +0000367 .flags = IORESOURCE_DMA,
368 },
369 [2] = {
370 .start = IRQ_SPI0,
371 .end = IRQ_SPI0,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800372 .flags = IORESOURCE_IRQ,
373 }
374};
375
376/* SPI (1) */
377static struct resource bfin_spi1_resource[] = {
378 [0] = {
379 .start = SPI1_REGBASE,
380 .end = SPI1_REGBASE + 0xFF,
381 .flags = IORESOURCE_MEM,
382 },
383 [1] = {
384 .start = CH_SPI1,
385 .end = CH_SPI1,
Yi Li53122692009-06-05 12:11:11 +0000386 .flags = IORESOURCE_DMA,
387 },
388 [2] = {
389 .start = IRQ_SPI1,
390 .end = IRQ_SPI1,
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800391 .flags = IORESOURCE_IRQ,
392 }
393};
394
395/* SPI (2) */
396static struct resource bfin_spi2_resource[] = {
397 [0] = {
398 .start = SPI2_REGBASE,
399 .end = SPI2_REGBASE + 0xFF,
400 .flags = IORESOURCE_MEM,
401 },
402 [1] = {
403 .start = CH_SPI2,
404 .end = CH_SPI2,
405 .flags = IORESOURCE_IRQ,
406 }
407};
408
409/* SPI controller data */
410static struct bfin5xx_spi_master bf538_spi_master_info0 = {
411 .num_chipselect = 8,
412 .enable_dma = 1, /* master has the ability to do dma transfer */
413 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
414};
415
416static struct platform_device bf538_spi_master0 = {
417 .name = "bfin-spi",
418 .id = 0, /* Bus number */
419 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
420 .resource = bfin_spi0_resource,
421 .dev = {
422 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
423 },
424};
425
426static struct bfin5xx_spi_master bf538_spi_master_info1 = {
427 .num_chipselect = 8,
428 .enable_dma = 1, /* master has the ability to do dma transfer */
429 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
430};
431
432static struct platform_device bf538_spi_master1 = {
433 .name = "bfin-spi",
434 .id = 1, /* Bus number */
435 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
436 .resource = bfin_spi1_resource,
437 .dev = {
438 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
439 },
440};
441
442static struct bfin5xx_spi_master bf538_spi_master_info2 = {
443 .num_chipselect = 8,
444 .enable_dma = 1, /* master has the ability to do dma transfer */
445 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
446};
447
448static struct platform_device bf538_spi_master2 = {
449 .name = "bfin-spi",
450 .id = 2, /* Bus number */
451 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
452 .resource = bfin_spi2_resource,
453 .dev = {
454 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
455 },
456};
457
458#endif /* spi master and devices */
459
460#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
461static struct resource bfin_twi0_resource[] = {
462 [0] = {
463 .start = TWI0_REGBASE,
464 .end = TWI0_REGBASE + 0xFF,
465 .flags = IORESOURCE_MEM,
466 },
467 [1] = {
468 .start = IRQ_TWI0,
469 .end = IRQ_TWI0,
470 .flags = IORESOURCE_IRQ,
471 },
472};
473
474static struct platform_device i2c_bfin_twi0_device = {
475 .name = "i2c-bfin-twi",
476 .id = 0,
477 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
478 .resource = bfin_twi0_resource,
479};
480
481#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
482static struct resource bfin_twi1_resource[] = {
483 [0] = {
484 .start = TWI1_REGBASE,
485 .end = TWI1_REGBASE + 0xFF,
486 .flags = IORESOURCE_MEM,
487 },
488 [1] = {
489 .start = IRQ_TWI1,
490 .end = IRQ_TWI1,
491 .flags = IORESOURCE_IRQ,
492 },
493};
494
495static struct platform_device i2c_bfin_twi1_device = {
496 .name = "i2c-bfin-twi",
497 .id = 1,
498 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
499 .resource = bfin_twi1_resource,
500};
501#endif
502#endif
503
Mike Frysingerc97618d2009-01-07 23:14:38 +0800504static struct resource bfin_gpios_resources = {
505 .start = 0,
506 .end = MAX_BLACKFIN_GPIOS - 1,
507 .flags = IORESOURCE_IRQ,
508};
509
510static struct platform_device bfin_gpios_device = {
511 .name = "simple-gpio",
512 .id = -1,
513 .num_resources = 1,
514 .resource = &bfin_gpios_resources,
515};
516
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800517#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
518#include <linux/gpio_keys.h>
519
520static struct gpio_keys_button bfin_gpio_keys_table[] = {
521 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
522};
523
524static struct gpio_keys_platform_data bfin_gpio_keys_data = {
525 .buttons = bfin_gpio_keys_table,
526 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
527};
528
529static struct platform_device bfin_device_gpiokeys = {
530 .name = "gpio-keys",
531 .dev = {
532 .platform_data = &bfin_gpio_keys_data,
533 },
534};
535#endif
536
537static const unsigned int cclk_vlev_datasheet[] =
538{
539/*
540 * Internal VLEV BF538SBBC1533
541 ****temporarily using these values until data sheet is updated
542 */
543 VRPAIR(VLEV_100, 150000000),
544 VRPAIR(VLEV_100, 250000000),
545 VRPAIR(VLEV_110, 276000000),
546 VRPAIR(VLEV_115, 301000000),
547 VRPAIR(VLEV_120, 525000000),
548 VRPAIR(VLEV_125, 550000000),
549 VRPAIR(VLEV_130, 600000000),
550};
551
552static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
553 .tuple_tab = cclk_vlev_datasheet,
554 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
555 .vr_settling_time = 25 /* us */,
556};
557
558static struct platform_device bfin_dpmc = {
559 .name = "bfin dpmc",
560 .dev = {
561 .platform_data = &bfin_dmpc_vreg_data,
562 },
563};
564
Barry Songf1cb6462009-08-03 04:40:36 +0000565#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
566static struct mtd_partition ezkit_partitions[] = {
567 {
568 .name = "bootloader(nor)",
569 .size = 0x40000,
570 .offset = 0,
571 }, {
572 .name = "linux kernel(nor)",
573 .size = 0x180000,
574 .offset = MTDPART_OFS_APPEND,
575 }, {
576 .name = "file system(nor)",
577 .size = MTDPART_SIZ_FULL,
578 .offset = MTDPART_OFS_APPEND,
579 }
580};
581
582static struct physmap_flash_data ezkit_flash_data = {
583 .width = 2,
584 .parts = ezkit_partitions,
585 .nr_parts = ARRAY_SIZE(ezkit_partitions),
586};
587
588static struct resource ezkit_flash_resource = {
589 .start = 0x20000000,
590#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
591 .end = 0x202fffff,
592#else
593 .end = 0x203fffff,
594#endif
595 .flags = IORESOURCE_MEM,
596};
597
598static struct platform_device ezkit_flash_device = {
599 .name = "physmap-flash",
600 .id = 0,
601 .dev = {
602 .platform_data = &ezkit_flash_data,
603 },
604 .num_resources = 1,
605 .resource = &ezkit_flash_resource,
606};
607#endif
608
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800609static struct platform_device *cm_bf538_devices[] __initdata = {
610
611 &bfin_dpmc,
612
613#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
614 &rtc_device,
615#endif
616
617#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
618 &bfin_uart_device,
619#endif
620
621#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
622 &bf538_spi_master0,
623 &bf538_spi_master1,
624 &bf538_spi_master2,
625#endif
626
627#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
628 &i2c_bfin_twi0_device,
629 &i2c_bfin_twi1_device,
630#endif
631
632#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +0800633#ifdef CONFIG_BFIN_SIR0
634 &bfin_sir0_device,
635#endif
636#ifdef CONFIG_BFIN_SIR1
637 &bfin_sir1_device,
638#endif
639#ifdef CONFIG_BFIN_SIR2
640 &bfin_sir2_device,
641#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800642#endif
643
644#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
645 &smc91x_device,
646#endif
647
648#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
649 &bfin_lq035q1_device,
650#endif
651
652#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
653 &bfin_device_gpiokeys,
654#endif
Mike Frysingerc97618d2009-01-07 23:14:38 +0800655
656 &bfin_gpios_device,
Barry Songf1cb6462009-08-03 04:40:36 +0000657
658#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
659 &ezkit_flash_device,
660#endif
Michael Hennerichdc26aec2008-11-18 17:48:22 +0800661};
662
663static int __init ezkit_init(void)
664{
665 printk(KERN_INFO "%s(): registering device resources\n", __func__);
666 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
667
668#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
669 spi_register_board_info(bf538_spi_board_info,
670 ARRAY_SIZE(bf538_spi_board_info));
671#endif
672
673 return 0;
674}
675
676arch_initcall(ezkit_init);