Gitiles
Code Review Sign In
review.evervolv.com / android_kernel_htc_msm8960 / f2802e7f571c05f9a901b1f5bd144aa730ccc88e / . / arch / i386 / pci / pci.h
blob: bf4e79335388b533b6149dcf403533b6ce687c7e [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * Low-Level PCI Access for i386 machines.
3 *
4 * (c) 1999 Martin Mares <mj@ucw.cz>
5 */
6
7#undef DEBUG
8
9#ifdef DEBUG
10#define DBG(x...) printk(x)
11#else
12#define DBG(x...)
13#endif
14
15#define PCI_PROBE_BIOS 0x0001
16#define PCI_PROBE_CONF1 0x0002
17#define PCI_PROBE_CONF2 0x0004
18#define PCI_PROBE_MMCONF 0x0008
Linus Torvalds79e453d2006-09-19 08:15:22 -0700[diff] [blame]19#define PCI_PROBE_MASK 0x000f
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]20
21#define PCI_NO_SORT 0x0100
22#define PCI_BIOS_SORT 0x0200
23#define PCI_NO_CHECKS 0x0400
24#define PCI_USE_PIRQ_MASK 0x0800
25#define PCI_ASSIGN_ROMS 0x1000
26#define PCI_BIOS_IRQ_SCAN 0x2000
27#define PCI_ASSIGN_ALL_BUSSES 0x4000
28
29extern unsigned int pci_probe;
jayalk@intworks.biz120bb422005-03-21 20:20:42 -0800[diff] [blame]30extern unsigned long pirq_table_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]31
32/* pci-i386.c */
33
34extern unsigned int pcibios_max_latency;
35
36void pcibios_resource_survey(void);
37int pcibios_enable_resources(struct pci_dev *, int);
Rajesh Shah53e4d302006-05-03 15:27:47 -0700[diff] [blame]38void pcibios_disable_resources(struct pci_dev *);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]39
40/* pci-pc.c */
41
42extern int pcibios_last_bus;
43extern struct pci_bus *pci_root_bus;
44extern struct pci_ops pci_root_ops;
45
46/* pci-irq.c */
47
48struct irq_info {
49 u8 bus, devfn; /* Bus, device and function */
50 struct {
51 u8 link; /* IRQ line ID, chipset dependent, 0=not routed */
52 u16 bitmap; /* Available IRQs */
53 } __attribute__((packed)) irq[4];
54 u8 slot; /* Slot number, 0=onboard */
55 u8 rfu;
56} __attribute__((packed));
57
58struct irq_routing_table {
59 u32 signature; /* PIRQ_SIGNATURE should be here */
60 u16 version; /* PIRQ_VERSION */
61 u16 size; /* Table size in bytes */
62 u8 rtr_bus, rtr_devfn; /* Where the interrupt router lies */
63 u16 exclusive_irqs; /* IRQs devoted exclusively to PCI usage */
64 u16 rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */
65 u32 miniport_data; /* Crap */
66 u8 rfu[11];
67 u8 checksum; /* Modulo 256 checksum must give zero */
68 struct irq_info slots[0];
69} __attribute__((packed));
70
71extern unsigned int pcibios_irq_mask;
72
73extern int pcibios_scanned;
74extern spinlock_t pci_config_lock;
75
76extern int (*pcibios_enable_irq)(struct pci_dev *dev);
David Shaohua Li87bec662005-07-27 23:02:00 -0400[diff] [blame]77extern void (*pcibios_disable_irq)(struct pci_dev *dev);
Andi Kleen928cf8c2005-12-12 22:17:10 -0800[diff] [blame]78
79extern int pci_conf1_write(unsigned int seg, unsigned int bus,
80 unsigned int devfn, int reg, int len, u32 value);
81extern int pci_conf1_read(unsigned int seg, unsigned int bus,
82 unsigned int devfn, int reg, int len, u32 *value);
83
Andi Kleen92c05fc2006-03-23 14:35:12 -0800[diff] [blame]84extern void pci_direct_init(void);
85extern void pci_pcbios_init(void);
86extern void pci_mmcfg_init(void);
Adrian Bunk6e233892006-06-28 18:54:33 +0200[diff] [blame]87extern void pcibios_sort(void);