blob: 27f83a32a038642934cf99acd5fee44197315e78 [file] [log] [blame]
Jon Medhurst24371702011-04-19 17:56:58 +01001/*
2 * arch/arm/kernel/kprobes-thumb.c
3 *
4 * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/kernel.h>
12#include <linux/kprobes.h>
13
14#include "kprobes.h"
15
Jon Medhursteaf4f33f2011-04-20 19:29:52 +010016
17/*
18 * True if current instruction is in an IT block.
19 */
20#define in_it_block(cpsr) ((cpsr & 0x06000c00) != 0x00000000)
21
22/*
23 * Return the condition code to check for the currently executing instruction.
24 * This is in ITSTATE<7:4> which is in CPSR<15:12> but is only valid if
25 * in_it_block returns true.
26 */
27#define current_cond(cpsr) ((cpsr >> 12) & 0xf)
28
Jon Medhursta9c3c292011-07-02 15:51:03 +010029/*
30 * Return the PC value for a probe in thumb code.
31 * This is the address of the probed instruction plus 4.
32 * We subtract one because the address will have bit zero set to indicate
33 * a pointer to thumb code.
34 */
35static inline unsigned long __kprobes thumb_probe_pc(struct kprobe *p)
36{
37 return (unsigned long)p->addr - 1 + 4;
38}
39
Jon Medhurstf39ca8b2011-07-03 13:55:47 +010040static const union decode_item t32_table_1111_0xxx___1[] = {
41 /* Branches and miscellaneous control */
42
43 /* YIELD 1111 0011 1010 xxxx 10x0 x000 0000 0001 */
44 DECODE_OR (0xfff0d7ff, 0xf3a08001),
45 /* SEV 1111 0011 1010 xxxx 10x0 x000 0000 0100 */
46 DECODE_EMULATE (0xfff0d7ff, 0xf3a08004, kprobe_emulate_none),
47 /* NOP 1111 0011 1010 xxxx 10x0 x000 0000 0000 */
48 /* WFE 1111 0011 1010 xxxx 10x0 x000 0000 0010 */
49 /* WFI 1111 0011 1010 xxxx 10x0 x000 0000 0011 */
50 DECODE_SIMULATE (0xfff0d7fc, 0xf3a08000, kprobe_simulate_nop),
51
52 DECODE_END
53};
54
55const union decode_item kprobe_decode_thumb32_table[] = {
56
57 /*
58 * Branches and miscellaneous control
59 * 1111 0xxx xxxx xxxx 1xxx xxxx xxxx xxxx
60 */
61 DECODE_TABLE (0xf8008000, 0xf0008000, t32_table_1111_0xxx___1),
62
63 DECODE_END
64};
65
Jon Medhursta9c3c292011-07-02 15:51:03 +010066static void __kprobes
67t16_simulate_bxblx(struct kprobe *p, struct pt_regs *regs)
68{
69 kprobe_opcode_t insn = p->opcode;
70 unsigned long pc = thumb_probe_pc(p);
71 int rm = (insn >> 3) & 0xf;
72 unsigned long rmv = (rm == 15) ? pc : regs->uregs[rm];
73
74 if (insn & (1 << 7)) /* BLX ? */
75 regs->ARM_lr = (unsigned long)p->addr + 2;
76
77 bx_write_pc(rmv, regs);
78}
79
Jon Medhurstf8695142011-07-02 16:00:09 +010080static void __kprobes
81t16_simulate_ldr_literal(struct kprobe *p, struct pt_regs *regs)
82{
83 kprobe_opcode_t insn = p->opcode;
84 unsigned long* base = (unsigned long *)(thumb_probe_pc(p) & ~3);
85 long index = insn & 0xff;
86 int rt = (insn >> 8) & 0x7;
87 regs->uregs[rt] = base[index];
88}
89
90static void __kprobes
91t16_simulate_ldrstr_sp_relative(struct kprobe *p, struct pt_regs *regs)
92{
93 kprobe_opcode_t insn = p->opcode;
94 unsigned long* base = (unsigned long *)regs->ARM_sp;
95 long index = insn & 0xff;
96 int rt = (insn >> 8) & 0x7;
97 if (insn & 0x800) /* LDR */
98 regs->uregs[rt] = base[index];
99 else /* STR */
100 base[index] = regs->uregs[rt];
101}
102
Jon Medhurst2f335822011-07-02 16:05:53 +0100103static void __kprobes
104t16_simulate_reladr(struct kprobe *p, struct pt_regs *regs)
105{
106 kprobe_opcode_t insn = p->opcode;
107 unsigned long base = (insn & 0x800) ? regs->ARM_sp
108 : (thumb_probe_pc(p) & ~3);
109 long offset = insn & 0xff;
110 int rt = (insn >> 8) & 0x7;
111 regs->uregs[rt] = base + offset * 4;
112}
113
114static void __kprobes
115t16_simulate_add_sp_imm(struct kprobe *p, struct pt_regs *regs)
116{
117 kprobe_opcode_t insn = p->opcode;
118 long imm = insn & 0x7f;
119 if (insn & 0x80) /* SUB */
120 regs->ARM_sp -= imm * 4;
121 else /* ADD */
122 regs->ARM_sp += imm * 4;
123}
124
Jon Medhurst32818f32011-07-02 16:10:44 +0100125static void __kprobes
126t16_simulate_cbz(struct kprobe *p, struct pt_regs *regs)
127{
128 kprobe_opcode_t insn = p->opcode;
129 int rn = insn & 0x7;
130 kprobe_opcode_t nonzero = regs->uregs[rn] ? insn : ~insn;
131 if (nonzero & 0x800) {
132 long i = insn & 0x200;
133 long imm5 = insn & 0xf8;
134 unsigned long pc = thumb_probe_pc(p);
135 regs->ARM_pc = pc + (i >> 3) + (imm5 >> 2);
136 }
137}
138
Jon Medhurst5b94faf2011-07-02 16:16:05 +0100139static void __kprobes
140t16_simulate_it(struct kprobe *p, struct pt_regs *regs)
141{
142 /*
143 * The 8 IT state bits are split into two parts in CPSR:
144 * ITSTATE<1:0> are in CPSR<26:25>
145 * ITSTATE<7:2> are in CPSR<15:10>
146 * The new IT state is in the lower byte of insn.
147 */
148 kprobe_opcode_t insn = p->opcode;
149 unsigned long cpsr = regs->ARM_cpsr;
150 cpsr &= ~PSR_IT_MASK;
151 cpsr |= (insn & 0xfc) << 8;
152 cpsr |= (insn & 0x03) << 25;
153 regs->ARM_cpsr = cpsr;
154}
155
156static void __kprobes
157t16_singlestep_it(struct kprobe *p, struct pt_regs *regs)
158{
159 regs->ARM_pc += 2;
160 t16_simulate_it(p, regs);
161}
162
163static enum kprobe_insn __kprobes
164t16_decode_it(kprobe_opcode_t insn, struct arch_specific_insn *asi)
165{
166 asi->insn_singlestep = t16_singlestep_it;
167 return INSN_GOOD_NO_SLOT;
168}
169
Jon Medhurst396b41f2011-07-02 16:30:43 +0100170static void __kprobes
171t16_simulate_cond_branch(struct kprobe *p, struct pt_regs *regs)
172{
173 kprobe_opcode_t insn = p->opcode;
174 unsigned long pc = thumb_probe_pc(p);
175 long offset = insn & 0x7f;
176 offset -= insn & 0x80; /* Apply sign bit */
177 regs->ARM_pc = pc + (offset * 2);
178}
179
180static enum kprobe_insn __kprobes
181t16_decode_cond_branch(kprobe_opcode_t insn, struct arch_specific_insn *asi)
182{
183 int cc = (insn >> 8) & 0xf;
184 asi->insn_check_cc = kprobe_condition_checks[cc];
185 asi->insn_handler = t16_simulate_cond_branch;
186 return INSN_GOOD_NO_SLOT;
187}
188
189static void __kprobes
190t16_simulate_branch(struct kprobe *p, struct pt_regs *regs)
191{
192 kprobe_opcode_t insn = p->opcode;
193 unsigned long pc = thumb_probe_pc(p);
194 long offset = insn & 0x3ff;
195 offset -= insn & 0x400; /* Apply sign bit */
196 regs->ARM_pc = pc + (offset * 2);
197}
198
Jon Medhurst02d194f2011-07-02 15:46:05 +0100199static unsigned long __kprobes
200t16_emulate_loregs(struct kprobe *p, struct pt_regs *regs)
201{
202 unsigned long oldcpsr = regs->ARM_cpsr;
203 unsigned long newcpsr;
204
205 __asm__ __volatile__ (
206 "msr cpsr_fs, %[oldcpsr] \n\t"
207 "ldmia %[regs], {r0-r7} \n\t"
208 "blx %[fn] \n\t"
209 "stmia %[regs], {r0-r7} \n\t"
210 "mrs %[newcpsr], cpsr \n\t"
211 : [newcpsr] "=r" (newcpsr)
212 : [oldcpsr] "r" (oldcpsr), [regs] "r" (regs),
213 [fn] "r" (p->ainsn.insn_fn)
214 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
215 "lr", "memory", "cc"
216 );
217
218 return (oldcpsr & ~APSR_MASK) | (newcpsr & APSR_MASK);
219}
220
221static void __kprobes
222t16_emulate_loregs_rwflags(struct kprobe *p, struct pt_regs *regs)
223{
224 regs->ARM_cpsr = t16_emulate_loregs(p, regs);
225}
226
227static void __kprobes
228t16_emulate_loregs_noitrwflags(struct kprobe *p, struct pt_regs *regs)
229{
230 unsigned long cpsr = t16_emulate_loregs(p, regs);
231 if (!in_it_block(cpsr))
232 regs->ARM_cpsr = cpsr;
233}
234
Jon Medhurst3b5940e2011-07-02 15:54:57 +0100235static void __kprobes
236t16_emulate_hiregs(struct kprobe *p, struct pt_regs *regs)
237{
238 kprobe_opcode_t insn = p->opcode;
239 unsigned long pc = thumb_probe_pc(p);
240 int rdn = (insn & 0x7) | ((insn & 0x80) >> 4);
241 int rm = (insn >> 3) & 0xf;
242
243 register unsigned long rdnv asm("r1");
244 register unsigned long rmv asm("r0");
245 unsigned long cpsr = regs->ARM_cpsr;
246
247 rdnv = (rdn == 15) ? pc : regs->uregs[rdn];
248 rmv = (rm == 15) ? pc : regs->uregs[rm];
249
250 __asm__ __volatile__ (
251 "msr cpsr_fs, %[cpsr] \n\t"
252 "blx %[fn] \n\t"
253 "mrs %[cpsr], cpsr \n\t"
254 : "=r" (rdnv), [cpsr] "=r" (cpsr)
255 : "0" (rdnv), "r" (rmv), "1" (cpsr), [fn] "r" (p->ainsn.insn_fn)
256 : "lr", "memory", "cc"
257 );
258
259 if (rdn == 15)
260 rdnv &= ~1;
261
262 regs->uregs[rdn] = rdnv;
263 regs->ARM_cpsr = (regs->ARM_cpsr & ~APSR_MASK) | (cpsr & APSR_MASK);
264}
265
266static enum kprobe_insn __kprobes
267t16_decode_hiregs(kprobe_opcode_t insn, struct arch_specific_insn *asi)
268{
269 insn &= ~0x00ff;
270 insn |= 0x001; /* Set Rdn = R1 and Rm = R0 */
271 ((u16 *)asi->insn)[0] = insn;
272 asi->insn_handler = t16_emulate_hiregs;
273 return INSN_GOOD;
274}
275
Jon Medhurstfd0c8d82011-07-02 16:13:29 +0100276static void __kprobes
277t16_emulate_push(struct kprobe *p, struct pt_regs *regs)
278{
279 __asm__ __volatile__ (
280 "ldr r9, [%[regs], #13*4] \n\t"
281 "ldr r8, [%[regs], #14*4] \n\t"
282 "ldmia %[regs], {r0-r7} \n\t"
283 "blx %[fn] \n\t"
284 "str r9, [%[regs], #13*4] \n\t"
285 :
286 : [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
287 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
288 "lr", "memory", "cc"
289 );
290}
291
292static enum kprobe_insn __kprobes
293t16_decode_push(kprobe_opcode_t insn, struct arch_specific_insn *asi)
294{
295 /*
296 * To simulate a PUSH we use a Thumb-2 "STMDB R9!, {registers}"
297 * and call it with R9=SP and LR in the register list represented
298 * by R8.
299 */
300 ((u16 *)asi->insn)[0] = 0xe929; /* 1st half STMDB R9!,{} */
301 ((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */
302 asi->insn_handler = t16_emulate_push;
303 return INSN_GOOD;
304}
305
306static void __kprobes
307t16_emulate_pop_nopc(struct kprobe *p, struct pt_regs *regs)
308{
309 __asm__ __volatile__ (
310 "ldr r9, [%[regs], #13*4] \n\t"
311 "ldmia %[regs], {r0-r7} \n\t"
312 "blx %[fn] \n\t"
313 "stmia %[regs], {r0-r7} \n\t"
314 "str r9, [%[regs], #13*4] \n\t"
315 :
316 : [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
317 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r9",
318 "lr", "memory", "cc"
319 );
320}
321
322static void __kprobes
323t16_emulate_pop_pc(struct kprobe *p, struct pt_regs *regs)
324{
325 register unsigned long pc asm("r8");
326
327 __asm__ __volatile__ (
328 "ldr r9, [%[regs], #13*4] \n\t"
329 "ldmia %[regs], {r0-r7} \n\t"
330 "blx %[fn] \n\t"
331 "stmia %[regs], {r0-r7} \n\t"
332 "str r9, [%[regs], #13*4] \n\t"
333 : "=r" (pc)
334 : [regs] "r" (regs), [fn] "r" (p->ainsn.insn_fn)
335 : "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r9",
336 "lr", "memory", "cc"
337 );
338
339 bx_write_pc(pc, regs);
340}
341
342static enum kprobe_insn __kprobes
343t16_decode_pop(kprobe_opcode_t insn, struct arch_specific_insn *asi)
344{
345 /*
346 * To simulate a POP we use a Thumb-2 "LDMDB R9!, {registers}"
347 * and call it with R9=SP and PC in the register list represented
348 * by R8.
349 */
350 ((u16 *)asi->insn)[0] = 0xe8b9; /* 1st half LDMIA R9!,{} */
351 ((u16 *)asi->insn)[1] = insn & 0x1ff; /* 2nd half (register list) */
352 asi->insn_handler = insn & 0x100 ? t16_emulate_pop_pc
353 : t16_emulate_pop_nopc;
354 return INSN_GOOD;
355}
356
Jon Medhurst3f92dfe2011-07-02 15:36:32 +0100357static const union decode_item t16_table_1011[] = {
358 /* Miscellaneous 16-bit instructions */
359
Jon Medhurst2f335822011-07-02 16:05:53 +0100360 /* ADD (SP plus immediate) 1011 0000 0xxx xxxx */
361 /* SUB (SP minus immediate) 1011 0000 1xxx xxxx */
362 DECODE_SIMULATE (0xff00, 0xb000, t16_simulate_add_sp_imm),
363
Jon Medhurst32818f32011-07-02 16:10:44 +0100364 /* CBZ 1011 00x1 xxxx xxxx */
365 /* CBNZ 1011 10x1 xxxx xxxx */
366 DECODE_SIMULATE (0xf500, 0xb100, t16_simulate_cbz),
367
368 /* SXTH 1011 0010 00xx xxxx */
369 /* SXTB 1011 0010 01xx xxxx */
370 /* UXTH 1011 0010 10xx xxxx */
371 /* UXTB 1011 0010 11xx xxxx */
372 /* REV 1011 1010 00xx xxxx */
373 /* REV16 1011 1010 01xx xxxx */
374 /* ??? 1011 1010 10xx xxxx */
375 /* REVSH 1011 1010 11xx xxxx */
376 DECODE_REJECT (0xffc0, 0xba80),
377 DECODE_EMULATE (0xf500, 0xb000, t16_emulate_loregs_rwflags),
378
Jon Medhurstfd0c8d82011-07-02 16:13:29 +0100379 /* PUSH 1011 010x xxxx xxxx */
380 DECODE_CUSTOM (0xfe00, 0xb400, t16_decode_push),
381 /* POP 1011 110x xxxx xxxx */
382 DECODE_CUSTOM (0xfe00, 0xbc00, t16_decode_pop),
383
Jon Medhurst3f92dfe2011-07-02 15:36:32 +0100384 /*
385 * If-Then, and hints
386 * 1011 1111 xxxx xxxx
387 */
388
389 /* YIELD 1011 1111 0001 0000 */
390 DECODE_OR (0xffff, 0xbf10),
391 /* SEV 1011 1111 0100 0000 */
392 DECODE_EMULATE (0xffff, 0xbf40, kprobe_emulate_none),
393 /* NOP 1011 1111 0000 0000 */
394 /* WFE 1011 1111 0010 0000 */
395 /* WFI 1011 1111 0011 0000 */
396 DECODE_SIMULATE (0xffcf, 0xbf00, kprobe_simulate_nop),
397 /* Unassigned hints 1011 1111 xxxx 0000 */
398 DECODE_REJECT (0xff0f, 0xbf00),
Jon Medhurst5b94faf2011-07-02 16:16:05 +0100399 /* IT 1011 1111 xxxx xxxx */
400 DECODE_CUSTOM (0xff00, 0xbf00, t16_decode_it),
Jon Medhurst3f92dfe2011-07-02 15:36:32 +0100401
Jon Medhurst0a188cc2011-07-02 16:39:07 +0100402 /* SETEND 1011 0110 010x xxxx */
403 /* CPS 1011 0110 011x xxxx */
404 /* BKPT 1011 1110 xxxx xxxx */
405 /* And unallocated instructions... */
Jon Medhurst3f92dfe2011-07-02 15:36:32 +0100406 DECODE_END
407};
408
409const union decode_item kprobe_decode_thumb16_table[] = {
410
411 /*
Jon Medhurst02d194f2011-07-02 15:46:05 +0100412 * Shift (immediate), add, subtract, move, and compare
413 * 00xx xxxx xxxx xxxx
414 */
415
416 /* CMP (immediate) 0010 1xxx xxxx xxxx */
417 DECODE_EMULATE (0xf800, 0x2800, t16_emulate_loregs_rwflags),
418
419 /* ADD (register) 0001 100x xxxx xxxx */
420 /* SUB (register) 0001 101x xxxx xxxx */
421 /* LSL (immediate) 0000 0xxx xxxx xxxx */
422 /* LSR (immediate) 0000 1xxx xxxx xxxx */
423 /* ASR (immediate) 0001 0xxx xxxx xxxx */
424 /* ADD (immediate, Thumb) 0001 110x xxxx xxxx */
425 /* SUB (immediate, Thumb) 0001 111x xxxx xxxx */
426 /* MOV (immediate) 0010 0xxx xxxx xxxx */
427 /* ADD (immediate, Thumb) 0011 0xxx xxxx xxxx */
428 /* SUB (immediate, Thumb) 0011 1xxx xxxx xxxx */
429 DECODE_EMULATE (0xc000, 0x0000, t16_emulate_loregs_noitrwflags),
430
431 /*
432 * 16-bit Thumb data-processing instructions
433 * 0100 00xx xxxx xxxx
434 */
435
436 /* TST (register) 0100 0010 00xx xxxx */
437 DECODE_EMULATE (0xffc0, 0x4200, t16_emulate_loregs_rwflags),
438 /* CMP (register) 0100 0010 10xx xxxx */
439 /* CMN (register) 0100 0010 11xx xxxx */
440 DECODE_EMULATE (0xff80, 0x4280, t16_emulate_loregs_rwflags),
441 /* AND (register) 0100 0000 00xx xxxx */
442 /* EOR (register) 0100 0000 01xx xxxx */
443 /* LSL (register) 0100 0000 10xx xxxx */
444 /* LSR (register) 0100 0000 11xx xxxx */
445 /* ASR (register) 0100 0001 00xx xxxx */
446 /* ADC (register) 0100 0001 01xx xxxx */
447 /* SBC (register) 0100 0001 10xx xxxx */
448 /* ROR (register) 0100 0001 11xx xxxx */
449 /* RSB (immediate) 0100 0010 01xx xxxx */
450 /* ORR (register) 0100 0011 00xx xxxx */
451 /* MUL 0100 0011 00xx xxxx */
452 /* BIC (register) 0100 0011 10xx xxxx */
453 /* MVN (register) 0100 0011 10xx xxxx */
454 DECODE_EMULATE (0xfc00, 0x4000, t16_emulate_loregs_noitrwflags),
455
456 /*
Jon Medhursta9c3c292011-07-02 15:51:03 +0100457 * Special data instructions and branch and exchange
458 * 0100 01xx xxxx xxxx
459 */
460
461 /* BLX pc 0100 0111 1111 1xxx */
462 DECODE_REJECT (0xfff8, 0x47f8),
463
464 /* BX (register) 0100 0111 0xxx xxxx */
465 /* BLX (register) 0100 0111 1xxx xxxx */
466 DECODE_SIMULATE (0xff00, 0x4700, t16_simulate_bxblx),
467
Jon Medhurst3b5940e2011-07-02 15:54:57 +0100468 /* ADD pc, pc 0100 0100 1111 1111 */
469 DECODE_REJECT (0xffff, 0x44ff),
470
471 /* ADD (register) 0100 0100 xxxx xxxx */
472 /* CMP (register) 0100 0101 xxxx xxxx */
473 /* MOV (register) 0100 0110 xxxx xxxx */
474 DECODE_CUSTOM (0xfc00, 0x4400, t16_decode_hiregs),
475
Jon Medhursta9c3c292011-07-02 15:51:03 +0100476 /*
Jon Medhurstf8695142011-07-02 16:00:09 +0100477 * Load from Literal Pool
478 * LDR (literal) 0100 1xxx xxxx xxxx
479 */
480 DECODE_SIMULATE (0xf800, 0x4800, t16_simulate_ldr_literal),
481
482 /*
483 * 16-bit Thumb Load/store instructions
484 * 0101 xxxx xxxx xxxx
485 * 011x xxxx xxxx xxxx
486 * 100x xxxx xxxx xxxx
487 */
488
489 /* STR (register) 0101 000x xxxx xxxx */
490 /* STRH (register) 0101 001x xxxx xxxx */
491 /* STRB (register) 0101 010x xxxx xxxx */
492 /* LDRSB (register) 0101 011x xxxx xxxx */
493 /* LDR (register) 0101 100x xxxx xxxx */
494 /* LDRH (register) 0101 101x xxxx xxxx */
495 /* LDRB (register) 0101 110x xxxx xxxx */
496 /* LDRSH (register) 0101 111x xxxx xxxx */
497 /* STR (immediate, Thumb) 0110 0xxx xxxx xxxx */
498 /* LDR (immediate, Thumb) 0110 1xxx xxxx xxxx */
499 /* STRB (immediate, Thumb) 0111 0xxx xxxx xxxx */
500 /* LDRB (immediate, Thumb) 0111 1xxx xxxx xxxx */
501 DECODE_EMULATE (0xc000, 0x4000, t16_emulate_loregs_rwflags),
502 /* STRH (immediate, Thumb) 1000 0xxx xxxx xxxx */
503 /* LDRH (immediate, Thumb) 1000 1xxx xxxx xxxx */
504 DECODE_EMULATE (0xf000, 0x8000, t16_emulate_loregs_rwflags),
505 /* STR (immediate, Thumb) 1001 0xxx xxxx xxxx */
506 /* LDR (immediate, Thumb) 1001 1xxx xxxx xxxx */
507 DECODE_SIMULATE (0xf000, 0x9000, t16_simulate_ldrstr_sp_relative),
508
509 /*
Jon Medhurst2f335822011-07-02 16:05:53 +0100510 * Generate PC-/SP-relative address
511 * ADR (literal) 1010 0xxx xxxx xxxx
512 * ADD (SP plus immediate) 1010 1xxx xxxx xxxx
513 */
514 DECODE_SIMULATE (0xf000, 0xa000, t16_simulate_reladr),
515
516 /*
Jon Medhurst3f92dfe2011-07-02 15:36:32 +0100517 * Miscellaneous 16-bit instructions
518 * 1011 xxxx xxxx xxxx
519 */
520 DECODE_TABLE (0xf000, 0xb000, t16_table_1011),
521
Jon Medhurstf8695142011-07-02 16:00:09 +0100522 /* STM 1100 0xxx xxxx xxxx */
523 /* LDM 1100 1xxx xxxx xxxx */
524 DECODE_EMULATE (0xf000, 0xc000, t16_emulate_loregs_rwflags),
525
Jon Medhurst44495662011-07-02 16:25:47 +0100526 /*
527 * Conditional branch, and Supervisor Call
528 */
529
530 /* Permanently UNDEFINED 1101 1110 xxxx xxxx */
531 /* SVC 1101 1111 xxxx xxxx */
532 DECODE_REJECT (0xfe00, 0xde00),
533
Jon Medhurst396b41f2011-07-02 16:30:43 +0100534 /* Conditional branch 1101 xxxx xxxx xxxx */
535 DECODE_CUSTOM (0xf000, 0xd000, t16_decode_cond_branch),
536
537 /*
538 * Unconditional branch
539 * B 1110 0xxx xxxx xxxx
540 */
541 DECODE_SIMULATE (0xf800, 0xe000, t16_simulate_branch),
542
Jon Medhurst3f92dfe2011-07-02 15:36:32 +0100543 DECODE_END
544};
545
Jon Medhursteaf4f33f2011-04-20 19:29:52 +0100546static unsigned long __kprobes thumb_check_cc(unsigned long cpsr)
547{
548 if (unlikely(in_it_block(cpsr)))
549 return kprobe_condition_checks[current_cond(cpsr)](cpsr);
550 return true;
551}
552
Jon Medhurstc6a7d972011-06-09 12:11:27 +0100553static void __kprobes thumb16_singlestep(struct kprobe *p, struct pt_regs *regs)
554{
555 regs->ARM_pc += 2;
556 p->ainsn.insn_handler(p, regs);
557 regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
558}
559
560static void __kprobes thumb32_singlestep(struct kprobe *p, struct pt_regs *regs)
561{
562 regs->ARM_pc += 4;
563 p->ainsn.insn_handler(p, regs);
564 regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
565}
566
Jon Medhurst24371702011-04-19 17:56:58 +0100567enum kprobe_insn __kprobes
568thumb16_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
569{
Jon Medhurstc6a7d972011-06-09 12:11:27 +0100570 asi->insn_singlestep = thumb16_singlestep;
Jon Medhursteaf4f33f2011-04-20 19:29:52 +0100571 asi->insn_check_cc = thumb_check_cc;
Jon Medhurst3f92dfe2011-07-02 15:36:32 +0100572 return kprobe_decode_insn(insn, asi, kprobe_decode_thumb16_table, true);
Jon Medhurst24371702011-04-19 17:56:58 +0100573}
574
575enum kprobe_insn __kprobes
576thumb32_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi)
577{
Jon Medhurstc6a7d972011-06-09 12:11:27 +0100578 asi->insn_singlestep = thumb32_singlestep;
Jon Medhursteaf4f33f2011-04-20 19:29:52 +0100579 asi->insn_check_cc = thumb_check_cc;
Jon Medhurstf39ca8b2011-07-03 13:55:47 +0100580 return kprobe_decode_insn(insn, asi, kprobe_decode_thumb32_table, true);
Jon Medhurst24371702011-04-19 17:56:58 +0100581}