arch/arm/boot/dts/msmcopper.dts

/dts-v1/;

/include/ "skeleton.dtsi"

/ {
	model = "Qualcomm MSM Copper";
	compatible = "qcom,msmcopper-sim", "qcom,msmcopper";
	interrupt-parent = <&intc>;

	intc: interrupt-controller@F9000000 {
		compatible = "qcom,msm-qgic2";
		interrupt-controller;
		#interrupt-cells = <3>;
		reg = <0xF9000000 0x1000>,
		      <0xF9002000 0x1000>;
	};

	msmgpio: gpio@fd400000 {
		compatible = "qcom,msm-gpio";
		interrupt-controller;
		#interrupt-cells = <2>;
		reg = <0xfd400000 0x4000>;
	};

	timer {
		compatible = "qcom,msm-qtimer";
		interrupts = <1 2 0>;
	};

	serial@f991f000 {
		compatible = "qcom,msm-lsuart-v14";
		reg = <0xf991f000 0x1000>;
		interrupts = <0 109 0>;
	};

	usb@f9a55000 {
		compatible = "qcom,hsusb-otg";
		reg = <0xf9a55000 0x400>;
		interrupts = <0 134 0>;

		qcom,hsusb-otg-phy-type = <2>;
		qcom,hsusb-otg-mode = <1>;
		qcom,hsusb-otg-otg-control = <1>;
	};

	qcom,sdcc@f980b000 {
		cell-index = <1>;
		compatible = "qcom,msm-sdcc";
		reg = <0xf980b000 0x1000>;
		interrupts = <0 123 0>;

		qcom,sdcc-clk-rates = <400000 24000000 48000000>;
		qcom,sdcc-sup-voltages = <3300 3300>;
		qcom,sdcc-bus-width = <8>;
		qcom,sdcc-nonremovable;
		qcom,sdcc-disable_cmd23;
	};

	qcom,sdcc@f984b000 {
		cell-index = <3>;
		compatible = "qcom,msm-sdcc";
		reg = <0xf984b000 0x1000>;
		interrupts = <0 127 0>;

		qcom,sdcc-clk-rates = <400000 24000000 48000000>;
		qcom,sdcc-sup-voltages = <3300 3300>;
		qcom,sdcc-bus-width = <4>;
		qcom,sdcc-disable_cmd23;
	};

	qcom,sps@f9980000 {
		compatible = "qcom,msm_sps";
		reg = <0xf9984000 0x15000>,
		      <0xf9999000 0xb000>;
		interrupts = <0 94 0>;

		qcom,bam-dma-res-pipes = <6>;
	};

	spi@f9924000 {
		compatible = "qcom,spi-qup-v2";
		reg = <0xf9924000 0x1000>;
		interrupts = <96>;
		spi-max-frequency = <24000000>;
	};

	qcom,spmi@fc4c0000 {
		cell-index = <0>;
		compatible = "qcom,spmi-pmic-arb";
		reg = <0xfc4cf000 0x1000>,
		      <0Xfc4cb000 0x1000>;
		/* 190,ee0_krait_hlos_spmi_periph_irq */
		/* 187,channel_0_krait_hlos_trans_done_irq */
		interrupts = <0 190 0 0 187 0>;
		qcom,pmic-arb-ee = <0>;
		qcom,pmic-arb-channel = <0>;
		qcom,pmic-arb-ppid-map = <0x130 0x00>, /* PM8941_LDO1 */
					 <0x131 0x01>, /* PM8941_LDO2 */
					 <0x132 0x02>, /* PM8941_LDO3 */
					 <0x133 0x03>, /* PM8941_LDO4 */
					 <0x134 0x04>, /* PM8941_LDO5 */
					 <0x135 0x05>, /* PM8941_LDO6 */
					 <0x136 0x06>, /* PM8941_LDO7 */
					 <0x137 0x07>, /* PM8941_LDO8 */
					 <0x138 0x08>, /* PM8941_LDO9 */
					 <0x139 0x09>, /* PM8941_LDO10 */
					 <0x13a 0x0a>, /* PM8941_LDO11 */
					 <0x13b 0x0b>, /* PM8941_LDO12 */
					 <0x13c 0x0c>, /* PM8941_LDO13 */
					 <0x13d 0x0d>, /* PM8941_LDO14 */
					 <0x13e 0x0e>, /* PM8941_LDO15 */
					 <0x13f 0x0f>, /* PM8941_LDO16 */
					 <0x140 0x10>, /* PM8941_LDO17 */
					 <0x141 0x11>, /* PM8941_LDO18 */
					 <0x142 0x12>, /* PM8941_LDO19 */
					 <0x143 0x13>, /* PM8941_LDO20 */
					 <0x144 0x14>, /* PM8941_LDO21 */
					 <0x145 0x15>, /* PM8941_LDO22 */
					 <0x146 0x16>, /* PM8941_LDO23 */
					 <0x147 0x17>, /* PM8941_LDO24 */
					 <0x148 0x18>, /* PM8941_LDO25 */
					 <0x149 0x19>, /* PM8941_LDO26 */
					 <0x0c0 0x1a>, /* PM8941_GPIO1 */
					 <0x0c1 0x1b>, /* PM8941_GPIO2 */
					 <0x0c2 0x1c>, /* PM8941_GPIO3 */
					 <0x0c3 0x1d>, /* PM8941_GPIO4 */
					 <0x0c4 0x1e>, /* PM8941_GPIO5 */
					 <0x0c5 0x1f>, /* PM8941_GPIO6 */
					 <0x0c6 0x20>, /* PM8941_GPIO7 */
					 <0x0c7 0x21>, /* PM8941_GPIO8 */
					 <0x0c8 0x22>, /* PM8941_GPIO9 */
					 <0x0c9 0x23>, /* PM8941_GPIO10 */
					 <0x0ca 0x24>, /* PM8941_GPIO11 */
					 <0x0cb 0x25>, /* PM8941_GPIO12 */
					 <0x0cc 0x26>, /* PM8941_GPIO13 */
					 <0x0cd 0x27>, /* PM8941_GPIO14 */
					 <0x0ce 0x28>, /* PM8941_GPIO15 */
					 <0x0cf 0x29>, /* PM8941_GPIO16 */
					 <0x0d0 0x2a>, /* PM8941_GPIO17 */
					 <0x0d1 0x2b>, /* PM8941_GPIO18 */
					 <0x0d2 0x2c>, /* PM8941_GPIO19 */
					 <0x0d3 0x2d>, /* PM8941_GPIO20 */
					 <0x0d4 0x2e>, /* PM8941_GPIO21 */
					 <0x0d5 0x2f>, /* PM8941_GPIO22 */
					 <0x0d6 0x30>, /* PM8941_GPIO23 */
					 <0x0d7 0x31>, /* PM8941_GPIO24 */
					 <0x0d8 0x32>, /* PM8941_GPIO25 */
					 <0x0d9 0x33>, /* PM8941_GPIO26 */
					 <0x0da 0x34>, /* PM8941_GPIO27 */
					 <0x0db 0x35>, /* PM8941_GPIO28 */
					 <0x0dc 0x36>, /* PM8941_GPIO29 */
					 <0x0dd 0x37>, /* PM8941_GPIO30 */
					 <0x0de 0x38>, /* PM8941_GPIO31 */
					 <0x0df 0x39>, /* PM8941_GPIO32 */
					 <0x0e0 0x3a>, /* PM8941_GPIO33 */
					 <0x0e1 0x3b>, /* PM8941_GPIO34 */
					 <0x0e2 0x3c>, /* PM8941_GPIO35 */
					 <0x0e3 0x3d>, /* PM8941_GPIO36 */
					 <0x028 0x3e>, /* COINCELL */
					 <0x005 0x3f>, /* INTERRUPT */
					 <0x001 0x40>, /* PM8941_0 */
					 <0x201 0x41>, /* PM8841_0 */
					 <0x101 0x42>, /* PM8941_1 */
					 <0x301 0x43>, /* PM8841_1 */
					 <0x008 0x44>, /* PON0 */
					 <0x208 0x45>, /* PON1 */
					 <0x110 0x46>, /* PM8941_SMPS1 */
					 <0x111 0x47>, /* PM8941_SMPS2 */
					 <0x112 0x48>, /* PM8941_SMPS3 */
					 <0x310 0x49>, /* PM8841_SMPS1 */
					 <0x311 0x4a>, /* PM8841_SMPS2 */
					 <0x312 0x4b>, /* PM8841_SMPS3 */
					 <0x313 0x4c>, /* PM8841_SMPS4 */
					 <0x314 0x4d>, /* PM8841_SMPS5 */
					 <0x315 0x4e>, /* PM8841_SMPS6 */
					 <0x316 0x4f>, /* PM8841_SMPS7 */
					 <0x317 0x50>, /* PM8841_SMPS8 */
					 <0x050 0x51>, /* SHARED_XO */
					 <0x051 0x52>, /* BB_CLK1 */
					 <0x052 0x53>, /* BB_CLK2 */
					 <0x059 0x54>, /* SLEEP_CLK */
					 <0x010 0x55>, /* SMBC_OVP */
					 <0x011 0x56>, /* SMBC_CHG */
					 <0x012 0x57>; /* SMBC_BIF */
	};
};