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Michael Bohan0425f6f2012-01-17 14:36:39 -08001/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Sathish Ambleyc58afc22011-10-09 21:55:39 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/irq.h>
17#include <linux/irqdomain.h>
18#include <linux/of.h>
19#include <linux/of_address.h>
20#include <linux/of_platform.h>
Michael Bohanc7224532012-01-06 16:02:52 -080021#include <linux/of_irq.h>
Olav Hauganb800c8c2012-01-30 08:50:45 -080022#ifdef CONFIG_ION_MSM
23#include <linux/ion.h>
24#endif
25#include <linux/memory.h>
26#ifdef CONFIG_ANDROID_PMEM
27#include <linux/android_pmem.h>
28#endif
Sathish Ambleyc58afc22011-10-09 21:55:39 -070029#include <asm/mach/map.h>
30#include <asm/hardware/gic.h>
31#include <mach/board.h>
32#include <mach/gpio.h>
33#include <mach/gpiomux.h>
34#include <mach/msm_iomap.h>
Olav Hauganb800c8c2012-01-30 08:50:45 -080035#ifdef CONFIG_ION_MSM
36#include <mach/ion.h>
37#endif
38#include <mach/msm_memtypes.h>
Sathish Ambleyc58afc22011-10-09 21:55:39 -070039#include "clock.h"
40
Olav Hauganb800c8c2012-01-30 08:50:45 -080041#define MSM_KERNEL_EBI1_MEM_SIZE 0x280000
42#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
43#define MSM_ION_SF_SIZE 0x4000000 /* 64 Mbytes */
44#else
45#define MSM_ION_SF_SIZE 0x2800000 /* 40 Mbytes */
46#endif
47#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
48#define MSM_ION_MM_SIZE 0x7800000 /* (120MB) */
49#define MSM_ION_QSECOM_SIZE 0x100000 /* (1MB) */
50#define MSM_ION_MFC_SIZE SZ_8K
51#define MSM_ION_AUDIO_SIZE 0x2B4000
52#define MSM_ION_HEAP_NUM 8
53
54#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
55static unsigned kernel_ebi1_mem_size = MSM_KERNEL_EBI1_MEM_SIZE;
56static int __init kernel_ebi1_mem_size_setup(char *p)
57{
58 kernel_ebi1_mem_size = memparse(p, NULL);
59 return 0;
60}
61early_param("kernel_ebi1_mem_size", kernel_ebi1_mem_size_setup);
62#endif
63
64static struct memtype_reserve msm_copper_reserve_table[] __initdata = {
65 [MEMTYPE_SMI] = {
66 },
67 [MEMTYPE_EBI0] = {
68 .flags = MEMTYPE_FLAGS_1M_ALIGN,
69 },
70 [MEMTYPE_EBI1] = {
71 .flags = MEMTYPE_FLAGS_1M_ALIGN,
72 },
73};
74
75static int msm_copper_paddr_to_memtype(unsigned int paddr)
76{
77 return MEMTYPE_EBI1;
78}
79
80#ifdef CONFIG_ION_MSM
81static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
82 .permission_type = IPT_TYPE_MM_CARVEOUT,
83 .align = PAGE_SIZE,
84};
85
86static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
87 .permission_type = IPT_TYPE_MFC_SHAREDMEM,
88 .align = PAGE_SIZE,
89};
90
91static struct ion_co_heap_pdata co_ion_pdata = {
92 .adjacent_mem_id = INVALID_HEAP_ID,
93 .align = PAGE_SIZE,
94};
95
96static struct ion_co_heap_pdata fw_co_ion_pdata = {
97 .adjacent_mem_id = ION_CP_MM_HEAP_ID,
98 .align = SZ_128K,
99};
100
101static struct ion_platform_data ion_pdata = {
102 .nr = MSM_ION_HEAP_NUM,
103 .heaps = {
104 {
105 .id = ION_SYSTEM_HEAP_ID,
106 .type = ION_HEAP_TYPE_SYSTEM,
107 .name = ION_VMALLOC_HEAP_NAME,
108 },
109 {
110 .id = ION_SF_HEAP_ID,
111 .type = ION_HEAP_TYPE_CARVEOUT,
112 .name = ION_SF_HEAP_NAME,
113 .size = MSM_ION_SF_SIZE,
114 .memory_type = ION_EBI_TYPE,
115 .extra_data = (void *) &co_ion_pdata,
116 },
117 {
118 .id = ION_CP_MM_HEAP_ID,
119 .type = ION_HEAP_TYPE_CP,
120 .name = ION_MM_HEAP_NAME,
121 .size = MSM_ION_MM_SIZE,
122 .memory_type = ION_EBI_TYPE,
123 .extra_data = (void *) &cp_mm_ion_pdata,
124 },
125 {
126 .id = ION_MM_FIRMWARE_HEAP_ID,
127 .type = ION_HEAP_TYPE_CARVEOUT,
128 .name = ION_MM_FIRMWARE_HEAP_NAME,
129 .size = MSM_ION_MM_FW_SIZE,
130 .memory_type = ION_EBI_TYPE,
131 .extra_data = (void *) &fw_co_ion_pdata,
132 },
133 {
134 .id = ION_CP_MFC_HEAP_ID,
135 .type = ION_HEAP_TYPE_CP,
136 .name = ION_MFC_HEAP_NAME,
137 .size = MSM_ION_MFC_SIZE,
138 .memory_type = ION_EBI_TYPE,
139 .extra_data = (void *) &cp_mfc_ion_pdata,
140 },
141 {
142 .id = ION_IOMMU_HEAP_ID,
143 .type = ION_HEAP_TYPE_IOMMU,
144 .name = ION_IOMMU_HEAP_NAME,
145 },
146 {
147 .id = ION_QSECOM_HEAP_ID,
148 .type = ION_HEAP_TYPE_CARVEOUT,
149 .name = ION_QSECOM_HEAP_NAME,
150 .size = MSM_ION_QSECOM_SIZE,
151 .memory_type = ION_EBI_TYPE,
152 .extra_data = (void *) &co_ion_pdata,
153 },
154 {
155 .id = ION_AUDIO_HEAP_ID,
156 .type = ION_HEAP_TYPE_CARVEOUT,
157 .name = ION_AUDIO_HEAP_NAME,
158 .size = MSM_ION_AUDIO_SIZE,
159 .memory_type = ION_EBI_TYPE,
160 .extra_data = (void *) &co_ion_pdata,
161 },
162 }
163};
164
165static struct platform_device ion_dev = {
166 .name = "ion-msm",
167 .id = 1,
168 .dev = { .platform_data = &ion_pdata },
169};
170
171static void reserve_ion_memory(void)
172{
173 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MM_SIZE;
174 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MM_FW_SIZE;
175 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_SF_SIZE;
176 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_MFC_SIZE;
177 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_QSECOM_SIZE;
178 msm_copper_reserve_table[MEMTYPE_EBI1].size += MSM_ION_AUDIO_SIZE;
179#ifdef CONFIG_KERNEL_PMEM_EBI_REGION
180 msm_copper_reserve_table[MEMTYPE_EBI1].size += kernel_ebi1_mem_size;
181#endif
182}
183#endif
184
185static void __init msm_copper_calculate_reserve_sizes(void)
186{
187#ifdef CONFIG_ION_MSM
188 reserve_ion_memory();
189#endif
190}
191
192static struct reserve_info msm_copper_reserve_info __initdata = {
193 .memtype_reserve_table = msm_copper_reserve_table,
194 .calculate_reserve_sizes = msm_copper_calculate_reserve_sizes,
195 .paddr_to_memtype = msm_copper_paddr_to_memtype,
196};
197
198static void __init msm_copper_early_memory(void)
199{
200 reserve_info = &msm_copper_reserve_info;
201}
202
203void __init msm_copper_reserve(void)
204{
205 msm_reserve();
206}
207
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700208static int __init gpiomux_init(void)
209{
210 int rc;
211
212 rc = msm_gpiomux_init(NR_GPIO_IRQS);
213 if (rc) {
214 pr_err("%s: msm_gpiomux_init failed %d\n", __func__, rc);
215 return rc;
216 }
217
218 return 0;
219}
220
221void __init msm_copper_add_devices(void)
222{
Olav Hauganb800c8c2012-01-30 08:50:45 -0800223#ifdef CONFIG_ION_MSM
224 platform_device_register(&ion_dev);
225#endif
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700226}
227
Michael Bohanc7224532012-01-06 16:02:52 -0800228static struct of_device_id irq_match[] __initdata = {
229 { .compatible = "qcom,msm-qgic2", .data = gic_of_init, },
Michael Bohan0425f6f2012-01-17 14:36:39 -0800230 { .compatible = "qcom,msm-gpio", .data = msm_gpio_of_init, },
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700231 {}
232};
233
234void __init msm_copper_init_irq(void)
235{
Michael Bohanc7224532012-01-06 16:02:52 -0800236 of_irq_init(irq_match);
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700237}
238
239static struct clk_lookup msm_clocks_dummy[] = {
Sathish Ambley3d50c762011-10-25 15:26:00 -0700240 CLK_DUMMY("core_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
241 CLK_DUMMY("iface_clk", BLSP2_UART_CLK, "msm_serial_hsl.0", OFF),
Sujit Reddy Thumma1a4a79e2011-11-04 09:44:32 +0530242 CLK_DUMMY("core_clk", SDC1_CLK, NULL, OFF),
243 CLK_DUMMY("iface_clk", SDC1_P_CLK, NULL, OFF),
244 CLK_DUMMY("core_clk", SDC3_CLK, NULL, OFF),
245 CLK_DUMMY("iface_clk", SDC3_P_CLK, NULL, OFF),
Pavankumar Kondeti0063b842012-01-16 12:19:58 +0530246 CLK_DUMMY("phy_clk", NULL, "msm_otg", OFF),
247 CLK_DUMMY("core_clk", NULL, "msm_otg", OFF),
248 CLK_DUMMY("alt_core_clk", NULL, "msm_otg", OFF),
249 CLK_DUMMY("iface_clk", NULL, "msm_otg", OFF),
Yan He1466daa2011-11-30 17:25:38 -0800250 CLK_DUMMY("dfab_clk", DFAB_CLK, NULL, 0),
251 CLK_DUMMY("dma_bam_pclk", DMA_BAM_P_CLK, NULL, 0),
252 CLK_DUMMY("mem_clk", NULL, NULL, 0),
Harini Jayaraman5f98dbb2011-12-20 13:38:19 -0700253 CLK_DUMMY("core_clk", SPI_CLK, "spi_qsd.1", OFF),
254 CLK_DUMMY("iface_clk", SPI_P_CLK, "spi_qsd.1", OFF),
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700255};
256
257struct clock_init_data msm_dummy_clock_init_data __initdata = {
258 .table = msm_clocks_dummy,
259 .size = ARRAY_SIZE(msm_clocks_dummy),
260};
261
262static struct of_dev_auxdata msm_copper_auxdata_lookup[] __initdata = {
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800263 OF_DEV_AUXDATA("qcom,msm-lsuart-v14", 0xF991F000, \
Sathish Ambley3d50c762011-10-25 15:26:00 -0700264 "msm_serial_hsl.0", NULL),
Pavankumar Kondeti0063b842012-01-16 12:19:58 +0530265 OF_DEV_AUXDATA("qcom,hsusb-otg", 0xF9A55000, \
266 "msm_otg", NULL),
Harini Jayaraman5f98dbb2011-12-20 13:38:19 -0700267 OF_DEV_AUXDATA("qcom,spi-qup-v2", 0xF9924000, \
268 "spi_qsd.1", NULL),
Kenneth Heitkef3c829c2012-01-13 17:02:43 -0700269 OF_DEV_AUXDATA("qcom,spmi-pmic-arb", 0xFC4C0000, \
270 "spmi-pmic-arb.0", NULL),
Sathish Ambleyc58afc22011-10-09 21:55:39 -0700271 {}
272};
273
274void __init msm_copper_init(struct of_dev_auxdata **adata)
275{
276 if (gpiomux_init())
277 pr_err("%s: gpiomux_init() failed\n", __func__);
278 msm_clock_init(&msm_dummy_clock_init_data);
279
280 *adata = msm_copper_auxdata_lookup;
281}
Olav Hauganb800c8c2012-01-30 08:50:45 -0800282
283void __init msm_copper_very_early(void)
284{
285 msm_copper_early_memory();
286}