Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/common/fiq_debugger.c |
| 3 | * |
| 4 | * Serial Debugger Interface accessed through an FIQ interrupt. |
| 5 | * |
| 6 | * Copyright (C) 2008 Google, Inc. |
| 7 | * |
| 8 | * This software is licensed under the terms of the GNU General Public |
| 9 | * License version 2, as published by the Free Software Foundation, and |
| 10 | * may be copied, distributed, and modified under those terms. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
| 18 | #include <stdarg.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/io.h> |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 21 | #include <linux/console.h> |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 22 | #include <linux/interrupt.h> |
| 23 | #include <linux/clk.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/kernel_debugger.h> |
| 26 | #include <linux/kernel_stat.h> |
| 27 | #include <linux/irq.h> |
| 28 | #include <linux/delay.h> |
| 29 | #include <linux/sched.h> |
| 30 | #include <linux/slab.h> |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 31 | #include <linux/smp.h> |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 32 | #include <linux/timer.h> |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 33 | #include <linux/tty.h> |
| 34 | #include <linux/tty_flip.h> |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 35 | #include <linux/wakelock.h> |
| 36 | |
| 37 | #include <asm/fiq_debugger.h> |
| 38 | #include <asm/fiq_glue.h> |
| 39 | #include <asm/stacktrace.h> |
| 40 | |
| 41 | #include <mach/system.h> |
| 42 | |
| 43 | #include <linux/uaccess.h> |
| 44 | |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 45 | #include "fiq_debugger_ringbuf.h" |
| 46 | |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 47 | #define DEBUG_MAX 64 |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 48 | #define MAX_UNHANDLED_FIQ_COUNT 1000000 |
| 49 | |
| 50 | #define THREAD_INFO(sp) ((struct thread_info *) \ |
| 51 | ((unsigned long)(sp) & ~(THREAD_SIZE - 1))) |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 52 | |
| 53 | struct fiq_debugger_state { |
| 54 | struct fiq_glue_handler handler; |
| 55 | |
| 56 | int fiq; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 57 | int uart_irq; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 58 | int signal_irq; |
| 59 | int wakeup_irq; |
| 60 | bool wakeup_irq_no_set_wake; |
| 61 | struct clk *clk; |
| 62 | struct fiq_debugger_pdata *pdata; |
| 63 | struct platform_device *pdev; |
| 64 | |
| 65 | char debug_cmd[DEBUG_MAX]; |
| 66 | int debug_busy; |
| 67 | int debug_abort; |
| 68 | |
| 69 | char debug_buf[DEBUG_MAX]; |
| 70 | int debug_count; |
| 71 | |
| 72 | bool no_sleep; |
| 73 | bool debug_enable; |
| 74 | bool ignore_next_wakeup_irq; |
| 75 | struct timer_list sleep_timer; |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 76 | bool uart_enabled; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 77 | struct wake_lock debugger_wake_lock; |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 78 | bool console_enable; |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 79 | int current_cpu; |
| 80 | atomic_t unhandled_fiq_count; |
| 81 | bool in_fiq; |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 82 | |
| 83 | #ifdef CONFIG_FIQ_DEBUGGER_CONSOLE |
| 84 | struct console console; |
| 85 | struct tty_driver *tty_driver; |
| 86 | struct tty_struct *tty; |
| 87 | int tty_open_count; |
| 88 | struct fiq_debugger_ringbuf *tty_rbuf; |
| 89 | #endif |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 90 | |
| 91 | unsigned int last_irqs[NR_IRQS]; |
Rebecca Schultz Zavin | b824eef | 2010-10-22 15:55:17 -0700 | [diff] [blame] | 92 | unsigned int last_local_timer_irqs[NR_CPUS]; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | #ifdef CONFIG_FIQ_DEBUGGER_NO_SLEEP |
| 96 | static bool initial_no_sleep = true; |
| 97 | #else |
| 98 | static bool initial_no_sleep; |
| 99 | #endif |
Dima Zavin | c6fba16 | 2010-11-10 15:39:07 -0800 | [diff] [blame] | 100 | |
| 101 | #ifdef CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE |
| 102 | static bool initial_debug_enable = true; |
| 103 | static bool initial_console_enable = true; |
| 104 | #else |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 105 | static bool initial_debug_enable; |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 106 | static bool initial_console_enable; |
Dima Zavin | c6fba16 | 2010-11-10 15:39:07 -0800 | [diff] [blame] | 107 | #endif |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 108 | |
| 109 | module_param_named(no_sleep, initial_no_sleep, bool, 0644); |
| 110 | module_param_named(debug_enable, initial_debug_enable, bool, 0644); |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 111 | module_param_named(console_enable, initial_console_enable, bool, 0644); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 112 | |
| 113 | #ifdef CONFIG_FIQ_DEBUGGER_WAKEUP_IRQ_ALWAYS_ON |
| 114 | static inline void enable_wakeup_irq(struct fiq_debugger_state *state) {} |
| 115 | static inline void disable_wakeup_irq(struct fiq_debugger_state *state) {} |
| 116 | #else |
| 117 | static inline void enable_wakeup_irq(struct fiq_debugger_state *state) |
| 118 | { |
| 119 | if (state->wakeup_irq < 0) |
| 120 | return; |
| 121 | enable_irq(state->wakeup_irq); |
| 122 | if (!state->wakeup_irq_no_set_wake) |
| 123 | enable_irq_wake(state->wakeup_irq); |
| 124 | } |
| 125 | static inline void disable_wakeup_irq(struct fiq_debugger_state *state) |
| 126 | { |
| 127 | if (state->wakeup_irq < 0) |
| 128 | return; |
| 129 | disable_irq_nosync(state->wakeup_irq); |
| 130 | if (!state->wakeup_irq_no_set_wake) |
| 131 | disable_irq_wake(state->wakeup_irq); |
| 132 | } |
| 133 | #endif |
| 134 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 135 | static bool inline debug_have_fiq(struct fiq_debugger_state *state) |
| 136 | { |
| 137 | return (state->fiq >= 0); |
| 138 | } |
| 139 | |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 140 | static void debug_force_irq(struct fiq_debugger_state *state) |
| 141 | { |
| 142 | unsigned int irq = state->signal_irq; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 143 | |
| 144 | if (WARN_ON(!debug_have_fiq(state))) |
| 145 | return; |
| 146 | if (state->pdata->force_irq) { |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 147 | state->pdata->force_irq(state->pdev, irq); |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 148 | } else { |
Colin Cross | 999853b | 2011-04-08 17:26:06 -0700 | [diff] [blame] | 149 | struct irq_chip *chip = irq_get_chip(irq); |
| 150 | if (chip && chip->irq_retrigger) |
| 151 | chip->irq_retrigger(irq_get_irq_data(irq)); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 152 | } |
| 153 | } |
| 154 | |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 155 | static void debug_uart_enable(struct fiq_debugger_state *state) |
| 156 | { |
| 157 | if (state->clk) |
| 158 | clk_enable(state->clk); |
| 159 | if (state->pdata->uart_enable) |
| 160 | state->pdata->uart_enable(state->pdev); |
| 161 | } |
| 162 | |
| 163 | static void debug_uart_disable(struct fiq_debugger_state *state) |
| 164 | { |
| 165 | if (state->pdata->uart_disable) |
| 166 | state->pdata->uart_disable(state->pdev); |
| 167 | if (state->clk) |
| 168 | clk_disable(state->clk); |
| 169 | } |
| 170 | |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 171 | static void debug_uart_flush(struct fiq_debugger_state *state) |
| 172 | { |
| 173 | if (state->pdata->uart_flush) |
| 174 | state->pdata->uart_flush(state->pdev); |
| 175 | } |
| 176 | |
| 177 | static void debug_puts(struct fiq_debugger_state *state, char *s) |
| 178 | { |
| 179 | unsigned c; |
| 180 | while ((c = *s++)) { |
| 181 | if (c == '\n') |
| 182 | state->pdata->uart_putc(state->pdev, '\r'); |
| 183 | state->pdata->uart_putc(state->pdev, c); |
| 184 | } |
| 185 | } |
| 186 | |
| 187 | static void debug_prompt(struct fiq_debugger_state *state) |
| 188 | { |
| 189 | debug_puts(state, "debug> "); |
| 190 | } |
| 191 | |
| 192 | int log_buf_copy(char *dest, int idx, int len); |
| 193 | static void dump_kernel_log(struct fiq_debugger_state *state) |
| 194 | { |
| 195 | char buf[1024]; |
| 196 | int idx = 0; |
| 197 | int ret; |
| 198 | int saved_oip; |
| 199 | |
| 200 | /* setting oops_in_progress prevents log_buf_copy() |
| 201 | * from trying to take a spinlock which will make it |
| 202 | * very unhappy in some cases... |
| 203 | */ |
| 204 | saved_oip = oops_in_progress; |
| 205 | oops_in_progress = 1; |
| 206 | for (;;) { |
| 207 | ret = log_buf_copy(buf, idx, 1023); |
| 208 | if (ret <= 0) |
| 209 | break; |
| 210 | buf[ret] = 0; |
| 211 | debug_puts(state, buf); |
| 212 | idx += ret; |
| 213 | } |
| 214 | oops_in_progress = saved_oip; |
| 215 | } |
| 216 | |
| 217 | static char *mode_name(unsigned cpsr) |
| 218 | { |
| 219 | switch (cpsr & MODE_MASK) { |
| 220 | case USR_MODE: return "USR"; |
| 221 | case FIQ_MODE: return "FIQ"; |
| 222 | case IRQ_MODE: return "IRQ"; |
| 223 | case SVC_MODE: return "SVC"; |
| 224 | case ABT_MODE: return "ABT"; |
| 225 | case UND_MODE: return "UND"; |
| 226 | case SYSTEM_MODE: return "SYS"; |
| 227 | default: return "???"; |
| 228 | } |
| 229 | } |
| 230 | |
| 231 | static int debug_printf(void *cookie, const char *fmt, ...) |
| 232 | { |
| 233 | struct fiq_debugger_state *state = cookie; |
| 234 | char buf[256]; |
| 235 | va_list ap; |
| 236 | |
| 237 | va_start(ap, fmt); |
| 238 | vsnprintf(buf, sizeof(buf), fmt, ap); |
| 239 | va_end(ap); |
| 240 | |
| 241 | debug_puts(state, buf); |
| 242 | return state->debug_abort; |
| 243 | } |
| 244 | |
| 245 | /* Safe outside fiq context */ |
| 246 | static int debug_printf_nfiq(void *cookie, const char *fmt, ...) |
| 247 | { |
| 248 | struct fiq_debugger_state *state = cookie; |
| 249 | char buf[256]; |
| 250 | va_list ap; |
| 251 | unsigned long irq_flags; |
| 252 | |
| 253 | va_start(ap, fmt); |
| 254 | vsnprintf(buf, 128, fmt, ap); |
| 255 | va_end(ap); |
| 256 | |
| 257 | local_irq_save(irq_flags); |
| 258 | debug_puts(state, buf); |
| 259 | debug_uart_flush(state); |
| 260 | local_irq_restore(irq_flags); |
| 261 | return state->debug_abort; |
| 262 | } |
| 263 | |
| 264 | static void dump_regs(struct fiq_debugger_state *state, unsigned *regs) |
| 265 | { |
| 266 | debug_printf(state, " r0 %08x r1 %08x r2 %08x r3 %08x\n", |
| 267 | regs[0], regs[1], regs[2], regs[3]); |
| 268 | debug_printf(state, " r4 %08x r5 %08x r6 %08x r7 %08x\n", |
| 269 | regs[4], regs[5], regs[6], regs[7]); |
| 270 | debug_printf(state, " r8 %08x r9 %08x r10 %08x r11 %08x mode %s\n", |
| 271 | regs[8], regs[9], regs[10], regs[11], |
| 272 | mode_name(regs[16])); |
| 273 | if ((regs[16] & MODE_MASK) == USR_MODE) |
| 274 | debug_printf(state, " ip %08x sp %08x lr %08x pc %08x " |
| 275 | "cpsr %08x\n", regs[12], regs[13], regs[14], |
| 276 | regs[15], regs[16]); |
| 277 | else |
| 278 | debug_printf(state, " ip %08x sp %08x lr %08x pc %08x " |
| 279 | "cpsr %08x spsr %08x\n", regs[12], regs[13], |
| 280 | regs[14], regs[15], regs[16], regs[17]); |
| 281 | } |
| 282 | |
| 283 | struct mode_regs { |
| 284 | unsigned long sp_svc; |
| 285 | unsigned long lr_svc; |
| 286 | unsigned long spsr_svc; |
| 287 | |
| 288 | unsigned long sp_abt; |
| 289 | unsigned long lr_abt; |
| 290 | unsigned long spsr_abt; |
| 291 | |
| 292 | unsigned long sp_und; |
| 293 | unsigned long lr_und; |
| 294 | unsigned long spsr_und; |
| 295 | |
| 296 | unsigned long sp_irq; |
| 297 | unsigned long lr_irq; |
| 298 | unsigned long spsr_irq; |
| 299 | |
| 300 | unsigned long r8_fiq; |
| 301 | unsigned long r9_fiq; |
| 302 | unsigned long r10_fiq; |
| 303 | unsigned long r11_fiq; |
| 304 | unsigned long r12_fiq; |
| 305 | unsigned long sp_fiq; |
| 306 | unsigned long lr_fiq; |
| 307 | unsigned long spsr_fiq; |
| 308 | }; |
| 309 | |
| 310 | void __naked get_mode_regs(struct mode_regs *regs) |
| 311 | { |
| 312 | asm volatile ( |
| 313 | "mrs r1, cpsr\n" |
| 314 | "msr cpsr_c, #0xd3 @(SVC_MODE | PSR_I_BIT | PSR_F_BIT)\n" |
| 315 | "stmia r0!, {r13 - r14}\n" |
| 316 | "mrs r2, spsr\n" |
| 317 | "msr cpsr_c, #0xd7 @(ABT_MODE | PSR_I_BIT | PSR_F_BIT)\n" |
| 318 | "stmia r0!, {r2, r13 - r14}\n" |
| 319 | "mrs r2, spsr\n" |
| 320 | "msr cpsr_c, #0xdb @(UND_MODE | PSR_I_BIT | PSR_F_BIT)\n" |
| 321 | "stmia r0!, {r2, r13 - r14}\n" |
| 322 | "mrs r2, spsr\n" |
| 323 | "msr cpsr_c, #0xd2 @(IRQ_MODE | PSR_I_BIT | PSR_F_BIT)\n" |
| 324 | "stmia r0!, {r2, r13 - r14}\n" |
| 325 | "mrs r2, spsr\n" |
| 326 | "msr cpsr_c, #0xd1 @(FIQ_MODE | PSR_I_BIT | PSR_F_BIT)\n" |
| 327 | "stmia r0!, {r2, r8 - r14}\n" |
| 328 | "mrs r2, spsr\n" |
| 329 | "stmia r0!, {r2}\n" |
| 330 | "msr cpsr_c, r1\n" |
| 331 | "bx lr\n"); |
| 332 | } |
| 333 | |
| 334 | |
| 335 | static void dump_allregs(struct fiq_debugger_state *state, unsigned *regs) |
| 336 | { |
| 337 | struct mode_regs mode_regs; |
| 338 | dump_regs(state, regs); |
| 339 | get_mode_regs(&mode_regs); |
| 340 | debug_printf(state, " svc: sp %08x lr %08x spsr %08x\n", |
| 341 | mode_regs.sp_svc, mode_regs.lr_svc, mode_regs.spsr_svc); |
| 342 | debug_printf(state, " abt: sp %08x lr %08x spsr %08x\n", |
| 343 | mode_regs.sp_abt, mode_regs.lr_abt, mode_regs.spsr_abt); |
| 344 | debug_printf(state, " und: sp %08x lr %08x spsr %08x\n", |
| 345 | mode_regs.sp_und, mode_regs.lr_und, mode_regs.spsr_und); |
| 346 | debug_printf(state, " irq: sp %08x lr %08x spsr %08x\n", |
| 347 | mode_regs.sp_irq, mode_regs.lr_irq, mode_regs.spsr_irq); |
| 348 | debug_printf(state, " fiq: r8 %08x r9 %08x r10 %08x r11 %08x " |
| 349 | "r12 %08x\n", |
| 350 | mode_regs.r8_fiq, mode_regs.r9_fiq, mode_regs.r10_fiq, |
| 351 | mode_regs.r11_fiq, mode_regs.r12_fiq); |
| 352 | debug_printf(state, " fiq: sp %08x lr %08x spsr %08x\n", |
| 353 | mode_regs.sp_fiq, mode_regs.lr_fiq, mode_regs.spsr_fiq); |
| 354 | } |
| 355 | |
| 356 | static void dump_irqs(struct fiq_debugger_state *state) |
| 357 | { |
| 358 | int n; |
Rebecca Schultz Zavin | b824eef | 2010-10-22 15:55:17 -0700 | [diff] [blame] | 359 | unsigned int cpu; |
| 360 | |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 361 | debug_printf(state, "irqnr total since-last status name\n"); |
| 362 | for (n = 0; n < NR_IRQS; n++) { |
| 363 | struct irqaction *act = irq_desc[n].action; |
| 364 | if (!act && !kstat_irqs(n)) |
| 365 | continue; |
| 366 | debug_printf(state, "%5d: %10u %11u %8x %s\n", n, |
| 367 | kstat_irqs(n), |
| 368 | kstat_irqs(n) - state->last_irqs[n], |
Colin Cross | 999853b | 2011-04-08 17:26:06 -0700 | [diff] [blame] | 369 | irq_desc[n].status_use_accessors, |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 370 | (act && act->name) ? act->name : "???"); |
| 371 | state->last_irqs[n] = kstat_irqs(n); |
| 372 | } |
Rebecca Schultz Zavin | b824eef | 2010-10-22 15:55:17 -0700 | [diff] [blame] | 373 | |
| 374 | for (cpu = 0; cpu < NR_CPUS; cpu++) { |
| 375 | |
| 376 | debug_printf(state, "LOC %d: %10u %11u\n", cpu, |
| 377 | __IRQ_STAT(cpu, local_timer_irqs), |
| 378 | __IRQ_STAT(cpu, local_timer_irqs) - |
| 379 | state->last_local_timer_irqs[cpu]); |
| 380 | state->last_local_timer_irqs[cpu] = |
| 381 | __IRQ_STAT(cpu, local_timer_irqs); |
| 382 | } |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 383 | } |
| 384 | |
| 385 | struct stacktrace_state { |
| 386 | struct fiq_debugger_state *state; |
| 387 | unsigned int depth; |
| 388 | }; |
| 389 | |
| 390 | static int report_trace(struct stackframe *frame, void *d) |
| 391 | { |
| 392 | struct stacktrace_state *sts = d; |
| 393 | |
| 394 | if (sts->depth) { |
| 395 | debug_printf(sts->state, |
| 396 | " pc: %p (%pF), lr %p (%pF), sp %p, fp %p\n", |
| 397 | frame->pc, frame->pc, frame->lr, frame->lr, |
| 398 | frame->sp, frame->fp); |
| 399 | sts->depth--; |
| 400 | return 0; |
| 401 | } |
| 402 | debug_printf(sts->state, " ...\n"); |
| 403 | |
| 404 | return sts->depth == 0; |
| 405 | } |
| 406 | |
| 407 | struct frame_tail { |
| 408 | struct frame_tail *fp; |
| 409 | unsigned long sp; |
| 410 | unsigned long lr; |
| 411 | } __attribute__((packed)); |
| 412 | |
| 413 | static struct frame_tail *user_backtrace(struct fiq_debugger_state *state, |
| 414 | struct frame_tail *tail) |
| 415 | { |
| 416 | struct frame_tail buftail[2]; |
| 417 | |
| 418 | /* Also check accessibility of one struct frame_tail beyond */ |
| 419 | if (!access_ok(VERIFY_READ, tail, sizeof(buftail))) { |
| 420 | debug_printf(state, " invalid frame pointer %p\n", tail); |
| 421 | return NULL; |
| 422 | } |
| 423 | if (__copy_from_user_inatomic(buftail, tail, sizeof(buftail))) { |
| 424 | debug_printf(state, |
| 425 | " failed to copy frame pointer %p\n", tail); |
| 426 | return NULL; |
| 427 | } |
| 428 | |
| 429 | debug_printf(state, " %p\n", buftail[0].lr); |
| 430 | |
| 431 | /* frame pointers should strictly progress back up the stack |
| 432 | * (towards higher addresses) */ |
| 433 | if (tail >= buftail[0].fp) |
| 434 | return NULL; |
| 435 | |
| 436 | return buftail[0].fp-1; |
| 437 | } |
| 438 | |
| 439 | void dump_stacktrace(struct fiq_debugger_state *state, |
| 440 | struct pt_regs * const regs, unsigned int depth, void *ssp) |
| 441 | { |
| 442 | struct frame_tail *tail; |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 443 | struct thread_info *real_thread_info = THREAD_INFO(ssp); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 444 | struct stacktrace_state sts; |
| 445 | |
| 446 | sts.depth = depth; |
| 447 | sts.state = state; |
| 448 | *current_thread_info() = *real_thread_info; |
| 449 | |
| 450 | if (!current) |
| 451 | debug_printf(state, "current NULL\n"); |
| 452 | else |
| 453 | debug_printf(state, "pid: %d comm: %s\n", |
| 454 | current->pid, current->comm); |
| 455 | dump_regs(state, (unsigned *)regs); |
| 456 | |
| 457 | if (!user_mode(regs)) { |
| 458 | struct stackframe frame; |
| 459 | frame.fp = regs->ARM_fp; |
| 460 | frame.sp = regs->ARM_sp; |
| 461 | frame.lr = regs->ARM_lr; |
| 462 | frame.pc = regs->ARM_pc; |
| 463 | debug_printf(state, |
| 464 | " pc: %p (%pF), lr %p (%pF), sp %p, fp %p\n", |
| 465 | regs->ARM_pc, regs->ARM_pc, regs->ARM_lr, regs->ARM_lr, |
| 466 | regs->ARM_sp, regs->ARM_fp); |
| 467 | walk_stackframe(&frame, report_trace, &sts); |
| 468 | return; |
| 469 | } |
| 470 | |
| 471 | tail = ((struct frame_tail *) regs->ARM_fp) - 1; |
| 472 | while (depth-- && tail && !((unsigned long) tail & 3)) |
| 473 | tail = user_backtrace(state, tail); |
| 474 | } |
| 475 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 476 | static bool debug_help(struct fiq_debugger_state *state) |
Dmitry Shmidt | 5eed1db | 2010-11-16 15:40:13 -0800 | [diff] [blame] | 477 | { |
| 478 | debug_printf(state, "FIQ Debugger commands:\n" |
| 479 | " pc PC status\n" |
| 480 | " regs Register dump\n" |
| 481 | " allregs Extended Register dump\n" |
| 482 | " bt Stack trace\n" |
| 483 | " reboot Reboot\n" |
| 484 | " irqs Interupt status\n" |
| 485 | " kmsg Kernel log\n" |
| 486 | " version Kernel version\n"); |
| 487 | debug_printf(state, " sleep Allow sleep while in FIQ\n" |
| 488 | " nosleep Disable sleep while in FIQ\n" |
| 489 | " console Switch terminal to console\n" |
| 490 | " cpu Current CPU\n" |
| 491 | " cpu <number> Switch to CPU<number>\n"); |
| 492 | if (!state->debug_busy) { |
| 493 | strcpy(state->debug_cmd, "help"); |
| 494 | state->debug_busy = 1; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 495 | return true; |
Dmitry Shmidt | 5eed1db | 2010-11-16 15:40:13 -0800 | [diff] [blame] | 496 | } |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 497 | |
| 498 | return false; |
Dmitry Shmidt | 5eed1db | 2010-11-16 15:40:13 -0800 | [diff] [blame] | 499 | } |
| 500 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 501 | static void take_affinity(void *info) |
| 502 | { |
| 503 | struct fiq_debugger_state *state = info; |
| 504 | struct cpumask cpumask; |
| 505 | |
| 506 | cpumask_clear(&cpumask); |
| 507 | cpumask_set_cpu(get_cpu(), &cpumask); |
| 508 | |
| 509 | irq_set_affinity(state->uart_irq, &cpumask); |
| 510 | } |
| 511 | |
| 512 | static void switch_cpu(struct fiq_debugger_state *state, int cpu) |
| 513 | { |
| 514 | if (!debug_have_fiq(state)) |
| 515 | smp_call_function_single(cpu, take_affinity, state, false); |
| 516 | state->current_cpu = cpu; |
| 517 | } |
| 518 | |
| 519 | static bool debug_exec(struct fiq_debugger_state *state, |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 520 | const char *cmd, unsigned *regs, void *svc_sp) |
| 521 | { |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 522 | bool signal_helper = false; |
| 523 | |
Dmitry Shmidt | 5eed1db | 2010-11-16 15:40:13 -0800 | [diff] [blame] | 524 | if (!strcmp(cmd, "help") || !strcmp(cmd, "?")) { |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 525 | signal_helper |= debug_help(state); |
Dmitry Shmidt | 5eed1db | 2010-11-16 15:40:13 -0800 | [diff] [blame] | 526 | } else if (!strcmp(cmd, "pc")) { |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 527 | debug_printf(state, " pc %08x cpsr %08x mode %s\n", |
| 528 | regs[15], regs[16], mode_name(regs[16])); |
| 529 | } else if (!strcmp(cmd, "regs")) { |
| 530 | dump_regs(state, regs); |
| 531 | } else if (!strcmp(cmd, "allregs")) { |
| 532 | dump_allregs(state, regs); |
| 533 | } else if (!strcmp(cmd, "bt")) { |
| 534 | dump_stacktrace(state, (struct pt_regs *)regs, 100, svc_sp); |
| 535 | } else if (!strcmp(cmd, "reboot")) { |
| 536 | arch_reset(0, 0); |
| 537 | } else if (!strcmp(cmd, "irqs")) { |
| 538 | dump_irqs(state); |
| 539 | } else if (!strcmp(cmd, "kmsg")) { |
| 540 | dump_kernel_log(state); |
| 541 | } else if (!strcmp(cmd, "version")) { |
| 542 | debug_printf(state, "%s\n", linux_banner); |
| 543 | } else if (!strcmp(cmd, "sleep")) { |
| 544 | state->no_sleep = false; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 545 | debug_printf(state, "enabling sleep\n"); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 546 | } else if (!strcmp(cmd, "nosleep")) { |
| 547 | state->no_sleep = true; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 548 | debug_printf(state, "disabling sleep\n"); |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 549 | } else if (!strcmp(cmd, "console")) { |
| 550 | state->console_enable = true; |
| 551 | debug_printf(state, "console mode\n"); |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 552 | } else if (!strcmp(cmd, "cpu")) { |
| 553 | debug_printf(state, "cpu %d\n", state->current_cpu); |
| 554 | } else if (!strncmp(cmd, "cpu ", 4)) { |
| 555 | unsigned long cpu = 0; |
| 556 | if (strict_strtoul(cmd + 4, 10, &cpu) == 0) |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 557 | switch_cpu(state, cpu); |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 558 | else |
| 559 | debug_printf(state, "invalid cpu\n"); |
| 560 | debug_printf(state, "cpu %d\n", state->current_cpu); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 561 | } else { |
| 562 | if (state->debug_busy) { |
| 563 | debug_printf(state, |
| 564 | "command processor busy. trying to abort.\n"); |
| 565 | state->debug_abort = -1; |
| 566 | } else { |
| 567 | strcpy(state->debug_cmd, cmd); |
| 568 | state->debug_busy = 1; |
| 569 | } |
| 570 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 571 | return true; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 572 | } |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 573 | if (!state->console_enable) |
| 574 | debug_prompt(state); |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 575 | |
| 576 | return signal_helper; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 577 | } |
| 578 | |
| 579 | static void sleep_timer_expired(unsigned long data) |
| 580 | { |
| 581 | struct fiq_debugger_state *state = (struct fiq_debugger_state *)data; |
| 582 | |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 583 | if (state->uart_enabled && !state->no_sleep) { |
Dima Zavin | 48ef31a | 2011-10-09 11:47:35 -0700 | [diff] [blame] | 584 | if (state->debug_enable && !state->console_enable) { |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 585 | state->debug_enable = false; |
| 586 | debug_printf_nfiq(state, "suspending fiq debugger\n"); |
| 587 | } |
| 588 | state->ignore_next_wakeup_irq = true; |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 589 | debug_uart_disable(state); |
| 590 | state->uart_enabled = false; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 591 | enable_wakeup_irq(state); |
| 592 | } |
| 593 | wake_unlock(&state->debugger_wake_lock); |
| 594 | } |
| 595 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 596 | static void handle_wakeup(struct fiq_debugger_state *state) |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 597 | { |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 598 | if (state->wakeup_irq >= 0 && state->ignore_next_wakeup_irq) { |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 599 | state->ignore_next_wakeup_irq = false; |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 600 | } else if (!state->uart_enabled) { |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 601 | wake_lock(&state->debugger_wake_lock); |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 602 | debug_uart_enable(state); |
| 603 | state->uart_enabled = true; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 604 | disable_wakeup_irq(state); |
| 605 | mod_timer(&state->sleep_timer, jiffies + HZ / 2); |
| 606 | } |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 607 | } |
| 608 | |
| 609 | static irqreturn_t wakeup_irq_handler(int irq, void *dev) |
| 610 | { |
| 611 | struct fiq_debugger_state *state = dev; |
| 612 | |
| 613 | if (!state->no_sleep) |
| 614 | debug_puts(state, "WAKEUP\n"); |
| 615 | handle_wakeup(state); |
| 616 | |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 617 | return IRQ_HANDLED; |
| 618 | } |
| 619 | |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 620 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 621 | static void debug_handle_irq_context(struct fiq_debugger_state *state) |
| 622 | { |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 623 | if (!state->no_sleep) { |
| 624 | wake_lock(&state->debugger_wake_lock); |
| 625 | mod_timer(&state->sleep_timer, jiffies + HZ * 5); |
| 626 | } |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 627 | #if defined(CONFIG_FIQ_DEBUGGER_CONSOLE) |
| 628 | if (state->tty) { |
| 629 | int i; |
| 630 | int count = fiq_debugger_ringbuf_level(state->tty_rbuf); |
| 631 | for (i = 0; i < count; i++) { |
Dima Zavin | b009275 | 2011-10-25 21:24:10 -0700 | [diff] [blame] | 632 | int c = fiq_debugger_ringbuf_peek(state->tty_rbuf, 0); |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 633 | tty_insert_flip_char(state->tty, c, TTY_NORMAL); |
| 634 | if (!fiq_debugger_ringbuf_consume(state->tty_rbuf, 1)) |
| 635 | pr_warn("fiq tty failed to consume byte\n"); |
| 636 | } |
| 637 | tty_flip_buffer_push(state->tty); |
| 638 | } |
| 639 | #endif |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 640 | if (state->debug_busy) { |
| 641 | struct kdbg_ctxt ctxt; |
| 642 | |
| 643 | ctxt.printf = debug_printf_nfiq; |
| 644 | ctxt.cookie = state; |
| 645 | kernel_debugger(&ctxt, state->debug_cmd); |
| 646 | debug_prompt(state); |
| 647 | |
| 648 | state->debug_busy = 0; |
| 649 | } |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 650 | } |
| 651 | |
| 652 | static int debug_getc(struct fiq_debugger_state *state) |
| 653 | { |
| 654 | return state->pdata->uart_getc(state->pdev); |
| 655 | } |
| 656 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 657 | static bool debug_handle_uart_interrupt(struct fiq_debugger_state *state, |
| 658 | int this_cpu, void *regs, void *svc_sp) |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 659 | { |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 660 | int c; |
| 661 | static int last_c; |
| 662 | int count = 0; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 663 | bool signal_helper = false; |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 664 | |
| 665 | if (this_cpu != state->current_cpu) { |
| 666 | if (state->in_fiq) |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 667 | return false; |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 668 | |
| 669 | if (atomic_inc_return(&state->unhandled_fiq_count) != |
| 670 | MAX_UNHANDLED_FIQ_COUNT) |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 671 | return false; |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 672 | |
| 673 | debug_printf(state, "fiq_debugger: cpu %d not responding, " |
| 674 | "reverting to cpu %d\n", state->current_cpu, |
| 675 | this_cpu); |
| 676 | |
| 677 | atomic_set(&state->unhandled_fiq_count, 0); |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 678 | switch_cpu(state, this_cpu); |
| 679 | return false; |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 680 | } |
| 681 | |
| 682 | state->in_fiq = true; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 683 | |
| 684 | while ((c = debug_getc(state)) != FIQ_DEBUGGER_NO_CHAR) { |
| 685 | count++; |
| 686 | if (!state->debug_enable) { |
| 687 | if ((c == 13) || (c == 10)) { |
| 688 | state->debug_enable = true; |
| 689 | state->debug_count = 0; |
| 690 | debug_prompt(state); |
| 691 | } |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 692 | } else if (c == FIQ_DEBUGGER_BREAK) { |
| 693 | state->console_enable = false; |
| 694 | debug_puts(state, "fiq debugger mode\n"); |
| 695 | state->debug_count = 0; |
| 696 | debug_prompt(state); |
| 697 | #ifdef CONFIG_FIQ_DEBUGGER_CONSOLE |
| 698 | } else if (state->console_enable && state->tty_rbuf) { |
| 699 | fiq_debugger_ringbuf_push(state->tty_rbuf, c); |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 700 | signal_helper = true; |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 701 | #endif |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 702 | } else if ((c >= ' ') && (c < 127)) { |
| 703 | if (state->debug_count < (DEBUG_MAX - 1)) { |
| 704 | state->debug_buf[state->debug_count++] = c; |
| 705 | state->pdata->uart_putc(state->pdev, c); |
| 706 | } |
| 707 | } else if ((c == 8) || (c == 127)) { |
| 708 | if (state->debug_count > 0) { |
| 709 | state->debug_count--; |
| 710 | state->pdata->uart_putc(state->pdev, 8); |
| 711 | state->pdata->uart_putc(state->pdev, ' '); |
| 712 | state->pdata->uart_putc(state->pdev, 8); |
| 713 | } |
| 714 | } else if ((c == 13) || (c == 10)) { |
| 715 | if (c == '\r' || (c == '\n' && last_c != '\r')) { |
| 716 | state->pdata->uart_putc(state->pdev, '\r'); |
| 717 | state->pdata->uart_putc(state->pdev, '\n'); |
| 718 | } |
| 719 | if (state->debug_count) { |
| 720 | state->debug_buf[state->debug_count] = 0; |
| 721 | state->debug_count = 0; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 722 | signal_helper |= |
| 723 | debug_exec(state, state->debug_buf, |
| 724 | regs, svc_sp); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 725 | } else { |
| 726 | debug_prompt(state); |
| 727 | } |
| 728 | } |
| 729 | last_c = c; |
| 730 | } |
| 731 | debug_uart_flush(state); |
| 732 | if (state->pdata->fiq_ack) |
| 733 | state->pdata->fiq_ack(state->pdev, state->fiq); |
| 734 | |
| 735 | /* poke sleep timer if necessary */ |
| 736 | if (state->debug_enable && !state->no_sleep) |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 737 | signal_helper = true; |
Colin Cross | 24b3bd4 | 2010-10-01 23:41:38 -0700 | [diff] [blame] | 738 | |
| 739 | atomic_set(&state->unhandled_fiq_count, 0); |
| 740 | state->in_fiq = false; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 741 | |
| 742 | return signal_helper; |
| 743 | } |
| 744 | |
| 745 | static void debug_fiq(struct fiq_glue_handler *h, void *regs, void *svc_sp) |
| 746 | { |
| 747 | struct fiq_debugger_state *state = |
| 748 | container_of(h, struct fiq_debugger_state, handler); |
| 749 | unsigned int this_cpu = THREAD_INFO(svc_sp)->cpu; |
| 750 | bool need_irq; |
| 751 | |
| 752 | need_irq = debug_handle_uart_interrupt(state, this_cpu, regs, svc_sp); |
| 753 | if (need_irq) |
| 754 | debug_force_irq(state); |
| 755 | } |
| 756 | |
| 757 | /* |
| 758 | * When not using FIQs, we only use this single interrupt as an entry point. |
| 759 | * This just effectively takes over the UART interrupt and does all the work |
| 760 | * in this context. |
| 761 | */ |
| 762 | static irqreturn_t debug_uart_irq(int irq, void *dev) |
| 763 | { |
| 764 | struct fiq_debugger_state *state = dev; |
| 765 | bool not_done; |
| 766 | |
| 767 | handle_wakeup(state); |
| 768 | |
| 769 | /* handle the debugger irq in regular context */ |
| 770 | not_done = debug_handle_uart_interrupt(state, smp_processor_id(), |
| 771 | get_irq_regs(), |
| 772 | current_thread_info()); |
| 773 | if (not_done) |
| 774 | debug_handle_irq_context(state); |
| 775 | |
| 776 | return IRQ_HANDLED; |
| 777 | } |
| 778 | |
| 779 | /* |
| 780 | * If FIQs are used, not everything can happen in fiq context. |
| 781 | * FIQ handler does what it can and then signals this interrupt to finish the |
| 782 | * job in irq context. |
| 783 | */ |
| 784 | static irqreturn_t debug_signal_irq(int irq, void *dev) |
| 785 | { |
| 786 | struct fiq_debugger_state *state = dev; |
| 787 | |
| 788 | if (state->pdata->force_irq_ack) |
| 789 | state->pdata->force_irq_ack(state->pdev, state->signal_irq); |
| 790 | |
| 791 | debug_handle_irq_context(state); |
| 792 | |
| 793 | return IRQ_HANDLED; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 794 | } |
| 795 | |
| 796 | static void debug_resume(struct fiq_glue_handler *h) |
| 797 | { |
| 798 | struct fiq_debugger_state *state = |
| 799 | container_of(h, struct fiq_debugger_state, handler); |
| 800 | if (state->pdata->uart_resume) |
| 801 | state->pdata->uart_resume(state->pdev); |
| 802 | } |
| 803 | |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 804 | #if defined(CONFIG_FIQ_DEBUGGER_CONSOLE) |
| 805 | struct tty_driver *debug_console_device(struct console *co, int *index) |
| 806 | { |
| 807 | struct fiq_debugger_state *state; |
| 808 | state = container_of(co, struct fiq_debugger_state, console); |
| 809 | *index = 0; |
| 810 | return state->tty_driver; |
| 811 | } |
| 812 | |
| 813 | static void debug_console_write(struct console *co, |
| 814 | const char *s, unsigned int count) |
| 815 | { |
| 816 | struct fiq_debugger_state *state; |
| 817 | |
| 818 | state = container_of(co, struct fiq_debugger_state, console); |
| 819 | |
| 820 | if (!state->console_enable) |
| 821 | return; |
| 822 | |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 823 | debug_uart_enable(state); |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 824 | while (count--) { |
| 825 | if (*s == '\n') |
| 826 | state->pdata->uart_putc(state->pdev, '\r'); |
| 827 | state->pdata->uart_putc(state->pdev, *s++); |
| 828 | } |
| 829 | debug_uart_flush(state); |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 830 | debug_uart_disable(state); |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 831 | } |
| 832 | |
| 833 | static struct console fiq_debugger_console = { |
| 834 | .name = "ttyFIQ", |
| 835 | .device = debug_console_device, |
| 836 | .write = debug_console_write, |
| 837 | .flags = CON_PRINTBUFFER | CON_ANYTIME | CON_ENABLED, |
| 838 | }; |
| 839 | |
| 840 | int fiq_tty_open(struct tty_struct *tty, struct file *filp) |
| 841 | { |
| 842 | struct fiq_debugger_state *state = tty->driver->driver_state; |
| 843 | if (state->tty_open_count++) |
| 844 | return 0; |
| 845 | |
| 846 | tty->driver_data = state; |
| 847 | state->tty = tty; |
| 848 | return 0; |
| 849 | } |
| 850 | |
| 851 | void fiq_tty_close(struct tty_struct *tty, struct file *filp) |
| 852 | { |
| 853 | struct fiq_debugger_state *state = tty->driver_data; |
| 854 | if (--state->tty_open_count) |
| 855 | return; |
| 856 | state->tty = NULL; |
| 857 | } |
| 858 | |
| 859 | int fiq_tty_write(struct tty_struct *tty, const unsigned char *buf, int count) |
| 860 | { |
| 861 | int i; |
| 862 | struct fiq_debugger_state *state = tty->driver_data; |
| 863 | |
| 864 | if (!state->console_enable) |
| 865 | return count; |
| 866 | |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 867 | debug_uart_enable(state); |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 868 | for (i = 0; i < count; i++) |
| 869 | state->pdata->uart_putc(state->pdev, *buf++); |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 870 | debug_uart_disable(state); |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 871 | |
| 872 | return count; |
| 873 | } |
| 874 | |
| 875 | int fiq_tty_write_room(struct tty_struct *tty) |
| 876 | { |
| 877 | return 1024; |
| 878 | } |
| 879 | |
| 880 | static const struct tty_operations fiq_tty_driver_ops = { |
| 881 | .write = fiq_tty_write, |
| 882 | .write_room = fiq_tty_write_room, |
| 883 | .open = fiq_tty_open, |
| 884 | .close = fiq_tty_close, |
| 885 | }; |
| 886 | |
| 887 | static int fiq_debugger_tty_init(struct fiq_debugger_state *state) |
| 888 | { |
| 889 | int ret = -EINVAL; |
| 890 | |
| 891 | state->tty_driver = alloc_tty_driver(1); |
| 892 | if (!state->tty_driver) { |
| 893 | pr_err("Failed to allocate fiq debugger tty\n"); |
| 894 | return -ENOMEM; |
| 895 | } |
| 896 | |
| 897 | state->tty_driver->owner = THIS_MODULE; |
| 898 | state->tty_driver->driver_name = "fiq-debugger"; |
| 899 | state->tty_driver->name = "ttyFIQ"; |
| 900 | state->tty_driver->type = TTY_DRIVER_TYPE_SERIAL; |
| 901 | state->tty_driver->subtype = SERIAL_TYPE_NORMAL; |
| 902 | state->tty_driver->init_termios = tty_std_termios; |
| 903 | state->tty_driver->init_termios.c_cflag = |
| 904 | B115200 | CS8 | CREAD | HUPCL | CLOCAL; |
| 905 | state->tty_driver->init_termios.c_ispeed = |
| 906 | state->tty_driver->init_termios.c_ospeed = 115200; |
| 907 | state->tty_driver->flags = TTY_DRIVER_REAL_RAW; |
| 908 | tty_set_operations(state->tty_driver, &fiq_tty_driver_ops); |
| 909 | state->tty_driver->driver_state = state; |
| 910 | |
| 911 | ret = tty_register_driver(state->tty_driver); |
| 912 | if (ret) { |
| 913 | pr_err("Failed to register fiq tty: %d\n", ret); |
| 914 | goto err; |
| 915 | } |
| 916 | |
| 917 | state->tty_rbuf = fiq_debugger_ringbuf_alloc(1024); |
| 918 | if (!state->tty_rbuf) { |
| 919 | pr_err("Failed to allocate fiq debugger ringbuf\n"); |
| 920 | ret = -ENOMEM; |
| 921 | goto err; |
| 922 | } |
| 923 | |
| 924 | pr_info("Registered FIQ tty driver %p\n", state->tty_driver); |
| 925 | return 0; |
| 926 | |
| 927 | err: |
| 928 | fiq_debugger_ringbuf_free(state->tty_rbuf); |
| 929 | state->tty_rbuf = NULL; |
| 930 | put_tty_driver(state->tty_driver); |
| 931 | return ret; |
| 932 | } |
| 933 | #endif |
| 934 | |
Dima Zavin | f4aea21 | 2011-10-10 15:24:34 -0700 | [diff] [blame^] | 935 | static int fiq_debugger_dev_suspend(struct device *dev) |
| 936 | { |
| 937 | struct platform_device *pdev = to_platform_device(dev); |
| 938 | struct fiq_debugger_state *state = platform_get_drvdata(pdev); |
| 939 | |
| 940 | if (state->pdata->uart_dev_suspend) |
| 941 | return state->pdata->uart_dev_suspend(pdev); |
| 942 | return 0; |
| 943 | } |
| 944 | |
| 945 | static int fiq_debugger_dev_resume(struct device *dev) |
| 946 | { |
| 947 | struct platform_device *pdev = to_platform_device(dev); |
| 948 | struct fiq_debugger_state *state = platform_get_drvdata(pdev); |
| 949 | |
| 950 | if (state->pdata->uart_dev_resume) |
| 951 | return state->pdata->uart_dev_resume(pdev); |
| 952 | return 0; |
| 953 | } |
| 954 | |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 955 | static int fiq_debugger_probe(struct platform_device *pdev) |
| 956 | { |
| 957 | int ret; |
| 958 | struct fiq_debugger_pdata *pdata = dev_get_platdata(&pdev->dev); |
| 959 | struct fiq_debugger_state *state; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 960 | int fiq; |
| 961 | int uart_irq; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 962 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 963 | if (!pdata->uart_getc || !pdata->uart_putc) |
| 964 | return -EINVAL; |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 965 | if ((pdata->uart_enable && !pdata->uart_disable) || |
| 966 | (!pdata->uart_enable && pdata->uart_disable)) |
| 967 | return -EINVAL; |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 968 | |
| 969 | fiq = platform_get_irq_byname(pdev, "fiq"); |
| 970 | uart_irq = platform_get_irq_byname(pdev, "uart_irq"); |
| 971 | |
| 972 | /* uart_irq mode and fiq mode are mutually exclusive, but one of them |
| 973 | * is required */ |
| 974 | if ((uart_irq < 0 && fiq < 0) || (uart_irq >= 0 && fiq >= 0)) |
| 975 | return -EINVAL; |
| 976 | if (fiq >= 0 && !pdata->fiq_enable) |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 977 | return -EINVAL; |
| 978 | |
| 979 | state = kzalloc(sizeof(*state), GFP_KERNEL); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 980 | setup_timer(&state->sleep_timer, sleep_timer_expired, |
| 981 | (unsigned long)state); |
| 982 | state->pdata = pdata; |
| 983 | state->pdev = pdev; |
| 984 | state->no_sleep = initial_no_sleep; |
| 985 | state->debug_enable = initial_debug_enable; |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 986 | state->console_enable = initial_console_enable; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 987 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 988 | state->fiq = fiq; |
| 989 | state->uart_irq = uart_irq; |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 990 | state->signal_irq = platform_get_irq_byname(pdev, "signal"); |
| 991 | state->wakeup_irq = platform_get_irq_byname(pdev, "wakeup"); |
| 992 | |
Dima Zavin | f4aea21 | 2011-10-10 15:24:34 -0700 | [diff] [blame^] | 993 | platform_set_drvdata(pdev, state); |
| 994 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 995 | if (state->wakeup_irq < 0 && debug_have_fiq(state)) |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 996 | state->no_sleep = true; |
| 997 | state->ignore_next_wakeup_irq = !state->no_sleep; |
| 998 | |
| 999 | wake_lock_init(&state->debugger_wake_lock, |
| 1000 | WAKE_LOCK_SUSPEND, "serial-debug"); |
| 1001 | |
| 1002 | state->clk = clk_get(&pdev->dev, NULL); |
| 1003 | if (IS_ERR(state->clk)) |
| 1004 | state->clk = NULL; |
| 1005 | |
Dima Zavin | efde655 | 2011-10-05 14:08:20 -0700 | [diff] [blame] | 1006 | /* do not call pdata->uart_enable here since uart_init may still |
| 1007 | * need to do some initialization before uart_enable can work. |
| 1008 | * So, only try to manage the clock during init. |
| 1009 | */ |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1010 | if (state->clk) |
| 1011 | clk_enable(state->clk); |
| 1012 | |
| 1013 | if (pdata->uart_init) { |
| 1014 | ret = pdata->uart_init(pdev); |
| 1015 | if (ret) |
| 1016 | goto err_uart_init; |
| 1017 | } |
| 1018 | |
| 1019 | debug_printf_nfiq(state, "<hit enter %sto activate fiq debugger>\n", |
| 1020 | state->no_sleep ? "" : "twice "); |
| 1021 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 1022 | if (debug_have_fiq(state)) { |
| 1023 | state->handler.fiq = debug_fiq; |
| 1024 | state->handler.resume = debug_resume; |
| 1025 | ret = fiq_glue_register_handler(&state->handler); |
| 1026 | if (ret) { |
| 1027 | pr_err("%s: could not install fiq handler\n", __func__); |
| 1028 | goto err_register_fiq; |
| 1029 | } |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1030 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 1031 | pdata->fiq_enable(pdev, state->fiq, 1); |
| 1032 | } else { |
| 1033 | ret = request_irq(state->uart_irq, debug_uart_irq, |
| 1034 | 0, "debug", state); |
| 1035 | if (ret) { |
| 1036 | pr_err("%s: could not install irq handler\n", __func__); |
| 1037 | goto err_register_irq; |
| 1038 | } |
| 1039 | |
| 1040 | /* for irq-only mode, we want this irq to wake us up, if it |
| 1041 | * can. |
| 1042 | */ |
| 1043 | enable_irq_wake(state->uart_irq); |
| 1044 | } |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1045 | |
| 1046 | if (state->clk) |
| 1047 | clk_disable(state->clk); |
| 1048 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 1049 | if (state->signal_irq >= 0) { |
| 1050 | ret = request_irq(state->signal_irq, debug_signal_irq, |
| 1051 | IRQF_TRIGGER_RISING, "debug-signal", state); |
| 1052 | if (ret) |
| 1053 | pr_err("serial_debugger: could not install signal_irq"); |
| 1054 | } |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1055 | |
| 1056 | if (state->wakeup_irq >= 0) { |
| 1057 | ret = request_irq(state->wakeup_irq, wakeup_irq_handler, |
| 1058 | IRQF_TRIGGER_FALLING | IRQF_DISABLED, |
| 1059 | "debug-wakeup", state); |
| 1060 | if (ret) { |
| 1061 | pr_err("serial_debugger: " |
| 1062 | "could not install wakeup irq\n"); |
| 1063 | state->wakeup_irq = -1; |
| 1064 | } else { |
| 1065 | ret = enable_irq_wake(state->wakeup_irq); |
| 1066 | if (ret) { |
| 1067 | pr_err("serial_debugger: " |
| 1068 | "could not enable wakeup\n"); |
| 1069 | state->wakeup_irq_no_set_wake = true; |
| 1070 | } |
| 1071 | } |
| 1072 | } |
| 1073 | if (state->no_sleep) |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 1074 | handle_wakeup(state); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1075 | |
Colin Cross | 4df8d7b | 2010-08-16 14:51:51 -0700 | [diff] [blame] | 1076 | #if defined(CONFIG_FIQ_DEBUGGER_CONSOLE) |
| 1077 | state->console = fiq_debugger_console; |
| 1078 | register_console(&state->console); |
| 1079 | fiq_debugger_tty_init(state); |
| 1080 | #endif |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1081 | return 0; |
| 1082 | |
Dima Zavin | 83b7270 | 2011-10-02 20:35:47 -0700 | [diff] [blame] | 1083 | err_register_irq: |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1084 | err_register_fiq: |
| 1085 | if (pdata->uart_free) |
| 1086 | pdata->uart_free(pdev); |
| 1087 | err_uart_init: |
Dima Zavin | 0d5d8ec | 2011-10-20 14:48:37 -0700 | [diff] [blame] | 1088 | if (state->clk) |
| 1089 | clk_disable(state->clk); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1090 | if (state->clk) |
| 1091 | clk_put(state->clk); |
Dima Zavin | 0d5d8ec | 2011-10-20 14:48:37 -0700 | [diff] [blame] | 1092 | wake_lock_destroy(&state->debugger_wake_lock); |
Dima Zavin | f4aea21 | 2011-10-10 15:24:34 -0700 | [diff] [blame^] | 1093 | platform_set_drvdata(pdev, NULL); |
Dima Zavin | 0d5d8ec | 2011-10-20 14:48:37 -0700 | [diff] [blame] | 1094 | kfree(state); |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1095 | return ret; |
| 1096 | } |
| 1097 | |
Dima Zavin | f4aea21 | 2011-10-10 15:24:34 -0700 | [diff] [blame^] | 1098 | static const struct dev_pm_ops fiq_debugger_dev_pm_ops = { |
| 1099 | .suspend = fiq_debugger_dev_suspend, |
| 1100 | .resume = fiq_debugger_dev_resume, |
| 1101 | }; |
| 1102 | |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1103 | static struct platform_driver fiq_debugger_driver = { |
Dima Zavin | f4aea21 | 2011-10-10 15:24:34 -0700 | [diff] [blame^] | 1104 | .probe = fiq_debugger_probe, |
| 1105 | .driver = { |
| 1106 | .name = "fiq_debugger", |
| 1107 | .pm = &fiq_debugger_dev_pm_ops, |
| 1108 | }, |
Iliyan Malchev | c1db50b | 2010-06-05 17:36:24 -0700 | [diff] [blame] | 1109 | }; |
| 1110 | |
| 1111 | static int __init fiq_debugger_init(void) |
| 1112 | { |
| 1113 | return platform_driver_register(&fiq_debugger_driver); |
| 1114 | } |
| 1115 | |
| 1116 | postcore_initcall(fiq_debugger_init); |