blob: 0e081292f4f7eb29d721776b6d089f66168d12a0 [file] [log] [blame]
Nicolas Pitre6f475c02005-10-28 16:39:33 +01001/*
2 * linux/drivers/net/irda/pxaficp_ir.c
3 *
4 * Based on sa1100_ir.c by Russell King
5 *
6 * Changes copyright (C) 2003-2005 MontaVista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor
13 *
14 */
Nicolas Pitre6f475c02005-10-28 16:39:33 +010015#include <linux/module.h>
Nicolas Pitre6f475c02005-10-28 16:39:33 +010016#include <linux/netdevice.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010017#include <linux/platform_device.h>
Russell King82d553c2007-09-02 17:09:23 +010018#include <linux/clk.h>
Nicolas Pitre6f475c02005-10-28 16:39:33 +010019
20#include <net/irda/irda.h>
21#include <net/irda/irmod.h>
22#include <net/irda/wrapper.h>
23#include <net/irda/irda_device.h>
24
Russell Kingdcea83a2008-11-29 11:40:28 +000025#include <mach/dma.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010026#include <mach/irda.h>
Russell King05678a92008-11-28 16:04:54 +000027#include <mach/hardware.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010028#include <mach/pxa-regs.h>
Eric Miao02f65262008-11-28 14:08:53 +080029#include <mach/regs-uart.h>
Nicolas Pitre6f475c02005-10-28 16:39:33 +010030
Eric Miaob40ddf52008-11-28 11:13:47 +080031#define FICP __REG(0x40800000) /* Start of FICP area */
32#define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */
33#define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */
34#define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */
35#define ICDR __REG(0x4080000c) /* ICP Data Register */
36#define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */
37#define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */
38
39#define ICCR0_AME (1 << 7) /* Address match enable */
40#define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */
41#define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */
42#define ICCR0_RXE (1 << 4) /* Receive enable */
43#define ICCR0_TXE (1 << 3) /* Transmit enable */
44#define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */
45#define ICCR0_LBM (1 << 1) /* Loopback mode */
46#define ICCR0_ITR (1 << 0) /* IrDA transmission */
47
48#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
49#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
50#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
51#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
52#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
53#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
54
55#ifdef CONFIG_PXA27x
56#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
57#endif
58#define ICSR0_FRE (1 << 5) /* Framing error */
59#define ICSR0_RFS (1 << 4) /* Receive FIFO service request */
60#define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */
61#define ICSR0_RAB (1 << 2) /* Receiver abort */
62#define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */
63#define ICSR0_EIF (1 << 0) /* End/Error in FIFO */
64
65#define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */
66#define ICSR1_CRE (1 << 5) /* CRC error */
67#define ICSR1_EOF (1 << 4) /* End of frame */
68#define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */
69#define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */
70#define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */
71#define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */
Nicolas Pitre6f475c02005-10-28 16:39:33 +010072
Nicolas Pitre6f475c02005-10-28 16:39:33 +010073#define IrSR_RXPL_NEG_IS_ZERO (1<<4)
74#define IrSR_RXPL_POS_IS_ZERO 0x0
75#define IrSR_TXPL_NEG_IS_ZERO (1<<3)
76#define IrSR_TXPL_POS_IS_ZERO 0x0
77#define IrSR_XMODE_PULSE_1_6 (1<<2)
78#define IrSR_XMODE_PULSE_3_16 0x0
79#define IrSR_RCVEIR_IR_MODE (1<<1)
80#define IrSR_RCVEIR_UART_MODE 0x0
81#define IrSR_XMITIR_IR_MODE (1<<0)
82#define IrSR_XMITIR_UART_MODE 0x0
83
84#define IrSR_IR_RECEIVE_ON (\
85 IrSR_RXPL_NEG_IS_ZERO | \
86 IrSR_TXPL_POS_IS_ZERO | \
87 IrSR_XMODE_PULSE_3_16 | \
88 IrSR_RCVEIR_IR_MODE | \
89 IrSR_XMITIR_UART_MODE)
90
91#define IrSR_IR_TRANSMIT_ON (\
92 IrSR_RXPL_NEG_IS_ZERO | \
93 IrSR_TXPL_POS_IS_ZERO | \
94 IrSR_XMODE_PULSE_3_16 | \
95 IrSR_RCVEIR_UART_MODE | \
96 IrSR_XMITIR_IR_MODE)
97
98struct pxa_irda {
99 int speed;
100 int newspeed;
101 unsigned long last_oscr;
102
103 unsigned char *dma_rx_buff;
104 unsigned char *dma_tx_buff;
105 dma_addr_t dma_rx_buff_phy;
106 dma_addr_t dma_tx_buff_phy;
107 unsigned int dma_tx_buff_len;
108 int txdma;
109 int rxdma;
110
111 struct net_device_stats stats;
112 struct irlap_cb *irlap;
113 struct qos_info qos;
114
115 iobuff_t tx_buff;
116 iobuff_t rx_buff;
117
118 struct device *dev;
119 struct pxaficp_platform_data *pdata;
Russell King82d553c2007-09-02 17:09:23 +0100120 struct clk *fir_clk;
121 struct clk *sir_clk;
122 struct clk *cur_clk;
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100123};
124
Russell King82d553c2007-09-02 17:09:23 +0100125static inline void pxa_irda_disable_clk(struct pxa_irda *si)
126{
127 if (si->cur_clk)
128 clk_disable(si->cur_clk);
129 si->cur_clk = NULL;
130}
131
132static inline void pxa_irda_enable_firclk(struct pxa_irda *si)
133{
134 si->cur_clk = si->fir_clk;
135 clk_enable(si->fir_clk);
136}
137
138static inline void pxa_irda_enable_sirclk(struct pxa_irda *si)
139{
140 si->cur_clk = si->sir_clk;
141 clk_enable(si->sir_clk);
142}
143
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100144
145#define IS_FIR(si) ((si)->speed >= 4000000)
146#define IRDA_FRAME_SIZE_LIMIT 2047
147
148inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si)
149{
150 DCSR(si->rxdma) = DCSR_NODESC;
151 DSADR(si->rxdma) = __PREG(ICDR);
152 DTADR(si->rxdma) = si->dma_rx_buff_phy;
153 DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT;
154 DCSR(si->rxdma) |= DCSR_RUN;
155}
156
157inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si)
158{
159 DCSR(si->txdma) = DCSR_NODESC;
160 DSADR(si->txdma) = si->dma_tx_buff_phy;
161 DTADR(si->txdma) = __PREG(ICDR);
162 DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len;
163 DCSR(si->txdma) |= DCSR_RUN;
164}
165
166/*
167 * Set the IrDA communications speed.
168 */
169static int pxa_irda_set_speed(struct pxa_irda *si, int speed)
170{
171 unsigned long flags;
172 unsigned int divisor;
173
174 switch (speed) {
175 case 9600: case 19200: case 38400:
176 case 57600: case 115200:
177
178 /* refer to PXA250/210 Developer's Manual 10-7 */
179 /* BaudRate = 14.7456 MHz / (16*Divisor) */
180 divisor = 14745600 / (16 * speed);
181
182 local_irq_save(flags);
183
184 if (IS_FIR(si)) {
185 /* stop RX DMA */
186 DCSR(si->rxdma) &= ~DCSR_RUN;
187 /* disable FICP */
188 ICCR0 = 0;
Russell King82d553c2007-09-02 17:09:23 +0100189 pxa_irda_disable_clk(si);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100190
191 /* set board transceiver to SIR mode */
192 si->pdata->transceiver_mode(si->dev, IR_SIRMODE);
193
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100194 /* enable the STUART clock */
Russell King82d553c2007-09-02 17:09:23 +0100195 pxa_irda_enable_sirclk(si);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100196 }
197
198 /* disable STUART first */
199 STIER = 0;
200
201 /* access DLL & DLH */
202 STLCR |= LCR_DLAB;
203 STDLL = divisor & 0xff;
204 STDLH = divisor >> 8;
205 STLCR &= ~LCR_DLAB;
206
207 si->speed = speed;
208 STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
209 STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
210
211 local_irq_restore(flags);
212 break;
213
214 case 4000000:
215 local_irq_save(flags);
216
217 /* disable STUART */
218 STIER = 0;
219 STISR = 0;
Russell King82d553c2007-09-02 17:09:23 +0100220 pxa_irda_disable_clk(si);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100221
222 /* disable FICP first */
223 ICCR0 = 0;
224
225 /* set board transceiver to FIR mode */
226 si->pdata->transceiver_mode(si->dev, IR_FIRMODE);
227
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100228 /* enable the FICP clock */
Russell King82d553c2007-09-02 17:09:23 +0100229 pxa_irda_enable_firclk(si);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100230
231 si->speed = speed;
232 pxa_irda_fir_dma_rx_start(si);
233 ICCR0 = ICCR0_ITR | ICCR0_RXE;
234
235 local_irq_restore(flags);
236 break;
237
238 default:
239 return -EINVAL;
240 }
241
242 return 0;
243}
244
245/* SIR interrupt service routine. */
David Howells7d12e782006-10-05 14:55:46 +0100246static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100247{
248 struct net_device *dev = dev_id;
249 struct pxa_irda *si = netdev_priv(dev);
250 int iir, lsr, data;
251
252 iir = STIIR;
253
254 switch (iir & 0x0F) {
255 case 0x06: /* Receiver Line Status */
256 lsr = STLSR;
257 while (lsr & LSR_FIFOE) {
258 data = STRBR;
259 if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) {
260 printk(KERN_DEBUG "pxa_ir: sir receiving error\n");
261 si->stats.rx_errors++;
262 if (lsr & LSR_FE)
263 si->stats.rx_frame_errors++;
264 if (lsr & LSR_OE)
265 si->stats.rx_fifo_errors++;
266 } else {
267 si->stats.rx_bytes++;
268 async_unwrap_char(dev, &si->stats, &si->rx_buff, data);
269 }
270 lsr = STLSR;
271 }
272 dev->last_rx = jiffies;
273 si->last_oscr = OSCR;
274 break;
275
276 case 0x04: /* Received Data Available */
277 /* forth through */
278
279 case 0x0C: /* Character Timeout Indication */
280 do {
281 si->stats.rx_bytes++;
282 async_unwrap_char(dev, &si->stats, &si->rx_buff, STRBR);
283 } while (STLSR & LSR_DR);
284 dev->last_rx = jiffies;
285 si->last_oscr = OSCR;
286 break;
287
288 case 0x02: /* Transmit FIFO Data Request */
289 while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) {
290 STTHR = *si->tx_buff.data++;
291 si->tx_buff.len -= 1;
292 }
293
294 if (si->tx_buff.len == 0) {
295 si->stats.tx_packets++;
296 si->stats.tx_bytes += si->tx_buff.data -
297 si->tx_buff.head;
298
299 /* We need to ensure that the transmitter has finished. */
300 while ((STLSR & LSR_TEMT) == 0)
301 cpu_relax();
302 si->last_oscr = OSCR;
303
304 /*
305 * Ok, we've finished transmitting. Now enable
306 * the receiver. Sometimes we get a receive IRQ
307 * immediately after a transmit...
308 */
309 if (si->newspeed) {
310 pxa_irda_set_speed(si, si->newspeed);
311 si->newspeed = 0;
312 } else {
313 /* enable IR Receiver, disable IR Transmitter */
314 STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6;
315 /* enable STUART and receive interrupts */
316 STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE;
317 }
318 /* I'm hungry! */
319 netif_wake_queue(dev);
320 }
321 break;
322 }
323
324 return IRQ_HANDLED;
325}
326
327/* FIR Receive DMA interrupt handler */
David Howells7d12e782006-10-05 14:55:46 +0100328static void pxa_irda_fir_dma_rx_irq(int channel, void *data)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100329{
330 int dcsr = DCSR(channel);
331
332 DCSR(channel) = dcsr & ~DCSR_RUN;
333
334 printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr);
335}
336
337/* FIR Transmit DMA interrupt handler */
David Howells7d12e782006-10-05 14:55:46 +0100338static void pxa_irda_fir_dma_tx_irq(int channel, void *data)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100339{
340 struct net_device *dev = data;
341 struct pxa_irda *si = netdev_priv(dev);
342 int dcsr;
343
344 dcsr = DCSR(channel);
345 DCSR(channel) = dcsr & ~DCSR_RUN;
346
347 if (dcsr & DCSR_ENDINTR) {
348 si->stats.tx_packets++;
349 si->stats.tx_bytes += si->dma_tx_buff_len;
350 } else {
351 si->stats.tx_errors++;
352 }
353
354 while (ICSR1 & ICSR1_TBY)
355 cpu_relax();
356 si->last_oscr = OSCR;
357
358 /*
359 * HACK: It looks like the TBY bit is dropped too soon.
360 * Without this delay things break.
361 */
362 udelay(120);
363
364 if (si->newspeed) {
365 pxa_irda_set_speed(si, si->newspeed);
366 si->newspeed = 0;
367 } else {
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100368 int i = 64;
369
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100370 ICCR0 = 0;
371 pxa_irda_fir_dma_rx_start(si);
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100372 while ((ICSR1 & ICSR1_RNE) && i--)
373 (void)ICDR;
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100374 ICCR0 = ICCR0_ITR | ICCR0_RXE;
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100375
376 if (i < 0)
377 printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100378 }
379 netif_wake_queue(dev);
380}
381
382/* EIF(Error in FIFO/End in Frame) handler for FIR */
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100383static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100384{
385 unsigned int len, stat, data;
386
387 /* Get the current data position. */
388 len = DTADR(si->rxdma) - si->dma_rx_buff_phy;
389
390 do {
391 /* Read Status, and then Data. */
392 stat = ICSR1;
393 rmb();
394 data = ICDR;
395
396 if (stat & (ICSR1_CRE | ICSR1_ROR)) {
397 si->stats.rx_errors++;
398 if (stat & ICSR1_CRE) {
399 printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n");
400 si->stats.rx_crc_errors++;
401 }
402 if (stat & ICSR1_ROR) {
403 printk(KERN_DEBUG "pxa_ir: fir receive overrun\n");
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100404 si->stats.rx_over_errors++;
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100405 }
406 } else {
407 si->dma_rx_buff[len++] = data;
408 }
409 /* If we hit the end of frame, there's no point in continuing. */
410 if (stat & ICSR1_EOF)
411 break;
412 } while (ICSR0 & ICSR0_EIF);
413
414 if (stat & ICSR1_EOF) {
415 /* end of frame. */
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100416 struct sk_buff *skb;
417
418 if (icsr0 & ICSR0_FRE) {
419 printk(KERN_ERR "pxa_ir: dropping erroneous frame\n");
420 si->stats.rx_dropped++;
421 return;
422 }
423
424 skb = alloc_skb(len+1,GFP_ATOMIC);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100425 if (!skb) {
426 printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n");
427 si->stats.rx_dropped++;
428 return;
429 }
430
431 /* Align IP header to 20 bytes */
432 skb_reserve(skb, 1);
Arnaldo Carvalho de Melo27d7ff42007-03-31 11:55:19 -0300433 skb_copy_to_linear_data(skb, si->dma_rx_buff, len);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100434 skb_put(skb, len);
435
436 /* Feed it to IrLAP */
437 skb->dev = dev;
Arnaldo Carvalho de Melo459a98e2007-03-19 15:30:44 -0700438 skb_reset_mac_header(skb);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100439 skb->protocol = htons(ETH_P_IRDA);
440 netif_rx(skb);
441
442 si->stats.rx_packets++;
443 si->stats.rx_bytes += len;
444
445 dev->last_rx = jiffies;
446 }
447}
448
449/* FIR interrupt handler */
David Howells7d12e782006-10-05 14:55:46 +0100450static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100451{
452 struct net_device *dev = dev_id;
453 struct pxa_irda *si = netdev_priv(dev);
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100454 int icsr0, i = 64;
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100455
456 /* stop RX DMA */
457 DCSR(si->rxdma) &= ~DCSR_RUN;
458 si->last_oscr = OSCR;
459 icsr0 = ICSR0;
460
461 if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) {
462 if (icsr0 & ICSR0_FRE) {
463 printk(KERN_DEBUG "pxa_ir: fir receive frame error\n");
464 si->stats.rx_frame_errors++;
465 } else {
466 printk(KERN_DEBUG "pxa_ir: fir receive abort\n");
467 si->stats.rx_errors++;
468 }
469 ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB);
470 }
471
472 if (icsr0 & ICSR0_EIF) {
473 /* An error in FIFO occured, or there is a end of frame */
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100474 pxa_irda_fir_irq_eif(si, dev, icsr0);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100475 }
476
477 ICCR0 = 0;
478 pxa_irda_fir_dma_rx_start(si);
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100479 while ((ICSR1 & ICSR1_RNE) && i--)
480 (void)ICDR;
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100481 ICCR0 = ICCR0_ITR | ICCR0_RXE;
482
Guennadi Liakhovetski9a4d93d2007-03-30 08:49:55 +0100483 if (i < 0)
484 printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n");
485
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100486 return IRQ_HANDLED;
487}
488
489/* hard_xmit interface of irda device */
490static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
491{
492 struct pxa_irda *si = netdev_priv(dev);
493 int speed = irda_get_next_speed(skb);
494
495 /*
496 * Does this packet contain a request to change the interface
497 * speed? If so, remember it until we complete the transmission
498 * of this frame.
499 */
500 if (speed != si->speed && speed != -1)
501 si->newspeed = speed;
502
503 /*
504 * If this is an empty frame, we can bypass a lot.
505 */
506 if (skb->len == 0) {
507 if (si->newspeed) {
508 si->newspeed = 0;
509 pxa_irda_set_speed(si, speed);
510 }
511 dev_kfree_skb(skb);
512 return 0;
513 }
514
515 netif_stop_queue(dev);
516
517 if (!IS_FIR(si)) {
518 si->tx_buff.data = si->tx_buff.head;
519 si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize);
520
521 /* Disable STUART interrupts and switch to transmit mode. */
522 STIER = 0;
523 STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6;
524
525 /* enable STUART and transmit interrupts */
526 STIER = IER_UUE | IER_TIE;
527 } else {
528 unsigned long mtt = irda_get_mtt(skb);
529
530 si->dma_tx_buff_len = skb->len;
Arnaldo Carvalho de Melod626f622007-03-27 18:55:52 -0300531 skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100532
533 if (mtt)
534 while ((unsigned)(OSCR - si->last_oscr)/4 < mtt)
535 cpu_relax();
536
537 /* stop RX DMA, disable FICP */
538 DCSR(si->rxdma) &= ~DCSR_RUN;
539 ICCR0 = 0;
540
541 pxa_irda_fir_dma_tx_start(si);
542 ICCR0 = ICCR0_ITR | ICCR0_TXE;
543 }
544
545 dev_kfree_skb(skb);
546 dev->trans_start = jiffies;
547 return 0;
548}
549
550static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
551{
552 struct if_irda_req *rq = (struct if_irda_req *)ifreq;
553 struct pxa_irda *si = netdev_priv(dev);
554 int ret;
555
556 switch (cmd) {
557 case SIOCSBANDWIDTH:
558 ret = -EPERM;
559 if (capable(CAP_NET_ADMIN)) {
560 /*
561 * We are unable to set the speed if the
562 * device is not running.
563 */
564 if (netif_running(dev)) {
565 ret = pxa_irda_set_speed(si,
566 rq->ifr_baudrate);
567 } else {
568 printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n");
569 ret = 0;
570 }
571 }
572 break;
573
574 case SIOCSMEDIABUSY:
575 ret = -EPERM;
576 if (capable(CAP_NET_ADMIN)) {
577 irda_device_set_media_busy(dev, TRUE);
578 ret = 0;
579 }
580 break;
581
582 case SIOCGRECEIVING:
583 ret = 0;
584 rq->ifr_receiving = IS_FIR(si) ? 0
585 : si->rx_buff.state != OUTSIDE_FRAME;
586 break;
587
588 default:
589 ret = -EOPNOTSUPP;
590 break;
591 }
592
593 return ret;
594}
595
596static struct net_device_stats *pxa_irda_stats(struct net_device *dev)
597{
598 struct pxa_irda *si = netdev_priv(dev);
599 return &si->stats;
600}
601
602static void pxa_irda_startup(struct pxa_irda *si)
603{
604 /* Disable STUART interrupts */
605 STIER = 0;
606 /* enable STUART interrupt to the processor */
607 STMCR = MCR_OUT2;
608 /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */
609 STLCR = LCR_WLS0 | LCR_WLS1;
610 /* enable FIFO, we use FIFO to improve performance */
611 STFCR = FCR_TRFIFOE | FCR_ITL_32;
612
613 /* disable FICP */
614 ICCR0 = 0;
615 /* configure FICP ICCR2 */
616 ICCR2 = ICCR2_TXP | ICCR2_TRIG_32;
617
618 /* configure DMAC */
Eric Miao87f3dd72008-09-08 15:26:43 +0800619 DRCMR(17) = si->rxdma | DRCMR_MAPVLD;
620 DRCMR(18) = si->txdma | DRCMR_MAPVLD;
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100621
622 /* force SIR reinitialization */
623 si->speed = 4000000;
624 pxa_irda_set_speed(si, 9600);
625
626 printk(KERN_DEBUG "pxa_ir: irda startup\n");
627}
628
629static void pxa_irda_shutdown(struct pxa_irda *si)
630{
631 unsigned long flags;
632
633 local_irq_save(flags);
634
635 /* disable STUART and interrupt */
636 STIER = 0;
637 /* disable STUART SIR mode */
638 STISR = 0;
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100639
640 /* disable DMA */
641 DCSR(si->txdma) &= ~DCSR_RUN;
642 DCSR(si->rxdma) &= ~DCSR_RUN;
643 /* disable FICP */
644 ICCR0 = 0;
Russell King82d553c2007-09-02 17:09:23 +0100645
646 /* disable the STUART or FICP clocks */
647 pxa_irda_disable_clk(si);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100648
Eric Miao87f3dd72008-09-08 15:26:43 +0800649 DRCMR(17) = 0;
650 DRCMR(18) = 0;
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100651
652 local_irq_restore(flags);
653
654 /* power off board transceiver */
655 si->pdata->transceiver_mode(si->dev, IR_OFF);
656
657 printk(KERN_DEBUG "pxa_ir: irda shutdown\n");
658}
659
660static int pxa_irda_start(struct net_device *dev)
661{
662 struct pxa_irda *si = netdev_priv(dev);
663 int err;
664
665 si->speed = 9600;
666
667 err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev);
668 if (err)
669 goto err_irq1;
670
671 err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev);
672 if (err)
673 goto err_irq2;
674
675 /*
676 * The interrupt must remain disabled for now.
677 */
678 disable_irq(IRQ_STUART);
679 disable_irq(IRQ_ICP);
680
681 err = -EBUSY;
682 si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev);
683 if (si->rxdma < 0)
684 goto err_rx_dma;
685
686 si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev);
687 if (si->txdma < 0)
688 goto err_tx_dma;
689
690 err = -ENOMEM;
691 si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
692 &si->dma_rx_buff_phy, GFP_KERNEL );
693 if (!si->dma_rx_buff)
694 goto err_dma_rx_buff;
695
696 si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT,
697 &si->dma_tx_buff_phy, GFP_KERNEL );
698 if (!si->dma_tx_buff)
699 goto err_dma_tx_buff;
700
701 /* Setup the serial port for the initial speed. */
702 pxa_irda_startup(si);
703
704 /*
705 * Open a new IrLAP layer instance.
706 */
707 si->irlap = irlap_open(dev, &si->qos, "pxa");
708 err = -ENOMEM;
709 if (!si->irlap)
710 goto err_irlap;
711
712 /*
713 * Now enable the interrupt and start the queue
714 */
715 enable_irq(IRQ_STUART);
716 enable_irq(IRQ_ICP);
717 netif_start_queue(dev);
718
719 printk(KERN_DEBUG "pxa_ir: irda driver opened\n");
720
721 return 0;
722
723err_irlap:
724 pxa_irda_shutdown(si);
725 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
726err_dma_tx_buff:
727 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
728err_dma_rx_buff:
729 pxa_free_dma(si->txdma);
730err_tx_dma:
731 pxa_free_dma(si->rxdma);
732err_rx_dma:
733 free_irq(IRQ_ICP, dev);
734err_irq2:
735 free_irq(IRQ_STUART, dev);
736err_irq1:
737
738 return err;
739}
740
741static int pxa_irda_stop(struct net_device *dev)
742{
743 struct pxa_irda *si = netdev_priv(dev);
744
745 netif_stop_queue(dev);
746
747 pxa_irda_shutdown(si);
748
749 /* Stop IrLAP */
750 if (si->irlap) {
751 irlap_close(si->irlap);
752 si->irlap = NULL;
753 }
754
755 free_irq(IRQ_STUART, dev);
756 free_irq(IRQ_ICP, dev);
757
758 pxa_free_dma(si->rxdma);
759 pxa_free_dma(si->txdma);
760
761 if (si->dma_rx_buff)
762 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy);
763 if (si->dma_tx_buff)
764 dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy);
765
766 printk(KERN_DEBUG "pxa_ir: irda driver closed\n");
767 return 0;
768}
769
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800770static int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100771{
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800772 struct net_device *dev = platform_get_drvdata(_dev);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100773 struct pxa_irda *si;
774
Richard Purdie91e1a512005-10-30 14:38:52 +0000775 if (dev && netif_running(dev)) {
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100776 si = netdev_priv(dev);
777 netif_device_detach(dev);
778 pxa_irda_shutdown(si);
779 }
780
781 return 0;
782}
783
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800784static int pxa_irda_resume(struct platform_device *_dev)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100785{
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800786 struct net_device *dev = platform_get_drvdata(_dev);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100787 struct pxa_irda *si;
788
Richard Purdie91e1a512005-10-30 14:38:52 +0000789 if (dev && netif_running(dev)) {
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100790 si = netdev_priv(dev);
791 pxa_irda_startup(si);
792 netif_device_attach(dev);
793 netif_wake_queue(dev);
794 }
795
796 return 0;
797}
798
799
800static int pxa_irda_init_iobuf(iobuff_t *io, int size)
801{
802 io->head = kmalloc(size, GFP_KERNEL | GFP_DMA);
803 if (io->head != NULL) {
804 io->truesize = size;
805 io->in_frame = FALSE;
806 io->state = OUTSIDE_FRAME;
807 io->data = io->head;
808 }
809 return io->head ? 0 : -ENOMEM;
810}
811
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800812static int pxa_irda_probe(struct platform_device *pdev)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100813{
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100814 struct net_device *dev;
815 struct pxa_irda *si;
816 unsigned int baudrate_mask;
817 int err;
818
819 if (!pdev->dev.platform_data)
820 return -ENODEV;
821
822 err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY;
823 if (err)
824 goto err_mem_1;
825
826 err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY;
827 if (err)
828 goto err_mem_2;
829
830 dev = alloc_irdadev(sizeof(struct pxa_irda));
831 if (!dev)
832 goto err_mem_3;
833
834 si = netdev_priv(dev);
835 si->dev = &pdev->dev;
836 si->pdata = pdev->dev.platform_data;
837
Russell King82d553c2007-09-02 17:09:23 +0100838 si->sir_clk = clk_get(&pdev->dev, "UARTCLK");
839 si->fir_clk = clk_get(&pdev->dev, "FICPCLK");
840 if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) {
841 err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk);
842 goto err_mem_4;
843 }
844
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100845 /*
846 * Initialise the SIR buffers
847 */
848 err = pxa_irda_init_iobuf(&si->rx_buff, 14384);
849 if (err)
850 goto err_mem_4;
851 err = pxa_irda_init_iobuf(&si->tx_buff, 4000);
852 if (err)
853 goto err_mem_5;
854
Dmitry Baryshkovbaf1c5d2008-04-12 20:08:16 +0100855 if (si->pdata->startup)
856 err = si->pdata->startup(si->dev);
857 if (err)
858 goto err_startup;
859
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100860 dev->hard_start_xmit = pxa_irda_hard_xmit;
861 dev->open = pxa_irda_start;
862 dev->stop = pxa_irda_stop;
863 dev->do_ioctl = pxa_irda_ioctl;
864 dev->get_stats = pxa_irda_stats;
865
866 irda_init_max_qos_capabilies(&si->qos);
867
868 baudrate_mask = 0;
869 if (si->pdata->transceiver_cap & IR_SIRMODE)
870 baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
871 if (si->pdata->transceiver_cap & IR_FIRMODE)
872 baudrate_mask |= IR_4000000 << 8;
873
874 si->qos.baud_rate.bits &= baudrate_mask;
875 si->qos.min_turn_time.bits = 7; /* 1ms or more */
876
877 irda_qos_bits_to_value(&si->qos);
878
879 err = register_netdev(dev);
880
881 if (err == 0)
882 dev_set_drvdata(&pdev->dev, dev);
883
884 if (err) {
Dmitry Baryshkovbaf1c5d2008-04-12 20:08:16 +0100885 if (si->pdata->shutdown)
886 si->pdata->shutdown(si->dev);
887err_startup:
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100888 kfree(si->tx_buff.head);
889err_mem_5:
890 kfree(si->rx_buff.head);
891err_mem_4:
Russell King82d553c2007-09-02 17:09:23 +0100892 if (si->sir_clk && !IS_ERR(si->sir_clk))
893 clk_put(si->sir_clk);
894 if (si->fir_clk && !IS_ERR(si->fir_clk))
895 clk_put(si->fir_clk);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100896 free_netdev(dev);
897err_mem_3:
898 release_mem_region(__PREG(FICP), 0x1c);
899err_mem_2:
900 release_mem_region(__PREG(STUART), 0x24);
901 }
902err_mem_1:
903 return err;
904}
905
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800906static int pxa_irda_remove(struct platform_device *_dev)
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100907{
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800908 struct net_device *dev = platform_get_drvdata(_dev);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100909
910 if (dev) {
911 struct pxa_irda *si = netdev_priv(dev);
912 unregister_netdev(dev);
Dmitry Baryshkovbaf1c5d2008-04-12 20:08:16 +0100913 if (si->pdata->shutdown)
914 si->pdata->shutdown(si->dev);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100915 kfree(si->tx_buff.head);
916 kfree(si->rx_buff.head);
Russell King82d553c2007-09-02 17:09:23 +0100917 clk_put(si->fir_clk);
918 clk_put(si->sir_clk);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100919 free_netdev(dev);
920 }
921
922 release_mem_region(__PREG(STUART), 0x24);
923 release_mem_region(__PREG(FICP), 0x1c);
924
925 return 0;
926}
927
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800928static struct platform_driver pxa_ir_driver = {
929 .driver = {
930 .name = "pxa2xx-ir",
Kay Sievers72abb462008-04-18 13:50:44 -0700931 .owner = THIS_MODULE,
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800932 },
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100933 .probe = pxa_irda_probe,
934 .remove = pxa_irda_remove,
935 .suspend = pxa_irda_suspend,
936 .resume = pxa_irda_resume,
937};
938
939static int __init pxa_irda_init(void)
940{
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800941 return platform_driver_register(&pxa_ir_driver);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100942}
943
944static void __exit pxa_irda_exit(void)
945{
Paul Sokolovskyb259e7d2006-12-06 20:07:59 -0800946 platform_driver_unregister(&pxa_ir_driver);
Nicolas Pitre6f475c02005-10-28 16:39:33 +0100947}
948
949module_init(pxa_irda_init);
950module_exit(pxa_irda_exit);
951
952MODULE_LICENSE("GPL");
Kay Sievers72abb462008-04-18 13:50:44 -0700953MODULE_ALIAS("platform:pxa2xx-ir");