| David Brownell | a603a7f | 2008-10-15 12:15:39 +0200 | [diff] [blame] | 1 | /* | 
|  | 2 | * twl4030.h - header for TWL4030 PM and audio CODEC device | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 2005-2006 Texas Instruments, Inc. | 
|  | 5 | * | 
|  | 6 | * Based on tlv320aic23.c: | 
|  | 7 | * Copyright (c) by Kai Svahn <kai.svahn@nokia.com> | 
|  | 8 | * | 
|  | 9 | * This program is free software; you can redistribute it and/or modify | 
|  | 10 | * it under the terms of the GNU General Public License as published by | 
|  | 11 | * the Free Software Foundation; either version 2 of the License, or | 
|  | 12 | * (at your option) any later version. | 
|  | 13 | * | 
|  | 14 | * This program is distributed in the hope that it will be useful, | 
|  | 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | 
|  | 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the | 
|  | 17 | * GNU General Public License for more details. | 
|  | 18 | * | 
|  | 19 | * You should have received a copy of the GNU General Public License | 
|  | 20 | * along with this program; if not, write to the Free Software | 
|  | 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA | 
|  | 22 | * | 
|  | 23 | */ | 
|  | 24 |  | 
|  | 25 | #ifndef __TWL4030_H_ | 
|  | 26 | #define __TWL4030_H_ | 
|  | 27 |  | 
|  | 28 | /* | 
|  | 29 | * Using the twl4030 core we address registers using a pair | 
|  | 30 | *	{ module id, relative register offset } | 
|  | 31 | * which that core then maps to the relevant | 
|  | 32 | *	{ i2c slave, absolute register address } | 
|  | 33 | * | 
|  | 34 | * The module IDs are meaningful only to the twl4030 core code, | 
|  | 35 | * which uses them as array indices to look up the first register | 
|  | 36 | * address each module uses within a given i2c slave. | 
|  | 37 | */ | 
|  | 38 |  | 
|  | 39 | /* Slave 0 (i2c address 0x48) */ | 
|  | 40 | #define TWL4030_MODULE_USB		0x00 | 
|  | 41 |  | 
|  | 42 | /* Slave 1 (i2c address 0x49) */ | 
|  | 43 | #define TWL4030_MODULE_AUDIO_VOICE	0x01 | 
|  | 44 | #define TWL4030_MODULE_GPIO		0x02 | 
|  | 45 | #define TWL4030_MODULE_INTBR		0x03 | 
|  | 46 | #define TWL4030_MODULE_PIH		0x04 | 
|  | 47 | #define TWL4030_MODULE_TEST		0x05 | 
|  | 48 |  | 
|  | 49 | /* Slave 2 (i2c address 0x4a) */ | 
|  | 50 | #define TWL4030_MODULE_KEYPAD		0x06 | 
|  | 51 | #define TWL4030_MODULE_MADC		0x07 | 
|  | 52 | #define TWL4030_MODULE_INTERRUPTS	0x08 | 
|  | 53 | #define TWL4030_MODULE_LED		0x09 | 
|  | 54 | #define TWL4030_MODULE_MAIN_CHARGE	0x0A | 
|  | 55 | #define TWL4030_MODULE_PRECHARGE	0x0B | 
|  | 56 | #define TWL4030_MODULE_PWM0		0x0C | 
|  | 57 | #define TWL4030_MODULE_PWM1		0x0D | 
|  | 58 | #define TWL4030_MODULE_PWMA		0x0E | 
|  | 59 | #define TWL4030_MODULE_PWMB		0x0F | 
|  | 60 |  | 
|  | 61 | /* Slave 3 (i2c address 0x4b) */ | 
|  | 62 | #define TWL4030_MODULE_BACKUP		0x10 | 
|  | 63 | #define TWL4030_MODULE_INT		0x11 | 
|  | 64 | #define TWL4030_MODULE_PM_MASTER	0x12 | 
|  | 65 | #define TWL4030_MODULE_PM_RECEIVER	0x13 | 
|  | 66 | #define TWL4030_MODULE_RTC		0x14 | 
|  | 67 | #define TWL4030_MODULE_SECURED_REG	0x15 | 
|  | 68 |  | 
|  | 69 | /* | 
|  | 70 | * Read and write single 8-bit registers | 
|  | 71 | */ | 
|  | 72 | int twl4030_i2c_write_u8(u8 mod_no, u8 val, u8 reg); | 
|  | 73 | int twl4030_i2c_read_u8(u8 mod_no, u8 *val, u8 reg); | 
|  | 74 |  | 
|  | 75 | /* | 
|  | 76 | * Read and write several 8-bit registers at once. | 
|  | 77 | * | 
|  | 78 | * IMPORTANT:  For twl4030_i2c_write(), allocate num_bytes + 1 | 
|  | 79 | * for the value, and populate your data starting at offset 1. | 
|  | 80 | */ | 
| David Brownell | 3fba19e | 2008-11-08 01:13:16 +0100 | [diff] [blame] | 81 | int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); | 
|  | 82 | int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes); | 
| David Brownell | a603a7f | 2008-10-15 12:15:39 +0200 | [diff] [blame] | 83 |  | 
|  | 84 | /*----------------------------------------------------------------------*/ | 
|  | 85 |  | 
|  | 86 | /* | 
|  | 87 | * NOTE:  at up to 1024 registers, this is a big chip. | 
|  | 88 | * | 
|  | 89 | * Avoid putting register declarations in this file, instead of into | 
|  | 90 | * a driver-private file, unless some of the registers in a block | 
|  | 91 | * need to be shared with other drivers.  One example is blocks that | 
|  | 92 | * have Secondary IRQ Handler (SIH) registers. | 
|  | 93 | */ | 
|  | 94 |  | 
|  | 95 | #define TWL4030_SIH_CTRL_EXCLEN_MASK	BIT(0) | 
|  | 96 | #define TWL4030_SIH_CTRL_PENDDIS_MASK	BIT(1) | 
|  | 97 | #define TWL4030_SIH_CTRL_COR_MASK	BIT(2) | 
|  | 98 |  | 
|  | 99 | /*----------------------------------------------------------------------*/ | 
|  | 100 |  | 
|  | 101 | /* | 
|  | 102 | * GPIO Block Register offsets (use TWL4030_MODULE_GPIO) | 
|  | 103 | */ | 
|  | 104 |  | 
|  | 105 | #define REG_GPIODATAIN1			0x0 | 
|  | 106 | #define REG_GPIODATAIN2			0x1 | 
|  | 107 | #define REG_GPIODATAIN3			0x2 | 
|  | 108 | #define REG_GPIODATADIR1		0x3 | 
|  | 109 | #define REG_GPIODATADIR2		0x4 | 
|  | 110 | #define REG_GPIODATADIR3		0x5 | 
|  | 111 | #define REG_GPIODATAOUT1		0x6 | 
|  | 112 | #define REG_GPIODATAOUT2		0x7 | 
|  | 113 | #define REG_GPIODATAOUT3		0x8 | 
|  | 114 | #define REG_CLEARGPIODATAOUT1		0x9 | 
|  | 115 | #define REG_CLEARGPIODATAOUT2		0xA | 
|  | 116 | #define REG_CLEARGPIODATAOUT3		0xB | 
|  | 117 | #define REG_SETGPIODATAOUT1		0xC | 
|  | 118 | #define REG_SETGPIODATAOUT2		0xD | 
|  | 119 | #define REG_SETGPIODATAOUT3		0xE | 
|  | 120 | #define REG_GPIO_DEBEN1			0xF | 
|  | 121 | #define REG_GPIO_DEBEN2			0x10 | 
|  | 122 | #define REG_GPIO_DEBEN3			0x11 | 
|  | 123 | #define REG_GPIO_CTRL			0x12 | 
|  | 124 | #define REG_GPIOPUPDCTR1		0x13 | 
|  | 125 | #define REG_GPIOPUPDCTR2		0x14 | 
|  | 126 | #define REG_GPIOPUPDCTR3		0x15 | 
|  | 127 | #define REG_GPIOPUPDCTR4		0x16 | 
|  | 128 | #define REG_GPIOPUPDCTR5		0x17 | 
|  | 129 | #define REG_GPIO_ISR1A			0x19 | 
|  | 130 | #define REG_GPIO_ISR2A			0x1A | 
|  | 131 | #define REG_GPIO_ISR3A			0x1B | 
|  | 132 | #define REG_GPIO_IMR1A			0x1C | 
|  | 133 | #define REG_GPIO_IMR2A			0x1D | 
|  | 134 | #define REG_GPIO_IMR3A			0x1E | 
|  | 135 | #define REG_GPIO_ISR1B			0x1F | 
|  | 136 | #define REG_GPIO_ISR2B			0x20 | 
|  | 137 | #define REG_GPIO_ISR3B			0x21 | 
|  | 138 | #define REG_GPIO_IMR1B			0x22 | 
|  | 139 | #define REG_GPIO_IMR2B			0x23 | 
|  | 140 | #define REG_GPIO_IMR3B			0x24 | 
|  | 141 | #define REG_GPIO_EDR1			0x28 | 
|  | 142 | #define REG_GPIO_EDR2			0x29 | 
|  | 143 | #define REG_GPIO_EDR3			0x2A | 
|  | 144 | #define REG_GPIO_EDR4			0x2B | 
|  | 145 | #define REG_GPIO_EDR5			0x2C | 
|  | 146 | #define REG_GPIO_SIH_CTRL		0x2D | 
|  | 147 |  | 
|  | 148 | /* Up to 18 signals are available as GPIOs, when their | 
|  | 149 | * pins are not assigned to another use (such as ULPI/USB). | 
|  | 150 | */ | 
|  | 151 | #define TWL4030_GPIO_MAX		18 | 
|  | 152 |  | 
|  | 153 | /*----------------------------------------------------------------------*/ | 
|  | 154 |  | 
|  | 155 | /* | 
|  | 156 | * Keypad register offsets (use TWL4030_MODULE_KEYPAD) | 
|  | 157 | * ... SIH/interrupt only | 
|  | 158 | */ | 
|  | 159 |  | 
|  | 160 | #define TWL4030_KEYPAD_KEYP_ISR1	0x11 | 
|  | 161 | #define TWL4030_KEYPAD_KEYP_IMR1	0x12 | 
|  | 162 | #define TWL4030_KEYPAD_KEYP_ISR2	0x13 | 
|  | 163 | #define TWL4030_KEYPAD_KEYP_IMR2	0x14 | 
|  | 164 | #define TWL4030_KEYPAD_KEYP_SIR		0x15	/* test register */ | 
|  | 165 | #define TWL4030_KEYPAD_KEYP_EDR		0x16 | 
|  | 166 | #define TWL4030_KEYPAD_KEYP_SIH_CTRL	0x17 | 
|  | 167 |  | 
|  | 168 | /*----------------------------------------------------------------------*/ | 
|  | 169 |  | 
|  | 170 | /* | 
|  | 171 | * Multichannel ADC register offsets (use TWL4030_MODULE_MADC) | 
|  | 172 | * ... SIH/interrupt only | 
|  | 173 | */ | 
|  | 174 |  | 
|  | 175 | #define TWL4030_MADC_ISR1		0x61 | 
|  | 176 | #define TWL4030_MADC_IMR1		0x62 | 
|  | 177 | #define TWL4030_MADC_ISR2		0x63 | 
|  | 178 | #define TWL4030_MADC_IMR2		0x64 | 
|  | 179 | #define TWL4030_MADC_SIR		0x65	/* test register */ | 
|  | 180 | #define TWL4030_MADC_EDR		0x66 | 
|  | 181 | #define TWL4030_MADC_SIH_CTRL		0x67 | 
|  | 182 |  | 
|  | 183 | /*----------------------------------------------------------------------*/ | 
|  | 184 |  | 
|  | 185 | /* | 
|  | 186 | * Battery charger register offsets (use TWL4030_MODULE_INTERRUPTS) | 
|  | 187 | */ | 
|  | 188 |  | 
|  | 189 | #define TWL4030_INTERRUPTS_BCIISR1A	0x0 | 
|  | 190 | #define TWL4030_INTERRUPTS_BCIISR2A	0x1 | 
|  | 191 | #define TWL4030_INTERRUPTS_BCIIMR1A	0x2 | 
|  | 192 | #define TWL4030_INTERRUPTS_BCIIMR2A	0x3 | 
|  | 193 | #define TWL4030_INTERRUPTS_BCIISR1B	0x4 | 
|  | 194 | #define TWL4030_INTERRUPTS_BCIISR2B	0x5 | 
|  | 195 | #define TWL4030_INTERRUPTS_BCIIMR1B	0x6 | 
|  | 196 | #define TWL4030_INTERRUPTS_BCIIMR2B	0x7 | 
|  | 197 | #define TWL4030_INTERRUPTS_BCISIR1	0x8	/* test register */ | 
|  | 198 | #define TWL4030_INTERRUPTS_BCISIR2	0x9	/* test register */ | 
|  | 199 | #define TWL4030_INTERRUPTS_BCIEDR1	0xa | 
|  | 200 | #define TWL4030_INTERRUPTS_BCIEDR2	0xb | 
|  | 201 | #define TWL4030_INTERRUPTS_BCIEDR3	0xc | 
|  | 202 | #define TWL4030_INTERRUPTS_BCISIHCTRL	0xd | 
|  | 203 |  | 
|  | 204 | /*----------------------------------------------------------------------*/ | 
|  | 205 |  | 
|  | 206 | /* | 
|  | 207 | * Power Interrupt block register offsets (use TWL4030_MODULE_INT) | 
|  | 208 | */ | 
|  | 209 |  | 
|  | 210 | #define TWL4030_INT_PWR_ISR1		0x0 | 
|  | 211 | #define TWL4030_INT_PWR_IMR1		0x1 | 
|  | 212 | #define TWL4030_INT_PWR_ISR2		0x2 | 
|  | 213 | #define TWL4030_INT_PWR_IMR2		0x3 | 
|  | 214 | #define TWL4030_INT_PWR_SIR		0x4	/* test register */ | 
|  | 215 | #define TWL4030_INT_PWR_EDR1		0x5 | 
|  | 216 | #define TWL4030_INT_PWR_EDR2		0x6 | 
|  | 217 | #define TWL4030_INT_PWR_SIH_CTRL	0x7 | 
|  | 218 |  | 
|  | 219 | /*----------------------------------------------------------------------*/ | 
|  | 220 |  | 
| David Brownell | fa16a5c | 2009-02-08 10:37:06 -0800 | [diff] [blame] | 221 | /* Power bus message definitions */ | 
|  | 222 |  | 
|  | 223 | #define DEV_GRP_NULL		0x0 | 
|  | 224 | #define DEV_GRP_P1		0x1 | 
|  | 225 | #define DEV_GRP_P2		0x2 | 
|  | 226 | #define DEV_GRP_P3		0x4 | 
|  | 227 |  | 
|  | 228 | #define RES_GRP_RES		0x0 | 
|  | 229 | #define RES_GRP_PP		0x1 | 
|  | 230 | #define RES_GRP_RC		0x2 | 
|  | 231 | #define RES_GRP_PP_RC		0x3 | 
|  | 232 | #define RES_GRP_PR		0x4 | 
|  | 233 | #define RES_GRP_PP_PR		0x5 | 
|  | 234 | #define RES_GRP_RC_PR		0x6 | 
|  | 235 | #define RES_GRP_ALL		0x7 | 
|  | 236 |  | 
|  | 237 | #define RES_TYPE2_R0		0x0 | 
|  | 238 |  | 
|  | 239 | #define RES_TYPE_ALL		0x7 | 
|  | 240 |  | 
|  | 241 | #define RES_STATE_WRST		0xF | 
|  | 242 | #define RES_STATE_ACTIVE	0xE | 
|  | 243 | #define RES_STATE_SLEEP		0x8 | 
|  | 244 | #define RES_STATE_OFF		0x0 | 
|  | 245 |  | 
|  | 246 | /* | 
|  | 247 | * Power Bus Message Format ... these can be sent individually by Linux, | 
|  | 248 | * but are usually part of downloaded scripts that are run when various | 
|  | 249 | * power events are triggered. | 
|  | 250 | * | 
|  | 251 | *  Broadcast Message (16 Bits): | 
|  | 252 | *    DEV_GRP[15:13] MT[12]  RES_GRP[11:9]  RES_TYPE2[8:7] RES_TYPE[6:4] | 
|  | 253 | *    RES_STATE[3:0] | 
|  | 254 | * | 
|  | 255 | *  Singular Message (16 Bits): | 
|  | 256 | *    DEV_GRP[15:13] MT[12]  RES_ID[11:4]  RES_STATE[3:0] | 
|  | 257 | */ | 
|  | 258 |  | 
|  | 259 | #define MSG_BROADCAST(devgrp, grp, type, type2, state) \ | 
|  | 260 | ( (devgrp) << 13 | 1 << 12 | (grp) << 9 | (type2) << 7 \ | 
|  | 261 | | (type) << 4 | (state)) | 
|  | 262 |  | 
|  | 263 | #define MSG_SINGULAR(devgrp, id, state) \ | 
|  | 264 | ((devgrp) << 13 | 0 << 12 | (id) << 4 | (state)) | 
|  | 265 |  | 
|  | 266 | /*----------------------------------------------------------------------*/ | 
|  | 267 |  | 
| David Brownell | a603a7f | 2008-10-15 12:15:39 +0200 | [diff] [blame] | 268 | struct twl4030_bci_platform_data { | 
|  | 269 | int *battery_tmp_tbl; | 
|  | 270 | unsigned int tblsize; | 
|  | 271 | }; | 
|  | 272 |  | 
|  | 273 | /* TWL4030_GPIO_MAX (18) GPIOs, with interrupts */ | 
|  | 274 | struct twl4030_gpio_platform_data { | 
|  | 275 | int		gpio_base; | 
|  | 276 | unsigned	irq_base, irq_end; | 
|  | 277 |  | 
| David Brownell | a30d46c | 2008-10-20 23:46:28 +0200 | [diff] [blame] | 278 | /* package the two LED signals as output-only GPIOs? */ | 
|  | 279 | bool		use_leds; | 
|  | 280 |  | 
|  | 281 | /* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */ | 
|  | 282 | u8		mmc_cd; | 
|  | 283 |  | 
| David Brownell | cabb3fc | 2009-01-06 14:42:26 -0800 | [diff] [blame] | 284 | /* if BIT(N) is set, or VMMC(n+1) is linked, debounce GPIO-N */ | 
|  | 285 | u32		debounce; | 
|  | 286 |  | 
| David Brownell | a603a7f | 2008-10-15 12:15:39 +0200 | [diff] [blame] | 287 | /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup | 
|  | 288 | * should be enabled.  Else, if that bit is set in "pulldowns", | 
|  | 289 | * that pulldown is enabled.  Don't waste power by letting any | 
|  | 290 | * digital inputs float... | 
|  | 291 | */ | 
|  | 292 | u32		pullups; | 
|  | 293 | u32		pulldowns; | 
|  | 294 |  | 
|  | 295 | int		(*setup)(struct device *dev, | 
|  | 296 | unsigned gpio, unsigned ngpio); | 
|  | 297 | int		(*teardown)(struct device *dev, | 
|  | 298 | unsigned gpio, unsigned ngpio); | 
|  | 299 | }; | 
|  | 300 |  | 
|  | 301 | struct twl4030_madc_platform_data { | 
|  | 302 | int		irq_line; | 
|  | 303 | }; | 
|  | 304 |  | 
|  | 305 | struct twl4030_keypad_data { | 
|  | 306 | int rows; | 
|  | 307 | int cols; | 
|  | 308 | int *keymap; | 
|  | 309 | int irq; | 
|  | 310 | unsigned int keymapsize; | 
|  | 311 | unsigned int rep:1; | 
|  | 312 | }; | 
|  | 313 |  | 
|  | 314 | enum twl4030_usb_mode { | 
|  | 315 | T2_USB_MODE_ULPI = 1, | 
|  | 316 | T2_USB_MODE_CEA2011_3PIN = 2, | 
|  | 317 | }; | 
|  | 318 |  | 
|  | 319 | struct twl4030_usb_data { | 
|  | 320 | enum twl4030_usb_mode	usb_mode; | 
|  | 321 | }; | 
|  | 322 |  | 
|  | 323 | struct twl4030_platform_data { | 
|  | 324 | unsigned				irq_base, irq_end; | 
|  | 325 | struct twl4030_bci_platform_data	*bci; | 
|  | 326 | struct twl4030_gpio_platform_data	*gpio; | 
|  | 327 | struct twl4030_madc_platform_data	*madc; | 
|  | 328 | struct twl4030_keypad_data		*keypad; | 
|  | 329 | struct twl4030_usb_data			*usb; | 
|  | 330 |  | 
| David Brownell | dad759f | 2008-12-01 00:43:58 +0100 | [diff] [blame] | 331 | /* LDO regulators */ | 
|  | 332 | struct regulator_init_data		*vdac; | 
|  | 333 | struct regulator_init_data		*vpll1; | 
|  | 334 | struct regulator_init_data		*vpll2; | 
|  | 335 | struct regulator_init_data		*vmmc1; | 
|  | 336 | struct regulator_init_data		*vmmc2; | 
|  | 337 | struct regulator_init_data		*vsim; | 
|  | 338 | struct regulator_init_data		*vaux1; | 
|  | 339 | struct regulator_init_data		*vaux2; | 
|  | 340 | struct regulator_init_data		*vaux3; | 
|  | 341 | struct regulator_init_data		*vaux4; | 
|  | 342 |  | 
| David Brownell | a603a7f | 2008-10-15 12:15:39 +0200 | [diff] [blame] | 343 | /* REVISIT more to come ... _nothing_ should be hard-wired */ | 
|  | 344 | }; | 
|  | 345 |  | 
|  | 346 | /*----------------------------------------------------------------------*/ | 
|  | 347 |  | 
| David Brownell | a30d46c | 2008-10-20 23:46:28 +0200 | [diff] [blame] | 348 | int twl4030_sih_setup(int module); | 
|  | 349 |  | 
| David Brownell | a603a7f | 2008-10-15 12:15:39 +0200 | [diff] [blame] | 350 | /* Offsets to Power Registers */ | 
|  | 351 | #define TWL4030_VDAC_DEV_GRP		0x3B | 
|  | 352 | #define TWL4030_VDAC_DEDICATED		0x3E | 
|  | 353 | #define TWL4030_VAUX1_DEV_GRP		0x17 | 
|  | 354 | #define TWL4030_VAUX1_DEDICATED		0x1A | 
|  | 355 | #define TWL4030_VAUX2_DEV_GRP		0x1B | 
|  | 356 | #define TWL4030_VAUX2_DEDICATED		0x1E | 
|  | 357 | #define TWL4030_VAUX3_DEV_GRP		0x1F | 
|  | 358 | #define TWL4030_VAUX3_DEDICATED		0x22 | 
|  | 359 |  | 
| David Brownell | a603a7f | 2008-10-15 12:15:39 +0200 | [diff] [blame] | 360 |  | 
|  | 361 | #if defined(CONFIG_TWL4030_BCI_BATTERY) || \ | 
|  | 362 | defined(CONFIG_TWL4030_BCI_BATTERY_MODULE) | 
|  | 363 | extern int twl4030charger_usb_en(int enable); | 
|  | 364 | #else | 
|  | 365 | static inline int twl4030charger_usb_en(int enable) { return 0; } | 
|  | 366 | #endif | 
|  | 367 |  | 
| David Brownell | dad759f | 2008-12-01 00:43:58 +0100 | [diff] [blame] | 368 | /*----------------------------------------------------------------------*/ | 
|  | 369 |  | 
|  | 370 | /* Linux-specific regulator identifiers ... for now, we only support | 
|  | 371 | * the LDOs, and leave the three buck converters alone.  VDD1 and VDD2 | 
|  | 372 | * need to tie into hardware based voltage scaling (cpufreq etc), while | 
|  | 373 | * VIO is generally fixed. | 
|  | 374 | */ | 
|  | 375 |  | 
|  | 376 | /* EXTERNAL dc-to-dc buck converters */ | 
|  | 377 | #define TWL4030_REG_VDD1	0 | 
|  | 378 | #define TWL4030_REG_VDD2	1 | 
|  | 379 | #define TWL4030_REG_VIO		2 | 
|  | 380 |  | 
|  | 381 | /* EXTERNAL LDOs */ | 
|  | 382 | #define TWL4030_REG_VDAC	3 | 
|  | 383 | #define TWL4030_REG_VPLL1	4 | 
|  | 384 | #define TWL4030_REG_VPLL2	5	/* not on all chips */ | 
|  | 385 | #define TWL4030_REG_VMMC1	6 | 
|  | 386 | #define TWL4030_REG_VMMC2	7	/* not on all chips */ | 
|  | 387 | #define TWL4030_REG_VSIM	8	/* not on all chips */ | 
|  | 388 | #define TWL4030_REG_VAUX1	9	/* not on all chips */ | 
|  | 389 | #define TWL4030_REG_VAUX2_4030	10	/* (twl4030-specific) */ | 
|  | 390 | #define TWL4030_REG_VAUX2	11	/* (twl5030 and newer) */ | 
|  | 391 | #define TWL4030_REG_VAUX3	12	/* not on all chips */ | 
|  | 392 | #define TWL4030_REG_VAUX4	13	/* not on all chips */ | 
|  | 393 |  | 
|  | 394 | /* INTERNAL LDOs */ | 
|  | 395 | #define TWL4030_REG_VINTANA1	14 | 
|  | 396 | #define TWL4030_REG_VINTANA2	15 | 
|  | 397 | #define TWL4030_REG_VINTDIG	16 | 
|  | 398 | #define TWL4030_REG_VUSB1V5	17 | 
|  | 399 | #define TWL4030_REG_VUSB1V8	18 | 
|  | 400 | #define TWL4030_REG_VUSB3V1	19 | 
| David Brownell | dad759f | 2008-12-01 00:43:58 +0100 | [diff] [blame] | 401 |  | 
| David Brownell | a603a7f | 2008-10-15 12:15:39 +0200 | [diff] [blame] | 402 | #endif /* End of __TWL4030_H */ |