blob: e792eb7ae6a0ad9d862629883b470a044035ac1c [file] [log] [blame]
Roy Huang088eec12007-06-21 11:34:16 +08001/*
2 * File: include/asm-blackfin/mach-bf548/mem_init.h
3 * Based on:
4 * Author:
5 *
6 * Created:
7 * Description:
8 *
9 * Rev:
10 *
11 * Modified:
12 * Copyright 2004-2006 Analog Devices Inc.
13 *
14 * Bugs: Enter bugs at http://blackfin.uclinux.org/
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; see the file COPYING.
28 * If not, write to the Free Software Foundation,
29 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
30 */
31
32#if (CONFIG_MEM_MT46V32M16)
Sonic Zhangfb5f0042007-12-23 23:02:13 +080033#endif
Roy Huang088eec12007-06-21 11:34:16 +080034
35#if defined CONFIG_CLKIN_HALF
36#define CLKIN_HALF 1
37#else
38#define CLKIN_HALF 0
39#endif
40
41#if defined CONFIG_PLL_BYPASS
42#define PLL_BYPASS 1
43#else
44#define PLL_BYPASS 0
45#endif
46
47/***************************************Currently Not Being Used *********************************/
48#define flash_EBIU_AMBCTL_WAT ((CONFIG_FLASH_SPEED_BWAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
49#define flash_EBIU_AMBCTL_RAT ((CONFIG_FLASH_SPEED_BRAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
50#define flash_EBIU_AMBCTL_HT ((CONFIG_FLASH_SPEED_BHT * 4) / (4000000000 / CONFIG_SCLK_HZ))
51#define flash_EBIU_AMBCTL_ST ((CONFIG_FLASH_SPEED_BST * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
52#define flash_EBIU_AMBCTL_TT ((CONFIG_FLASH_SPEED_BTT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1
53
54#if (flash_EBIU_AMBCTL_TT > 3)
55#define flash_EBIU_AMBCTL0_TT B0TT_4
56#endif
57#if (flash_EBIU_AMBCTL_TT == 3)
58#define flash_EBIU_AMBCTL0_TT B0TT_3
59#endif
60#if (flash_EBIU_AMBCTL_TT == 2)
61#define flash_EBIU_AMBCTL0_TT B0TT_2
62#endif
63#if (flash_EBIU_AMBCTL_TT < 2)
64#define flash_EBIU_AMBCTL0_TT B0TT_1
65#endif
66
67#if (flash_EBIU_AMBCTL_ST > 3)
68#define flash_EBIU_AMBCTL0_ST B0ST_4
69#endif
70#if (flash_EBIU_AMBCTL_ST == 3)
71#define flash_EBIU_AMBCTL0_ST B0ST_3
72#endif
73#if (flash_EBIU_AMBCTL_ST == 2)
74#define flash_EBIU_AMBCTL0_ST B0ST_2
75#endif
76#if (flash_EBIU_AMBCTL_ST < 2)
77#define flash_EBIU_AMBCTL0_ST B0ST_1
78#endif
79
80#if (flash_EBIU_AMBCTL_HT > 2)
81#define flash_EBIU_AMBCTL0_HT B0HT_3
82#endif
83#if (flash_EBIU_AMBCTL_HT == 2)
84#define flash_EBIU_AMBCTL0_HT B0HT_2
85#endif
86#if (flash_EBIU_AMBCTL_HT == 1)
87#define flash_EBIU_AMBCTL0_HT B0HT_1
88#endif
89#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT == 0)
90#define flash_EBIU_AMBCTL0_HT B0HT_0
91#endif
92#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT != 0)
93#define flash_EBIU_AMBCTL0_HT B0HT_1
94#endif
95
96#if (flash_EBIU_AMBCTL_WAT > 14)
97#define flash_EBIU_AMBCTL0_WAT B0WAT_15
98#endif
99#if (flash_EBIU_AMBCTL_WAT == 14)
100#define flash_EBIU_AMBCTL0_WAT B0WAT_14
101#endif
102#if (flash_EBIU_AMBCTL_WAT == 13)
103#define flash_EBIU_AMBCTL0_WAT B0WAT_13
104#endif
105#if (flash_EBIU_AMBCTL_WAT == 12)
106#define flash_EBIU_AMBCTL0_WAT B0WAT_12
107#endif
108#if (flash_EBIU_AMBCTL_WAT == 11)
109#define flash_EBIU_AMBCTL0_WAT B0WAT_11
110#endif
111#if (flash_EBIU_AMBCTL_WAT == 10)
112#define flash_EBIU_AMBCTL0_WAT B0WAT_10
113#endif
114#if (flash_EBIU_AMBCTL_WAT == 9)
115#define flash_EBIU_AMBCTL0_WAT B0WAT_9
116#endif
117#if (flash_EBIU_AMBCTL_WAT == 8)
118#define flash_EBIU_AMBCTL0_WAT B0WAT_8
119#endif
120#if (flash_EBIU_AMBCTL_WAT == 7)
121#define flash_EBIU_AMBCTL0_WAT B0WAT_7
122#endif
123#if (flash_EBIU_AMBCTL_WAT == 6)
124#define flash_EBIU_AMBCTL0_WAT B0WAT_6
125#endif
126#if (flash_EBIU_AMBCTL_WAT == 5)
127#define flash_EBIU_AMBCTL0_WAT B0WAT_5
128#endif
129#if (flash_EBIU_AMBCTL_WAT == 4)
130#define flash_EBIU_AMBCTL0_WAT B0WAT_4
131#endif
132#if (flash_EBIU_AMBCTL_WAT == 3)
133#define flash_EBIU_AMBCTL0_WAT B0WAT_3
134#endif
135#if (flash_EBIU_AMBCTL_WAT == 2)
136#define flash_EBIU_AMBCTL0_WAT B0WAT_2
137#endif
138#if (flash_EBIU_AMBCTL_WAT == 1)
139#define flash_EBIU_AMBCTL0_WAT B0WAT_1
140#endif
141
142#if (flash_EBIU_AMBCTL_RAT > 14)
143#define flash_EBIU_AMBCTL0_RAT B0RAT_15
144#endif
145#if (flash_EBIU_AMBCTL_RAT == 14)
146#define flash_EBIU_AMBCTL0_RAT B0RAT_14
147#endif
148#if (flash_EBIU_AMBCTL_RAT == 13)
149#define flash_EBIU_AMBCTL0_RAT B0RAT_13
150#endif
151#if (flash_EBIU_AMBCTL_RAT == 12)
152#define flash_EBIU_AMBCTL0_RAT B0RAT_12
153#endif
154#if (flash_EBIU_AMBCTL_RAT == 11)
155#define flash_EBIU_AMBCTL0_RAT B0RAT_11
156#endif
157#if (flash_EBIU_AMBCTL_RAT == 10)
158#define flash_EBIU_AMBCTL0_RAT B0RAT_10
159#endif
160#if (flash_EBIU_AMBCTL_RAT == 9)
161#define flash_EBIU_AMBCTL0_RAT B0RAT_9
162#endif
163#if (flash_EBIU_AMBCTL_RAT == 8)
164#define flash_EBIU_AMBCTL0_RAT B0RAT_8
165#endif
166#if (flash_EBIU_AMBCTL_RAT == 7)
167#define flash_EBIU_AMBCTL0_RAT B0RAT_7
168#endif
169#if (flash_EBIU_AMBCTL_RAT == 6)
170#define flash_EBIU_AMBCTL0_RAT B0RAT_6
171#endif
172#if (flash_EBIU_AMBCTL_RAT == 5)
173#define flash_EBIU_AMBCTL0_RAT B0RAT_5
174#endif
175#if (flash_EBIU_AMBCTL_RAT == 4)
176#define flash_EBIU_AMBCTL0_RAT B0RAT_4
177#endif
178#if (flash_EBIU_AMBCTL_RAT == 3)
179#define flash_EBIU_AMBCTL0_RAT B0RAT_3
180#endif
181#if (flash_EBIU_AMBCTL_RAT == 2)
182#define flash_EBIU_AMBCTL0_RAT B0RAT_2
183#endif
184#if (flash_EBIU_AMBCTL_RAT == 1)
185#define flash_EBIU_AMBCTL0_RAT B0RAT_1
186#endif
187
188#define flash_EBIU_AMBCTL0 \
189 (flash_EBIU_AMBCTL0_WAT | flash_EBIU_AMBCTL0_RAT | flash_EBIU_AMBCTL0_HT | \
190 flash_EBIU_AMBCTL0_ST | flash_EBIU_AMBCTL0_TT | CONFIG_FLASH_SPEED_RDYEN)