| Ido Shayevitz | ef72ddd | 2012-03-28 18:55:55 +0200 | [diff] [blame] | 1 | MSM SuperSpeed USB3.0 SoC controller |
| 2 | |
| 3 | Required properties : |
| 4 | - compatible : should be "qcom,dwc-usb3-msm" |
| 5 | - reg : offset and length of the register set in the memory map |
| Manu Gautam | 17206c2 | 2012-06-21 10:17:53 +0530 | [diff] [blame] | 6 | - interrupts: IRQ lines used by this controller |
| 7 | - interrupt-names : Required interrupt resource entries are: |
| 8 | "irq" : Interrupt for DWC3 core |
| 9 | "otg_irq" : Interrupt for DWC3 core's OTG Events |
| 10 | - <supply-name>-supply: phandle to the regulator device tree node |
| 11 | Required "supply-name" examples are "SSUSB_VDDCX", "SSUSB_1p8", |
| 12 | "HSUSB_VDDCX", "HSUSB_1p8", "HSUSB_3p3". |
| Ido Shayevitz | ef72ddd | 2012-03-28 18:55:55 +0200 | [diff] [blame] | 13 | - qcom,dwc-usb3-msm-dbm-eps: Number of endpoints avaliable for |
| 14 | the DBM (Device Bus Manager). The DBM is HW unit which is part of |
| 15 | the MSM USB3.0 core (which also includes the Synopsys DesignWare |
| 16 | USB3.0 controller) |
| 17 | |
| 18 | Example MSM USB3.0 controller device node : |
| 19 | usb@f9200000 { |
| 20 | compatible = "qcom,dwc-usb3-msm"; |
| Manu Gautam | 17206c2 | 2012-06-21 10:17:53 +0530 | [diff] [blame] | 21 | reg = <0xF9200000 0xFA000>; |
| 22 | interrupts = <0 131 0 0 179 0>; |
| 23 | interrupt-names = "irq", "otg_irq"; |
| 24 | SSUSB_VDDCX-supply = <&pm8841_s2>; |
| 25 | SSUSB_1p8-supply = <&pm8941_l6>; |
| 26 | HSUSB_VDDCX-supply = <&pm8841_s2>; |
| 27 | HSUSB_1p8-supply = <&pm8941_l6>; |
| 28 | HSUSB_3p3-supply = <&pm8941_l24>; |
| Ido Shayevitz | ef72ddd | 2012-03-28 18:55:55 +0200 | [diff] [blame] | 29 | qcom,dwc-usb3-msm-dbm-eps = <4> |
| 30 | }; |