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Dmitry Shmidt8ce17272011-05-24 11:14:33 -07001/*
2 * Misc utility routines for accessing PMU corerev specific features
3 * of the SiliconBackplane-based Broadcom chips.
4 *
Dmitry Shmidt83252322012-03-16 12:52:00 -07005 * Copyright (C) 1999-2012, Broadcom Corporation
Dmitry Shmidt8ce17272011-05-24 11:14:33 -07006 *
Dmitry Shmidt83252322012-03-16 12:52:00 -07007 * Unless you and Broadcom execute a separate written software license
Dmitry Shmidt8ce17272011-05-24 11:14:33 -07008 * agreement governing use of this software, this software is licensed to you
9 * under the terms of the GNU General Public License version 2 (the "GPL"),
10 * available at http://www.broadcom.com/licenses/GPLv2.php, with the
11 * following added to such license:
12 *
13 * As a special exception, the copyright holders of this software give you
14 * permission to link this software with independent modules, and to copy and
15 * distribute the resulting executable under terms of your choice, provided that
16 * you also meet, for each linked independent module, the terms and conditions of
17 * the license of that module. An independent module is a module which is not
18 * derived from this software. The special exception does not apply to any
19 * modifications of the software.
20 *
21 * Notwithstanding the above, under no circumstances may you combine this
22 * software in any way with any other Broadcom software provided under a license
23 * other than the GPL, without Broadcom's express prior written consent.
24 *
Dmitry Shmidt4a3a0fa2012-04-12 10:18:39 -070025 * $Id: hndpmu.c 324060 2012-03-27 23:26:47Z $
Dmitry Shmidt8ce17272011-05-24 11:14:33 -070026 */
27
Dmitry Shmidt83252322012-03-16 12:52:00 -070028#include <bcm_cfg.h>
Dmitry Shmidt8ce17272011-05-24 11:14:33 -070029#include <typedefs.h>
30#include <bcmdefs.h>
31#include <osl.h>
32#include <bcmutils.h>
33#include <siutils.h>
34#include <bcmdevs.h>
35#include <hndsoc.h>
36#include <sbchipc.h>
37#include <hndpmu.h>
38
39#define PMU_ERROR(args)
40
41#define PMU_MSG(args)
42
43/* To check in verbose debugging messages not intended
44 * to be on except on private builds.
45 */
46#define PMU_NONE(args)
47
48
49/* SDIO Pad drive strength to select value mappings.
50 * The last strength value in each table must be 0 (the tri-state value).
51 */
52typedef struct {
53 uint8 strength; /* Pad Drive Strength in mA */
54 uint8 sel; /* Chip-specific select value */
55} sdiod_drive_str_t;
56
57/* SDIO Drive Strength to sel value table for PMU Rev 1 */
58static const sdiod_drive_str_t sdiod_drive_strength_tab1[] = {
59 {4, 0x2},
60 {2, 0x3},
61 {1, 0x0},
62 {0, 0x0} };
63
64/* SDIO Drive Strength to sel value table for PMU Rev 2, 3 */
65static const sdiod_drive_str_t sdiod_drive_strength_tab2[] = {
66 {12, 0x7},
67 {10, 0x6},
68 {8, 0x5},
69 {6, 0x4},
70 {4, 0x2},
71 {2, 0x1},
72 {0, 0x0} };
73
74/* SDIO Drive Strength to sel value table for PMU Rev 8 (1.8V) */
75static const sdiod_drive_str_t sdiod_drive_strength_tab3[] = {
76 {32, 0x7},
77 {26, 0x6},
78 {22, 0x5},
79 {16, 0x4},
80 {12, 0x3},
81 {8, 0x2},
82 {4, 0x1},
83 {0, 0x0} };
84
85/* SDIO Drive Strength to sel value table for PMU Rev 11 (1.8v) */
86static const sdiod_drive_str_t sdiod_drive_strength_tab4_1v8[] = {
87 {32, 0x6},
88 {26, 0x7},
89 {22, 0x4},
90 {16, 0x5},
91 {12, 0x2},
92 {8, 0x3},
93 {4, 0x0},
94 {0, 0x1} };
95
96/* SDIO Drive Strength to sel value table for PMU Rev 11 (1.2v) */
97
98/* SDIO Drive Strength to sel value table for PMU Rev 11 (2.5v) */
99
100/* SDIO Drive Strength to sel value table for PMU Rev 13 (1.8v) */
101static const sdiod_drive_str_t sdiod_drive_strength_tab5_1v8[] = {
102 {6, 0x7},
103 {5, 0x6},
104 {4, 0x5},
105 {3, 0x4},
106 {2, 0x2},
107 {1, 0x1},
108 {0, 0x0} };
109
110/* SDIO Drive Strength to sel value table for PMU Rev 13 (3.3v) */
111
112
113#define SDIOD_DRVSTR_KEY(chip, pmu) (((chip) << 16) | (pmu))
114
115void
116si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength)
117{
118 chipcregs_t *cc;
119 uint origidx, intr_val = 0;
120 sdiod_drive_str_t *str_tab = NULL;
121 uint32 str_mask = 0;
122 uint32 str_shift = 0;
123
124 if (!(sih->cccaps & CC_CAP_PMU)) {
125 return;
126 }
127
128 /* Remember original core before switch to chipc */
129 cc = (chipcregs_t *) si_switch_core(sih, CC_CORE_ID, &origidx, &intr_val);
130
131 switch (SDIOD_DRVSTR_KEY(sih->chip, sih->pmurev)) {
132 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 1):
133 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab1;
134 str_mask = 0x30000000;
135 str_shift = 28;
136 break;
137 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 2):
138 case SDIOD_DRVSTR_KEY(BCM4325_CHIP_ID, 3):
139 case SDIOD_DRVSTR_KEY(BCM4315_CHIP_ID, 4):
140 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab2;
141 str_mask = 0x00003800;
142 str_shift = 11;
143 break;
144 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 8):
145 case SDIOD_DRVSTR_KEY(BCM4336_CHIP_ID, 11):
146 if (sih->pmurev == 8) {
147 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab3;
148 }
149 else if (sih->pmurev == 11) {
150 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab4_1v8;
151 }
152 str_mask = 0x00003800;
153 str_shift = 11;
154 break;
155 case SDIOD_DRVSTR_KEY(BCM4330_CHIP_ID, 12):
156 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab4_1v8;
157 str_mask = 0x00003800;
158 str_shift = 11;
159 break;
160 case SDIOD_DRVSTR_KEY(BCM43362_CHIP_ID, 13):
161 str_tab = (sdiod_drive_str_t *)&sdiod_drive_strength_tab5_1v8;
162 str_mask = 0x00003800;
163 str_shift = 11;
164 break;
165 default:
166 PMU_MSG(("No SDIO Drive strength init done for chip %s rev %d pmurev %d\n",
167 bcm_chipname(sih->chip, chn, 8), sih->chiprev, sih->pmurev));
168
169 break;
170 }
171
172 if (str_tab != NULL) {
173 uint32 cc_data_temp;
174 int i;
175
176 /* Pick the lowest available drive strength equal or greater than the
177 * requested strength. Drive strength of 0 requests tri-state.
178 */
179 for (i = 0; drivestrength < str_tab[i].strength; i++)
180 ;
181
182 if (i > 0 && drivestrength > str_tab[i].strength)
183 i--;
184
185 W_REG(osh, &cc->chipcontrol_addr, 1);
186 cc_data_temp = R_REG(osh, &cc->chipcontrol_data);
187 cc_data_temp &= ~str_mask;
188 cc_data_temp |= str_tab[i].sel << str_shift;
189 W_REG(osh, &cc->chipcontrol_data, cc_data_temp);
190
191 PMU_MSG(("SDIO: %dmA drive strength requested; set to %dmA\n",
192 drivestrength, str_tab[i].strength));
193 }
194
195 /* Return to original core */
196 si_restore_core(sih, origidx, intr_val);
197}