Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* |
Duy Truong | e833aca | 2013-02-12 13:35:08 -0800 | [diff] [blame] | 2 | * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved. |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef __MFD_PM8XXX_MISC_H__ |
| 15 | #define __MFD_PM8XXX_MISC_H__ |
| 16 | |
| 17 | #include <linux/err.h> |
| 18 | |
| 19 | #define PM8XXX_MISC_DEV_NAME "pm8xxx-misc" |
| 20 | |
| 21 | /** |
| 22 | * struct pm8xxx_misc_platform_data - PM8xxx misc driver platform data |
| 23 | * @priority: PMIC prority level in a multi-PMIC system. Lower value means |
| 24 | * greater priority. Actions are performed from highest to lowest |
| 25 | * priority PMIC. |
| 26 | */ |
| 27 | struct pm8xxx_misc_platform_data { |
| 28 | int priority; |
| 29 | }; |
| 30 | |
Anirudh Ghayal | 5213eb8 | 2011-10-24 14:44:58 +0530 | [diff] [blame] | 31 | enum pm8xxx_uart_path_sel { |
| 32 | UART_NONE, |
| 33 | UART_TX1_RX1, |
| 34 | UART_TX2_RX2, |
| 35 | UART_TX3_RX3, |
| 36 | }; |
| 37 | |
Anirudh Ghayal | 7b38229 | 2011-11-01 14:08:34 +0530 | [diff] [blame] | 38 | enum pm8xxx_coincell_chg_voltage { |
| 39 | PM8XXX_COINCELL_VOLTAGE_3p2V = 1, |
| 40 | PM8XXX_COINCELL_VOLTAGE_3p1V, |
| 41 | PM8XXX_COINCELL_VOLTAGE_3p0V, |
| 42 | PM8XXX_COINCELL_VOLTAGE_2p5V = 16 |
| 43 | }; |
| 44 | |
| 45 | enum pm8xxx_coincell_chg_resistor { |
| 46 | PM8XXX_COINCELL_RESISTOR_2100_OHMS, |
| 47 | PM8XXX_COINCELL_RESISTOR_1700_OHMS, |
| 48 | PM8XXX_COINCELL_RESISTOR_1200_OHMS, |
| 49 | PM8XXX_COINCELL_RESISTOR_800_OHMS |
| 50 | }; |
| 51 | |
| 52 | enum pm8xxx_coincell_chg_state { |
| 53 | PM8XXX_COINCELL_CHG_DISABLE, |
| 54 | PM8XXX_COINCELL_CHG_ENABLE |
| 55 | }; |
| 56 | |
| 57 | struct pm8xxx_coincell_chg { |
| 58 | enum pm8xxx_coincell_chg_state state; |
| 59 | enum pm8xxx_coincell_chg_voltage voltage; |
| 60 | enum pm8xxx_coincell_chg_resistor resistor; |
| 61 | }; |
| 62 | |
Anirudh Ghayal | bfbaf82 | 2011-11-01 14:28:34 +0530 | [diff] [blame] | 63 | enum pm8xxx_smpl_delay { |
| 64 | PM8XXX_SMPL_DELAY_0p5, |
| 65 | PM8XXX_SMPL_DELAY_1p0, |
| 66 | PM8XXX_SMPL_DELAY_1p5, |
| 67 | PM8XXX_SMPL_DELAY_2p0, |
| 68 | }; |
| 69 | |
Anirudh Ghayal | a4262a3 | 2011-11-10 00:02:18 +0530 | [diff] [blame] | 70 | enum pm8xxx_pon_config { |
| 71 | PM8XXX_DISABLE_HARD_RESET = 0, |
| 72 | PM8XXX_SHUTDOWN_ON_HARD_RESET, |
| 73 | PM8XXX_RESTART_ON_HARD_RESET, |
| 74 | }; |
| 75 | |
Amy Maloche | 4c994c9 | 2012-02-15 09:56:15 -0800 | [diff] [blame] | 76 | enum pm8xxx_aux_clk_id { |
| 77 | CLK_MP3_1, |
| 78 | CLK_MP3_2, |
| 79 | }; |
| 80 | |
| 81 | enum pm8xxx_aux_clk_div { |
Amy Maloche | aae56f9 | 2012-04-04 11:07:43 -0700 | [diff] [blame] | 82 | XO_DIV_NONE, |
Amy Maloche | 4c994c9 | 2012-02-15 09:56:15 -0800 | [diff] [blame] | 83 | XO_DIV_1, |
| 84 | XO_DIV_2, |
| 85 | XO_DIV_4, |
| 86 | XO_DIV_8, |
| 87 | XO_DIV_16, |
| 88 | XO_DIV_32, |
| 89 | XO_DIV_64, |
| 90 | }; |
| 91 | |
Anirudh Ghayal | ba4ea6e | 2012-05-09 15:59:28 +0530 | [diff] [blame] | 92 | enum pm8xxx_hsed_bias { |
| 93 | PM8XXX_HSED_BIAS0, |
| 94 | PM8XXX_HSED_BIAS1, |
| 95 | PM8XXX_HSED_BIAS2, |
| 96 | }; |
| 97 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 98 | #if defined(CONFIG_MFD_PM8XXX_MISC) || defined(CONFIG_MFD_PM8XXX_MISC_MODULE) |
| 99 | |
| 100 | /** |
| 101 | * pm8xxx_reset_pwr_off - switch all PM8XXX PMIC chips attached to the system to |
| 102 | * either reset or shutdown when they are turned off |
| 103 | * @reset: 0 = shudown the PMICs, 1 = shutdown and then restart the PMICs |
| 104 | * |
| 105 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 106 | */ |
| 107 | int pm8xxx_reset_pwr_off(int reset); |
| 108 | |
Anirudh Ghayal | 5213eb8 | 2011-10-24 14:44:58 +0530 | [diff] [blame] | 109 | int pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel); |
| 110 | |
Anirudh Ghayal | 7b38229 | 2011-11-01 14:08:34 +0530 | [diff] [blame] | 111 | /** |
| 112 | * pm8xxx_coincell_chg_config - Disables or enables the coincell charger, and |
| 113 | * configures its voltage and resistor settings. |
| 114 | * @chg_config: Holds both voltage and resistor values, and a |
| 115 | * switch to change the state of charger. |
| 116 | * If state is to disable the charger then |
| 117 | * both voltage and resistor are disregarded. |
| 118 | * |
| 119 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 120 | */ |
| 121 | int pm8xxx_coincell_chg_config(struct pm8xxx_coincell_chg *chg_config); |
| 122 | |
Anirudh Ghayal | bfbaf82 | 2011-11-01 14:28:34 +0530 | [diff] [blame] | 123 | /** |
| 124 | * pm8xxx_smpl_control - enables/disables SMPL detection |
| 125 | * @enable: 0 = shutdown PMIC on power loss, 1 = reset PMIC on power loss |
| 126 | * |
| 127 | * This function enables or disables the Sudden Momentary Power Loss detection |
| 128 | * module. If SMPL detection is enabled, then when a sufficiently long power |
| 129 | * loss event occurs, the PMIC will automatically reset itself. If SMPL |
| 130 | * detection is disabled, then the PMIC will shutdown when power loss occurs. |
| 131 | * |
| 132 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 133 | */ |
| 134 | int pm8xxx_smpl_control(int enable); |
| 135 | |
| 136 | /** |
| 137 | * pm8xxx_smpl_set_delay - sets the SMPL detection time delay |
| 138 | * @delay: enum value corresponding to delay time |
| 139 | * |
| 140 | * This function sets the time delay of the SMPL detection module. If power |
| 141 | * is reapplied within this interval, then the PMIC reset automatically. The |
| 142 | * SMPL detection module must be enabled for this delay time to take effect. |
| 143 | * |
| 144 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 145 | */ |
| 146 | int pm8xxx_smpl_set_delay(enum pm8xxx_smpl_delay delay); |
| 147 | |
Anirudh Ghayal | a23c1ca | 2011-11-01 14:36:24 +0530 | [diff] [blame] | 148 | /** |
| 149 | * pm8xxx_watchdog_reset_control - enables/disables watchdog reset detection |
| 150 | * @enable: 0 = shutdown when PS_HOLD goes low, 1 = reset when PS_HOLD goes low |
| 151 | * |
| 152 | * This function enables or disables the PMIC watchdog reset detection feature. |
| 153 | * If watchdog reset detection is enabled, then the PMIC will reset itself |
| 154 | * when PS_HOLD goes low. If it is not enabled, then the PMIC will shutdown |
| 155 | * when PS_HOLD goes low. |
| 156 | * |
| 157 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 158 | */ |
| 159 | int pm8xxx_watchdog_reset_control(int enable); |
| 160 | |
Anirudh Ghayal | a4262a3 | 2011-11-10 00:02:18 +0530 | [diff] [blame] | 161 | /** |
| 162 | * pm8xxx_hard_reset_config - Allows different reset configurations |
| 163 | * |
| 164 | * config = DISABLE_HARD_RESET to disable hard reset |
| 165 | * = SHUTDOWN_ON_HARD_RESET to turn off the system on hard reset |
| 166 | * = RESTART_ON_HARD_RESET to restart the system on hard reset |
| 167 | * |
| 168 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 169 | */ |
| 170 | int pm8xxx_hard_reset_config(enum pm8xxx_pon_config config); |
| 171 | |
Anirudh Ghayal | 51e947f | 2011-11-01 14:49:45 +0530 | [diff] [blame] | 172 | /** |
| 173 | * pm8xxx_stay_on - enables stay_on feature |
| 174 | * |
| 175 | * PMIC stay-on feature allows PMIC to ignore MSM PS_HOLD=low |
| 176 | * signal so that some special functions like debugging could be |
| 177 | * performed. |
| 178 | * |
| 179 | * This feature should not be used in any product release. |
| 180 | * |
| 181 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 182 | */ |
| 183 | int pm8xxx_stay_on(void); |
| 184 | |
David Collins | 4724272 | 2012-01-20 11:34:58 -0800 | [diff] [blame] | 185 | /** |
| 186 | * pm8xxx_preload_dVdd - preload the dVdd regulator during off state. |
| 187 | * |
| 188 | * This can help to reduce fluctuations in the dVdd voltage during startup |
| 189 | * at the cost of additional off state current draw. |
| 190 | * |
| 191 | * This API should only be called if dVdd startup issues are suspected. |
| 192 | * |
| 193 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 194 | */ |
| 195 | int pm8xxx_preload_dVdd(void); |
| 196 | |
Willie Ruan | 5db1f24 | 2012-01-30 22:08:04 -0800 | [diff] [blame] | 197 | /** |
| 198 | * pm8xxx_usb_id_pullup - Control a pullup for USB ID |
| 199 | * |
| 200 | * @enable: enable (1) or disable (0) the pullup |
| 201 | * |
| 202 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 203 | */ |
| 204 | int pm8xxx_usb_id_pullup(int enable); |
| 205 | |
Amy Maloche | 4c994c9 | 2012-02-15 09:56:15 -0800 | [diff] [blame] | 206 | /** |
| 207 | * pm8xxx_aux_clk_control - Control an auxiliary clock |
| 208 | * @clk_id: ID of clock to be programmed, registers of XO_CNTRL2 |
| 209 | * @divider: divisor to use when configuring desired clock |
| 210 | * @enable: enable (1) the designated clock with the supplied division, |
| 211 | * or disable (0) the designated clock |
| 212 | * |
| 213 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 214 | */ |
| 215 | int pm8xxx_aux_clk_control(enum pm8xxx_aux_clk_id clk_id, |
| 216 | enum pm8xxx_aux_clk_div divider, |
| 217 | bool enable); |
| 218 | |
Anirudh Ghayal | ba4ea6e | 2012-05-09 15:59:28 +0530 | [diff] [blame] | 219 | /** |
| 220 | * pm8xxx_hsed_bias_control - Control the HSED_BIAS signal |
| 221 | * @bias: the bias line to be controlled (of the 3) |
| 222 | * @enable: enable/disable the bias line |
| 223 | * |
| 224 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 225 | */ |
| 226 | int pm8xxx_hsed_bias_control(enum pm8xxx_hsed_bias bias, bool enable); |
Anirudh Ghayal | e5f33a8 | 2013-01-22 08:50:46 +0530 | [diff] [blame] | 227 | |
| 228 | /** |
| 229 | * pm8xxx_read_register - Read a PMIC register |
| 230 | * @addr: PMIC register address |
| 231 | * @value: Output parameter which gets the value of the register read. |
| 232 | * |
| 233 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 234 | */ |
| 235 | int pm8xxx_read_register(u16 addr, u8 *value); |
| 236 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 237 | #else |
| 238 | |
| 239 | static inline int pm8xxx_reset_pwr_off(int reset) |
| 240 | { |
| 241 | return -ENODEV; |
| 242 | } |
Anirudh Ghayal | 5213eb8 | 2011-10-24 14:44:58 +0530 | [diff] [blame] | 243 | static inline int |
| 244 | pm8xxx_uart_gpio_mux_ctrl(enum pm8xxx_uart_path_sel uart_path_sel) |
| 245 | { |
| 246 | return -ENODEV; |
| 247 | } |
Anirudh Ghayal | 7b38229 | 2011-11-01 14:08:34 +0530 | [diff] [blame] | 248 | static inline int |
| 249 | pm8xxx_coincell_chg_config(struct pm8xxx_coincell_chg *chg_config) |
| 250 | { |
| 251 | return -ENODEV; |
| 252 | } |
Anirudh Ghayal | bfbaf82 | 2011-11-01 14:28:34 +0530 | [diff] [blame] | 253 | static inline int pm8xxx_smpl_set_delay(enum pm8xxx_smpl_delay delay) |
| 254 | { |
| 255 | return -ENODEV; |
| 256 | } |
| 257 | static inline int pm8xxx_smpl_control(int enable) |
| 258 | { |
| 259 | return -ENODEV; |
| 260 | } |
Anirudh Ghayal | a23c1ca | 2011-11-01 14:36:24 +0530 | [diff] [blame] | 261 | static inline int pm8xxx_watchdog_reset_control(int enable) |
| 262 | { |
| 263 | return -ENODEV; |
| 264 | } |
Anirudh Ghayal | a4262a3 | 2011-11-10 00:02:18 +0530 | [diff] [blame] | 265 | static inline int pm8xxx_hard_reset_config(enum pm8xxx_pon_config config) |
| 266 | { |
| 267 | return -ENODEV; |
| 268 | } |
Anirudh Ghayal | 51e947f | 2011-11-01 14:49:45 +0530 | [diff] [blame] | 269 | static inline int pm8xxx_stay_on(void) |
| 270 | { |
| 271 | return -ENODEV; |
| 272 | } |
David Collins | 4724272 | 2012-01-20 11:34:58 -0800 | [diff] [blame] | 273 | static inline int pm8xxx_preload_dVdd(void) |
| 274 | { |
| 275 | return -ENODEV; |
| 276 | } |
Willie Ruan | 5db1f24 | 2012-01-30 22:08:04 -0800 | [diff] [blame] | 277 | static inline int pm8xxx_usb_id_pullup(int enable) |
| 278 | { |
| 279 | return -ENODEV; |
| 280 | } |
Amy Maloche | 4c994c9 | 2012-02-15 09:56:15 -0800 | [diff] [blame] | 281 | static inline int pm8xxx_aux_clk_control(enum pm8xxx_aux_clk_id clk_id, |
| 282 | enum pm8xxx_aux_clk_div divider, bool enable) |
| 283 | { |
| 284 | return -ENODEV; |
| 285 | } |
Anirudh Ghayal | ba4ea6e | 2012-05-09 15:59:28 +0530 | [diff] [blame] | 286 | static inline int pm8xxx_hsed_bias_control(enum pm8xxx_hsed_bias bias, |
| 287 | bool enable) |
| 288 | { |
| 289 | return -ENODEV; |
| 290 | } |
Amy Maloche | 4c994c9 | 2012-02-15 09:56:15 -0800 | [diff] [blame] | 291 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 292 | #endif |
| 293 | |
| 294 | #endif |