| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | menu "DMA support" |
| 2 | |
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame^] | 3 | config SH_DMA_API |
| 4 | bool |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | |
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame^] | 6 | config SH_DMA |
| 7 | bool "SuperH on-chip DMA controller (DMAC) support" |
| 8 | select SH_DMA_API |
| 9 | default n |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | |
| 11 | config NR_ONCHIP_DMA_CHANNELS |
| 12 | depends on SH_DMA |
| 13 | int "Number of on-chip DMAC channels" |
| Paul Mundt | 5283ecb | 2006-09-27 15:59:17 +0900 | [diff] [blame] | 14 | default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R |
| 15 | default "12" if CPU_SUBTYPE_SH7780 |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | default "4" |
| 17 | help |
| 18 | This allows you to specify the number of channels that the on-chip |
| 19 | DMAC supports. This will be 4 for SH7750/SH7751 and 8 for the |
| 20 | SH7750R/SH7751R. |
| 21 | |
| 22 | config NR_DMA_CHANNELS_BOOL |
| 23 | depends on SH_DMA |
| 24 | bool "Override default number of maximum DMA channels" |
| 25 | help |
| 26 | This allows you to forcibly update the maximum number of supported |
| 27 | DMA channels for a given board. If this is unset, this will default |
| 28 | to the number of channels that the on-chip DMAC has. |
| 29 | |
| 30 | config NR_DMA_CHANNELS |
| 31 | int "Maximum number of DMA channels" |
| 32 | depends on SH_DMA && NR_DMA_CHANNELS_BOOL |
| 33 | default NR_ONCHIP_DMA_CHANNELS |
| 34 | help |
| 35 | This allows you to specify the maximum number of DMA channels to |
| 36 | support. Setting this to a higher value allows for cascading DMACs |
| 37 | with additional channels. |
| 38 | |
| 39 | config DMA_PAGE_OPS |
| 40 | bool "Use DMAC for page copy/clear" |
| 41 | depends on SH_DMA && BROKEN |
| 42 | help |
| 43 | Selecting this option will use a dual-address mode configured channel |
| 44 | in the SH DMAC for copy_page()/clear_page(). Primarily a performance |
| 45 | hack. |
| 46 | |
| 47 | config DMA_PAGE_OPS_CHANNEL |
| 48 | depends on DMA_PAGE_OPS |
| 49 | int "DMA channel for sh memory-manager page copy/clear" |
| 50 | default "3" |
| 51 | help |
| 52 | This allows the specification of the dual address dma channel, |
| 53 | in case channel 3 is unavailable. On the SH4, channels 1,2, and 3 |
| 54 | are dual-address capable. |
| 55 | |
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame^] | 56 | config SH_DMABRG |
| 57 | bool "SH7760 DMABRG support" |
| 58 | depends on CPU_SUBTYPE_SH7760 |
| 59 | help |
| 60 | The DMABRG does data transfers from main memory to Audio/USB units |
| 61 | of the SH7760. |
| 62 | Say Y if you want to use Audio/USB DMA on your SH7760 board. |
| 63 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 64 | endmenu |