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Paul Mackerras14cf11a2005-09-26 16:04:21 +10001/*
Paul Mackerras14cf11a2005-09-26 16:04:21 +10002 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
11 */
12
13/*
14 * This file handles the architecture-dependent parts of hardware exceptions
15 */
16
Paul Mackerras14cf11a2005-09-26 16:04:21 +100017#include <linux/errno.h>
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/mm.h>
21#include <linux/stddef.h>
22#include <linux/unistd.h>
Paul Mackerras8dad3f92005-10-06 13:27:05 +100023#include <linux/ptrace.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100024#include <linux/user.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100025#include <linux/interrupt.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100026#include <linux/init.h>
27#include <linux/module.h>
Paul Mackerras8dad3f92005-10-06 13:27:05 +100028#include <linux/prctl.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100029#include <linux/delay.h>
30#include <linux/kprobes.h>
Michael Ellermancc532912005-12-04 18:39:43 +110031#include <linux/kexec.h>
Michael Hanselmann5474c122006-06-25 05:47:08 -070032#include <linux/backlight.h>
Jeremy Fitzhardinge73c9cea2006-12-08 03:30:41 -080033#include <linux/bug.h>
Christoph Hellwig1eeb66a2007-05-08 00:27:03 -070034#include <linux/kdebug.h>
Geert Uytterhoeven80947e72009-05-18 02:10:05 +000035#include <linux/debugfs.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100036
Geert Uytterhoeven80947e72009-05-18 02:10:05 +000037#include <asm/emulated_ops.h>
Paul Mackerras14cf11a2005-09-26 16:04:21 +100038#include <asm/pgtable.h>
39#include <asm/uaccess.h>
40#include <asm/system.h>
41#include <asm/io.h>
Paul Mackerras86417782005-10-10 22:37:57 +100042#include <asm/machdep.h>
43#include <asm/rtas.h>
David Gibsonf7f6f4f2005-10-19 14:53:32 +100044#include <asm/pmc.h>
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100045#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +100046#include <asm/reg.h>
Paul Mackerras86417782005-10-10 22:37:57 +100047#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +100048#ifdef CONFIG_PMAC_BACKLIGHT
49#include <asm/backlight.h>
50#endif
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100051#ifdef CONFIG_PPC64
Paul Mackerras86417782005-10-10 22:37:57 +100052#include <asm/firmware.h>
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100053#include <asm/processor.h>
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100054#endif
David Wilderc0ce7d02006-06-23 15:29:34 -070055#include <asm/kexec.h>
Kumar Gala16c57b32009-02-10 20:10:44 +000056#include <asm/ppc-opcode.h>
Kumar Gala620165f2009-02-12 13:54:53 +000057#ifdef CONFIG_FSL_BOOKE
58#include <asm/dbell.h>
59#endif
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +100060
Olof Johansson7dbb9222008-01-31 14:34:47 +110061#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
Anton Blanchard5be34922010-01-12 00:50:14 +000062int (*__debugger)(struct pt_regs *regs) __read_mostly;
63int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly;
64int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly;
65int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly;
66int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly;
67int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly;
68int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly;
Paul Mackerras14cf11a2005-09-26 16:04:21 +100069
70EXPORT_SYMBOL(__debugger);
71EXPORT_SYMBOL(__debugger_ipi);
72EXPORT_SYMBOL(__debugger_bpt);
73EXPORT_SYMBOL(__debugger_sstep);
74EXPORT_SYMBOL(__debugger_iabr_match);
75EXPORT_SYMBOL(__debugger_dabr_match);
76EXPORT_SYMBOL(__debugger_fault_handler);
77#endif
78
Paul Mackerras14cf11a2005-09-26 16:04:21 +100079/*
80 * Trap & Exception support
81 */
82
anton@samba.org6031d9d2007-03-20 20:38:12 -050083#ifdef CONFIG_PMAC_BACKLIGHT
84static void pmac_backlight_unblank(void)
85{
86 mutex_lock(&pmac_backlight_mutex);
87 if (pmac_backlight) {
88 struct backlight_properties *props;
89
90 props = &pmac_backlight->props;
91 props->brightness = props->max_brightness;
92 props->power = FB_BLANK_UNBLANK;
93 backlight_update_status(pmac_backlight);
94 }
95 mutex_unlock(&pmac_backlight_mutex);
96}
97#else
98static inline void pmac_backlight_unblank(void) { }
99#endif
100
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000101int die(const char *str, struct pt_regs *regs, long err)
102{
anton@samba.org34c2a142007-03-20 20:38:13 -0500103 static struct {
Thomas Gleixnerb8f87782010-02-18 02:22:31 +0000104 raw_spinlock_t lock;
anton@samba.org34c2a142007-03-20 20:38:13 -0500105 u32 lock_owner;
106 int lock_owner_depth;
107 } die = {
Thomas Gleixnerb8f87782010-02-18 02:22:31 +0000108 .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock),
anton@samba.org34c2a142007-03-20 20:38:13 -0500109 .lock_owner = -1,
110 .lock_owner_depth = 0
111 };
David Wilderc0ce7d02006-06-23 15:29:34 -0700112 static int die_counter;
anton@samba.org34c2a142007-03-20 20:38:13 -0500113 unsigned long flags;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000114
115 if (debugger(regs))
116 return 1;
117
anton@samba.org293e4682007-03-20 20:38:11 -0500118 oops_enter();
119
anton@samba.org34c2a142007-03-20 20:38:13 -0500120 if (die.lock_owner != raw_smp_processor_id()) {
121 console_verbose();
Thomas Gleixnerb8f87782010-02-18 02:22:31 +0000122 raw_spin_lock_irqsave(&die.lock, flags);
anton@samba.org34c2a142007-03-20 20:38:13 -0500123 die.lock_owner = smp_processor_id();
124 die.lock_owner_depth = 0;
125 bust_spinlocks(1);
126 if (machine_is(powermac))
127 pmac_backlight_unblank();
128 } else {
129 local_save_flags(flags);
130 }
Michael Hanselmann5474c122006-06-25 05:47:08 -0700131
anton@samba.org34c2a142007-03-20 20:38:13 -0500132 if (++die.lock_owner_depth < 3) {
133 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000134#ifdef CONFIG_PREEMPT
anton@samba.org34c2a142007-03-20 20:38:13 -0500135 printk("PREEMPT ");
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000136#endif
137#ifdef CONFIG_SMP
anton@samba.org34c2a142007-03-20 20:38:13 -0500138 printk("SMP NR_CPUS=%d ", NR_CPUS);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000139#endif
140#ifdef CONFIG_DEBUG_PAGEALLOC
anton@samba.org34c2a142007-03-20 20:38:13 -0500141 printk("DEBUG_PAGEALLOC ");
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000142#endif
143#ifdef CONFIG_NUMA
anton@samba.org34c2a142007-03-20 20:38:13 -0500144 printk("NUMA ");
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000145#endif
anton@samba.orgae7f4462007-03-20 20:38:14 -0500146 printk("%s\n", ppc_md.name ? ppc_md.name : "");
Benjamin Herrenschmidte8222502006-03-28 23:15:54 +1100147
Anton Blanchard66fcb102010-02-07 14:44:16 +0000148 sysfs_printk_last_file();
149 if (notify_die(DIE_OOPS, str, regs, err, 255,
150 SIGSEGV) == NOTIFY_STOP)
151 return 1;
152
anton@samba.org34c2a142007-03-20 20:38:13 -0500153 print_modules();
154 show_regs(regs);
155 } else {
156 printk("Recursive die() failure, output suppressed\n");
157 }
158
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000159 bust_spinlocks(0);
anton@samba.org34c2a142007-03-20 20:38:13 -0500160 die.lock_owner = -1;
Pavel Emelianovbcdcd8e2007-07-17 04:03:42 -0700161 add_taint(TAINT_DIE);
Thomas Gleixnerb8f87782010-02-18 02:22:31 +0000162 raw_spin_unlock_irqrestore(&die.lock, flags);
David Wilderc0ce7d02006-06-23 15:29:34 -0700163
164 if (kexec_should_crash(current) ||
165 kexec_sr_activated(smp_processor_id()))
166 crash_kexec(regs);
167 crash_kexec_secondary(regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000168
169 if (in_interrupt())
170 panic("Fatal exception in interrupt");
171
Hormscea6a4b2006-07-30 03:03:34 -0700172 if (panic_on_oops)
Horms012c4372006-08-13 23:24:22 -0700173 panic("Fatal exception");
Hormscea6a4b2006-07-30 03:03:34 -0700174
anton@samba.org293e4682007-03-20 20:38:11 -0500175 oops_exit();
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000176 do_exit(err);
177
178 return 0;
179}
180
Oleg Nesterov25baa352009-12-15 16:47:18 -0800181void user_single_step_siginfo(struct task_struct *tsk,
182 struct pt_regs *regs, siginfo_t *info)
183{
184 memset(info, 0, sizeof(*info));
185 info->si_signo = SIGTRAP;
186 info->si_code = TRAP_TRACE;
187 info->si_addr = (void __user *)regs->nip;
188}
189
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000190void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
191{
192 siginfo_t info;
Olof Johanssond0c3d532007-10-12 10:20:07 +1000193 const char fmt32[] = KERN_INFO "%s[%d]: unhandled signal %d " \
194 "at %08lx nip %08lx lr %08lx code %x\n";
195 const char fmt64[] = KERN_INFO "%s[%d]: unhandled signal %d " \
196 "at %016lx nip %016lx lr %016lx code %x\n";
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000197
198 if (!user_mode(regs)) {
199 if (die("Exception in kernel mode", regs, signr))
200 return;
Olof Johanssond0c3d532007-10-12 10:20:07 +1000201 } else if (show_unhandled_signals &&
202 unhandled_signal(current, signr) &&
203 printk_ratelimit()) {
204 printk(regs->msr & MSR_SF ? fmt64 : fmt32,
205 current->comm, current->pid, signr,
206 addr, regs->nip, regs->link, code);
207 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000208
209 memset(&info, 0, sizeof(info));
210 info.si_signo = signr;
211 info.si_code = code;
212 info.si_addr = (void __user *) addr;
213 force_sig_info(signr, &info, current);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000214}
215
216#ifdef CONFIG_PPC64
217void system_reset_exception(struct pt_regs *regs)
218{
219 /* See if any machine dependent calls */
Arnd Bergmannc902be72006-01-04 19:55:53 +0000220 if (ppc_md.system_reset_exception) {
221 if (ppc_md.system_reset_exception(regs))
222 return;
223 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000224
David Wilderc0ce7d02006-06-23 15:29:34 -0700225#ifdef CONFIG_KEXEC
226 cpu_set(smp_processor_id(), cpus_in_sr);
227#endif
228
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000229 die("System Reset", regs, SIGABRT);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000230
David Wildereac83922006-06-29 15:17:30 -0700231 /*
232 * Some CPUs when released from the debugger will execute this path.
233 * These CPUs entered the debugger via a soft-reset. If the CPU was
234 * hung before entering the debugger it will return to the hung
235 * state when exiting this function. This causes a problem in
236 * kdump since the hung CPU(s) will not respond to the IPI sent
237 * from kdump. To prevent the problem we call crash_kexec_secondary()
238 * here. If a kdump had not been initiated or we exit the debugger
239 * with the "exit and recover" command (x) crash_kexec_secondary()
240 * will return after 5ms and the CPU returns to its previous state.
241 */
242 crash_kexec_secondary(regs);
243
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000244 /* Must die if the interrupt is not recoverable */
245 if (!(regs->msr & MSR_RI))
246 panic("Unrecoverable System Reset");
247
248 /* What should we do here? We could issue a shutdown or hard reset. */
249}
250#endif
251
252/*
253 * I/O accesses can cause machine checks on powermacs.
254 * Check if the NIP corresponds to the address of a sync
255 * instruction for which there is an entry in the exception
256 * table.
257 * Note that the 601 only takes a machine check on TEA
258 * (transfer error ack) signal assertion, and does not
259 * set any of the top 16 bits of SRR1.
260 * -- paulus.
261 */
262static inline int check_io_access(struct pt_regs *regs)
263{
Benjamin Herrenschmidt68a64352006-11-13 09:27:39 +1100264#ifdef CONFIG_PPC32
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000265 unsigned long msr = regs->msr;
266 const struct exception_table_entry *entry;
267 unsigned int *nip = (unsigned int *)regs->nip;
268
269 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
270 && (entry = search_exception_tables(regs->nip)) != NULL) {
271 /*
272 * Check that it's a sync instruction, or somewhere
273 * in the twi; isync; nop sequence that inb/inw/inl uses.
274 * As the address is in the exception table
275 * we should be able to read the instr there.
276 * For the debug message, we look at the preceding
277 * load or store.
278 */
279 if (*nip == 0x60000000) /* nop */
280 nip -= 2;
281 else if (*nip == 0x4c00012c) /* isync */
282 --nip;
283 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
284 /* sync or twi */
285 unsigned int rb;
286
287 --nip;
288 rb = (*nip >> 11) & 0x1f;
289 printk(KERN_DEBUG "%s bad port %lx at %p\n",
290 (*nip & 0x100)? "OUT to": "IN from",
291 regs->gpr[rb] - _IO_BASE, nip);
292 regs->msr |= MSR_RI;
293 regs->nip = entry->fixup;
294 return 1;
295 }
296 }
Benjamin Herrenschmidt68a64352006-11-13 09:27:39 +1100297#endif /* CONFIG_PPC32 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000298 return 0;
299}
300
Dave Kleikamp172ae2e2010-02-08 11:50:57 +0000301#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000302/* On 4xx, the reason for the machine check or program exception
303 is in the ESR. */
304#define get_reason(regs) ((regs)->dsisr)
305#ifndef CONFIG_FSL_BOOKE
306#define get_mc_reason(regs) ((regs)->dsisr)
307#else
Becky Bruce86d7a9a2007-08-02 15:37:15 -0500308#define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000309#endif
310#define REASON_FP ESR_FP
311#define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
312#define REASON_PRIVILEGED ESR_PPR
313#define REASON_TRAP ESR_PTR
314
315/* single-step stuff */
316#define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
317#define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
318
319#else
320/* On non-4xx, the reason for the machine check or program
321 exception is in the MSR. */
322#define get_reason(regs) ((regs)->msr)
323#define get_mc_reason(regs) ((regs)->msr)
324#define REASON_FP 0x100000
325#define REASON_ILLEGAL 0x80000
326#define REASON_PRIVILEGED 0x40000
327#define REASON_TRAP 0x20000
328
329#define single_stepping(regs) ((regs)->msr & MSR_SE)
330#define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
331#endif
332
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100333#if defined(CONFIG_4xx)
334int machine_check_4xx(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000335{
Kumar Gala1a6a4ff2006-03-30 21:11:15 -0600336 unsigned long reason = get_mc_reason(regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000337
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000338 if (reason & ESR_IMCP) {
339 printk("Instruction");
340 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
341 } else
342 printk("Data");
343 printk(" machine check in kernel mode.\n");
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100344
345 return 0;
346}
347
348int machine_check_440A(struct pt_regs *regs)
349{
350 unsigned long reason = get_mc_reason(regs);
351
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000352 printk("Machine check in kernel mode.\n");
353 if (reason & ESR_IMCP){
354 printk("Instruction Synchronous Machine Check exception\n");
355 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
356 }
357 else {
358 u32 mcsr = mfspr(SPRN_MCSR);
359 if (mcsr & MCSR_IB)
360 printk("Instruction Read PLB Error\n");
361 if (mcsr & MCSR_DRB)
362 printk("Data Read PLB Error\n");
363 if (mcsr & MCSR_DWB)
364 printk("Data Write PLB Error\n");
365 if (mcsr & MCSR_TLBP)
366 printk("TLB Parity Error\n");
367 if (mcsr & MCSR_ICP){
368 flush_instruction_cache();
369 printk("I-Cache Parity Error\n");
370 }
371 if (mcsr & MCSR_DCSP)
372 printk("D-Cache Search Parity Error\n");
373 if (mcsr & MCSR_DCFP)
374 printk("D-Cache Flush Parity Error\n");
375 if (mcsr & MCSR_IMPE)
376 printk("Machine Check exception is imprecise\n");
377
378 /* Clear MCSR */
379 mtspr(SPRN_MCSR, mcsr);
380 }
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100381 return 0;
382}
Dave Kleikampfc5e7092010-03-05 03:43:18 +0000383
384int machine_check_47x(struct pt_regs *regs)
385{
386 unsigned long reason = get_mc_reason(regs);
387 u32 mcsr;
388
389 printk(KERN_ERR "Machine check in kernel mode.\n");
390 if (reason & ESR_IMCP) {
391 printk(KERN_ERR
392 "Instruction Synchronous Machine Check exception\n");
393 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
394 return 0;
395 }
396 mcsr = mfspr(SPRN_MCSR);
397 if (mcsr & MCSR_IB)
398 printk(KERN_ERR "Instruction Read PLB Error\n");
399 if (mcsr & MCSR_DRB)
400 printk(KERN_ERR "Data Read PLB Error\n");
401 if (mcsr & MCSR_DWB)
402 printk(KERN_ERR "Data Write PLB Error\n");
403 if (mcsr & MCSR_TLBP)
404 printk(KERN_ERR "TLB Parity Error\n");
405 if (mcsr & MCSR_ICP) {
406 flush_instruction_cache();
407 printk(KERN_ERR "I-Cache Parity Error\n");
408 }
409 if (mcsr & MCSR_DCSP)
410 printk(KERN_ERR "D-Cache Search Parity Error\n");
411 if (mcsr & PPC47x_MCSR_GPR)
412 printk(KERN_ERR "GPR Parity Error\n");
413 if (mcsr & PPC47x_MCSR_FPR)
414 printk(KERN_ERR "FPR Parity Error\n");
415 if (mcsr & PPC47x_MCSR_IPR)
416 printk(KERN_ERR "Machine Check exception is imprecise\n");
417
418 /* Clear MCSR */
419 mtspr(SPRN_MCSR, mcsr);
420
421 return 0;
422}
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100423#elif defined(CONFIG_E500)
424int machine_check_e500(struct pt_regs *regs)
425{
426 unsigned long reason = get_mc_reason(regs);
427
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000428 printk("Machine check in kernel mode.\n");
429 printk("Caused by (from MCSR=%lx): ", reason);
430
431 if (reason & MCSR_MCP)
432 printk("Machine Check Signal\n");
433 if (reason & MCSR_ICPERR)
434 printk("Instruction Cache Parity Error\n");
435 if (reason & MCSR_DCP_PERR)
436 printk("Data Cache Push Parity Error\n");
437 if (reason & MCSR_DCPERR)
438 printk("Data Cache Parity Error\n");
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000439 if (reason & MCSR_BUS_IAERR)
440 printk("Bus - Instruction Address Error\n");
441 if (reason & MCSR_BUS_RAERR)
442 printk("Bus - Read Address Error\n");
443 if (reason & MCSR_BUS_WAERR)
444 printk("Bus - Write Address Error\n");
445 if (reason & MCSR_BUS_IBERR)
446 printk("Bus - Instruction Data Error\n");
447 if (reason & MCSR_BUS_RBERR)
448 printk("Bus - Read Data Bus Error\n");
449 if (reason & MCSR_BUS_WBERR)
450 printk("Bus - Read Data Bus Error\n");
451 if (reason & MCSR_BUS_IPERR)
452 printk("Bus - Instruction Parity Error\n");
453 if (reason & MCSR_BUS_RPERR)
454 printk("Bus - Read Parity Error\n");
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100455
456 return 0;
457}
458#elif defined(CONFIG_E200)
459int machine_check_e200(struct pt_regs *regs)
460{
461 unsigned long reason = get_mc_reason(regs);
462
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000463 printk("Machine check in kernel mode.\n");
464 printk("Caused by (from MCSR=%lx): ", reason);
465
466 if (reason & MCSR_MCP)
467 printk("Machine Check Signal\n");
468 if (reason & MCSR_CP_PERR)
469 printk("Cache Push Parity Error\n");
470 if (reason & MCSR_CPERR)
471 printk("Cache Parity Error\n");
472 if (reason & MCSR_EXCP_ERR)
473 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
474 if (reason & MCSR_BUS_IRERR)
475 printk("Bus - Read Bus Error on instruction fetch\n");
476 if (reason & MCSR_BUS_DRERR)
477 printk("Bus - Read Bus Error on data load\n");
478 if (reason & MCSR_BUS_WRERR)
479 printk("Bus - Write Bus Error on buffered store or cache line push\n");
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100480
481 return 0;
482}
483#else
484int machine_check_generic(struct pt_regs *regs)
485{
486 unsigned long reason = get_mc_reason(regs);
487
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000488 printk("Machine check in kernel mode.\n");
489 printk("Caused by (from SRR1=%lx): ", reason);
490 switch (reason & 0x601F0000) {
491 case 0x80000:
492 printk("Machine check signal\n");
493 break;
494 case 0: /* for 601 */
495 case 0x40000:
496 case 0x140000: /* 7450 MSS error and TEA */
497 printk("Transfer error ack signal\n");
498 break;
499 case 0x20000:
500 printk("Data parity error signal\n");
501 break;
502 case 0x10000:
503 printk("Address parity error signal\n");
504 break;
505 case 0x20000000:
506 printk("L1 Data Cache error\n");
507 break;
508 case 0x40000000:
509 printk("L1 Instruction Cache error\n");
510 break;
511 case 0x00100000:
512 printk("L2 data cache parity error\n");
513 break;
514 default:
515 printk("Unknown values in msr\n");
516 }
Olof Johansson75918a42007-09-21 05:11:20 +1000517 return 0;
518}
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100519#endif /* everything else */
Olof Johansson75918a42007-09-21 05:11:20 +1000520
521void machine_check_exception(struct pt_regs *regs)
522{
523 int recover = 0;
524
Anton Blanchard89713ed2010-01-31 20:34:06 +0000525 __get_cpu_var(irq_stat).mce_exceptions++;
526
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100527 /* See if any machine dependent calls. In theory, we would want
528 * to call the CPU first, and call the ppc_md. one if the CPU
529 * one returns a positive number. However there is existing code
530 * that assumes the board gets a first chance, so let's keep it
531 * that way for now and fix things later. --BenH.
532 */
Olof Johansson75918a42007-09-21 05:11:20 +1000533 if (ppc_md.machine_check_exception)
534 recover = ppc_md.machine_check_exception(regs);
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100535 else if (cur_cpu_spec->machine_check)
536 recover = cur_cpu_spec->machine_check(regs);
Olof Johansson75918a42007-09-21 05:11:20 +1000537
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100538 if (recover > 0)
Olof Johansson75918a42007-09-21 05:11:20 +1000539 return;
540
541 if (user_mode(regs)) {
542 regs->msr |= MSR_RI;
543 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
544 return;
545 }
546
547#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
Benjamin Herrenschmidt47c0bd12007-12-21 15:39:21 +1100548 /* the qspan pci read routines can cause machine checks -- Cort
549 *
550 * yuck !!! that totally needs to go away ! There are better ways
551 * to deal with that than having a wart in the mcheck handler.
552 * -- BenH
553 */
Olof Johansson75918a42007-09-21 05:11:20 +1000554 bad_page_fault(regs, regs->dar, SIGBUS);
555 return;
556#endif
557
558 if (debugger_fault_handler(regs)) {
559 regs->msr |= MSR_RI;
560 return;
561 }
562
563 if (check_io_access(regs))
564 return;
565
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000566 if (debugger_fault_handler(regs))
567 return;
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000568 die("Machine check", regs, SIGBUS);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000569
570 /* Must die if the interrupt is not recoverable */
571 if (!(regs->msr & MSR_RI))
572 panic("Unrecoverable Machine check");
573}
574
575void SMIException(struct pt_regs *regs)
576{
577 die("System Management Interrupt", regs, SIGABRT);
578}
579
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000580void unknown_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000581{
582 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
583 regs->nip, regs->msr, regs->trap);
584
585 _exception(SIGTRAP, regs, 0, 0);
586}
587
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000588void instruction_breakpoint_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000589{
590 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
591 5, SIGTRAP) == NOTIFY_STOP)
592 return;
593 if (debugger_iabr_match(regs))
594 return;
595 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
596}
597
598void RunModeException(struct pt_regs *regs)
599{
600 _exception(SIGTRAP, regs, 0, 0);
601}
602
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000603void __kprobes single_step_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000604{
605 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
606
607 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
608 5, SIGTRAP) == NOTIFY_STOP)
609 return;
610 if (debugger_sstep(regs))
611 return;
612
613 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
614}
615
616/*
617 * After we have successfully emulated an instruction, we have to
618 * check if the instruction was being single-stepped, and if so,
619 * pretend we got a single-step exception. This was pointed out
620 * by Kumar Gala. -- paulus
621 */
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000622static void emulate_single_step(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000623{
624 if (single_stepping(regs)) {
625 clear_single_step(regs);
626 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
627 }
628}
629
Kumar Gala5fad2932007-02-07 01:47:59 -0600630static inline int __parse_fpscr(unsigned long fpscr)
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000631{
Kumar Gala5fad2932007-02-07 01:47:59 -0600632 int ret = 0;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000633
634 /* Invalid operation */
635 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600636 ret = FPE_FLTINV;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000637
638 /* Overflow */
639 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600640 ret = FPE_FLTOVF;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000641
642 /* Underflow */
643 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600644 ret = FPE_FLTUND;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000645
646 /* Divide by zero */
647 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600648 ret = FPE_FLTDIV;
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000649
650 /* Inexact result */
651 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
Kumar Gala5fad2932007-02-07 01:47:59 -0600652 ret = FPE_FLTRES;
653
654 return ret;
655}
656
657static void parse_fpe(struct pt_regs *regs)
658{
659 int code = 0;
660
661 flush_fp_to_thread(current);
662
663 code = __parse_fpscr(current->thread.fpscr.val);
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000664
665 _exception(SIGFPE, regs, code, regs->nip);
666}
667
668/*
669 * Illegal instruction emulation support. Originally written to
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000670 * provide the PVR to user applications using the mfspr rd, PVR.
671 * Return non-zero if we can't emulate, or -EFAULT if the associated
672 * memory access caused an access fault. Return zero on success.
673 *
674 * There are a couple of ways to do this, either "decode" the instruction
675 * or directly match lots of bits. In this case, matching lots of
676 * bits is faster and easier.
Paul Mackerras86417782005-10-10 22:37:57 +1000677 *
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000678 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000679static int emulate_string_inst(struct pt_regs *regs, u32 instword)
680{
681 u8 rT = (instword >> 21) & 0x1f;
682 u8 rA = (instword >> 16) & 0x1f;
683 u8 NB_RB = (instword >> 11) & 0x1f;
684 u32 num_bytes;
685 unsigned long EA;
686 int pos = 0;
687
688 /* Early out if we are an invalid form of lswx */
Kumar Gala16c57b32009-02-10 20:10:44 +0000689 if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000690 if ((rT == rA) || (rT == NB_RB))
691 return -EINVAL;
692
693 EA = (rA == 0) ? 0 : regs->gpr[rA];
694
Kumar Gala16c57b32009-02-10 20:10:44 +0000695 switch (instword & PPC_INST_STRING_MASK) {
696 case PPC_INST_LSWX:
697 case PPC_INST_STSWX:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000698 EA += NB_RB;
699 num_bytes = regs->xer & 0x7f;
700 break;
Kumar Gala16c57b32009-02-10 20:10:44 +0000701 case PPC_INST_LSWI:
702 case PPC_INST_STSWI:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000703 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
704 break;
705 default:
706 return -EINVAL;
707 }
708
709 while (num_bytes != 0)
710 {
711 u8 val;
712 u32 shift = 8 * (3 - (pos & 0x3));
713
Kumar Gala16c57b32009-02-10 20:10:44 +0000714 switch ((instword & PPC_INST_STRING_MASK)) {
715 case PPC_INST_LSWX:
716 case PPC_INST_LSWI:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000717 if (get_user(val, (u8 __user *)EA))
718 return -EFAULT;
719 /* first time updating this reg,
720 * zero it out */
721 if (pos == 0)
722 regs->gpr[rT] = 0;
723 regs->gpr[rT] |= val << shift;
724 break;
Kumar Gala16c57b32009-02-10 20:10:44 +0000725 case PPC_INST_STSWI:
726 case PPC_INST_STSWX:
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000727 val = regs->gpr[rT] >> shift;
728 if (put_user(val, (u8 __user *)EA))
729 return -EFAULT;
730 break;
731 }
732 /* move EA to next address */
733 EA += 1;
734 num_bytes--;
735
736 /* manage our position within the register */
737 if (++pos == 4) {
738 pos = 0;
739 if (++rT == 32)
740 rT = 0;
741 }
742 }
743
744 return 0;
745}
746
Will Schmidtc3412dc2006-08-30 13:11:38 -0500747static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword)
748{
749 u32 ra,rs;
750 unsigned long tmp;
751
752 ra = (instword >> 16) & 0x1f;
753 rs = (instword >> 21) & 0x1f;
754
755 tmp = regs->gpr[rs];
756 tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL);
757 tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL);
758 tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL;
759 regs->gpr[ra] = tmp;
760
761 return 0;
762}
763
Kumar Galac1469f12007-11-19 21:35:29 -0600764static int emulate_isel(struct pt_regs *regs, u32 instword)
765{
766 u8 rT = (instword >> 21) & 0x1f;
767 u8 rA = (instword >> 16) & 0x1f;
768 u8 rB = (instword >> 11) & 0x1f;
769 u8 BC = (instword >> 6) & 0x1f;
770 u8 bit;
771 unsigned long tmp;
772
773 tmp = (rA == 0) ? 0 : regs->gpr[rA];
774 bit = (regs->ccr >> (31 - BC)) & 0x1;
775
776 regs->gpr[rT] = bit ? tmp : regs->gpr[rB];
777
778 return 0;
779}
780
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000781static int emulate_instruction(struct pt_regs *regs)
782{
783 u32 instword;
784 u32 rd;
785
Paul Mackerrasfab5db92006-06-07 16:14:40 +1000786 if (!user_mode(regs) || (regs->msr & MSR_LE))
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000787 return -EINVAL;
788 CHECK_FULL_REGS(regs);
789
790 if (get_user(instword, (u32 __user *)(regs->nip)))
791 return -EFAULT;
792
793 /* Emulate the mfspr rD, PVR. */
Kumar Gala16c57b32009-02-10 20:10:44 +0000794 if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000795 PPC_WARN_EMULATED(mfpvr, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000796 rd = (instword >> 21) & 0x1f;
797 regs->gpr[rd] = mfspr(SPRN_PVR);
798 return 0;
799 }
800
801 /* Emulating the dcba insn is just a no-op. */
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000802 if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000803 PPC_WARN_EMULATED(dcba, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000804 return 0;
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000805 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000806
807 /* Emulate the mcrxr insn. */
Kumar Gala16c57b32009-02-10 20:10:44 +0000808 if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) {
Paul Mackerras86417782005-10-10 22:37:57 +1000809 int shift = (instword >> 21) & 0x1c;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000810 unsigned long msk = 0xf0000000UL >> shift;
811
Anton Blanchardeecff812009-10-27 18:46:55 +0000812 PPC_WARN_EMULATED(mcrxr, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000813 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
814 regs->xer &= ~0xf0000000UL;
815 return 0;
816 }
817
818 /* Emulate load/store string insn. */
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000819 if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000820 PPC_WARN_EMULATED(string, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000821 return emulate_string_inst(regs, instword);
Geert Uytterhoeven80947e72009-05-18 02:10:05 +0000822 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000823
Will Schmidtc3412dc2006-08-30 13:11:38 -0500824 /* Emulate the popcntb (Population Count Bytes) instruction. */
Kumar Gala16c57b32009-02-10 20:10:44 +0000825 if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000826 PPC_WARN_EMULATED(popcntb, regs);
Will Schmidtc3412dc2006-08-30 13:11:38 -0500827 return emulate_popcntb_inst(regs, instword);
828 }
829
Kumar Galac1469f12007-11-19 21:35:29 -0600830 /* Emulate isel (Integer Select) instruction */
Kumar Gala16c57b32009-02-10 20:10:44 +0000831 if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
Anton Blanchardeecff812009-10-27 18:46:55 +0000832 PPC_WARN_EMULATED(isel, regs);
Kumar Galac1469f12007-11-19 21:35:29 -0600833 return emulate_isel(regs, instword);
834 }
835
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000836 return -EINVAL;
837}
838
Jeremy Fitzhardinge73c9cea2006-12-08 03:30:41 -0800839int is_valid_bugaddr(unsigned long addr)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000840{
Jeremy Fitzhardinge73c9cea2006-12-08 03:30:41 -0800841 return is_kernel_addr(addr);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000842}
843
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000844void __kprobes program_check_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000845{
846 unsigned int reason = get_reason(regs);
847 extern int do_mathemu(struct pt_regs *regs);
848
Kim Phillipsaa42c692006-12-08 02:43:30 -0600849 /* We can now get here via a FP Unavailable exception if the core
Kumar Gala04903a32007-02-07 01:13:32 -0600850 * has no FPU, in that case the reason flags will be 0 */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000851
852 if (reason & REASON_FP) {
853 /* IEEE FP exception */
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000854 parse_fpe(regs);
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000855 return;
856 }
857 if (reason & REASON_TRAP) {
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000858 /* trap exception */
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000859 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
860 == NOTIFY_STOP)
861 return;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000862 if (debugger_bpt(regs))
863 return;
Jeremy Fitzhardinge73c9cea2006-12-08 03:30:41 -0800864
865 if (!(regs->msr & MSR_PR) && /* not user-mode */
Heiko Carstens608e2612007-07-15 23:41:39 -0700866 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000867 regs->nip += 4;
868 return;
869 }
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000870 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
871 return;
872 }
873
Paul Mackerrascd8a5672006-03-03 17:11:40 +1100874 local_irq_enable();
875
Kumar Gala04903a32007-02-07 01:13:32 -0600876#ifdef CONFIG_MATH_EMULATION
877 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
878 * but there seems to be a hardware bug on the 405GP (RevD)
879 * that means ESR is sometimes set incorrectly - either to
880 * ESR_DST (!?) or 0. In the process of chasing this with the
881 * hardware people - not sure if it can happen on any illegal
882 * instruction or only on FP instructions, whether there is a
883 * pattern to occurences etc. -dgibson 31/Mar/2003 */
Kumar Gala5fad2932007-02-07 01:47:59 -0600884 switch (do_mathemu(regs)) {
885 case 0:
Kumar Gala04903a32007-02-07 01:13:32 -0600886 emulate_single_step(regs);
887 return;
Kumar Gala5fad2932007-02-07 01:47:59 -0600888 case 1: {
889 int code = 0;
890 code = __parse_fpscr(current->thread.fpscr.val);
891 _exception(SIGFPE, regs, code, regs->nip);
892 return;
893 }
894 case -EFAULT:
895 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
896 return;
Kumar Gala04903a32007-02-07 01:13:32 -0600897 }
Kumar Gala5fad2932007-02-07 01:47:59 -0600898 /* fall through on any other errors */
Kumar Gala04903a32007-02-07 01:13:32 -0600899#endif /* CONFIG_MATH_EMULATION */
900
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000901 /* Try to emulate it if we should. */
902 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000903 switch (emulate_instruction(regs)) {
904 case 0:
905 regs->nip += 4;
906 emulate_single_step(regs);
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000907 return;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000908 case -EFAULT:
909 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000910 return;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000911 }
912 }
Paul Mackerras8dad3f92005-10-06 13:27:05 +1000913
914 if (reason & REASON_PRIVILEGED)
915 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
916 else
917 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000918}
919
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000920void alignment_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000921{
Benjamin Herrenschmidt4393c4f2006-11-01 15:11:39 +1100922 int sig, code, fixed = 0;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000923
Paul Mackerrase9370ae2006-06-07 16:15:39 +1000924 /* we don't implement logging of alignment exceptions */
925 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
926 fixed = fix_alignment(regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000927
928 if (fixed == 1) {
929 regs->nip += 4; /* skip over emulated instruction */
930 emulate_single_step(regs);
931 return;
932 }
933
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000934 /* Operand address was bad */
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000935 if (fixed == -EFAULT) {
Benjamin Herrenschmidt4393c4f2006-11-01 15:11:39 +1100936 sig = SIGSEGV;
937 code = SEGV_ACCERR;
938 } else {
939 sig = SIGBUS;
940 code = BUS_ADRALN;
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000941 }
Benjamin Herrenschmidt4393c4f2006-11-01 15:11:39 +1100942 if (user_mode(regs))
943 _exception(sig, regs, code, regs->dar);
944 else
945 bad_page_fault(regs, regs->dar, sig);
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000946}
947
948void StackOverflow(struct pt_regs *regs)
949{
950 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
951 current, regs->gpr[1]);
952 debugger(regs);
953 show_regs(regs);
954 panic("kernel stack overflow");
955}
956
957void nonrecoverable_exception(struct pt_regs *regs)
958{
959 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
960 regs->nip, regs->msr);
961 debugger(regs);
962 die("nonrecoverable exception", regs, SIGKILL);
963}
964
965void trace_syscall(struct pt_regs *regs)
966{
967 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
Alexey Dobriyan19c58702007-10-18 23:40:41 -0700968 current, task_pid_nr(current), regs->nip, regs->link, regs->gpr[0],
Paul Mackerras14cf11a2005-09-26 16:04:21 +1000969 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
970}
971
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000972void kernel_fp_unavailable_exception(struct pt_regs *regs)
973{
974 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
975 "%lx at %lx\n", regs->trap, regs->nip);
976 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
977}
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000978
979void altivec_unavailable_exception(struct pt_regs *regs)
980{
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000981 if (user_mode(regs)) {
982 /* A user program has executed an altivec instruction,
983 but this kernel doesn't support altivec. */
984 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
985 return;
986 }
Anton Blanchard6c4841c2006-10-13 11:41:00 +1000987
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000988 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
989 "%lx at %lx\n", regs->trap, regs->nip);
990 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +1000991}
992
Michael Neulingce48b212008-06-25 14:07:18 +1000993void vsx_unavailable_exception(struct pt_regs *regs)
994{
995 if (user_mode(regs)) {
996 /* A user program has executed an vsx instruction,
997 but this kernel doesn't support vsx. */
998 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
999 return;
1000 }
1001
1002 printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception "
1003 "%lx at %lx\n", regs->trap, regs->nip);
1004 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
1005}
1006
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001007void performance_monitor_exception(struct pt_regs *regs)
1008{
Anton Blanchard89713ed2010-01-31 20:34:06 +00001009 __get_cpu_var(irq_stat).pmu_irqs++;
1010
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001011 perf_irq(regs);
1012}
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001013
Paul Mackerras8dad3f92005-10-06 13:27:05 +10001014#ifdef CONFIG_8xx
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001015void SoftwareEmulation(struct pt_regs *regs)
1016{
1017 extern int do_mathemu(struct pt_regs *);
1018 extern int Soft_emulate_8xx(struct pt_regs *);
Scott Wood5dd57a12007-09-18 15:29:35 -05001019#if defined(CONFIG_MATH_EMULATION) || defined(CONFIG_8XX_MINIMAL_FPEMU)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001020 int errcode;
Scott Wood5dd57a12007-09-18 15:29:35 -05001021#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001022
1023 CHECK_FULL_REGS(regs);
1024
1025 if (!user_mode(regs)) {
1026 debugger(regs);
1027 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
1028 }
1029
1030#ifdef CONFIG_MATH_EMULATION
1031 errcode = do_mathemu(regs);
Geert Uytterhoeven80947e72009-05-18 02:10:05 +00001032 if (errcode >= 0)
Anton Blanchardeecff812009-10-27 18:46:55 +00001033 PPC_WARN_EMULATED(math, regs);
Kumar Gala5fad2932007-02-07 01:47:59 -06001034
1035 switch (errcode) {
1036 case 0:
1037 emulate_single_step(regs);
1038 return;
1039 case 1: {
1040 int code = 0;
1041 code = __parse_fpscr(current->thread.fpscr.val);
1042 _exception(SIGFPE, regs, code, regs->nip);
1043 return;
1044 }
1045 case -EFAULT:
1046 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1047 return;
1048 default:
1049 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1050 return;
1051 }
1052
Scott Wood5dd57a12007-09-18 15:29:35 -05001053#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001054 errcode = Soft_emulate_8xx(regs);
Geert Uytterhoeven80947e72009-05-18 02:10:05 +00001055 if (errcode >= 0)
Anton Blanchardeecff812009-10-27 18:46:55 +00001056 PPC_WARN_EMULATED(8xx, regs);
Geert Uytterhoeven80947e72009-05-18 02:10:05 +00001057
Kumar Gala5fad2932007-02-07 01:47:59 -06001058 switch (errcode) {
1059 case 0:
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001060 emulate_single_step(regs);
Kumar Gala5fad2932007-02-07 01:47:59 -06001061 return;
1062 case 1:
1063 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1064 return;
1065 case -EFAULT:
1066 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1067 return;
1068 }
Scott Wood5dd57a12007-09-18 15:29:35 -05001069#else
1070 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
Kumar Gala5fad2932007-02-07 01:47:59 -06001071#endif
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001072}
Paul Mackerras8dad3f92005-10-06 13:27:05 +10001073#endif /* CONFIG_8xx */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001074
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00001075#ifdef CONFIG_PPC_ADV_DEBUG_REGS
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001076static void handle_debug(struct pt_regs *regs, unsigned long debug_status)
1077{
1078 int changed = 0;
1079 /*
1080 * Determine the cause of the debug event, clear the
1081 * event flags and send a trap to the handler. Torez
1082 */
1083 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) {
1084 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1085#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1086 current->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1087#endif
1088 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT,
1089 5);
1090 changed |= 0x01;
1091 } else if (debug_status & (DBSR_DAC2R | DBSR_DAC2W)) {
1092 dbcr_dac(current) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1093 do_send_trap(regs, mfspr(SPRN_DAC2), debug_status, TRAP_HWBKPT,
1094 6);
1095 changed |= 0x01;
1096 } else if (debug_status & DBSR_IAC1) {
1097 current->thread.dbcr0 &= ~DBCR0_IAC1;
1098 dbcr_iac_range(current) &= ~DBCR_IAC12MODE;
1099 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT,
1100 1);
1101 changed |= 0x01;
1102 } else if (debug_status & DBSR_IAC2) {
1103 current->thread.dbcr0 &= ~DBCR0_IAC2;
1104 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT,
1105 2);
1106 changed |= 0x01;
1107 } else if (debug_status & DBSR_IAC3) {
1108 current->thread.dbcr0 &= ~DBCR0_IAC3;
1109 dbcr_iac_range(current) &= ~DBCR_IAC34MODE;
1110 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT,
1111 3);
1112 changed |= 0x01;
1113 } else if (debug_status & DBSR_IAC4) {
1114 current->thread.dbcr0 &= ~DBCR0_IAC4;
1115 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT,
1116 4);
1117 changed |= 0x01;
1118 }
1119 /*
1120 * At the point this routine was called, the MSR(DE) was turned off.
1121 * Check all other debug flags and see if that bit needs to be turned
1122 * back on or not.
1123 */
1124 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1))
1125 regs->msr |= MSR_DE;
1126 else
1127 /* Make sure the IDM flag is off */
1128 current->thread.dbcr0 &= ~DBCR0_IDM;
1129
1130 if (changed & 0x01)
1131 mtspr(SPRN_DBCR0, current->thread.dbcr0);
1132}
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001133
Kumar Galaf8279622008-06-26 02:01:37 -05001134void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001135{
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001136 current->thread.dbsr = debug_status;
1137
Roland McGrathec097c82009-05-28 21:26:38 +00001138 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while
1139 * on server, it stops on the target of the branch. In order to simulate
1140 * the server behaviour, we thus restart right away with a single step
1141 * instead of stopping here when hitting a BT
1142 */
1143 if (debug_status & DBSR_BT) {
1144 regs->msr &= ~MSR_DE;
1145
1146 /* Disable BT */
1147 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT);
1148 /* Clear the BT event */
1149 mtspr(SPRN_DBSR, DBSR_BT);
1150
1151 /* Do the single step trick only when coming from userspace */
1152 if (user_mode(regs)) {
1153 current->thread.dbcr0 &= ~DBCR0_BT;
1154 current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1155 regs->msr |= MSR_DE;
1156 return;
1157 }
1158
1159 if (notify_die(DIE_SSTEP, "block_step", regs, 5,
1160 5, SIGTRAP) == NOTIFY_STOP) {
1161 return;
1162 }
1163 if (debugger_sstep(regs))
1164 return;
1165 } else if (debug_status & DBSR_IC) { /* Instruction complete */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001166 regs->msr &= ~MSR_DE;
Kumar Galaf8279622008-06-26 02:01:37 -05001167
1168 /* Disable instruction completion */
1169 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
1170 /* Clear the instruction completion event */
1171 mtspr(SPRN_DBSR, DBSR_IC);
1172
1173 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
1174 5, SIGTRAP) == NOTIFY_STOP) {
1175 return;
1176 }
1177
1178 if (debugger_sstep(regs))
1179 return;
1180
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001181 if (user_mode(regs)) {
1182 current->thread.dbcr0 &= ~DBCR0_IC;
1183#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1184 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0,
1185 current->thread.dbcr1))
1186 regs->msr |= MSR_DE;
1187 else
1188 /* Make sure the IDM bit is off */
1189 current->thread.dbcr0 &= ~DBCR0_IDM;
1190#endif
1191 }
Kumar Galaf8279622008-06-26 02:01:37 -05001192
1193 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
Dave Kleikamp3bffb652010-02-08 11:51:18 +00001194 } else
1195 handle_debug(regs, debug_status);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001196}
Dave Kleikamp172ae2e2010-02-08 11:50:57 +00001197#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001198
1199#if !defined(CONFIG_TAU_INT)
1200void TAUException(struct pt_regs *regs)
1201{
1202 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
1203 regs->nip, regs->msr, regs->trap, print_tainted());
1204}
1205#endif /* CONFIG_INT_TAU */
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001206
1207#ifdef CONFIG_ALTIVEC
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001208void altivec_assist_exception(struct pt_regs *regs)
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001209{
1210 int err;
1211
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001212 if (!user_mode(regs)) {
1213 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
1214 " at %lx\n", regs->nip);
Paul Mackerras8dad3f92005-10-06 13:27:05 +10001215 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001216 }
1217
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001218 flush_altivec_to_thread(current);
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001219
Anton Blanchardeecff812009-10-27 18:46:55 +00001220 PPC_WARN_EMULATED(altivec, regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001221 err = emulate_altivec(regs);
1222 if (err == 0) {
1223 regs->nip += 4; /* skip emulated instruction */
1224 emulate_single_step(regs);
1225 return;
1226 }
1227
1228 if (err == -EFAULT) {
1229 /* got an error reading the instruction */
1230 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1231 } else {
1232 /* didn't recognize the instruction */
1233 /* XXX quick hack for now: set the non-Java bit in the VSCR */
1234 if (printk_ratelimit())
1235 printk(KERN_ERR "Unrecognized altivec instruction "
1236 "in %s at %lx\n", current->comm, regs->nip);
1237 current->thread.vscr.u[3] |= 0x10000;
1238 }
1239}
1240#endif /* CONFIG_ALTIVEC */
1241
Michael Neulingce48b212008-06-25 14:07:18 +10001242#ifdef CONFIG_VSX
1243void vsx_assist_exception(struct pt_regs *regs)
1244{
1245 if (!user_mode(regs)) {
1246 printk(KERN_EMERG "VSX assist exception in kernel mode"
1247 " at %lx\n", regs->nip);
1248 die("Kernel VSX assist exception", regs, SIGILL);
1249 }
1250
1251 flush_vsx_to_thread(current);
1252 printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip);
1253 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1254}
1255#endif /* CONFIG_VSX */
1256
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001257#ifdef CONFIG_FSL_BOOKE
Kumar Gala620165f2009-02-12 13:54:53 +00001258
1259void doorbell_exception(struct pt_regs *regs)
1260{
1261#ifdef CONFIG_SMP
1262 int cpu = smp_processor_id();
1263 int msg;
1264
1265 if (num_online_cpus() < 2)
1266 return;
1267
1268 for (msg = 0; msg < 4; msg++)
1269 if (test_and_clear_bit(msg, &dbell_smp_message[cpu]))
1270 smp_message_recv(msg);
1271#else
1272 printk(KERN_WARNING "Received doorbell on non-smp system\n");
1273#endif
1274}
1275
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001276void CacheLockingException(struct pt_regs *regs, unsigned long address,
1277 unsigned long error_code)
1278{
1279 /* We treat cache locking instructions from the user
1280 * as priv ops, in the future we could try to do
1281 * something smarter
1282 */
1283 if (error_code & (ESR_DLK|ESR_ILK))
1284 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
1285 return;
1286}
1287#endif /* CONFIG_FSL_BOOKE */
1288
1289#ifdef CONFIG_SPE
1290void SPEFloatingPointException(struct pt_regs *regs)
1291{
Liu Yu6a800f32008-10-28 11:50:21 +08001292 extern int do_spe_mathemu(struct pt_regs *regs);
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001293 unsigned long spefscr;
1294 int fpexc_mode;
1295 int code = 0;
Liu Yu6a800f32008-10-28 11:50:21 +08001296 int err;
1297
1298 preempt_disable();
1299 if (regs->msr & MSR_SPE)
1300 giveup_spe(current);
1301 preempt_enable();
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001302
1303 spefscr = current->thread.spefscr;
1304 fpexc_mode = current->thread.fpexc_mode;
1305
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001306 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1307 code = FPE_FLTOVF;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001308 }
1309 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1310 code = FPE_FLTUND;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001311 }
1312 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1313 code = FPE_FLTDIV;
1314 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1315 code = FPE_FLTINV;
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001316 }
1317 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1318 code = FPE_FLTRES;
1319
Liu Yu6a800f32008-10-28 11:50:21 +08001320 err = do_spe_mathemu(regs);
1321 if (err == 0) {
1322 regs->nip += 4; /* skip emulated instruction */
1323 emulate_single_step(regs);
1324 return;
1325 }
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001326
Liu Yu6a800f32008-10-28 11:50:21 +08001327 if (err == -EFAULT) {
1328 /* got an error reading the instruction */
1329 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1330 } else if (err == -EINVAL) {
1331 /* didn't recognize the instruction */
1332 printk(KERN_ERR "unrecognized spe instruction "
1333 "in %s at %lx\n", current->comm, regs->nip);
1334 } else {
1335 _exception(SIGFPE, regs, code, regs->nip);
1336 }
1337
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001338 return;
1339}
Liu Yu6a800f32008-10-28 11:50:21 +08001340
1341void SPEFloatingPointRoundException(struct pt_regs *regs)
1342{
1343 extern int speround_handler(struct pt_regs *regs);
1344 int err;
1345
1346 preempt_disable();
1347 if (regs->msr & MSR_SPE)
1348 giveup_spe(current);
1349 preempt_enable();
1350
1351 regs->nip -= 4;
1352 err = speround_handler(regs);
1353 if (err == 0) {
1354 regs->nip += 4; /* skip emulated instruction */
1355 emulate_single_step(regs);
1356 return;
1357 }
1358
1359 if (err == -EFAULT) {
1360 /* got an error reading the instruction */
1361 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1362 } else if (err == -EINVAL) {
1363 /* didn't recognize the instruction */
1364 printk(KERN_ERR "unrecognized spe instruction "
1365 "in %s at %lx\n", current->comm, regs->nip);
1366 } else {
1367 _exception(SIGFPE, regs, 0, regs->nip);
1368 return;
1369 }
1370}
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001371#endif
1372
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001373/*
1374 * We enter here if we get an unrecoverable exception, that is, one
1375 * that happened at a point where the RI (recoverable interrupt) bit
1376 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1377 * we therefore lost state by taking this exception.
1378 */
1379void unrecoverable_exception(struct pt_regs *regs)
1380{
1381 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1382 regs->trap, regs->nip);
1383 die("Unrecoverable exception", regs, SIGABRT);
1384}
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001385
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001386#ifdef CONFIG_BOOKE_WDT
1387/*
1388 * Default handler for a Watchdog exception,
1389 * spins until a reboot occurs
1390 */
1391void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1392{
1393 /* Generic WatchdogHandler, implement your own */
1394 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1395 return;
1396}
1397
1398void WatchdogException(struct pt_regs *regs)
1399{
1400 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1401 WatchdogHandler(regs);
1402}
1403#endif
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001404
Stephen Rothwelldc1c1ca2005-10-01 18:43:42 +10001405/*
1406 * We enter here if we discover during exception entry that we are
1407 * running in supervisor mode with a userspace value in the stack pointer.
1408 */
1409void kernel_bad_stack(struct pt_regs *regs)
1410{
1411 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1412 regs->gpr[1], regs->nip);
1413 die("Bad kernel stack pointer", regs, SIGABRT);
1414}
Paul Mackerras14cf11a2005-09-26 16:04:21 +10001415
1416void __init trap_init(void)
1417{
1418}
Geert Uytterhoeven80947e72009-05-18 02:10:05 +00001419
1420
1421#ifdef CONFIG_PPC_EMULATED_STATS
1422
1423#define WARN_EMULATED_SETUP(type) .type = { .name = #type }
1424
1425struct ppc_emulated ppc_emulated = {
1426#ifdef CONFIG_ALTIVEC
1427 WARN_EMULATED_SETUP(altivec),
1428#endif
1429 WARN_EMULATED_SETUP(dcba),
1430 WARN_EMULATED_SETUP(dcbz),
1431 WARN_EMULATED_SETUP(fp_pair),
1432 WARN_EMULATED_SETUP(isel),
1433 WARN_EMULATED_SETUP(mcrxr),
1434 WARN_EMULATED_SETUP(mfpvr),
1435 WARN_EMULATED_SETUP(multiple),
1436 WARN_EMULATED_SETUP(popcntb),
1437 WARN_EMULATED_SETUP(spe),
1438 WARN_EMULATED_SETUP(string),
1439 WARN_EMULATED_SETUP(unaligned),
1440#ifdef CONFIG_MATH_EMULATION
1441 WARN_EMULATED_SETUP(math),
1442#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
1443 WARN_EMULATED_SETUP(8xx),
1444#endif
1445#ifdef CONFIG_VSX
1446 WARN_EMULATED_SETUP(vsx),
1447#endif
1448};
1449
1450u32 ppc_warn_emulated;
1451
1452void ppc_warn_emulated_print(const char *type)
1453{
1454 if (printk_ratelimit())
1455 pr_warning("%s used emulated %s instruction\n", current->comm,
1456 type);
1457}
1458
1459static int __init ppc_warn_emulated_init(void)
1460{
1461 struct dentry *dir, *d;
1462 unsigned int i;
1463 struct ppc_emulated_entry *entries = (void *)&ppc_emulated;
1464
1465 if (!powerpc_debugfs_root)
1466 return -ENODEV;
1467
1468 dir = debugfs_create_dir("emulated_instructions",
1469 powerpc_debugfs_root);
1470 if (!dir)
1471 return -ENOMEM;
1472
1473 d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir,
1474 &ppc_warn_emulated);
1475 if (!d)
1476 goto fail;
1477
1478 for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) {
1479 d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir,
1480 (u32 *)&entries[i].val.counter);
1481 if (!d)
1482 goto fail;
1483 }
1484
1485 return 0;
1486
1487fail:
1488 debugfs_remove_recursive(dir);
1489 return -ENOMEM;
1490}
1491
1492device_initcall(ppc_warn_emulated_init);
1493
1494#endif /* CONFIG_PPC_EMULATED_STATS */