| John W. Linville | 0aec00a | 2007-06-12 22:11:42 -0400 | [diff] [blame] | 1 | /* | 
 | 2 |  * Definitions for RTL8187 hardware | 
 | 3 |  * | 
 | 4 |  * Copyright 2007 Michael Wu <flamingice@sourmilk.net> | 
 | 5 |  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> | 
 | 6 |  * | 
 | 7 |  * Based on the r8187 driver, which is: | 
 | 8 |  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. | 
 | 9 |  * | 
 | 10 |  * This program is free software; you can redistribute it and/or modify | 
 | 11 |  * it under the terms of the GNU General Public License version 2 as | 
 | 12 |  * published by the Free Software Foundation. | 
 | 13 |  */ | 
 | 14 |  | 
| Michael Wu | 605bebe | 2007-05-14 01:41:02 -0400 | [diff] [blame] | 15 | #ifndef RTL8187_H | 
 | 16 | #define RTL8187_H | 
 | 17 |  | 
 | 18 | #include "rtl818x.h" | 
 | 19 |  | 
 | 20 | #define RTL8187_EEPROM_TXPWR_BASE	0x05 | 
 | 21 | #define RTL8187_EEPROM_MAC_ADDR		0x07 | 
 | 22 | #define RTL8187_EEPROM_TXPWR_CHAN_1	0x16	/* 3 channels */ | 
 | 23 | #define RTL8187_EEPROM_TXPWR_CHAN_6	0x1B	/* 2 channels */ | 
 | 24 | #define RTL8187_EEPROM_TXPWR_CHAN_4	0x3D	/* 2 channels */ | 
 | 25 |  | 
 | 26 | #define RTL8187_REQT_READ	0xC0 | 
 | 27 | #define RTL8187_REQT_WRITE	0x40 | 
 | 28 | #define RTL8187_REQ_GET_REG	0x05 | 
 | 29 | #define RTL8187_REQ_SET_REG	0x05 | 
 | 30 |  | 
 | 31 | #define RTL8187_MAX_RX		0x9C4 | 
 | 32 |  | 
 | 33 | struct rtl8187_rx_info { | 
 | 34 | 	struct urb *urb; | 
 | 35 | 	struct ieee80211_hw *dev; | 
 | 36 | }; | 
 | 37 |  | 
 | 38 | struct rtl8187_rx_hdr { | 
| Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 39 | 	__le32 flags; | 
| Michael Wu | 605bebe | 2007-05-14 01:41:02 -0400 | [diff] [blame] | 40 | 	u8 noise; | 
 | 41 | 	u8 signal; | 
 | 42 | 	u8 agc; | 
 | 43 | 	u8 reserved; | 
 | 44 | 	__le64 mac_time; | 
 | 45 | } __attribute__((packed)); | 
 | 46 |  | 
 | 47 | struct rtl8187_tx_info { | 
 | 48 | 	struct ieee80211_tx_control *control; | 
 | 49 | 	struct urb *urb; | 
 | 50 | 	struct ieee80211_hw *dev; | 
 | 51 | }; | 
 | 52 |  | 
 | 53 | struct rtl8187_tx_hdr { | 
 | 54 | 	__le32 flags; | 
 | 55 | #define RTL8187_TX_FLAG_NO_ENCRYPT	(1 << 15) | 
 | 56 | #define RTL8187_TX_FLAG_MORE_FRAG	(1 << 17) | 
 | 57 | #define RTL8187_TX_FLAG_CTS		(1 << 18) | 
 | 58 | #define RTL8187_TX_FLAG_RTS		(1 << 23) | 
 | 59 | 	__le16 rts_duration; | 
 | 60 | 	__le16 len; | 
 | 61 | 	__le32 retry; | 
 | 62 | } __attribute__((packed)); | 
 | 63 |  | 
 | 64 | struct rtl8187_priv { | 
 | 65 | 	/* common between rtl818x drivers */ | 
 | 66 | 	struct rtl818x_csr *map; | 
 | 67 | 	void (*rf_init)(struct ieee80211_hw *); | 
 | 68 | 	int mode; | 
| Daniel Drake | 7e9ed18 | 2007-07-27 15:43:24 +0200 | [diff] [blame] | 69 | 	int if_id; | 
| Michael Wu | 605bebe | 2007-05-14 01:41:02 -0400 | [diff] [blame] | 70 |  | 
 | 71 | 	/* rtl8187 specific */ | 
 | 72 | 	struct ieee80211_channel channels[14]; | 
 | 73 | 	struct ieee80211_rate rates[12]; | 
 | 74 | 	struct ieee80211_hw_mode modes[2]; | 
 | 75 | 	struct usb_device *udev; | 
| Johannes Berg | 4150c57 | 2007-09-17 01:29:23 -0400 | [diff] [blame] | 76 | 	u32 rx_conf; | 
| Michael Wu | 605bebe | 2007-05-14 01:41:02 -0400 | [diff] [blame] | 77 | 	u16 txpwr_base; | 
 | 78 | 	u8 asic_rev; | 
 | 79 | 	struct sk_buff_head rx_queue; | 
 | 80 | }; | 
 | 81 |  | 
 | 82 | void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data); | 
 | 83 |  | 
 | 84 | static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr) | 
 | 85 | { | 
 | 86 | 	u8 val; | 
 | 87 |  | 
 | 88 | 	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0), | 
 | 89 | 			RTL8187_REQ_GET_REG, RTL8187_REQT_READ, | 
 | 90 | 			(unsigned long)addr, 0, &val, sizeof(val), HZ / 2); | 
 | 91 |  | 
 | 92 | 	return val; | 
 | 93 | } | 
 | 94 |  | 
 | 95 | static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr) | 
 | 96 | { | 
 | 97 | 	__le16 val; | 
 | 98 |  | 
 | 99 | 	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0), | 
 | 100 | 			RTL8187_REQ_GET_REG, RTL8187_REQT_READ, | 
 | 101 | 			(unsigned long)addr, 0, &val, sizeof(val), HZ / 2); | 
 | 102 |  | 
 | 103 | 	return le16_to_cpu(val); | 
 | 104 | } | 
 | 105 |  | 
 | 106 | static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr) | 
 | 107 | { | 
 | 108 | 	__le32 val; | 
 | 109 |  | 
 | 110 | 	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0), | 
 | 111 | 			RTL8187_REQ_GET_REG, RTL8187_REQT_READ, | 
 | 112 | 			(unsigned long)addr, 0, &val, sizeof(val), HZ / 2); | 
 | 113 |  | 
 | 114 | 	return le32_to_cpu(val); | 
 | 115 | } | 
 | 116 |  | 
 | 117 | static inline void rtl818x_iowrite8(struct rtl8187_priv *priv, | 
 | 118 | 				    u8 *addr, u8 val) | 
 | 119 | { | 
 | 120 | 	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0), | 
 | 121 | 			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE, | 
 | 122 | 			(unsigned long)addr, 0, &val, sizeof(val), HZ / 2); | 
 | 123 | } | 
 | 124 |  | 
 | 125 | static inline void rtl818x_iowrite16(struct rtl8187_priv *priv, | 
 | 126 | 				     __le16 *addr, u16 val) | 
 | 127 | { | 
 | 128 | 	__le16 buf = cpu_to_le16(val); | 
 | 129 |  | 
 | 130 | 	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0), | 
 | 131 | 			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE, | 
 | 132 | 			(unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2); | 
 | 133 | } | 
 | 134 |  | 
 | 135 | static inline void rtl818x_iowrite32(struct rtl8187_priv *priv, | 
 | 136 | 				     __le32 *addr, u32 val) | 
 | 137 | { | 
 | 138 | 	__le32 buf = cpu_to_le32(val); | 
 | 139 |  | 
 | 140 | 	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0), | 
 | 141 | 			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE, | 
 | 142 | 			(unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2); | 
 | 143 | } | 
 | 144 |  | 
 | 145 | #endif /* RTL8187_H */ |