| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * linux/kernel/irq/chip.c | 
|  | 3 | * | 
|  | 4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | 
|  | 5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | 
|  | 6 | * | 
|  | 7 | * This file contains the core interrupt handling code, for irq-chip | 
|  | 8 | * based architectures. | 
|  | 9 | * | 
|  | 10 | * Detailed information is available in Documentation/DocBook/genericirq | 
|  | 11 | */ | 
|  | 12 |  | 
|  | 13 | #include <linux/irq.h> | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 14 | #include <linux/msi.h> | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 15 | #include <linux/module.h> | 
|  | 16 | #include <linux/interrupt.h> | 
|  | 17 | #include <linux/kernel_stat.h> | 
|  | 18 |  | 
|  | 19 | #include "internals.h" | 
|  | 20 |  | 
|  | 21 | /** | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 22 | *	dynamic_irq_init - initialize a dynamically allocated irq | 
|  | 23 | *	@irq:	irq number to initialize | 
|  | 24 | */ | 
|  | 25 | void dynamic_irq_init(unsigned int irq) | 
|  | 26 | { | 
|  | 27 | struct irq_desc *desc; | 
|  | 28 | unsigned long flags; | 
|  | 29 |  | 
|  | 30 | if (irq >= NR_IRQS) { | 
|  | 31 | printk(KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); | 
|  | 32 | WARN_ON(1); | 
|  | 33 | return; | 
|  | 34 | } | 
|  | 35 |  | 
|  | 36 | /* Ensure we don't have left over values from a previous use of this irq */ | 
|  | 37 | desc = irq_desc + irq; | 
|  | 38 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 39 | desc->status = IRQ_DISABLED; | 
|  | 40 | desc->chip = &no_irq_chip; | 
|  | 41 | desc->handle_irq = handle_bad_irq; | 
|  | 42 | desc->depth = 1; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 43 | desc->msi_desc = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 44 | desc->handler_data = NULL; | 
|  | 45 | desc->chip_data = NULL; | 
|  | 46 | desc->action = NULL; | 
|  | 47 | desc->irq_count = 0; | 
|  | 48 | desc->irqs_unhandled = 0; | 
|  | 49 | #ifdef CONFIG_SMP | 
|  | 50 | desc->affinity = CPU_MASK_ALL; | 
|  | 51 | #endif | 
|  | 52 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 53 | } | 
|  | 54 |  | 
|  | 55 | /** | 
|  | 56 | *	dynamic_irq_cleanup - cleanup a dynamically allocated irq | 
|  | 57 | *	@irq:	irq number to initialize | 
|  | 58 | */ | 
|  | 59 | void dynamic_irq_cleanup(unsigned int irq) | 
|  | 60 | { | 
|  | 61 | struct irq_desc *desc; | 
|  | 62 | unsigned long flags; | 
|  | 63 |  | 
|  | 64 | if (irq >= NR_IRQS) { | 
|  | 65 | printk(KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); | 
|  | 66 | WARN_ON(1); | 
|  | 67 | return; | 
|  | 68 | } | 
|  | 69 |  | 
|  | 70 | desc = irq_desc + irq; | 
|  | 71 | spin_lock_irqsave(&desc->lock, flags); | 
| Eric W. Biederman | 1f80025 | 2006-10-04 02:16:56 -0700 | [diff] [blame] | 72 | if (desc->action) { | 
|  | 73 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 74 | printk(KERN_ERR "Destroying IRQ%d without calling free_irq\n", | 
|  | 75 | irq); | 
|  | 76 | WARN_ON(1); | 
|  | 77 | return; | 
|  | 78 | } | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 79 | desc->msi_desc = NULL; | 
|  | 80 | desc->handler_data = NULL; | 
|  | 81 | desc->chip_data = NULL; | 
| Eric W. Biederman | 3a16d71 | 2006-10-04 02:16:37 -0700 | [diff] [blame] | 82 | desc->handle_irq = handle_bad_irq; | 
|  | 83 | desc->chip = &no_irq_chip; | 
|  | 84 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 85 | } | 
|  | 86 |  | 
|  | 87 |  | 
|  | 88 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 89 | *	set_irq_chip - set the irq chip for an irq | 
|  | 90 | *	@irq:	irq number | 
|  | 91 | *	@chip:	pointer to irq chip description structure | 
|  | 92 | */ | 
|  | 93 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | 
|  | 94 | { | 
|  | 95 | struct irq_desc *desc; | 
|  | 96 | unsigned long flags; | 
|  | 97 |  | 
|  | 98 | if (irq >= NR_IRQS) { | 
|  | 99 | printk(KERN_ERR "Trying to install chip for IRQ%d\n", irq); | 
|  | 100 | WARN_ON(1); | 
|  | 101 | return -EINVAL; | 
|  | 102 | } | 
|  | 103 |  | 
|  | 104 | if (!chip) | 
|  | 105 | chip = &no_irq_chip; | 
|  | 106 |  | 
|  | 107 | desc = irq_desc + irq; | 
|  | 108 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 109 | irq_chip_set_defaults(chip); | 
|  | 110 | desc->chip = chip; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 111 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 112 |  | 
|  | 113 | return 0; | 
|  | 114 | } | 
|  | 115 | EXPORT_SYMBOL(set_irq_chip); | 
|  | 116 |  | 
|  | 117 | /** | 
|  | 118 | *	set_irq_type - set the irq type for an irq | 
|  | 119 | *	@irq:	irq number | 
|  | 120 | *	@type:	interrupt type - see include/linux/interrupt.h | 
|  | 121 | */ | 
|  | 122 | int set_irq_type(unsigned int irq, unsigned int type) | 
|  | 123 | { | 
|  | 124 | struct irq_desc *desc; | 
|  | 125 | unsigned long flags; | 
|  | 126 | int ret = -ENXIO; | 
|  | 127 |  | 
|  | 128 | if (irq >= NR_IRQS) { | 
|  | 129 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); | 
|  | 130 | return -ENODEV; | 
|  | 131 | } | 
|  | 132 |  | 
|  | 133 | desc = irq_desc + irq; | 
|  | 134 | if (desc->chip->set_type) { | 
|  | 135 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 136 | ret = desc->chip->set_type(irq, type); | 
|  | 137 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 138 | } | 
|  | 139 | return ret; | 
|  | 140 | } | 
|  | 141 | EXPORT_SYMBOL(set_irq_type); | 
|  | 142 |  | 
|  | 143 | /** | 
|  | 144 | *	set_irq_data - set irq type data for an irq | 
|  | 145 | *	@irq:	Interrupt number | 
|  | 146 | *	@data:	Pointer to interrupt specific data | 
|  | 147 | * | 
|  | 148 | *	Set the hardware irq controller data for an irq | 
|  | 149 | */ | 
|  | 150 | int set_irq_data(unsigned int irq, void *data) | 
|  | 151 | { | 
|  | 152 | struct irq_desc *desc; | 
|  | 153 | unsigned long flags; | 
|  | 154 |  | 
|  | 155 | if (irq >= NR_IRQS) { | 
|  | 156 | printk(KERN_ERR | 
|  | 157 | "Trying to install controller data for IRQ%d\n", irq); | 
|  | 158 | return -EINVAL; | 
|  | 159 | } | 
|  | 160 |  | 
|  | 161 | desc = irq_desc + irq; | 
|  | 162 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 163 | desc->handler_data = data; | 
|  | 164 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 165 | return 0; | 
|  | 166 | } | 
|  | 167 | EXPORT_SYMBOL(set_irq_data); | 
|  | 168 |  | 
|  | 169 | /** | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 170 | *	set_irq_data - set irq type data for an irq | 
|  | 171 | *	@irq:	Interrupt number | 
| Randy Dunlap | 472900b | 2007-02-16 01:28:25 -0800 | [diff] [blame] | 172 | *	@entry:	Pointer to MSI descriptor data | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 173 | * | 
|  | 174 | *	Set the hardware irq controller data for an irq | 
|  | 175 | */ | 
|  | 176 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | 
|  | 177 | { | 
|  | 178 | struct irq_desc *desc; | 
|  | 179 | unsigned long flags; | 
|  | 180 |  | 
|  | 181 | if (irq >= NR_IRQS) { | 
|  | 182 | printk(KERN_ERR | 
|  | 183 | "Trying to install msi data for IRQ%d\n", irq); | 
|  | 184 | return -EINVAL; | 
|  | 185 | } | 
|  | 186 | desc = irq_desc + irq; | 
|  | 187 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 188 | desc->msi_desc = entry; | 
| Michael Ellerman | 7fe3730 | 2007-04-18 19:39:21 +1000 | [diff] [blame] | 189 | if (entry) | 
|  | 190 | entry->irq = irq; | 
| Eric W. Biederman | 5b912c1 | 2007-01-28 12:52:03 -0700 | [diff] [blame] | 191 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 192 | return 0; | 
|  | 193 | } | 
|  | 194 |  | 
|  | 195 | /** | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 196 | *	set_irq_chip_data - set irq chip data for an irq | 
|  | 197 | *	@irq:	Interrupt number | 
|  | 198 | *	@data:	Pointer to chip specific data | 
|  | 199 | * | 
|  | 200 | *	Set the hardware irq chip data for an irq | 
|  | 201 | */ | 
|  | 202 | int set_irq_chip_data(unsigned int irq, void *data) | 
|  | 203 | { | 
|  | 204 | struct irq_desc *desc = irq_desc + irq; | 
|  | 205 | unsigned long flags; | 
|  | 206 |  | 
|  | 207 | if (irq >= NR_IRQS || !desc->chip) { | 
|  | 208 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); | 
|  | 209 | return -EINVAL; | 
|  | 210 | } | 
|  | 211 |  | 
|  | 212 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 213 | desc->chip_data = data; | 
|  | 214 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 215 |  | 
|  | 216 | return 0; | 
|  | 217 | } | 
|  | 218 | EXPORT_SYMBOL(set_irq_chip_data); | 
|  | 219 |  | 
|  | 220 | /* | 
|  | 221 | * default enable function | 
|  | 222 | */ | 
|  | 223 | static void default_enable(unsigned int irq) | 
|  | 224 | { | 
|  | 225 | struct irq_desc *desc = irq_desc + irq; | 
|  | 226 |  | 
|  | 227 | desc->chip->unmask(irq); | 
|  | 228 | desc->status &= ~IRQ_MASKED; | 
|  | 229 | } | 
|  | 230 |  | 
|  | 231 | /* | 
|  | 232 | * default disable function | 
|  | 233 | */ | 
|  | 234 | static void default_disable(unsigned int irq) | 
|  | 235 | { | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 236 | } | 
|  | 237 |  | 
|  | 238 | /* | 
|  | 239 | * default startup function | 
|  | 240 | */ | 
|  | 241 | static unsigned int default_startup(unsigned int irq) | 
|  | 242 | { | 
|  | 243 | irq_desc[irq].chip->enable(irq); | 
|  | 244 |  | 
|  | 245 | return 0; | 
|  | 246 | } | 
|  | 247 |  | 
|  | 248 | /* | 
|  | 249 | * Fixup enable/disable function pointers | 
|  | 250 | */ | 
|  | 251 | void irq_chip_set_defaults(struct irq_chip *chip) | 
|  | 252 | { | 
|  | 253 | if (!chip->enable) | 
|  | 254 | chip->enable = default_enable; | 
|  | 255 | if (!chip->disable) | 
|  | 256 | chip->disable = default_disable; | 
|  | 257 | if (!chip->startup) | 
|  | 258 | chip->startup = default_startup; | 
|  | 259 | if (!chip->shutdown) | 
|  | 260 | chip->shutdown = chip->disable; | 
|  | 261 | if (!chip->name) | 
|  | 262 | chip->name = chip->typename; | 
| Zhang, Yanmin | b86432b | 2006-11-16 01:19:10 -0800 | [diff] [blame] | 263 | if (!chip->end) | 
|  | 264 | chip->end = dummy_irq_chip.end; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 265 | } | 
|  | 266 |  | 
|  | 267 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | 
|  | 268 | { | 
|  | 269 | if (desc->chip->mask_ack) | 
|  | 270 | desc->chip->mask_ack(irq); | 
|  | 271 | else { | 
|  | 272 | desc->chip->mask(irq); | 
|  | 273 | desc->chip->ack(irq); | 
|  | 274 | } | 
|  | 275 | } | 
|  | 276 |  | 
|  | 277 | /** | 
|  | 278 | *	handle_simple_irq - Simple and software-decoded IRQs. | 
|  | 279 | *	@irq:	the interrupt number | 
|  | 280 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 281 | * | 
|  | 282 | *	Simple interrupts are either sent from a demultiplexing interrupt | 
|  | 283 | *	handler or come from hardware, where no interrupt hardware control | 
|  | 284 | *	is necessary. | 
|  | 285 | * | 
|  | 286 | *	Note: The caller is expected to handle the ack, clear, mask and | 
|  | 287 | *	unmask issues if necessary. | 
|  | 288 | */ | 
|  | 289 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 290 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 291 | { | 
|  | 292 | struct irqaction *action; | 
|  | 293 | irqreturn_t action_ret; | 
|  | 294 | const unsigned int cpu = smp_processor_id(); | 
|  | 295 |  | 
|  | 296 | spin_lock(&desc->lock); | 
|  | 297 |  | 
|  | 298 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 299 | goto out_unlock; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 300 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 301 | kstat_cpu(cpu).irqs[irq]++; | 
|  | 302 |  | 
|  | 303 | action = desc->action; | 
| Steven Rostedt | 971e5b35f | 2007-12-18 18:05:58 +0100 | [diff] [blame] | 304 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 305 | goto out_unlock; | 
|  | 306 |  | 
|  | 307 | desc->status |= IRQ_INPROGRESS; | 
|  | 308 | spin_unlock(&desc->lock); | 
|  | 309 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 310 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 311 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 312 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 313 |  | 
|  | 314 | spin_lock(&desc->lock); | 
|  | 315 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 316 | out_unlock: | 
|  | 317 | spin_unlock(&desc->lock); | 
|  | 318 | } | 
|  | 319 |  | 
|  | 320 | /** | 
|  | 321 | *	handle_level_irq - Level type irq handler | 
|  | 322 | *	@irq:	the interrupt number | 
|  | 323 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 324 | * | 
|  | 325 | *	Level type interrupts are active as long as the hardware line has | 
|  | 326 | *	the active level. This may require to mask the interrupt and unmask | 
|  | 327 | *	it after the associated handler has acknowledged the device, so the | 
|  | 328 | *	interrupt line is back to inactive. | 
|  | 329 | */ | 
|  | 330 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 331 | handle_level_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 332 | { | 
|  | 333 | unsigned int cpu = smp_processor_id(); | 
|  | 334 | struct irqaction *action; | 
|  | 335 | irqreturn_t action_ret; | 
|  | 336 |  | 
|  | 337 | spin_lock(&desc->lock); | 
|  | 338 | mask_ack_irq(desc, irq); | 
|  | 339 |  | 
|  | 340 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 341 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 342 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
|  | 343 | kstat_cpu(cpu).irqs[irq]++; | 
|  | 344 |  | 
|  | 345 | /* | 
|  | 346 | * If its disabled or no action available | 
|  | 347 | * keep it masked and get out of here | 
|  | 348 | */ | 
|  | 349 | action = desc->action; | 
| Thomas Gleixner | 4966342 | 2007-08-12 15:46:34 +0000 | [diff] [blame] | 350 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 351 | goto out_unlock; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 352 |  | 
|  | 353 | desc->status |= IRQ_INPROGRESS; | 
|  | 354 | spin_unlock(&desc->lock); | 
|  | 355 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 356 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 357 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 358 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 359 |  | 
|  | 360 | spin_lock(&desc->lock); | 
|  | 361 | desc->status &= ~IRQ_INPROGRESS; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 362 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | 
|  | 363 | desc->chip->unmask(irq); | 
| Ingo Molnar | 86998aa | 2006-09-19 11:14:34 +0200 | [diff] [blame] | 364 | out_unlock: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 365 | spin_unlock(&desc->lock); | 
|  | 366 | } | 
|  | 367 |  | 
|  | 368 | /** | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 369 | *	handle_fasteoi_irq - irq handler for transparent controllers | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 370 | *	@irq:	the interrupt number | 
|  | 371 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 372 | * | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 373 | *	Only a single callback will be issued to the chip: an ->eoi() | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 374 | *	call when the interrupt has been serviced. This enables support | 
|  | 375 | *	for modern forms of interrupt handlers, which handle the flow | 
|  | 376 | *	details in hardware, transparently. | 
|  | 377 | */ | 
|  | 378 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 379 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 380 | { | 
|  | 381 | unsigned int cpu = smp_processor_id(); | 
|  | 382 | struct irqaction *action; | 
|  | 383 | irqreturn_t action_ret; | 
|  | 384 |  | 
|  | 385 | spin_lock(&desc->lock); | 
|  | 386 |  | 
|  | 387 | if (unlikely(desc->status & IRQ_INPROGRESS)) | 
|  | 388 | goto out; | 
|  | 389 |  | 
|  | 390 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
|  | 391 | kstat_cpu(cpu).irqs[irq]++; | 
|  | 392 |  | 
|  | 393 | /* | 
|  | 394 | * If its disabled or no action available | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 395 | * then mask it and get out of here: | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 396 | */ | 
|  | 397 | action = desc->action; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 398 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { | 
|  | 399 | desc->status |= IRQ_PENDING; | 
| Ingo Molnar | 76d2160 | 2007-02-16 01:28:24 -0800 | [diff] [blame] | 400 | if (desc->chip->mask) | 
|  | 401 | desc->chip->mask(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 402 | goto out; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 403 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 404 |  | 
|  | 405 | desc->status |= IRQ_INPROGRESS; | 
| Benjamin Herrenschmidt | 98bb244 | 2006-06-29 02:25:01 -0700 | [diff] [blame] | 406 | desc->status &= ~IRQ_PENDING; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 407 | spin_unlock(&desc->lock); | 
|  | 408 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 409 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 410 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 411 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 412 |  | 
|  | 413 | spin_lock(&desc->lock); | 
|  | 414 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 415 | out: | 
| Ingo Molnar | 47c2a3a | 2006-06-29 02:25:03 -0700 | [diff] [blame] | 416 | desc->chip->eoi(irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 417 |  | 
|  | 418 | spin_unlock(&desc->lock); | 
|  | 419 | } | 
|  | 420 |  | 
|  | 421 | /** | 
|  | 422 | *	handle_edge_irq - edge type IRQ handler | 
|  | 423 | *	@irq:	the interrupt number | 
|  | 424 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 425 | * | 
|  | 426 | *	Interrupt occures on the falling and/or rising edge of a hardware | 
|  | 427 | *	signal. The occurence is latched into the irq controller hardware | 
|  | 428 | *	and must be acked in order to be reenabled. After the ack another | 
|  | 429 | *	interrupt can happen on the same source even before the first one | 
|  | 430 | *	is handled by the assosiacted event handler. If this happens it | 
|  | 431 | *	might be necessary to disable (mask) the interrupt depending on the | 
|  | 432 | *	controller hardware. This requires to reenable the interrupt inside | 
|  | 433 | *	of the loop which handles the interrupts which have arrived while | 
|  | 434 | *	the handler was running. If all pending interrupts are handled, the | 
|  | 435 | *	loop is left. | 
|  | 436 | */ | 
|  | 437 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 438 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 439 | { | 
|  | 440 | const unsigned int cpu = smp_processor_id(); | 
|  | 441 |  | 
|  | 442 | spin_lock(&desc->lock); | 
|  | 443 |  | 
|  | 444 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | 
|  | 445 |  | 
|  | 446 | /* | 
|  | 447 | * If we're currently running this IRQ, or its disabled, | 
|  | 448 | * we shouldn't process the IRQ. Mark it pending, handle | 
|  | 449 | * the necessary masking and go out | 
|  | 450 | */ | 
|  | 451 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | 
|  | 452 | !desc->action)) { | 
|  | 453 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | 
|  | 454 | mask_ack_irq(desc, irq); | 
|  | 455 | goto out_unlock; | 
|  | 456 | } | 
|  | 457 |  | 
|  | 458 | kstat_cpu(cpu).irqs[irq]++; | 
|  | 459 |  | 
|  | 460 | /* Start handling the irq */ | 
|  | 461 | desc->chip->ack(irq); | 
|  | 462 |  | 
|  | 463 | /* Mark the IRQ currently in progress.*/ | 
|  | 464 | desc->status |= IRQ_INPROGRESS; | 
|  | 465 |  | 
|  | 466 | do { | 
|  | 467 | struct irqaction *action = desc->action; | 
|  | 468 | irqreturn_t action_ret; | 
|  | 469 |  | 
|  | 470 | if (unlikely(!action)) { | 
|  | 471 | desc->chip->mask(irq); | 
|  | 472 | goto out_unlock; | 
|  | 473 | } | 
|  | 474 |  | 
|  | 475 | /* | 
|  | 476 | * When another irq arrived while we were handling | 
|  | 477 | * one, we could have masked the irq. | 
|  | 478 | * Renable it, if it was not disabled in meantime. | 
|  | 479 | */ | 
|  | 480 | if (unlikely((desc->status & | 
|  | 481 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | 
|  | 482 | (IRQ_PENDING | IRQ_MASKED))) { | 
|  | 483 | desc->chip->unmask(irq); | 
|  | 484 | desc->status &= ~IRQ_MASKED; | 
|  | 485 | } | 
|  | 486 |  | 
|  | 487 | desc->status &= ~IRQ_PENDING; | 
|  | 488 | spin_unlock(&desc->lock); | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 489 | action_ret = handle_IRQ_event(irq, action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 490 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 491 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 492 | spin_lock(&desc->lock); | 
|  | 493 |  | 
|  | 494 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | 
|  | 495 |  | 
|  | 496 | desc->status &= ~IRQ_INPROGRESS; | 
|  | 497 | out_unlock: | 
|  | 498 | spin_unlock(&desc->lock); | 
|  | 499 | } | 
|  | 500 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 501 | /** | 
|  | 502 | *	handle_percpu_IRQ - Per CPU local irq handler | 
|  | 503 | *	@irq:	the interrupt number | 
|  | 504 | *	@desc:	the interrupt description structure for this irq | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 505 | * | 
|  | 506 | *	Per CPU interrupts on SMP machines without locking requirements | 
|  | 507 | */ | 
|  | 508 | void fastcall | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 509 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 510 | { | 
|  | 511 | irqreturn_t action_ret; | 
|  | 512 |  | 
|  | 513 | kstat_this_cpu.irqs[irq]++; | 
|  | 514 |  | 
|  | 515 | if (desc->chip->ack) | 
|  | 516 | desc->chip->ack(irq); | 
|  | 517 |  | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 518 | action_ret = handle_IRQ_event(irq, desc->action); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 519 | if (!noirqdebug) | 
| David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 520 | note_interrupt(irq, desc, action_ret); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 521 |  | 
|  | 522 | if (desc->chip->eoi) | 
|  | 523 | desc->chip->eoi(irq); | 
|  | 524 | } | 
|  | 525 |  | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 526 | void | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 527 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, | 
|  | 528 | const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 529 | { | 
|  | 530 | struct irq_desc *desc; | 
|  | 531 | unsigned long flags; | 
|  | 532 |  | 
|  | 533 | if (irq >= NR_IRQS) { | 
|  | 534 | printk(KERN_ERR | 
|  | 535 | "Trying to install type control for IRQ%d\n", irq); | 
|  | 536 | return; | 
|  | 537 | } | 
|  | 538 |  | 
|  | 539 | desc = irq_desc + irq; | 
|  | 540 |  | 
|  | 541 | if (!handle) | 
|  | 542 | handle = handle_bad_irq; | 
| Thomas Gleixner | 9d7ac8b | 2006-12-22 01:08:14 -0800 | [diff] [blame] | 543 | else if (desc->chip == &no_irq_chip) { | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 544 | printk(KERN_WARNING "Trying to install %sinterrupt handler " | 
| Geert Uytterhoeven | b039db8 | 2006-12-20 15:59:48 +0100 | [diff] [blame] | 545 | "for IRQ%d\n", is_chained ? "chained " : "", irq); | 
| Thomas Gleixner | f8b5473 | 2006-07-01 22:30:08 +0100 | [diff] [blame] | 546 | /* | 
|  | 547 | * Some ARM implementations install a handler for really dumb | 
|  | 548 | * interrupt hardware without setting an irq_chip. This worked | 
|  | 549 | * with the ARM no_irq_chip but the check in setup_irq would | 
|  | 550 | * prevent us to setup the interrupt at all. Switch it to | 
|  | 551 | * dummy_irq_chip for easy transition. | 
|  | 552 | */ | 
|  | 553 | desc->chip = &dummy_irq_chip; | 
|  | 554 | } | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 555 |  | 
|  | 556 | spin_lock_irqsave(&desc->lock, flags); | 
|  | 557 |  | 
|  | 558 | /* Uninstall? */ | 
|  | 559 | if (handle == handle_bad_irq) { | 
| Jan Beulich | 5575ddf | 2007-02-16 01:28:26 -0800 | [diff] [blame] | 560 | if (desc->chip != &no_irq_chip) | 
|  | 561 | mask_ack_irq(desc, irq); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 562 | desc->status |= IRQ_DISABLED; | 
|  | 563 | desc->depth = 1; | 
|  | 564 | } | 
|  | 565 | desc->handle_irq = handle; | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 566 | desc->name = name; | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 567 |  | 
|  | 568 | if (handle != handle_bad_irq && is_chained) { | 
|  | 569 | desc->status &= ~IRQ_DISABLED; | 
|  | 570 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | 
|  | 571 | desc->depth = 0; | 
|  | 572 | desc->chip->unmask(irq); | 
|  | 573 | } | 
|  | 574 | spin_unlock_irqrestore(&desc->lock, flags); | 
|  | 575 | } | 
|  | 576 |  | 
|  | 577 | void | 
|  | 578 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | 
| David Howells | 57a58a9 | 2006-10-05 13:06:34 +0100 | [diff] [blame] | 579 | irq_flow_handler_t handle) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 580 | { | 
|  | 581 | set_irq_chip(irq, chip); | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 582 | __set_irq_handler(irq, handle, 0, NULL); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 583 | } | 
|  | 584 |  | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 585 | void | 
|  | 586 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | 
|  | 587 | irq_flow_handler_t handle, const char *name) | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 588 | { | 
| Ingo Molnar | a460e74 | 2006-10-17 00:10:03 -0700 | [diff] [blame] | 589 | set_irq_chip(irq, chip); | 
|  | 590 | __set_irq_handler(irq, handle, 0, name); | 
| Thomas Gleixner | dd87eb3 | 2006-06-29 02:24:53 -0700 | [diff] [blame] | 591 | } |