)]}' { "log": [ { "commit": "1014cfe2fb4cdd663137aafb21448cb613dd6a7d", "tree": "13b5fc4e7036b4226d94bd33aefb74a3dbb25b6a", "parents": [ "8123d8f17d8ba9d67e556688e4f025456ca97842", "4726f2a617ebd868a4fdeb5679613b897e5f1676" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:17:35 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:17:35 2010 -0700" }, "message": "Merge branch \u0027core-locking-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027core-locking-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n lockdep: Reduce stack_trace usage\n lockdep: No need to disable preemption in debug atomic ops\n lockdep: Actually _dec_ in debug_atomic_dec\n lockdep: Provide off case for redundant_hardirqs_on increment\n lockdep: Simplify debug atomic ops\n lockdep: Fix redundant_hardirqs_on incremented with irqs enabled\n lockstat: Make lockstat counting per cpu\n i8253: Convert i8253_lock to raw_spinlock\n" }, { "commit": "f3d46f9d3194e0329216002a8724d4c0957abc79", "tree": "6d9413e4a448d7b8d342c40297c4fbe0b9c4c2f0", "parents": [ "e40152ee1e1c7a63f4777791863215e3faa37a86" ], "author": { "name": "Anton Blanchard", "email": "anton@samba.org", "time": "Mon May 17 14:33:53 2010 +1000" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 17 07:57:27 2010 -0700" }, "message": "atomic_t: Cast to volatile when accessing atomic variables\n\nIn preparation for removing volatile from the atomic_t definition, this\npatch adds a volatile cast to all the atomic read functions.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "4e73238d163c6fcf001264832701d2a6d4927672", "tree": "bf8b9aa38ffec794d44cb1a81ee99c52e4d6b5f0", "parents": [ "46afb8296c2494bfce17064124b253eb9b176ef9" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Fri May 07 00:59:46 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat May 15 21:59:54 2010 +0100" }, "message": " MIPS: Oprofile: Fix Loongson irq handler\n \n The interrupt enable bit for the performance counters is in the Control\n Register $24, not in the counter register.\n loongson2_perfcount_handler(), we need to use\n \n Reported-by: Xu Hengyang \u003chengyang@mail.ustc.edu.cn\u003e\n Signed-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\n Cc: linux-mips@linux-mips.org\n Patchwork: http://patchwork.linux-mips.org/patch/1198/\n Signed-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n" }, { "commit": "46afb8296c2494bfce17064124b253eb9b176ef9", "tree": "709fc3151984e294f27e54a67bfe9f9387a377fb", "parents": [ "95e8f634d7a3ea5af40ec3fa42c8a152fd3a0624" ], "author": { "name": "Chandrakala Chavva", "email": "cchavva@caviumnetworks.com", "time": "Mon May 10 17:11:54 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat May 15 21:59:53 2010 +0100" }, "message": " MIPS: N32: Use compat version for sys_ppoll.\n \n The sys_ppoll() takes struct \u0027struct timespec\u0027. This is different for the\n N32 and N64 ABIs. Use the compat version to do the proper conversions.\n \n Signed-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\n To: linux-mips@linux-mips.org\n Patchwork: http://patchwork.linux-mips.org/patch/1210/\n Signed-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n" }, { "commit": "95e8f634d7a3ea5af40ec3fa42c8a152fd3a0624", "tree": "67da92dd5fa7fc27ebd25a9b524166ef182793ae", "parents": [ "3f8bf8f0fd79410fbcbf9dd9910dbc9d4882c94f" ], "author": { "name": "Shane McDonald", "email": "mcdonald.shane@gmail.com", "time": "Thu May 06 23:26:57 2010 -0600" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat May 15 21:59:53 2010 +0100" }, "message": " MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1\n \n In the FPU emulator code of the MIPS, the Cause bits of the FCSR register\n are not currently writeable by the ctc1 instruction. In odd corner cases,\n this can cause problems. For example, a case existed where a divide-by-zero\n exception was generated by the FPU, and the signal handler attempted to\n restore the FPU registers to their state before the exception occurred. In\n this particular setup, writing the old value to the FCSR register would\n cause another divide-by-zero exception to occur immediately. The solution\n is to change the ctc1 instruction emulator code to allow the Cause bits of\n the FCSR register to be writeable. This is the behaviour of the hardware\n that the code is emulating.\n \n This problem was found by Shane McDonald, but the credit for the fix goes\n to Kevin Kissell. In Kevin\u0027s words:\n \n I submit that the bug is indeed in that ctc_op: case of the emulator. The\n Cause bits (17:12) are supposed to be writable by that instruction, but the\n CTC1 emulation won\u0027t let them be updated by the instruction. I think that\n actually if you just completely removed lines 387-388 [...] things would\n work a good deal better. At least, it would be a more accurate emulation of\n the architecturally defined FPU. If I wanted to be really, really pedantic\n (which I sometimes do), I\u0027d also protect the reserved bits that aren\u0027t\n necessarily writable.\n \n Signed-off-by: Shane McDonald \u003cmcdonald.shane@gmail.com\u003e\n To: anemo@mba.ocn.ne.jp\n To: kevink@paralogos.com\n To: sshtylyov@mvista.com\n Patchwork: http://patchwork.linux-mips.org/patch/1205/\n Signed-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n" }, { "commit": "53ba4f2fa73225113a488584df0d85d3cba52943", "tree": "d85b984d9818abc3ccc0237eb53b710d9e96c39e", "parents": [ "bd6d29c25bb1a24a4c160ec5de43e0004e01f72b", "66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon May 03 09:17:01 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon May 03 09:17:01 2010 +0200" }, "message": "Merge commit \u0027v2.6.34-rc6\u0027 into core/locking\n" }, { "commit": "64fc74f5f6055e8470208a7d9cfc8d3994fff34d", "tree": "c8f744047cfd6403fa12cc5719868d7cce55c799", "parents": [ "b197b6286650feb9c991826519065aac6f4399b1" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Sat Apr 10 20:07:13 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:58 2010 +0100" }, "message": "MIPS: Loongson 2F: Fix of problems introduced by -mfix-loongson2f-jump\n\nThe -mfix-loongson2f-jump option provided by latest CVS binutils have fixed\nthe out-of-order issue of Loongson-2F described in chapter 15 of the\nLoongson2F User Manual [1, 2], but introduced some problems.\n\nThe option changes all of the jump target to \"addr \u0026 0xcfffffff\" through the\nat($1) register, but for the reboot address of Loongson 2F 0xbfc00000 this is\nwrong. Avoids the problem via telling the assembler to not use the $at\nregister.\n\n[1] Loongson2F User Manual (Chinese Version)\n http://www.loongson.cn/uploadfile/file/200808211\n[2] English Version of Chapter 15:\n http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode\u003dsource\n\nReported-and-tested-by: Liu Shiwei \u003cliushiwei@gmail.com\u003e\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nCc: linux-mips \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1109/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b197b6286650feb9c991826519065aac6f4399b1", "tree": "96bb05f49595948f2a7f9fbe985da59cdfa55f83", "parents": [ "8bbda428e90a2b638428fbb07abd80b9cb624a27" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Sat Apr 10 20:07:01 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:58 2010 +0100" }, "message": "MIPS: Loongson-2F: Use CONFIG_CPU_JUMP_WORKAROUNDS to control workarounds.\n\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nCc: linux-mips \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1106/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "8bbda428e90a2b638428fbb07abd80b9cb624a27", "tree": "d428d994726d7bb2b249ddf1d24d03816d98190d", "parents": [ "622844bf0b4cfa4f76d4a0ddc44266938385f5ab" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Sat Apr 10 20:05:01 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:56 2010 +0100" }, "message": "MIPS: Loongson 2F: Enable fixups of the latest binutils\n\nWith the \"Fixups of Loongson2F\" patch [1] having been applied to binutils\nfor binutils 2.20.1 we now can use it\u0027s time to enable the options provided\nby the patch to compile the kernel.\n\nWithout these fixups, the system may hang if the erratum is triggered.\n\nFor more information on these fixups please refer to the following\nreferences.\n\n[1] \"Fixups of Loongson2F\" patch for binutils(actually for gas)\n http://sourceware.org/ml/binutils/2009-11/msg00387.html\n[2] Chapter 15 of \"Loongson2F User Manual\"(Chinese Version)\n http://www.loongson.cn/uploadfile/file/200808211\n[3] Chapter 15 of the English version Loongson 2F User Manual\n http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode\u003dsource\n\nSigned-off-by: Zhang Le \u003cr0bertz@gentoo.org\u003e\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nCc: Zhang Le \u003cr0bertz@gentoo.org\u003e\nCc: linux-mips \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1106/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "622844bf0b4cfa4f76d4a0ddc44266938385f5ab", "tree": "52d7ab361091614b4815076003555819d56efd03", "parents": [ "c619366e36aa75beaaee630f3d6e468422ed9530" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Sat Apr 10 20:04:42 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:56 2010 +0100" }, "message": "MIPS: Loongson: Add CPU_LOONGSON2F_WORKAROUNDS\n\nAs documented in the Loongson 2F User Manual [2, 3], the old Loongson2F\nseries (2F01 / 2F02) have the NOP \u0026 JUMP issues which requires workarounds\nin the kernel and binutils. This issue has been rectified in Loongson 2F\nseries 2F03 so no workarounds needed.\n\nNow that the workarounds [1] adding the the -mfix-loongson2f-nop and\n-mfix-loongson2f-jump options have been comitted to the binutils the CVS\nrepository), we can add the workarounds in the kernel.\n\nThe workarounds have no significant side effect on the system but may\ndecrease performance so we control them through a a new\nCPU_LOONGSON2F_WORKAROUNDS config option allowing the users to only enable\nit as necessary.\n\n[1] \"Fixups of Loongson2F\" patch for binutils(actually for gas)\n http://sourceware.org/ml/binutils/2009-11/msg00387.html\n[2] Chapter 15 of \"Loongson2F User Manual\"(Chinese Version)\n http://www.loongson.cn/uploadfile/file/200808211\n[3] English Version of the above chapter 15\n http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode\u003dsource\n\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nCc: linux-mips \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1105/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "c619366e36aa75beaaee630f3d6e468422ed9530", "tree": "5606ab97d4265498ae5a85f015cd8ab2926427e0", "parents": [ "a9af5a01cadc25a058ee1dfd3bd8abd8724a3ed8" ], "author": { "name": "Florian Fainelli", "email": "ffainelli@freebox.fr", "time": "Thu Mar 25 11:42:41 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:55 2010 +0100" }, "message": "MIPS: Kconfig: Make Broadcom SoC support naming consistent\n\nSigned-off-by: Florian Fainelli \u003cffainelli@freebox.fr\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1082/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "a9af5a01cadc25a058ee1dfd3bd8abd8724a3ed8", "tree": "6bb56b9893a883a3e21b36c60735a615c1afd991", "parents": [ "922010ff7b75737e6dc361f8eae9c2784ac1872d" ], "author": { "name": "Florian Fainelli", "email": "ffainelli@freebox.fr", "time": "Thu Mar 25 11:42:22 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:55 2010 +0100" }, "message": "MIPS: BCM63xx: Update defconfig\n\nthe defconfig was out-of-sync since 2.6.30-rc6, update it with the new\nsymbols and enable BCM6338, 6345, wireless, b43 driver and LEDs support.\n\nSigned-off-by: Fainelli \u003cffainelli@freebox.fr\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1081/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "922010ff7b75737e6dc361f8eae9c2784ac1872d", "tree": "800fb92ec4b1a6a0a02544cd2c67a77a795c215c", "parents": [ "9dd147467790932e2f630b67eec925745463ee11" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Mon Apr 26 20:01:54 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:54 2010 +0100" }, "message": "MIPS: oprofile: Fix breakage when CONFIG_OPROFILE\u003dm\n\nWhen the oprofile is compiled as a module do_IRQ() is not called in\narch/mips/loongson/lemote-2f/irq.c due to a wrong #ifdef there.\n\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1143/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "94c26c9a66a35d4da3ab200864d1afd14c91fb71", "tree": "efb052b20d1f54be3816ada723bf581d2e367464", "parents": [ "514b6d0c06a5d751259f145d9593b4d084c1cce3" ], "author": { "name": "Arnaud Patard", "email": "apatard@mandriva.com", "time": "Thu Apr 29 11:58:51 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:51 2010 +0100" }, "message": "MIPS: Loongson: Fix LOONGSON_ADDRWIN_CFG macro.\n\nThere\u0027s a typo in the LOONGSON_ADDRWIN_CFG macro. The cpu window mmap\nregister address should contain the destination parameters not the\nsource one. This has not been noticed because the code is only using\nsource \u003d destination.\n\nSigned-off-by: Arnaud Patard \u003capatard@mandriva.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1162/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "514b6d0c06a5d751259f145d9593b4d084c1cce3", "tree": "2393ab9df49dfaa005e06ec88cbfe9452fe9bd5e", "parents": [ "ff40ad72addb448c1285181820597a17685ee69a" ], "author": { "name": "Arnaud Patard", "email": "apatard@mandriva.com", "time": "Thu Apr 29 11:58:49 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:51 2010 +0100" }, "message": "MIPS: Loongson: Fix phys_mem_access_prot() check\n\nThe check used to determine if uncached accelerated should be used or not\nis wrong. The parenthesis are misplaced and making the test fail.\n\nSigned-off-by: Arnaud Patard \u003capatard@mandriva.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1161/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "ff40ad72addb448c1285181820597a17685ee69a", "tree": "825c161be0ef2f1ef96552a2ab839700d666d506", "parents": [ "1c6d541c23a92c1b74c9dc62b453f3ac5923fbe1" ], "author": { "name": "Richard LIU", "email": "richard.liu@st.com", "time": "Thu Apr 29 11:58:47 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:50 2010 +0100" }, "message": "MIPS: Loongson: Fix find_vga_mem_init()\n\nThis allows to use all display device for instance DISPLAY_OTHER like SM501.\n\nSigned-off-by: Arnaud Patard \u003capatard@mandriva.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1160/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1c6d541c23a92c1b74c9dc62b453f3ac5923fbe1", "tree": "5321e25f8be31bfe2f8d55d02c0fcd67d0bed7fa", "parents": [ "4f81b01a30ffb338068d611e27da18c08db55464" ], "author": { "name": "Arnaud Patard", "email": "apatard@mandriva.com", "time": "Thu Apr 29 11:58:46 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:49 2010 +0100" }, "message": "MIPS: Loongson: Fix typo in gdium mach type string.\n\nIt\u0027s not \"gidum\" but \"gdium\".\n\nSigned-off-by: Arnaud Patard \u003capatard@mandriva.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1159/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4f81b01a30ffb338068d611e27da18c08db55464", "tree": "d60e6b0f6de80a485a56c21e4b008c8681c88008", "parents": [ "1ec56329ff939aba29291c0dec1a28ceed660162" ], "author": { "name": "Sebastian Andrzej Siewior", "email": "sebastian@breakpoint.cc", "time": "Tue Apr 27 22:53:30 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:48 2010 +0100" }, "message": "MIPS: Use CKSEG1ADDR for uncached handler\n\n\"MIPS: Calculate proper ebase value for 64-bit kernels\"\n9af43ea080dd5d6c7b34f38261780e5dd43537bc (lmo) rsp.\nf6be75d03c8870be91e6e2a195648ece04b6bb16 (kernel.org) broke some 64-bit\nMIPS systems.\n\nBefore this we were using XKPHYS/cached as ebase and computed the uncached\nxphsys/unchached address for that area. After that commit ebase became a\n32-bit compat address and convert does not work anymore. We now should use\nCKSEG1 for this. CKSEG1ADDR does just that in 32-bit and 64-bit.\n\nSigned-off-by: Sebastian Andrzej Siewior \u003csebastian@breakpoint.cc\u003e\nTo: Ralf Baechle \u003cralf@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1149/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1ec56329ff939aba29291c0dec1a28ceed660162", "tree": "45788e1f4f0baef44d727e7ca31821c16ba6317f", "parents": [ "3be6022c27ace1e3b4ba963e7ffd2e3b60cecd8a" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Apr 28 12:16:18 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:48 2010 +0100" }, "message": "MIPS: Check for accesses beyond the end of the PGD.\n\nFor some combinations of PAGE_SIZE and vmbits, it is possible to have\nuserspace access that are beyond what is covered by the PGD, but within\nvmbits. Such an access would cause the TLB refill handler to load garbage\nvalues for PMD and PTE potentially giving userspace access to parts of the\nphysical address space to which it is not entitled.\n\nIn the TLB refill hot path, we add a single dsrl instruction so we can\ncheck if any bits outside of the range covered by the PGD are set. In\nthe vmalloc side we then separate the bad case from the normal vmalloc\ncase and call tlb_do_page_fault_0 if warranted. This slows us down a\nbit, but has the benefit of yielding deterministic behavior.\n\n[Ralf: Fixed build error for 32-bit kernels.]\n[Ralf: Folded lmo commit c8c0e22b2aa3982852b44279638ef37f9aa31b7d into this\n commit.]\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1152/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n" }, { "commit": "3be6022c27ace1e3b4ba963e7ffd2e3b60cecd8a", "tree": "617178ac2ee9395e609aef3899b56756fb701cbb", "parents": [ "26b9e547e90db6b8b409084a9d4501124ff492b3" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Apr 28 12:16:17 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:47 2010 +0100" }, "message": "MIPS: Use uasm_i_ds{r,l}l_safe() instead of uasm_i_ds{r,l}l() in tlbex.c\n\nThis makes the code somewhat cleaner while reducing the risk of shift\namount overflows when various page table related options are changed.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1154/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "26b9e547e90db6b8b409084a9d4501124ff492b3", "tree": "020bfdc2f464477b032e2bc5d766a36382f7e5b4", "parents": [ "ce384d83d00ee457c3931d3fdb9fa2c38e345a3c" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Apr 28 12:16:16 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:45 2010 +0100" }, "message": "MIPS: Add uasm_i_dsrl_safe() and uasm_i_dsll_safe() to uasm.\n\nThis allows us to clean up the code by not having to explicitly code\nchecks for shift amounts greater than 32.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1153/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "ce384d83d00ee457c3931d3fdb9fa2c38e345a3c", "tree": "9f2a8a21236f0a270118d393e893cdc4986d229b", "parents": [ "fcf3ca4c3d6d911df8ee2b8f010ffe504d3aef71" ], "author": { "name": "Yury Polyanskiy", "email": "ypolyans@princeton.edu", "time": "Mon Apr 26 00:53:10 2010 -0400" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:45 2010 +0100" }, "message": "MIPS: die() does not call die notifier chain\n\nThe MIPS implementation of die() forgets to call notify_die() and thus notifiers\nregistered via register_die_notifier() are not called. This results in kgdb not\nbeing activated on exceptions.\n\nThe only subtlety is that notify_die declares its regs argument w/o const, so\nthe const had to be removed from mips die() as well.\n\n[Ralf: Fixed build error for SGI IP22 and IP28 platforms.]\n\nSigned-off-by: Yury Polyanskiy \u003cypolyans@princeton.edu\u003e\nCc: linux-mips@linux-mips.org\nPatchworks: http://patchwork.linux-mips.org/patch/1142/\nAcked-by: Jason Wessel \u003cjason.wessel@windriver.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n\n---\n" }, { "commit": "fcf3ca4c3d6d911df8ee2b8f010ffe504d3aef71", "tree": "bf5e213945d24fa3d59e0b69d083088189c3731e", "parents": [ "0000a5390184af1459e82506fcfa7db96f3e6d33" ], "author": { "name": "Sebastian Andrzej Siewior", "email": "sebastian@breakpoint.cc", "time": "Sun Apr 18 15:26:36 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:44 2010 +0100" }, "message": "MIPS: Swarm, Littlesur: Enable PATA platform driver.\n\nAccording to include/asm/sibyte/swarm.h both systems provide a\nplatform device for the ide controler. Until now the IDE subsystem was\nused which is deprecated by now. The same structure can be used with the\nPATA driver.\n\nSigned-off-by: Sebastian Andrzej Siewior \u003csebatian@breakpoint.cc\u003e\nCc: tbm@cyrius.com\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1127/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "0000a5390184af1459e82506fcfa7db96f3e6d33", "tree": "a21be05f506bbee603e2a280d126204ce7dbf3d4", "parents": [ "0dfeecacd8e4405209f217944818b90016bb4a9d" ], "author": { "name": "Manuel Lauss", "email": "manuel.lauss@googlemail.com", "time": "Wed Apr 21 17:41:59 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:43 2010 +0100" }, "message": "MIPS: DB1200: PCMCIA card detection must not be auto-enabled.\n\nSame issues as SD card detection: One of both is always triggering and the\nhandlers take care to shut it up and enable the other. To avoid messages\nabout \"unbalanced interrupt enable/disable\" they must not be automatically\nenabled when initally requested.\n\nThis was not an issue with the db1200_defconfig due to fortunate timings;\non a build without network chip support the warnings appear.\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nTo: Linux-MIPS \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1133/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "0dfeecacd8e4405209f217944818b90016bb4a9d", "tree": "8939dc546bcbae06960647427250c8b24b0a6446", "parents": [ "b20947aaa0026efd7355ae4bf70b56a13a3f98b1" ], "author": { "name": "Sebastian Andrzej Siewior", "email": "sebastian@breakpoint.cc", "time": "Wed Apr 21 20:57:08 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:43 2010 +0100" }, "message": "MIPS: SB1250: Include correct header and fix a warning\n\n| arch/mips/pci/pci-sb1250.c: In function sb1250_pcibios_init:\n| arch/mips/pci/pci-sb1250.c:257: warning: assignment makes integer from pointer without a cast\n| arch/mips/pci/pci-sb1250.c:285: error: MAX_NR_CONSOLES undeclared (first use in this function)\n| arch/mips/pci/pci-sb1250.c:285: error: (Each undeclared identifier is reported only once\n| arch/mips/pci/pci-sb1250.c:285: error: for each function it appears in.)\n\nSigned-off-by: Sebastian Andrzej Siewior \u003csebastian@breakpoint.cc\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1136/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b20947aaa0026efd7355ae4bf70b56a13a3f98b1", "tree": "9be5f52cef2740c33290efcd63b2c1832365d9ae", "parents": [ "9eed4124c0d56d39b06224765c65eaa35f580edf" ], "author": { "name": "Sebastian Andrzej Siewior", "email": "sebastian@breakpoint.cc", "time": "Wed Apr 21 22:36:47 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:42 2010 +0100" }, "message": "MIPS: Fixup screen_info struct initializations\n\n|arch/mips/sibyte/swarm/setup.c:153:\n| warning: large integer implicitly truncated to unsigned type\n\nThe field was changed in d9b26352 aka (\"x86, setup: Store the boot\ncursor state\"). This patch changes the values back they way they were\nbefore this extra field got introduced.\n\nWhile here, the other two boards are also converted to C99 initializer.\n\nSigned-off-by: Sebastian Andrzej Siewior \u003csebastian@breakpoint.cc\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1137/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "9eed4124c0d56d39b06224765c65eaa35f580edf", "tree": "38ba0866b2e2a01865bd21a7ceb81ca56698b1df", "parents": [ "c8f3cc0b65af00be5f84c6d4ee45007643322713" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Apr 21 11:39:07 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:41 2010 +0100" }, "message": "MIPS: cmpxchg.h: Fix excessive indentation.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "c8f3cc0b65af00be5f84c6d4ee45007643322713", "tree": "9a1159172287b7fd921c5dd9a34d4c6b970187a0", "parents": [ "b0b4ce38a535ed3de5ec6fdd4f3c34435a1c1d1e" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Mon Apr 19 11:43:10 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:41 2010 +0100" }, "message": "MIPS: Don\u0027t vmap things at address zero.\n\nIn the 64-bit kernel we use swapper_pg_dir for three different things.\n\n1) xuseg mappings for kernel threads.\n\n2) vmap mappings for all kernel-space accesses in xkseg.\n\n3) vmap mappings for kernel modules in ksseg (kseg2).\n\nDue to how the TLB refill handlers work, any mapping established in\nxkseg or ksseg will also establish a xuseg mapping that should never\nbe used by the kernel.\n\nIn order to be able to use exceptions to trap NULL pointer\ndereferences, we need to ensure that nothing is mapped at address\nzero. Since vmap mappings in xkseg are reflected in xuseg, this means\nwe need to ensure that there are no vmap mappings established at the\nstart of xkseg. So we move back VMALLOC_START to avoid establishing\nvmap mappings at the start of xkseg.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1129/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7270be03bc300f67c0b9eccde730937e802892b6", "tree": "c574e42e2c5289d479e3f424d8e5a8ddc94c9f80", "parents": [ "66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:10:41 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:39 2010 +0100" }, "message": "MIPS: PNX8550: Fix build error, broken by:\n\n commit 5a0e3ad6af8660be21ca98a971cd00f331318c05\n Author: Tejun Heo \u003ctj@kernel.org\u003e\n Date: Wed Mar 24 17:04:11 2010 +0900\n\n include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\nSince a while the few headers included don\u0027t drag in \u003clinux/kernel.h\u003e\nanymore, thus no more prototype of printk() resulting in:\n\n CC arch/mips/nxp/pnx8550/common/reset.o\n/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c: In function \u0027pnx8550_machine_restart\u0027:\n/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c:31: error: implicit declaration of function \u0027printk\u0027\n/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c:33: error: \u0027NULL\u0027 undeclared (first use in this function)\n/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c:33: error: (Each undeclared identifier is reported only once\n/home/ralf/src/linux/upstream-linus/arch/mips/nxp/pnx8550/common/reset.c:33: error: for each function it appears in.)\nmake[3]: *** [arch/mips/nxp/pnx8550/common/reset.o] Error 1\n\nFixed by including \u003clinux/kernel.h\u003e\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f6be75d03c8870be91e6e2a195648ece04b6bb16", "tree": "eba85c44498f040ac07915d82467aa08bb426860", "parents": [ "d8000beef2cd10c16dc5f66af715f692f5992652" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Tue Apr 06 13:29:50 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:22 2010 +0100" }, "message": "MIPS: Calculate proper ebase value for 64-bit kernels\n\nThe ebase is relative to CKSEG0 not CAC_BASE. On a 32-bit kernel they\nare the same thing, for a 64-bit kernel they are not.\n\nIt happens to kind of work on a 64-bit kernel as they both reference\nthe same physical memory. However since the CPU uses the CKSEG0 base,\ndetermining if a J instruction will reach always gives the wrong result\nunless we use the same number the CPU uses.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1093/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d8000beef2cd10c16dc5f66af715f692f5992652", "tree": "3cbe44d00c9ba1e2a09b91514a20e1353089d38c", "parents": [ "2844e49f5ea1ae75d2026ff128b145e3bd44134c" ], "author": { "name": "Manuel Lauss", "email": "manuel.lauss@googlemail.com", "time": "Sat Apr 03 17:07:03 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:22 2010 +0100" }, "message": "MIPS: Alchemy: DB1200: Remove custom wait implementation\n\nWhile playing with the out-of-tree MAE driver module, the system would\npanic after a while in the db1200 custom wait code after wakeup due to\na clobbered k0 register being used as target address of a store op.\n\nRemove the custom wait implementation and revert back to the Alchemy-\nrecommended implementation already set as default.\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nTo: Linux-MIPS \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1092/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "2844e49f5ea1ae75d2026ff128b145e3bd44134c", "tree": "ce8d74c90b5eb75978d6ecb17da220e5b5e93660", "parents": [ "7b3e543ddb39b69b75c9c24bb54180eca152f541" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Apr 03 10:59:52 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:22 2010 +0100" }, "message": "MIPS: Big Sur: Make defconfig more useful.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7b3e543ddb39b69b75c9c24bb54180eca152f541", "tree": "78e3ef45016424cdb970fe0fb136b31e202a2dfa", "parents": [ "3d45285dd1ff4d4a1361b95e2d6508579a4402b5" ], "author": { "name": "Anton Altaparmakov", "email": "aia21@cam.ac.uk", "time": "Thu Mar 25 20:48:12 2010 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:21 2010 +0100" }, "message": "MIPS: Fix __vmalloc() etc. on MIPS for non-GPL modules\n\nCommit b3594a089f1c17ff919f8f78505c3f20e1f6f8ce (lmo) rsp.\n351336929ccf222ae38ff0cb7a8dd5fd5c6236a0 (kernel.org) break non-GPL modules\nthat use __vmalloc() or any of the vmap(), vm_map_ram(), etc functions on\nMIPS.\n\nAll those functions are EXPORT_SYMBOL() so are meant to be allowed to be\nused by non-GPL kernel modules. These calls all take page protection as\nan argument which is normally a constant like PAGE_KERNEL.\n\nThis commit causes all protection constants like PAGE_KERNEL to not be\nconstants and instead to contain the GPL-only symbol _page_cachable_default.\n\nThis means that all calls to __vmalloc(), vmap(), etc, cause non-GPL\nmodules to fail to link with the complaint that they are trying to use the\nGPL-only symbol _page_cachable_default...\n\nChange EXPORT_SYMBOL_GPL(_page_cachable_default) to EXPORT_SYMBOL() for\nnon-GPL modules that call __vmalloc(), vmap(), vm_map_ram() etc.\n\nSigned-off-by: Anton Altaparmakov \u003caia21@cantab.net\u003e\nCc: Chris Dearman \u003cchris@mips.com\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-kernel@vger.kernel.org\nPatchwork: http://patchwork.linux-mips.org/patch/1084/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3d45285dd1ff4d4a1361b95e2d6508579a4402b5", "tree": "8130cd7c5289983de1e622728de07eb1588a326a", "parents": [ "5e3644a95db11e2e582ae3765ffad6e0cce5376e" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Mar 23 17:56:38 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:21 2010 +0100" }, "message": "MIPS: Sibyte: Fix M3 TLB exception handler workaround.\n\nThe M3 workaround needs to cmpare the region and VPN2 fields only.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "5e3644a95db11e2e582ae3765ffad6e0cce5376e", "tree": "fb2b262cbdb5d2f1c2d4e0a8d378e923ee4663ed", "parents": [ "5808184f1b2fe06ef8a54a2b7fb1596d58098acf" ], "author": { "name": "Florian Fainelli", "email": "ffainelli@freebox.fr", "time": "Tue Mar 23 10:30:08 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:20 2010 +0100" }, "message": "MIPS: BCM63xx: Fix build failure in board_bcm963xx.c\n\nSince 2083e8327aeeaf818b0e4522a9d2539835c60423, the SPROM is now registered\nin the board_prom_init callback, but it references variables and functions\nwhich are declared below. Move the variables and functions above\nboard_prom_init.\n\nSigned-off-by: Florian Fainelli \u003cffainelli@freebox.fr\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1077/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "5808184f1b2fe06ef8a54a2b7fb1596d58098acf", "tree": "1ecb3addfdc3269cf55cffe112976e97a828736e", "parents": [ "8d9df29db273ab9a330828f4f4f6669d293a730a" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Mar 23 15:54:50 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:20 2010 +0100" }, "message": "MIPS: uasm: Add OR instruction.\n\nThis is needed for the fix of the M3 workaround.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "8d9df29db273ab9a330828f4f4f6669d293a730a", "tree": "7f5e9c87125d53fc2a512be150b01f6116918b3f", "parents": [ "9538ca636f2fa28ae1514327328e2869f0215981" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Mar 23 00:02:43 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:19 2010 +0100" }, "message": "MIPS: Sibyte: Apply M3 workaround only on affected chip types and versions.\n\nPreviously it was unconditionally used on all Sibyte family SOCs. The\nM3 bug has to be handled in the TLB exception handler which is extremly\nperformance sensitive, so this modification is expected to deliver around\n2-3% performance improvment. This is important as required changes to the\nM3 workaround will make it more costly.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "9538ca636f2fa28ae1514327328e2869f0215981", "tree": "61e0c7a208cf9519e887d415d0832038be03f94f", "parents": [ "e23a90eb736b18c16fd6d59e8c1fa6a16ac3bc0b" ], "author": { "name": "Maxime Bizon", "email": "mbizon@freebox.fr", "time": "Sat Jan 30 18:34:58 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:19 2010 +0100" }, "message": "MIPS: BCM63xx: Initialize gpio_out_low \u0026 out_high to current value at boot.\n\nTo avoid a glitch during GPIO initialisation read GPIO output register\nvalues left by the firmware.\n\nSigned-off-by: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/903/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e23a90eb736b18c16fd6d59e8c1fa6a16ac3bc0b", "tree": "23e6856f4852541c314da459bad1df1947d1aa37", "parents": [ "4fe67e44a0e0cb6281cbaaf603111187d87fce57" ], "author": { "name": "Florian Fainelli", "email": "ffainelli@freebox.fr", "time": "Tue Mar 02 14:38:47 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:18 2010 +0100" }, "message": "MIPS: BCM63xx: Register SSB SPROM fallback in board\u0027s first stage callback\n\nSigned-off-by: Florian Fainelli \u003cffainelli@freebox.fr\u003e\nTo: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1017/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4fe67e44a0e0cb6281cbaaf603111187d87fce57", "tree": "d45b64fd7c9ffcfa65a79375a3b7d7d73e11b449", "parents": [ "524ef29cff593ab6635cda2a17b331bede58a396" ], "author": { "name": "Maxime Bizon", "email": "mbizon@freebox.fr", "time": "Sat Jan 30 18:34:56 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:18 2010 +0100" }, "message": "MIPS: BCM63xx: Fix typo in cpu-feature-overrides file.\n\nFix typo: CONFIG_BCMCPU_IS_63xx does not exist;\nCONFIG_BCM63XX_CPU_63xx is the valid config option.\n\nSigned-off-by: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nTo: linux-mips@linux-mips.org\nCc: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/901/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "524ef29cff593ab6635cda2a17b331bede58a396", "tree": "d8d6a09c2f77e755f69f204e2467589491f5e36e", "parents": [ "97befcf4f0f42b1644b4b164ddc363685546edcd" ], "author": { "name": "Maxime Bizon", "email": "mbizon@freebox.fr", "time": "Sat Jan 30 18:34:55 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:18 2010 +0100" }, "message": "MIPS: BCM63xx: Add support for second uart.\n\nThe BCm63xx SOC has two uarts. Some boards use the second one for\nbluetooth. This patch changes platform device registration code to\nhandle this. Changes to the UART driver were already merged in\n6a2c7eabfd09ca7986bf96b8958a87ca041a19d8.\n\nSigned-off-by: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nTo: linux-mips@linux-mips.org\nCc: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/900/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "97befcf4f0f42b1644b4b164ddc363685546edcd", "tree": "06ab945c8507f618730561ec7ef5513f5a0ba060", "parents": [ "f29b7cac19ef5aa093fc9403d10735fa72cabf99" ], "author": { "name": "Maxime Bizon", "email": "mbizon@freebox.fr", "time": "Sat Jan 30 18:34:54 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:17 2010 +0100" }, "message": "MIPS: BCM63xx: Fix double gpio registration.\n\nbcm63xx_gpio_init is already called from prom_init to allow board to use\nthem early, so we can remove the unneeded arch_initcall.\n\nSigned-off-by: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nTo: linux-mips@linux-mips.org\nCc: Maxime Bizon \u003cmbizon@freebox.fr\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/899/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f29b7cac19ef5aa093fc9403d10735fa72cabf99", "tree": "4082e2026e4d5c3e43b80421c36384715e4b6c14", "parents": [ "2e6ad9a9585b5520cddda4743bfbfdf7f11c5a50" ], "author": { "name": "Florian Fainelli", "email": "florian@openwrt.org", "time": "Mon Mar 01 23:36:27 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:17 2010 +0100" }, "message": "MIPS: BCM63xx: Add DWVS0 board\n\nThe DWVS0 board is a BCM6358-based board with an on-board OHCI controler.\n\nSigned-off-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1015/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "2e6ad9a9585b5520cddda4743bfbfdf7f11c5a50", "tree": "b7f666fe90db3e530114bd5afeac843d9987a418", "parents": [ "d1b28758c6b46f6d04ef6017b51f614aecdb4abe" ], "author": { "name": "Florian Fainelli", "email": "florian@openwrt.org", "time": "Mon Mar 01 23:36:22 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:17 2010 +0100" }, "message": "MIPS: BCM63xx: Add the RTA1025W-16 BCM6348-based board to suppported boards.\n\nSigned-off-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1014/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d1b28758c6b46f6d04ef6017b51f614aecdb4abe", "tree": "93ccf0a33485c146687cd4e49d862d9403c05f6e", "parents": [ "b44c779ae0dedf3a6503c253954e570361b33f2b" ], "author": { "name": "Florian Fainelli", "email": "florian@openwrt.org", "time": "Mon Mar 01 23:36:32 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:16 2010 +0100" }, "message": "MIPS: BCM63xx: Fix BCM6338 and BCM6345 gpio count\n\nThe number of GPIOs on BCM6338 is 8, while BCM6345 has only 16 GPIOs\navailable.\n\nSigned-off-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1016/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b44c779ae0dedf3a6503c253954e570361b33f2b", "tree": "9c9b5e3df1e932deecb4fd23557bb56a13fbbf70", "parents": [ "f1df323924e2fde14cbcd51209a8cbfc33e0c232" ], "author": { "name": "Andrea Gelmini", "email": "andrea.gelmini@gelma.net", "time": "Sat Feb 27 17:51:23 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:15 2010 +0100" }, "message": "MIPS: libgcc.h: Checkpatch cleanup\n\narch/mips/lib/libgcc.h:21: ERROR: open brace \u0027{\u0027 following union go on the same line\n\nSigned-off-by: Andrea Gelmini \u003candrea.gelmini@gelma.net\u003e\nTo: linux-kernel@vger.kernel.org\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: linux-mips@linux-mips.org\nCc: linux-sh@vger.kernel.org\nPatchwork: http://patchwork.linux-mips.org/patch/1007/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f1df323924e2fde14cbcd51209a8cbfc33e0c232", "tree": "a0f5a3c09e4a9e8ec3eb11bcc4e9d729b0af9dce", "parents": [ "d814c28ceca8f659c0012eaec8e21eee43710716" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Sat Mar 13 12:34:15 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:15 2010 +0100" }, "message": "MIPS: Loongson-2F: Flush the branch target history in BTB and RAS\n\nAs per chapter 15 \"Errata: Issue of Out-of-order in loongson\"[1] to work\naround the Loongson 2F erratum we need to do:\n\n\"When switching from user mode to kernel mode, you should flush the\nbranch target history such as BTB and RAS.\"\n\n[1] Chinese version: http://www.loongson.cn/uploadfile/file/200808211\n[2] English version of chapter 15:\n http://groups.google.com.hk/group/loongson-dev/msg/e0d2e220958f10a6?dmode\u003dsource\n\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: Shinya Kuribayashi \u003cshinya.kuribayashi@necel.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1066/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d814c28ceca8f659c0012eaec8e21eee43710716", "tree": "add2c533054febaa51de021eb5b984e1b4818411", "parents": [ "c52d0d30aef84aa8893b34e5254716c8ab5c4472" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Feb 18 16:13:05 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:15 2010 +0100" }, "message": "MIPS: Move signal trampolines off of the stack.\n\nThis is a follow on to the vdso patch.\n\nSince all processes now have signal trampolines permanently mapped, we\ncan use those instead of putting the trampoline on the stack and\ninvalidating the corresponding icache across all CPUs. We also get rid\nof a bunch of ICACHE_REFILLS_WORKAROUND_WAR code.\n\n[Ralf: GDB 7.1 which has the necessary modifications to allow backtracing\nover signal frames will supposedly be released tomorrow. The old signal\nframe format obsoleted by this patch exists in two variations, for sane\nprocessors and for those requiring ICACHE_REFILLS_WORKAROUND_WAR. So\nthere was never a GDB which did support backtracing over signal frames\non all MIPS systems. This convinved me this series should be applied and\npushed upstream as soon as possible.]\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/974/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "c52d0d30aef84aa8893b34e5254716c8ab5c4472", "tree": "0ba93eb7e305229ceb2ee04119dc7ab22b9fa33d", "parents": [ "58b9e2239fa63c7c470acb4a77e9da17e6a6fa4f" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Feb 18 16:13:04 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:14 2010 +0100" }, "message": "MIPS: Preliminary VDSO\n\nThis is a preliminary patch to add a vdso to all user processes. Still\nmissing are ELF headers and .eh_frame information. But it is enough to\nallow us to move signal trampolines off of the stack. Note that emulation\nof branch delay slots in the FPU emulator still requires the stack.\n\nWe allocate a single page (the vdso) and write all possible signal\ntrampolines into it. The stack is moved down by one page and the vdso is\nmapped into this space.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/975/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "58b9e2239fa63c7c470acb4a77e9da17e6a6fa4f", "tree": "2f94c2146e2fe9adba511c4b66c3e3dd89d669b9", "parents": [ "847253b9483f713b3797877034e0940fd45ce375" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Feb 18 16:13:03 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:14 2010 +0100" }, "message": "MIPS: Add SYSCALL to uasm.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/976/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "86f7d75eb7c43a54a7b37a2287787004f4310de6", "tree": "1a41fc905dfc6649279dc49c7a908224d1f826c6", "parents": [ "727c0075c80005e2012be113a91e5976abec4f9d" ], "author": { "name": "Florian Fainelli", "email": "florian@openwrt.org", "time": "Wed Mar 10 09:51:09 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:13 2010 +0100" }, "message": "MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSET\n\nOn AR7, we already redefine PHYS_OFFSET to match the system specifities, it\nis however not sufficient when unsing dma_{map,unmap}_single, specifically\nin the ethernet driver, we must also adjust CAC_ADDR and UNCAC_ADDR for DMA\nto work correctly. This patch fixes the following issue, seen in cpmac_open:\n\nops[#1]:\nCpu 0\n$ 0 : 00000000 10008400 a0f5b120 00000000\n$ 4 : 94c59000 94270f64 00000020 00000010\n$ 8 : 00000010 94103ce0 0000000a 94c03400\n$12 : ffffffff 94c03408 94c03410 00000001\n$16 : a0f5ba20 00000041 94c592c0 94c59200\n$20 : 94c59000 000005ee 00002000 9438c8f0\n$24 : 00000010 00000000\n$28 : 94fac000 94fadd58 94390000 942724a8\nHi : 00000000\nLo : 00000001\nepc : 94272518 cpmac_open+0x208/0x3f8\n Not tainted\nra : 942724a8 cpmac_open+0x198/0x3f8\nStatus: 10008403 KERNEL EXL IE\nCause : 3080000c\nBadVA : 00000000\nPrId : 00018448 (MIPS 4KEc)\nModules linked in:\nProcess ifconfig (pid: 278, threadinfo\u003d94fac000, task\u003d94e79590, tls\u003d00000000)\nStack : 7f8da120 2ab05cb0 94c59000 943356f0 00000000 943d0000 94c59000 943356f0\n 94c59030 943d0000 943c27c0 94fade10 00000000 94fade20 94c59000 9428e5a4\n 00000000 94c59000 00000041 94289768 94c59000 00000041 00001002 00001043\n 00000000 9428d810 00000000 94fade10 7f8da4e8 9428e6b8 00000000 7f8da4a8\n 7f8da4e8 00008914 00000000 942f7f2c 00000000 00000008 00408000 00008913\n ...\nCall Trace:\n[\u003c94272518\u003e] cpmac_open+0x208/0x3f8\n[\u003c9428e5a4\u003e] dev_open+0x164/0x264\n[\u003c9428d810\u003e] dev_change_flags+0xd0/0x1bc\n[\u003c942f7f2c\u003e] devinet_ioctl+0x2d8/0x908\n[\u003c942771f8\u003e] sock_ioctl+0x29c/0x2fc\n[\u003c941a0fb4\u003e] vfs_ioctl+0x2c/0x7c\n[\u003c941a16ec\u003e] do_vfs_ioctl+0x5dc/0x630\n[\u003c941a1790\u003e] sys_ioctl+0x50/0x88\n[\u003c94101e10\u003e] stack_done+0x20/0x3c\n\nSigned-off-by: peter fuerst \u003cpost@pfrst.de\u003e\nSigned-off-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1050/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "727c0075c80005e2012be113a91e5976abec4f9d", "tree": "d20dea40273e249d8b535aeb290f8c120553da3e", "parents": [ "1e3fb3778be3c0a56626eba4a84f7d2fa991aa93" ], "author": { "name": "Alexander Clouter", "email": "alex@digriz.org.uk", "time": "Sat Mar 13 00:09:15 2010 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:13 2010 +0100" }, "message": "MIPS: AR7: Fix phat finger of cpmac fixed_phy_add\n\nSeems I trimmed one too many lines in\n29ca2d81bd2a62fa86bc9a72ddadcf03d7daf795 (lmo) rsp\n7084338eb8eb0cc021ba86c340157bad397f3f0b (kernel.org) which led to no\nfunctioning Ethernet on my WAG54Gv2. This patch restores the AWOL line.\n\nSigned-off-by: Alexander Clouter \u003calex@digriz.org.uk\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1065/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1e3fb3778be3c0a56626eba4a84f7d2fa991aa93", "tree": "dbf94e436d4cc1e85f050d94621129f987ca93d0", "parents": [ "582b65e4d3f9664f87661359af99def304bc68bb" ], "author": { "name": "Alexander Clouter", "email": "alex@digriz.org.uk", "time": "Fri Mar 12 19:39:48 2010 +0000" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:13 2010 +0100" }, "message": "MIPS: AR7: Fix phat finger of reset bit in vlynq_high_data\n\nSeems in my whitespace cleanup 0f2536082d01448daeced8d9e82c3ba1751fefa3\n(lmo) rsp. 8c2961da46abd85a71d20f2b169bf80618e (kernel.org) caused AR7\nto no longer get as far as init. Fixed my phat fingering.\n\nSigned-off-by: Alexander Clouter \u003calex@digriz.org.uk\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1064/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "582b65e4d3f9664f87661359af99def304bc68bb", "tree": "8e94fef3542b7d7c4d3b7c560babc03ef5600aac", "parents": [ "b846c10da5d6a5c159ab4dea92c1080d5add9fb1" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Wed Mar 10 00:53:21 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:12 2010 +0100" }, "message": "MIPS: Loongson: Add module info to the loongson2_clock driver\n\nThis patch fixes a kernel warning when loading the the loongson2_clock\ndriver:\n\n\"Feb 25 23:42:27 localhost kernel: [ 4.965000] loongson2_clock: module\nlicense \u0027unspecified\u0027 taints kernel.\"\n\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nReported-by: Liu Shiwei \u003cliushiwei@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1045/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b846c10da5d6a5c159ab4dea92c1080d5add9fb1", "tree": "f02230a549f188f41b7cbd0da25d0b0f70ace7a4", "parents": [ "52553664033078102f5f430c861ccd0863b1b708" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Thu Mar 11 11:30:50 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:12 2010 +0100" }, "message": "MIPS: Lemote 2F: Ensure atomic execution of _rdmsr and _wrmsr\n\nOn Lemote 2F CS5536 MSRs are accessed through a index / data register pair.\nThe access sequence must be protected by a spinlock to be atomic.\n\nWithout this rebooting in fs2f_reboot() may fail.\n\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1058/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "52553664033078102f5f430c861ccd0863b1b708", "tree": "ccb96c5760a18a66610c2205cb6c62dc16ce2792", "parents": [ "d5d3102b9adec0a34eb5899324b62a4a3d34183e" ], "author": { "name": "Robert P. J. Day", "email": "rpjday@crashcourse.ca", "time": "Sat Feb 27 12:02:51 2010 -0500" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:12 2010 +0100" }, "message": "MIPS: Initialize an atomic_t properly with ATOMIC_INIT(0).\n\nSigned-off-by: Robert P. J. Day \u003crpjday@crashcourse.ca\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1008/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d5d3102b9adec0a34eb5899324b62a4a3d34183e", "tree": "355f868f4c149ac63fbc70445e56c3ba2bde2916", "parents": [ "7ea4a6891b68fe60bf4eee41a7ef38d524b0aebd" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Mar 11 08:48:14 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:11 2010 +0100" }, "message": "MIPS: Fix elfcore.c build warning\n\nkernel/elfcore.c includes \u003clinux/elf.h\u003e which includes the \u003casm/elf.h\u003e. In\n\u003casm/elf.h\u003e, struct pt_regs is declared inside the parameter list of the\nelf_dump_regs function which causes a kernel build warning.\n\nFixed by adding a forward declaration of struct pt_regs.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7ea4a6891b68fe60bf4eee41a7ef38d524b0aebd", "tree": "7063175eebf15cbb14edc96bf6469820164ae85f", "parents": [ "7a7ac952d5217b2f568e5ef91ac39b572e166f24" ], "author": { "name": "Yang Shi", "email": "yang.shi@windriver.com", "time": "Wed Mar 03 16:43:20 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:10 2010 +0100" }, "message": "MIPS: Octeon: Remove redundant declaration of octeon_reserve32_memory\n\nocteon_reserve32_memory is defined In Octeon\u0027s setup.c, so remove the\nredundant extern declaration of this variable.\n\nSigned-off-by: Yang Shi \u003cyang.shi@windriver.com\u003e\nTo: f.fainelli@gmail.com\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1022/\nAcked-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7a7ac952d5217b2f568e5ef91ac39b572e166f24", "tree": "fc7313875b4d5e8e833da49b35d8b0ea2959d508", "parents": [ "abe5b417fb4a52e9510fdb5a16e722e91bf89e92" ], "author": { "name": "Wu Zhangjin", "email": "wuzhangjin@gmail.com", "time": "Wed Mar 10 00:27:28 2010 +0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:10 2010 +0100" }, "message": "MIPS: Trace: Don\u0027t trace irqsoff for the idle process\n\nLike x86 did in arch/x86/kernel/{process_32.c,process_64.c}, also don\u0027t\ntrace irqsoff for idle.\n\nIf there\u0027s no useful work to be done, we don\u0027t care about the irqsoff\nduration. If we trace the idle process, the max duration of irqsoff will\nbe the idle time and make the irqsoff tracer useless.\n\nSigned-off-by: Wu Zhangjin \u003cwuzhangjin@gmail.com\u003e\nCc: linux-mips@linux-mips.org\nCc: Steven Rostedt \u003crostedt@goodmis.org\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1044/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "abe5b417fb4a52e9510fdb5a16e722e91bf89e92", "tree": "b03b825507fb611837d831ba8a1425b0996ddd7f", "parents": [ "b1cea3bab575af386618baba0db3c5fae7ce521f" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Mar 10 16:16:04 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:09 2010 +0100" }, "message": "MIPS: delay: Fix use of current_cpu_data in preemptable code.\n\nThis may lead to warnings like:\n\nBUG: using smp_processor_id() in preemptible [00000000] code: reboot/1989\ncaller is __udelay+0x14/0x70\nCall Trace:\n[\u003cffffffff8110ad28\u003e] dump_stack+0x8/0x34\n[\u003cffffffff812dde04\u003e] debug_smp_processor_id+0xf4/0x110\n[\u003cffffffff812d90bc\u003e] __udelay+0x14/0x70\n[\u003cffffffff81378274\u003e] md_notify_reboot+0x12c/0x148\n[\u003cffffffff81161054\u003e] notifier_call_chain+0x64/0xc8\n[\u003cffffffff811614dc\u003e] __blocking_notifier_call_chain+0x64/0xc0\n[\u003cffffffff8115566c\u003e] kernel_restart_prepare+0x1c/0x38\n[\u003cffffffff811556cc\u003e] kernel_restart+0x14/0x50\n[\u003cffffffff8115581c\u003e] SyS_reboot+0x10c/0x1f0\n[\u003cffffffff81103684\u003e] handle_sysn32+0x44/0x84\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b1cea3bab575af386618baba0db3c5fae7ce521f", "tree": "becc152602f322b7b32e1599ea57783baeebcb51", "parents": [ "1ef2887030dbeb42282a99f8a8e3d7ad07ef70ee" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Mar 03 11:07:43 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:09 2010 +0100" }, "message": "MIPS: Octeon: Remove #if 0 code.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1029/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1ef2887030dbeb42282a99f8a8e3d7ad07ef70ee", "tree": "740fe7165f530f21ca54e1060f6c2ee6912bd025", "parents": [ "1874a0886076fbb26665f93a8999c05e389bae22" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Wed Mar 03 11:07:07 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:09 2010 +0100" }, "message": "MIPS: Octeon: Remove vestiges of CONFIG_CAVIUM_RESERVE32_USE_WIRED_TLB\n\nThe config option CAVIUM_RESERVE32_USE_WIRED_TLB is not supported.\nRemove the dead code controlled by it.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/1028/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "1874a0886076fbb26665f93a8999c05e389bae22", "tree": "850b47fd33c929ad0b60f7e7fe865cc0c44a7b2b", "parents": [ "c948aca4f49d94b08c425f65acdaca1d679d6fa7" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Mar 09 20:16:15 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:08 2010 +0100" }, "message": "MIPS: Cavium: Remove unused watchdog code.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "c948aca4f49d94b08c425f65acdaca1d679d6fa7", "tree": "67bd7e0857b1cfdd1d1af1431daafb730decf9dc", "parents": [ "0eddb519b9127c73d53db4bf3ec1d45b13f844d1" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Mar 08 19:38:13 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Mon Apr 12 17:26:08 2010 +0100" }, "message": "MIPS: Fix build breakage if CONFIG_DEBUG_FS is enabled.\n\nCaused by 38b7827fcdd660f591d645bd3ae6644456a4773c - no, cpu_local_* was\nnot unused.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nAcked-by: David Daney \u003cddaney@caviumnetworks.com\u003e\n" }, { "commit": "5a0e3ad6af8660be21ca98a971cd00f331318c05", "tree": "5bfb7be11a03176a87296a43ac6647975c00a1d1", "parents": [ "ed391f4ebf8f701d3566423ce8f17e614cde9806" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Wed Mar 24 17:04:11 2010 +0900" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Mar 30 22:02:32 2010 +0900" }, "message": "include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\npercpu.h is included by sched.h and module.h and thus ends up being\nincluded when building most .c files. percpu.h includes slab.h which\nin turn includes gfp.h making everything defined by the two files\nuniversally available and complicating inclusion dependencies.\n\npercpu.h -\u003e slab.h dependency is about to be removed. Prepare for\nthis change by updating users of gfp and slab facilities include those\nheaders directly instead of assuming availability. As this conversion\nneeds to touch large number of source files, the following script is\nused as the basis of conversion.\n\n http://userweb.kernel.org/~tj/misc/slabh-sweep.py\n\nThe script does the followings.\n\n* Scan files for gfp and slab usages and update includes such that\n only the necessary includes are there. ie. if only gfp is used,\n gfp.h, if slab is used, slab.h.\n\n* When the script inserts a new include, it looks at the include\n blocks and try to put the new include such that its order conforms\n to its surrounding. It\u0027s put in the include block which contains\n core kernel includes, in the same order that the rest are ordered -\n alphabetical, Christmas tree, rev-Xmas-tree or at the end if there\n doesn\u0027t seem to be any matching order.\n\n* If the script can\u0027t find a place to put a new include (mostly\n because the file doesn\u0027t have fitting include block), it prints out\n an error message indicating which .h file needs to be added to the\n file.\n\nThe conversion was done in the following steps.\n\n1. The initial automatic conversion of all .c files updated slightly\n over 4000 files, deleting around 700 includes and adding ~480 gfp.h\n and ~3000 slab.h inclusions. The script emitted errors for ~400\n files.\n\n2. Each error was manually checked. Some didn\u0027t need the inclusion,\n some needed manual addition while adding it to implementation .h or\n embedding .c file was more appropriate for others. This step added\n inclusions to around 150 files.\n\n3. The script was run again and the output was compared to the edits\n from #2 to make sure no file was left behind.\n\n4. Several build tests were done and a couple of problems were fixed.\n e.g. lib/decompress_*.c used malloc/free() wrappers around slab\n APIs requiring slab.h to be added manually.\n\n5. The script was run on all .h files but without automatically\n editing them as sprinkling gfp.h and slab.h inclusions around .h\n files could easily lead to inclusion dependency hell. Most gfp.h\n inclusion directives were ignored as stuff from gfp.h was usually\n wildly available and often used in preprocessor macros. Each\n slab.h inclusion directive was examined and added manually as\n necessary.\n\n6. percpu.h was updated not to include slab.h.\n\n7. Build test were done on the following configurations and failures\n were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my\n distributed build env didn\u0027t work with gcov compiles) and a few\n more options had to be turned off depending on archs to make things\n build (like ipr on powerpc/64 which failed due to missing writeq).\n\n * x86 and x86_64 UP and SMP allmodconfig and a custom test config.\n * powerpc and powerpc64 SMP allmodconfig\n * sparc and sparc64 SMP allmodconfig\n * ia64 SMP allmodconfig\n * s390 SMP allmodconfig\n * alpha SMP allmodconfig\n * um on x86_64 SMP allmodconfig\n\n8. percpu.h modifications were reverted so that it could be applied as\n a separate patch and serve as bisection point.\n\nGiven the fact that I had only a couple of failures from tests on step\n6, I\u0027m fairly confident about the coverage of this conversion patch.\nIf there is a breakage, it\u0027s likely to be something in one of the arch\nheaders which should be easily discoverable easily on most builds of\nthe specific arch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nGuess-its-ok-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Lee Schermerhorn \u003cLee.Schermerhorn@hp.com\u003e\n" }, { "commit": "f937331b3f92cb2f67bc81baa1b8cc5198c439e5", "tree": "e14edb4d6e31ef48f07145e6f3e4016c6075f4d8", "parents": [ "181427a7e01beab76c789414334375839f026128" ], "author": { "name": "Wolfram Sang", "email": "w.sang@pengutronix.de", "time": "Mon Mar 15 01:29:41 2010 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 14 20:28:39 2010 -0700" }, "message": "init dynamic bin_attribute structures\n\nCommit 6992f5334995af474c2b58d010d08bc597f0f2fe (\"sysfs: Use one lockdep\nclass per sysfs attribute.\") introduced this requirement. First, at25\nwas fixed manually. Then, other occurences were found with coccinelle\nand the following semantic patch. Results were reviewed and fixed up:\n\n @ init @\n identifier struct_name, bin;\n @@\n\n \tstruct struct_name {\n \t\t...\n \t\tstruct bin_attribute bin;\n \t\t...\n \t};\n\n @ main extends init @\n expression E;\n statement S;\n identifier name, err;\n @@\n\n (\n \tstruct struct_name *name;\n |\n -\tstruct struct_name *name \u003d NULL;\n +\tstruct struct_name *name;\n )\n \t...\n (\n \tsysfs_bin_attr_init(\u0026name-\u003ebin);\n |\n +\tsysfs_bin_attr_init(\u0026name-\u003ebin);\n \tif (sysfs_create_bin_file(E, \u0026name-\u003ebin))\n \t\tS\n |\n +\tsysfs_bin_attr_init(\u0026name-\u003ebin);\n \terr \u003d sysfs_create_bin_file(E, \u0026name-\u003ebin);\n )\n\nSigned-off-by: Wolfram Sang \u003cw.sang@pengutronix.de\u003e\nCc: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "f41b177157718abe9a93868bb76e47d4a6f3681d", "tree": "555d8608a2fe320483c8761dcb2e80cc37b5e822", "parents": [ "c7e67ac1f329fa28b6a411335787c786de618cba" ], "author": { "name": "FUJITA Tomonori", "email": "fujita.tomonori@lab.ntt.co.jp", "time": "Wed Mar 10 15:23:30 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 12 15:52:42 2010 -0800" }, "message": "pci-dma: add linux/pci-dma.h to linux/pci.h\n\nAll the architectures properly set NEED_DMA_MAP_STATE now so we can safely\nadd linux/pci-dma.h to linux/pci.h and remove the linux/pci-dma.h\ninclusion in arch\u0027s asm/pci.h\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "e1e02b329d64353e67af070516a9bd14caff8bb0", "tree": "67dad6845ad3175aeaad816a10edbcc459e9e1f9", "parents": [ "66ed5ef8b44374def8461a0a05d4afc34d4ad684" ], "author": { "name": "FUJITA Tomonori", "email": "fujita.tomonori@lab.ntt.co.jp", "time": "Wed Mar 10 15:23:25 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 12 15:52:41 2010 -0800" }, "message": "pci-dma: mips: use include/linux/pci-dma.h\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "55436c91652b45be576b91ec96a8d65f6b7447fa", "tree": "e7f68501219105d8c303b6c069828c2ebea76729", "parents": [ "fa1ac57a317f927b8fb901e6270fc41fdaae8e1c" ], "author": { "name": "Christoph Hellwig", "email": "hch@lst.de", "time": "Wed Mar 10 15:22:55 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 12 15:52:39 2010 -0800" }, "message": "mips: use generic ptrace_resume code\n\nUse the generic ptrace_resume code for PTRACE_SYSCALL, PTRACE_CONT and\nPTRACE_KILL.\n\nAlso the TIF_SYSCALL_TRACE thread flag is now cleared on PTRACE_KILL which\nit previously wasn\u0027t which is consistent with all architectures using the\nmodern ptrace code.\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Oleg Nesterov \u003coleg@redhat.com\u003e\nCc: Roland McGrath \u003croland@redhat.com\u003e\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "5cacdb4add1b1e50fe75edc50ebbb7bddd9cf5e7", "tree": "bd6595bb8c5c7e20ad01ed7ef766d873e5d26db3", "parents": [ "e28cbf22933d0c0ccaf3c4c27a1a263b41f73859" ], "author": { "name": "Christoph Hellwig", "email": "hch@lst.de", "time": "Wed Mar 10 15:21:21 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 12 15:52:32 2010 -0800" }, "message": "Add generic sys_olduname()\n\nAdd generic implementations of the old and really old uname system calls.\nNote that sh only implements sys_olduname but not sys_oldolduname, but I\u0027m\nnot going to bother with another ifdef for that special case.\n\nm32r implemented an old uname but never wired it up, so kill it, too.\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "e28cbf22933d0c0ccaf3c4c27a1a263b41f73859", "tree": "a93ff48cfd97766a23b2c4f3ea86fccfc9c51d3f", "parents": [ "baed7fc9b580bd3fb8252ff1d9b36eaf1f86b670" ], "author": { "name": "Christoph Hellwig", "email": "hch@lst.de", "time": "Wed Mar 10 15:21:19 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 12 15:52:32 2010 -0800" }, "message": "improve sys_newuname() for compat architectures\n\nOn an architecture that supports 32-bit compat we need to override the\nreported machine in uname with the 32-bit value. Instead of doing this\nseparately in every architecture introduce a COMPAT_UTS_MACHINE define in\n\u003casm/compat.h\u003e and apply it directly in sys_newuname().\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "baed7fc9b580bd3fb8252ff1d9b36eaf1f86b670", "tree": "38f23cd9888b92de3f73ed1f4ce48cd83e940e0e", "parents": [ "a4679373cf4ee0e7792dc56205365732b725c2c1" ], "author": { "name": "Christoph Hellwig", "email": "hch@lst.de", "time": "Wed Mar 10 15:21:18 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 12 15:52:32 2010 -0800" }, "message": "Add generic sys_ipc wrapper\n\nAdd a generic implementation of the ipc demultiplexer syscall. Except for\ns390 and sparc64 all implementations of the sys_ipc are nearly identical.\n\nThere are slight differences in the types of the parameters, where mips\nand powerpc as the only 64-bit architectures with sys_ipc use unsigned\nlong for the \"third\" argument as it gets casted to a pointer later, while\nit traditionally is an \"int\" like most other paramters. frv goes even\nfurther and uses unsigned long for all parameters execept for \"ptr\" which\nis a pointer type everywhere. The change from int to unsigned long for\n\"third\" and back to \"int\" for the others on frv should be fine due to the\nin-register calling conventions for syscalls (we already had a similar\nissue with the generic sys_ptrace), but I\u0027d prefer to have the arch\nmaintainers looks over this in details.\n\nExcept for that h8300, m68k and m68knommu lack an impplementation of the\nsemtimedop sub call which this patch adds, and various architectures have\ngets used - at least on i386 it seems superflous as the compat code on\nx86-64 and ia64 doesn\u0027t even bother to implement it.\n\n[akpm@linux-foundation.org: add sys_ipc to sys_ni.c]\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nReviewed-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nAcked-by: Jesper Nilsson \u003cjesper.nilsson@axis.com\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "c9be0a36f9bf392a7984473124a67a12964df11f", "tree": "23fcf49f277d9a093b2b29831811219410ad7b05", "parents": [ "3d03ba4d1dd2246adff5a9ff1194a539b3bc05a7" ], "author": { "name": "Andi Kleen", "email": "andi@firstfloor.org", "time": "Tue Jan 05 12:47:58 2010 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Mar 07 17:04:47 2010 -0800" }, "message": "sysdev: Pass attribute in sysdev_class attributes show/store\n\nPassing the attribute to the low level IO functions allows all kinds\nof cleanups, by sharing low level IO code without requiring\nan own function for every piece of data.\n\nAlso drivers can extend the attributes with own data fields\nand use that in the low level function.\n\nSimilar to sysdev_attributes and normal attributes.\n\nThis is a tree-wide sweep, converting everything in one go.\n\nNo functional changes in this patch other than passing the new\nargument everywhere.\n\nTested on x86, the non x86 parts are uncompiled.\n\nSigned-off-by: Andi Kleen \u003cak@linux.intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "0a135ba14d71fb84c691a5386aff5049691fe6d7", "tree": "adb1de887dd6839d69d2fc16ffa2a10ff63298fa", "parents": [ "4850f524b2c4c8a4e9f8ef4dd9c7c4afde2f2b2c", "a29d8b8e2d811a24bbe49215a0f0c536b72ebc18" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 03 07:34:18 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 03 07:34:18 2010 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:\n percpu: add __percpu sparse annotations to what\u0027s left\n percpu: add __percpu sparse annotations to fs\n percpu: add __percpu sparse annotations to core kernel subsystems\n local_t: Remove leftover local.h\n this_cpu: Remove pageset_notifier\n this_cpu: Page allocator conversion\n percpu, x86: Generic inc / dec percpu instructions\n local_t: Move local.h include to ringbuffer.c and ring_buffer_benchmark.c\n module: Use this_cpu_xx to dynamically allocate counters\n local_t: Remove cpu_local_xx macros\n percpu: refactor the code in pcpu_[de]populate_chunk()\n percpu: remove compile warnings caused by __verify_pcpu_ptr()\n percpu: make accessors check for percpu pointer in sparse\n percpu: add __percpu for sparse.\n percpu: make access macros universal\n percpu: remove per_cpu__ prefix.\n" }, { "commit": "ced918eb748ce30b3aace549fd17540e40ffdca0", "tree": "f7c194d56e799508e090ef016bfc2dc0152a4244", "parents": [ "13dda80e48439b446d0bc9bab34b91484bc8f533" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Wed Feb 17 16:47:10 2010 +0000" }, "committer": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Tue Mar 02 10:28:38 2010 +0100" }, "message": "i8253: Convert i8253_lock to raw_spinlock\n\ni8253_lock needs to be a real spinlock in preempt-rt, i.e. it can\nnot be converted to a sleeping lock.\n\nConvert it to raw_spinlock and fix up all users.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nAcked-by: Dmitry Torokhov \u003cdmitry.torokhov@gmail.com\u003e\nAcked-by: Takashi Iwai \u003ctiwai@suse.de\u003e\nCc: Jens Axboe \u003cjens.axboe@oracle.com\u003e\nLKML-Reference: \u003c20100217163751.030764372@linutronix.de\u003e\n\n" }, { "commit": "ac0f6f927db539e03e1f3f61bcd4ed57d5cde7a9", "tree": "816e5ac643b15c2050c64a7075f0f7e13d86ea09", "parents": [ "b1bf9368407ae7e89d8a005bb40beb70a41df539", "9f33be2c3a80bdc2cc08342dd77fac87652e0548" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Mar 01 09:15:15 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Mar 01 09:15:15 2010 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027for-linus\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm: (100 commits)\n ARM: Eliminate decompressor -Dstatic\u003d PIC hack\n ARM: 5958/1: ARM: U300: fix inverted clk round rate\n ARM: 5956/1: misplaced parentheses\n ARM: 5955/1: ep93xx: move timer defines into core.c and document\n ARM: 5954/1: ep93xx: move gpio interrupt support to gpio.c\n ARM: 5953/1: ep93xx: fix broken build of clock.c\n ARM: 5952/1: ARM: MM: Add ARM_L1_CACHE_SHIFT_6 for handle inside each ARCH Kconfig\n ARM: 5949/1: NUC900 add gpio virtual memory map\n ARM: 5948/1: Enable timer0 to time4 clock support for nuc910\n ARM: 5940/2: ARM: MMCI: remove custom DBG macro and printk\n ARM: make_coherent(): fix problems with highpte, part 2\n MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself\n ARM: 5945/1: ep93xx: include correct irq.h in core.c\n ARM: 5933/1: amba-pl011: support hardware flow control\n ARM: 5930/1: Add PKMAP area description to memory.txt.\n ARM: 5929/1: Add checks to detect overlap of memory regions.\n ARM: 5928/1: Change type of VMALLOC_END to unsigned long.\n ARM: 5927/1: Make delimiters of DMA area globally visibly.\n ARM: 5926/1: Add \"Virtual kernel memory...\" printout.\n ARM: 5920/1: OMAP4: Enable L2 Cache\n ...\n\nFix up trivial conflict in arch/arm/mach-mx25/clock.c\n" }, { "commit": "46bbffad54bd48bb809f2691c1970a79a588976b", "tree": "21779a574f118b1cba5d6832bc0a0fa3bee97075", "parents": [ "85fe20bfd415af0a2e93bd1166533d4a6eb591ea", "c1fd1b43831fa20c91cdd461342af8edf2e87c2f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Feb 28 10:38:45 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Feb 28 10:38:45 2010 -0800" }, "message": "Merge branch \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, mm: Unify kernel_physical_mapping_init() API\n x86, mm: Allow highmem user page tables to be disabled at boot time\n x86: Do not reserve brk for DMI if it\u0027s not going to be used\n x86: Convert tlbstate_lock to raw_spinlock\n x86: Use the generic page_is_ram()\n x86: Remove BIOS data range from e820\n Move page_is_ram() declaration to mm.h\n Generic page_is_ram: use __weak\n resources: introduce generic page_is_ram()\n" }, { "commit": "e10b234b3c4e255d3300a486c4ac15b43253ac6d", "tree": "aef56872dd13be23306b432a6a5e1592ee0d08c0", "parents": [ "acc4d245a70615755cab8bace7f0f87870fc99d9" ], "author": { "name": "Manuel Lauss", "email": "manuel.lauss@googlemail.com", "time": "Fri Feb 26 17:32:45 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:46 2010 +0100" }, "message": "MIPS: Alchemy: defconfig updates\n\nUpdated, leaner defconfig for the alchemy development boards.\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nTo: Linux-MIPS \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1005/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "acc4d245a70615755cab8bace7f0f87870fc99d9", "tree": "1a7824d2f7fb2337451a12e7007f25788d3f1cf1", "parents": [ "570cb456efbd1f1e761869881ae72177595de356" ], "author": { "name": "Manuel Lauss", "email": "manuel.lauss@googlemail.com", "time": "Fri Feb 26 17:22:02 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:45 2010 +0100" }, "message": "MIPS: Alchemy: Fix Au1100 ethernet build failure\n\nDon\u0027t define platform info for second mac on au1100 (which only has a\nsingle mac).\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nTo: Linux-MIPS \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1004/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "570cb456efbd1f1e761869881ae72177595de356", "tree": "37adf2a0f41d2f6b2c2ae0cd50dcd2676b19e52b", "parents": [ "d891a5399242579857701c2b1185b64d7bf7936f" ], "author": { "name": "Manuel Lauss", "email": "manuel.lauss@googlemail.com", "time": "Fri Feb 26 17:22:01 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:45 2010 +0100" }, "message": "MIPS: Alchemy: Repair db1500/bosporus builds\n\nA few hunks somehow ended up outside their #ifdef/endif blocks,\nleading to -Werror-induces build failures.\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nTo: Linux-MIPS \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1003/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "d891a5399242579857701c2b1185b64d7bf7936f", "tree": "a41fb063c1bc473a96f24ae11e70b555b0825420", "parents": [ "8190471087b59ff63a8db125953ae612b7a8b8b5" ], "author": { "name": "Yoichi Yuasa", "email": "yuasa@linux-mips.org", "time": "Sat Feb 20 21:20:34 2010 +0900" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:45 2010 +0100" }, "message": "MIPS: ARC: Cleanup unused definitions from sgialib.h\n\nSigned-off-by: Yoichi Yuasa \u003cyuasa@linux-mips.org\u003e\nCc: linux-mips \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/979/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "8190471087b59ff63a8db125953ae612b7a8b8b5", "tree": "ac506ab3fb3a586b6da55415301b7e9ae132c551", "parents": [ "11b897cf84c37e6522db914793677e933ef311fb" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Wed Feb 24 13:53:27 2010 -0700" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:44 2010 +0100" }, "message": "MIPS: Cobalt: convert legacy port addresses to GT-64111 bus addresses\n\nThe GT-64111 PCI host bridge has no address translation mechanism, so\nit can\u0027t generate legacy port accesses. This quirk fixes legacy device\nport resources to contain the bus addresses actually generated by the\nGT-64111.\n\nI think this is the approach Ben Herrenschmidt suggested long ago:\n http://marc.info/?l\u003dlinux-kernel\u0026m\u003d119733290624544\u0026w\u003d2\n\nThis allows us to remove the IORESOURCE_PCI_FIXED hack from\npcibios_fixup_device_resources(), which converts bus addresses to CPU\naddresses. IORESOURCE_PCI_FIXED denotes resources that can\u0027t be moved;\nit has nothing to do with converting bus to CPU addresses.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Yoichi Yuasa \u003cyuasa@linux-mips.org\u003e\nCc: Thomas Bogendoerfer \u003ctsbogend@alpha.franken.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: linux-mips@linux-mips.org\nTested-by: Yoichi Yuasa \u003cyuasa@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/998/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "11b897cf84c37e6522db914793677e933ef311fb", "tree": "b9d69cea86b2c1673f30332ff9b3944dc00bfc9b", "parents": [ "b9b37787d24cca9fbd63f767663e9439fa69aa22" ], "author": { "name": "Manuel Lauss", "email": "manuel.lauss@googlemail.com", "time": "Wed Feb 24 17:40:21 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:43 2010 +0100" }, "message": "MIPS: Alchemy: use 36bit addresses for PCMCIA resources.\n\nOn Alchemy the PCMCIA area lies at the end of the chips 36bit system bus\narea. Currently, addresses at the far end of the 32bit area are assumed\nto belong to the PCMCIA area and fixed up to the real 36bit address before\nbeing passed to ioremap().\n\nA previous commit enabled 64 bit physical size for the resource datatype on\nAlchemy and this allows to use the correct 36bit addresses when registering\nthe PCMCIA sockets.\n\nThis patch removes the 32-to-36bit address fixup and registers the Alchemy\ndemo board pcmcia socket with the correct 36bit physical addresses.\n\nTested on DB1200, with a CF card (ide-cs driver) and a 3c589 PCMCIA ethernet\ncard.\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nTo: Linux-MIPS \u003clinux-mips@linux-mips.org\u003e\nCc: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/994/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "b9b37787d24cca9fbd63f767663e9439fa69aa22", "tree": "36e0ed76f0ec0e7b3b28877f9d37a9523227dec8", "parents": [ "2a5d66511a6adc0546a92d33734e3ebf7ab0d10c" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Wed Feb 24 17:41:00 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:43 2010 +0100" }, "message": "MIPS: Cobalt: Fix theoretical port aliasing issue\n\nBecause the VIA SuperIO chip only decodes 24 bits of address space but port\naddress space currently being configured as 32MB there is the theoretical\npossibility of aliases within the I/O port address range.\n\nThe complicated solution is to reserve all address range that potencially\ncould cause such aliases. But with the PCI spec limiting port allocations\nfor devices to a maximum of 256 bytes 16MB of port address space already is\nway more than one would ever expect to be used so we just reduce the port\nspace to 16MB.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nTo: Yoichi Yuasa \u003cyuasa@linux-mips.org\u003e\nCc: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: linux-mips@linux-mips.org\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/995/\n" }, { "commit": "2a5d66511a6adc0546a92d33734e3ebf7ab0d10c", "tree": "e1793806f73d7c0cdc2619fe8a2e77ce40a04f1e", "parents": [ "bba90760582d2563b28a4738fb785185a59e9e71" ], "author": { "name": "Matt Turner", "email": "mattst88@gmail.com", "time": "Wed Feb 24 23:30:14 2010 -0500" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:43 2010 +0100" }, "message": "MIPS: Use ALIGN(x, bytes) instead of __ALIGN_MASK(x, bytes - 1)\n\nALIGN(x, bytes) expands to __ALIGN_MASK(x, bytes - 1), so use the one\nthat is most clear.\n\nSigned-off-by: Matt Turner \u003cmattst88@gmail.com\u003e\nTo: linux-mips@linux-mips.org\nCc: David Daney \u003cddaney@caviumnetworks.com\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/999/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "bba90760582d2563b28a4738fb785185a59e9e71", "tree": "b1efda424d8ab0ef24220ce4da484819d749e2b2", "parents": [ "500c2e1fdbcc2b273bd4c695a9b8ac8196f61614" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Tue Feb 16 15:26:35 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:42 2010 +0100" }, "message": "MIPS: Crazy spinlock speed test.\n\nThis is just a test program for raw_spinlocks. The main reason I\nwrote it is to validate my spinlock changes that I sent in a previous\npatch.\n\nTo use it enable CONFIG_DEBUG_FS and CONFIG_SPINLOCK_TEST then at run\ntime do:\n\n# mount -t debugfs none /sys/kernel/debug/\n# cat /sys/kernel/debug/mips/spin_single\n# cat /sys/kernel/debug/mips/spin_multi\n\nOn my 600MHz octeon cn5860 (16 CPUs) I get\n\n\t\tspin_single\tspin_multi\nbase\t\t106885\t\t247941\nspinlock_patch\t75194\t\t219465\n\nThis shows that for uncontended locks the spinlock patch gives 41%\nimprovement and for contended locks 12% improvement (1/time).\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/969/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "500c2e1fdbcc2b273bd4c695a9b8ac8196f61614", "tree": "f24c80f609a739beed194fd5c66abf9bc48ce0d6", "parents": [ "e275ed5ee94b358964a0dae1c8b49f0bff260b60" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Feb 04 11:31:49 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:42 2010 +0100" }, "message": "MIPS: Optimize spinlocks.\n\nThe current locking mechanism uses a ll/sc sequence to release a\nspinlock. This is slower than a wmb() followed by a store to unlock.\n\nThe branching forward to .subsection 2 on sc failure slows down the\ncontended case. So we get rid of that part too.\n\nSince we are now working on naturally aligned u16 values, we can get\nrid of a masking operation as the LHU already does the right thing.\nThe ANDI are reversed for better scheduling on multi-issue CPUs\n\nOn a 12 CPU 750MHz Octeon cn5750 this patch improves ipv4 UDP packet\nforwarding rates from 3.58*10^6 PPS to 3.99*10^6 PPS, or about 11%.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nTo: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/937/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e275ed5ee94b358964a0dae1c8b49f0bff260b60", "tree": "3459082d9ba20771210dd38f3d62b99e5ff6cbbb", "parents": [ "81fc0179541dd52763cf62a52f0c09a05bcc6439" ], "author": { "name": "Manuel Lauss", "email": "manuel.lauss@googlemail.com", "time": "Tue Feb 23 18:57:43 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:41 2010 +0100" }, "message": "MIPS: Alchemy: devboard PM needs to save CPLD registers.\n\nSave/restore CPLD registers when doing suspend-to-ram; this fixes issues\nwith harddisk and ethernet not working correctly when resuming on DB1200.\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nTo: Linux-MIPS \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/986/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "81fc0179541dd52763cf62a52f0c09a05bcc6439", "tree": "b04013dfa4eb52cadb619577d95beb2c003247de", "parents": [ "3b439470e360931ad65234f94aa92cd7362f635a" ], "author": { "name": "David VomLehn", "email": "dvomlehn@cisco.com", "time": "Mon Feb 22 16:31:13 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:41 2010 +0100" }, "message": "MIPS: PowerTV: Eliminate duplicate opcode definition macros\n\nChange to different macros for assembler macros since the old names in\npowertv_setup.c were co-opted for use in asm/asm.h. This broken the\nbuild for the powertv platform. This patch introduces new macros based on\nthe new macros in asm.h to take the place of the old macro values.\n\nSigned-off-by: David VomLehn \u003cdvomlehn@cisco.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/985/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "3b439470e360931ad65234f94aa92cd7362f635a", "tree": "ac185177dbf824e44a13ca7a22bb7449c762834c", "parents": [ "7fe2d9c41de132b51e550212aa5709fc4e132c2c" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:41 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:41 2010 +0100" }, "message": "MIPS: Lemote 2F: Move printks out of port_access_lock.\n\nNo point in protecting them and printks are sloow.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "7fe2d9c41de132b51e550212aa5709fc4e132c2c", "tree": "7a69c168990773d5d3f47c88293199fb506afd47", "parents": [ "541247f4d26f90ce0d277082d108feb121b6ae03" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:41 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:41 2010 +0100" }, "message": "MIPS: PNX833x: Convert IRQ controller locks to raw spinlocks.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "541247f4d26f90ce0d277082d108feb121b6ae03", "tree": "f8282f4bab6112f07d98366ac19d281e581553db", "parents": [ "399614226cfa45ffaba45b269e8af9ddc26de537" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Feb 18 11:48:20 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:40 2010 +0100" }, "message": "MIPS: Octeon: Replace spinlock with raw_spinlocks in dma-octeon.c.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/973/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "399614226cfa45ffaba45b269e8af9ddc26de537", "tree": "286fda77dd50b1246c61fba69debb485decbd613", "parents": [ "4837a661a52dd9e02cd1cdb08a7ebdc5ed028ee4" ], "author": { "name": "David Daney", "email": "ddaney@caviumnetworks.com", "time": "Thu Feb 18 11:47:40 2010 -0800" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:40 2010 +0100" }, "message": "MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nCc: linux-mips@linux-mips.org\nPatchwork: http://patchwork.linux-mips.org/patch/972/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "4837a661a52dd9e02cd1cdb08a7ebdc5ed028ee4", "tree": "e138eeb21887f6306bfee644bae4a88f68674f00", "parents": [ "f1d39e6ed7ad71048db3b2835dccf3a5a01fab69" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:40 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:40 2010 +0100" }, "message": "MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "f1d39e6ed7ad71048db3b2835dccf3a5a01fab69", "tree": "9210d1ee2b97635e46dc355f9a22b03b9eb7aaf2", "parents": [ "36946d7387ee6f3a331563a1d839240924b65798" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:39 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:39 2010 +0100" }, "message": "MIPS: Loongson: Remove pointless sample_lock from oprofile code.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "36946d7387ee6f3a331563a1d839240924b65798", "tree": "6bfb5e1776ebb2bce424c1600d655de09d495853", "parents": [ "896508705561bea24656680cdaf3b4095c4d7473" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:39 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:39 2010 +0100" }, "message": "MIPS: SNI: Convert sni_rm200_i8259A_lock to raw spinlock.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "896508705561bea24656680cdaf3b4095c4d7473", "tree": "c02b21f167c46e6b20c60f74810121829e65a56e", "parents": [ "598c5abad7f3e162a01c87a480f8d2cd57643acb" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:38 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:38 2010 +0100" }, "message": "MIPS: i8259: Convert IRQ controller lock to raw spinlock.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "598c5abad7f3e162a01c87a480f8d2cd57643acb", "tree": "59de67100591f6edf18aa7b803f1cc1567dfd312", "parents": [ "2ba53e37120fba00fa10bebc13b9723f25e1f845" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:38 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:38 2010 +0100" }, "message": "MIPS: IP27: Convert nmi_lock lock to arch spinlock;\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "2ba53e37120fba00fa10bebc13b9723f25e1f845", "tree": "88e8a50e7cc31a7f1556322974a807ad06c63193", "parents": [ "34ee4148472996c5fd25fbb5697982914cfe955a" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:38 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:38 2010 +0100" }, "message": "MIPS: IP27: Remove code obfuscation by enter_panic_mode().\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "34ee4148472996c5fd25fbb5697982914cfe955a", "tree": "bce0291fbacd152cb5b04db85da59d5a5027a408", "parents": [ "da4afffc1d03c4f0334dabd28ce4c2325ee8f092" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:37 2010 +0100" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Sat Feb 27 12:53:37 2010 +0100" }, "message": "MIPS: GT641xx: Convert timer lock to raw spinlock.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" } ], "next": "da4afffc1d03c4f0334dabd28ce4c2325ee8f092" }