)]}'
{
  "log": [
    {
      "commit": "537b60d17894b7c19a6060feae40299d7109d6e7",
      "tree": "11a30267b4ecb7175d02215a995c8b6461304b9c",
      "parents": [
        "3ae684e1c48e6deedc9b9faff8fa1c391ca8a652",
        "a289cc7c70da784a2d370b91885cab4f966dcb0f"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:46:35 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:46:35 2010 -0700"
      },
      "message": "Merge branch \u0027x86-uv-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-uv-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, UV: uv_irq.c: Fix all sparse warnings\n  x86, UV: Improve BAU performance and error recovery\n  x86, UV: Delete unneeded boot messages\n  x86, UV: Clean up UV headers for MMR definitions\n"
    },
    {
      "commit": "3ae684e1c48e6deedc9b9faff8fa1c391ca8a652",
      "tree": "07082b3239c24799e8aaf2e6a8a0ac059870d34a",
      "parents": [
        "c4fd308ed62f292518363ea9c6c2adb3c2d95f9d",
        "4bd96a7a8185755b091233b16034c7436cbf57af"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:28:24 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:28:24 2010 -0700"
      },
      "message": "Merge branch \u0027x86-txt-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-txt-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, tboot: Add support for S3 memory integrity protection\n"
    },
    {
      "commit": "c4fd308ed62f292518363ea9c6c2adb3c2d95f9d",
      "tree": "d6b4e36159e502a43a91ade86379703442204fc5",
      "parents": [
        "96fbeb973a7e17594a429537201611ca0b395622",
        "1f9cc3cb6a27521edfe0a21abf97d2bb11c4d237"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:28:04 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:28:04 2010 -0700"
      },
      "message": "Merge branch \u0027x86-pat-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-pat-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, pat: Update the page flags for memtype atomically instead of using memtype_lock\n  x86, pat: In rbt_memtype_check_insert(), update new-\u003etype only if valid\n  x86, pat: Migrate to rbtree only backend for pat memtype management\n  x86, pat: Preparatory changes in pat.c for bigger rbtree change\n  rbtree: Add support for augmented rbtrees\n"
    },
    {
      "commit": "cb41838bbc4403f7270a94b93a9a0d9fc9c2e7ea",
      "tree": "0f359975ccad4ac72e86b8edf1924c076e74bd89",
      "parents": [
        "98f01720cbe3e2eb719682777049b6514e9db556",
        "c59bd5688299cddb71183e156e7a3c1409b90df2"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:17:01 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:17:01 2010 -0700"
      },
      "message": "Merge branch \u0027core-hweight-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027core-hweight-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, hweight: Use a 32-bit popcnt for __arch_hweight32()\n  arch, hweight: Fix compilation errors\n  x86: Add optimized popcnt variants\n  bitops: Optimize hweight() by making use of compile-time evaluation\n"
    },
    {
      "commit": "98f01720cbe3e2eb719682777049b6514e9db556",
      "tree": "af2fc4642dd0bfd195b0f60f1f267e8b02aa0009",
      "parents": [
        "41d59102e146a4423a490b8eca68a5860af4fe1c",
        "4f47b4c9f0b711bf84adb8c27774ae80d346b628"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:15:57 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 09:15:57 2010 -0700"
      },
      "message": "Merge branch \u0027x86-irq-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-irq-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, acpi/irq: Define gsi_end when X86_IO_APIC is undefined\n  x86, irq: Kill io_apic_renumber_irq\n  x86, acpi/irq: Handle isa irqs that are not identity mapped to gsi\u0027s.\n  x86, ioapic: Simplify probe_nr_irqs_gsi.\n  x86, ioapic: Optimize pin_2_irq\n  x86, ioapic: Move nr_ioapic_registers calculation to mp_register_ioapic.\n  x86, ioapic: In mpparse use mp_register_ioapic\n  x86, ioapic: Teach mp_register_ioapic to compute a global gsi_end\n  x86, ioapic: Fix the types of gsi values\n  x86, ioapic: Fix io_apic_redir_entries to return the number of entries.\n  x86, ioapic: Only export mp_find_ioapic and mp_find_ioapic_pin in io_apic.h\n  x86, acpi/irq: Generalize mp_config_acpi_legacy_irqs\n  x86, acpi/irq: Fix acpi_sci_ioapic_setup so it has both bus_irq and gsi\n  x86, acpi/irq: pci device dev-\u003eirq is an isa irq not a gsi\n  x86, acpi/irq: Teach acpi_get_override_irq to take a gsi not an isa_irq\n  x86, acpi/irq: Introduce apci_isa_irq_to_gsi\n"
    },
    {
      "commit": "41d59102e146a4423a490b8eca68a5860af4fe1c",
      "tree": "739ed4113ccdaeb33d1723a6beab09c1e18d7048",
      "parents": [
        "3e1dd193edefd2a806a0ba6cf0879cf1a95217da",
        "c9775b4cc522e5f1b40b1366a993f0f05f600f39"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:58:16 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:58:16 2010 -0700"
      },
      "message": "Merge branch \u0027x86-fpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-fpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, fpu: Use static_cpu_has() to implement use_xsave()\n  x86: Add new static_cpu_has() function using alternatives\n  x86, fpu: Use the proper asm constraint in use_xsave()\n  x86, fpu: Unbreak FPU emulation\n  x86: Introduce \u0027struct fpu\u0027 and related API\n  x86: Eliminate TS_XSAVE\n  x86-32: Don\u0027t set ignore_fpu_irq in simd exception\n  x86: Merge kernel_math_error() into math_error()\n  x86: Merge simd_math_error() into math_error()\n  x86-32: Rework cache flush denied handler\n\nFix trivial conflict in arch/x86/kernel/process.c\n"
    },
    {
      "commit": "07d77759c95d899b84f8e473a01cff001019dd5f",
      "tree": "d039fa6b38475868ebf2bd63ec14f49031d3f0b2",
      "parents": [
        "b7723f9d21d8d6043e63f5e3e412f321f5f1900c",
        "3998d095354d2a3062bdaa821ef07a1e1c82873c"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:49:13 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:49:13 2010 -0700"
      },
      "message": "Merge branch \u0027x86-cpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-cpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, hypervisor: add missing \u003clinux/module.h\u003e\n  Modify the VMware balloon driver for the new x86_hyper API\n  x86, hypervisor: Export the x86_hyper* symbols\n  x86: Clean up the hypervisor layer\n  x86, HyperV: fix up the license to mshyperv.c\n  x86: Detect running on a Microsoft HyperV system\n  x86, cpu: Make APERF/MPERF a normal table-driven flag\n  x86, k8: Fix build error when K8_NB is disabled\n  x86, cacheinfo: Disable index in all four subcaches\n  x86, cacheinfo: Make L3 cache info per node\n  x86, cacheinfo: Reorganize AMD L3 cache structure\n  x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments\n  x86, cacheinfo: Unify AMD L3 cache index disable checking\n  cpufreq: Unify sysfs attribute definition macros\n  powernow-k8: Fix frequency reporting\n  x86, cpufreq: Add APERF/MPERF support for AMD processors\n  x86: Unify APERF/MPERF support\n  powernow-k8: Add core performance boost support\n  x86, cpu: Add AMD core boosting feature flag to /proc/cpuinfo\n\nFix up trivial conflicts in arch/x86/kernel/cpu/intel_cacheinfo.c and\ndrivers/cpufreq/cpufreq_ondemand.c\n"
    },
    {
      "commit": "b7723f9d21d8d6043e63f5e3e412f321f5f1900c",
      "tree": "984098e5c060600e90e62f1b101593805f7cb2e9",
      "parents": [
        "93c9d7f60c0cb7715890b1f9e159da6f4d1f5a65",
        "6fc108a08dcddf8f9113cc7102ddaacf7ed37a6b"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:40:21 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:40:21 2010 -0700"
      },
      "message": "Merge branch \u0027x86-cleanups-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-cleanups-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86: Clean up arch/x86/Kconfig*\n  x86-64: Don\u0027t export init_level4_pgt\n"
    },
    {
      "commit": "93c9d7f60c0cb7715890b1f9e159da6f4d1f5a65",
      "tree": "6be428ca5fe52f14ebb78a8e695cec59d2f21c26",
      "parents": [
        "7421a10de7a525f67cc082fca7a91011d00eada4",
        "d9c5841e22231e4e49fd0a1004164e6fce59b7a6"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:40:05 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:40:05 2010 -0700"
      },
      "message": "Merge branch \u0027x86-atomic-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-atomic-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86: Fix LOCK_PREFIX_HERE for uniprocessor build\n  x86, atomic64: In selftest, distinguish x86-64 from 586+\n  x86-32: Fix atomic64_inc_not_zero return value convention\n  lib: Fix atomic64_inc_not_zero test\n  lib: Fix atomic64_add_unless return value convention\n  x86-32: Fix atomic64_add_unless return value convention\n  lib: Fix atomic64_add_unless test\n  x86: Implement atomic[64]_dec_if_positive()\n  lib: Only test atomic64_dec_if_positive on archs having it\n  x86-32: Rewrite 32-bit atomic64 functions in assembly\n  lib: Add self-test for atomic64_t\n  x86-32: Allow UP/SMP lock replacement in cmpxchg64\n  x86: Add support for lock prefix in alternatives\n"
    },
    {
      "commit": "7421a10de7a525f67cc082fca7a91011d00eada4",
      "tree": "6b4509858003c6cf140e223e1dcc4250def2c75c",
      "parents": [
        "752f114fb83c5839de37a250b4f8257ed5438341",
        "9e565292270a2d55524be38835104c564ac8f795"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:35:37 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:35:37 2010 -0700"
      },
      "message": "Merge branch \u0027x86-asm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-asm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86: Use .cfi_sections for assembly code\n  x86-64: Reduce SMP locks table size\n  x86, asm: Introduce and use percpu_inc()\n"
    },
    {
      "commit": "4d7b4ac22fbec1a03206c6cde353f2fd6942f828",
      "tree": "2d96a9e9c28cf6fa628a278decc00ad55a8b043b",
      "parents": [
        "3aaf51ace5975050ab43c7d4d7e439e0ae7d13d7",
        "94f3ca95787ada3d64339a4ecb2754236ab563f6"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:19:03 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:19:03 2010 -0700"
      },
      "message": "Merge branch \u0027perf-core-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027perf-core-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (311 commits)\n  perf tools: Add mode to build without newt support\n  perf symbols: symbol inconsistency message should be done only at verbose\u003d1\n  perf tui: Add explicit -lslang option\n  perf options: Type check all the remaining OPT_ variants\n  perf options: Type check OPT_BOOLEAN and fix the offenders\n  perf options: Check v type in OPT_U?INTEGER\n  perf options: Introduce OPT_UINTEGER\n  perf tui: Add workaround for slang \u003c 2.1.4\n  perf record: Fix bug mismatch with -c option definition\n  perf options: Introduce OPT_U64\n  perf tui: Add help window to show key associations\n  perf tui: Make \u003c- exit menus too\n  perf newt: Add single key shortcuts for zoom into DSO and threads\n  perf newt: Exit browser unconditionally when CTRL+C, q or Q is pressed\n  perf newt: Fix the \u0027A\u0027/\u0027a\u0027 shortcut for annotate\n  perf newt: Make \u003c- exit the ui_browser\n  x86, perf: P4 PMU - fix counters management logic\n  perf newt: Make \u003c- zoom out filters\n  perf report: Report number of events, not samples\n  perf hist: Clarify events_stats fields usage\n  ...\n\nFix up trivial conflicts in kernel/fork.c and tools/perf/builtin-record.c\n"
    },
    {
      "commit": "1014cfe2fb4cdd663137aafb21448cb613dd6a7d",
      "tree": "13b5fc4e7036b4226d94bd33aefb74a3dbb25b6a",
      "parents": [
        "8123d8f17d8ba9d67e556688e4f025456ca97842",
        "4726f2a617ebd868a4fdeb5679613b897e5f1676"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:17:35 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:17:35 2010 -0700"
      },
      "message": "Merge branch \u0027core-locking-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027core-locking-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  lockdep: Reduce stack_trace usage\n  lockdep: No need to disable preemption in debug atomic ops\n  lockdep: Actually _dec_ in debug_atomic_dec\n  lockdep: Provide off case for redundant_hardirqs_on increment\n  lockdep: Simplify debug atomic ops\n  lockdep: Fix redundant_hardirqs_on incremented with irqs enabled\n  lockstat: Make lockstat counting per cpu\n  i8253: Convert i8253_lock to raw_spinlock\n"
    },
    {
      "commit": "8123d8f17d8ba9d67e556688e4f025456ca97842",
      "tree": "1d15088a32644e464ad3536ad7bec775050065eb",
      "parents": [
        "06ee772043c7ad125f2c2e6a08dc563706f39e8d",
        "795e74f7a69f9c08afa4fa7c86cc4f18a62bd630"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 07:22:37 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 07:22:37 2010 -0700"
      },
      "message": "Merge branch \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86/amd-iommu: Add amd_iommu\u003doff command line option\n  iommu-api: Remove iommu_{un}map_range functions\n  x86/amd-iommu: Implement -\u003e{un}map callbacks for iommu-api\n  x86/amd-iommu: Make amd_iommu_iova_to_phys aware of multiple page sizes\n  x86/amd-iommu: Make iommu_unmap_page and fetch_pte aware of page sizes\n  x86/amd-iommu: Make iommu_map_page and alloc_pte aware of page sizes\n  kvm: Change kvm_iommu_map_pages to map large pages\n  VT-d: Change {un}map_range functions to implement {un}map interface\n  iommu-api: Add -\u003e{un}map callbacks to iommu_ops\n  iommu-api: Add iommu_map and iommu_unmap functions\n  iommu-api: Rename -\u003e{un}map function pointers to -\u003e{un}map_range\n"
    },
    {
      "commit": "c59bd5688299cddb71183e156e7a3c1409b90df2",
      "tree": "d7b99407367b30aa7766219083ad0262c8edbab8",
      "parents": [
        "4677d4a53e0d565742277e8913e91c821453e63e"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@linux.intel.com",
        "time": "Mon May 17 15:13:23 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@linux.intel.com",
        "time": "Mon May 17 15:17:16 2010 -0700"
      },
      "message": "x86, hweight: Use a 32-bit popcnt for __arch_hweight32()\n\nUse a 32-bit popcnt instruction for __arch_hweight32(), even on\nx86-64.  Even though the input register will *usually* be\nzero-extended due to the standard operation of the hardware, it isn\u0027t\nnecessarily so if the input value was the result of truncating a\n64-bit operation.\n\nNote: the POPCNT32 variant used on x86-64 has a technically\nunnecessary REX prefix to make it five bytes long, the same as a CALL\ninstruction, therefore avoiding an unnecessary NOP.\n\nReported-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\nCc: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003calpine.LFD.2.00.1005171443060.4195@i5.linux-foundation.org\u003e\n"
    },
    {
      "commit": "f3d46f9d3194e0329216002a8724d4c0957abc79",
      "tree": "6d9413e4a448d7b8d342c40297c4fbe0b9c4c2f0",
      "parents": [
        "e40152ee1e1c7a63f4777791863215e3faa37a86"
      ],
      "author": {
        "name": "Anton Blanchard",
        "email": "anton@samba.org",
        "time": "Mon May 17 14:33:53 2010 +1000"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Mon May 17 07:57:27 2010 -0700"
      },
      "message": "atomic_t: Cast to volatile when accessing atomic variables\n\nIn preparation for removing volatile from the atomic_t definition, this\npatch adds a volatile cast to all the atomic read functions.\n\nSigned-off-by: Anton Blanchard \u003canton@samba.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "ade029e2aaacc8965a548b0b0f80c5bee97ffc68",
      "tree": "6b007dcdf36b35a091b8a466648b1104828a94ce",
      "parents": [
        "f01487119dda3d9f58c9729c7361ecc50a61c188"
      ],
      "author": {
        "name": "Borislav Petkov",
        "email": "borislav.petkov@amd.com",
        "time": "Sat Apr 24 09:56:53 2010 +0200"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@linux.intel.com",
        "time": "Fri May 14 11:53:01 2010 -0700"
      },
      "message": "x86, k8: Fix build error when K8_NB is disabled\n\nK8_NB depends on PCI and when the last is disabled (allnoconfig) we fail\nat the final linking stage due to missing exported num_k8_northbridges.\nAdd a header stub for that.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c20100503183036.GJ26107@aftab\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: \u003cstable@kernel.org\u003e\n"
    },
    {
      "commit": "9e565292270a2d55524be38835104c564ac8f795",
      "tree": "a4a2c6e5b2013e142b866b1f4dcca44a8f7384a4",
      "parents": [
        "5967ed87ade85a421ef814296c3c7f182b08c225"
      ],
      "author": {
        "name": "Roland McGrath",
        "email": "roland@redhat.com",
        "time": "Thu May 13 21:43:03 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Thu May 13 22:15:18 2010 -0700"
      },
      "message": "x86: Use .cfi_sections for assembly code\n\nThe newer assemblers support the .cfi_sections directive so we can put\nthe CFI from .S files into the .debug_frame section that is preserved\nin unstripped vmlinux and in separate debuginfo, rather than the\n.eh_frame section that is now discarded by vmlinux.lds.S.\n\nSigned-off-by: Roland McGrath \u003croland@redhat.com\u003e\nLKML-Reference: \u003c20100514044303.A6FE7400BE@magilla.sf.frob.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "c9775b4cc522e5f1b40b1366a993f0f05f600f39",
      "tree": "cb71944e93760f594476990c91a7f86e2b702643",
      "parents": [
        "a3c8acd04376d604370dcb6cd2143c9c14078a50"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 11 17:49:54 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 11 17:49:54 2010 -0700"
      },
      "message": "x86, fpu: Use static_cpu_has() to implement use_xsave()\n\nuse_xsave() is now just a special case of static_cpu_has(), so use\nstatic_cpu_has().\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\nCc: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLKML-Reference: \u003c1273135546-29690-2-git-send-email-avi@redhat.com\u003e\n"
    },
    {
      "commit": "a3c8acd04376d604370dcb6cd2143c9c14078a50",
      "tree": "c6d467d1007ab51fd17b88a37db79d583bac7033",
      "parents": [
        "dce8bf4e115aa44d590802ce3554e926840c9042"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 11 17:47:07 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 11 17:47:07 2010 -0700"
      },
      "message": "x86: Add new static_cpu_has() function using alternatives\n\nFor CPU-feature-specific code that touches performance-critical paths,\nintroduce a static patching version of [boot_]cpu_has().  This is run\nat alternatives time and is therefore not appropriate for most\ninitialization code, but on the other hand initialization code is\ngenerally not performance critical.\n\nOn gcc 4.5+ this uses the new \"asm goto\" feature.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\nCc: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLKML-Reference: \u003c1273135546-29690-2-git-send-email-avi@redhat.com\u003e\n"
    },
    {
      "commit": "795e74f7a69f9c08afa4fa7c86cc4f18a62bd630",
      "tree": "8448ece35101d8db945c49df50d0d5889687de9f",
      "parents": [
        "a52357259680fe5368c2fabf5949209e231f2aa2",
        "12c7389abe5786349d3ea6da1961cf78d0c1c7cd"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Tue May 11 17:40:57 2010 +0200"
      },
      "committer": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Tue May 11 17:40:57 2010 +0200"
      },
      "message": "Merge branch \u0027iommu/largepages\u0027 into amd-iommu/2.6.35\n\nConflicts:\n\tarch/x86/kernel/amd_iommu.c\n"
    },
    {
      "commit": "dce8bf4e115aa44d590802ce3554e926840c9042",
      "tree": "9ad06695bb99cd815152ec61dce75fd5a792b1bf",
      "parents": [
        "c3f8978ea332cd4be88e12574452a025892ac9af"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon May 10 13:41:41 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon May 10 13:41:41 2010 -0700"
      },
      "message": "x86, fpu: Use the proper asm constraint in use_xsave()\n\nThe proper constraint for a receiving 8-bit variable is \"\u003dqm\", not\n\"\u003dg\" which equals \"\u003drim\"; even though the \"i\" will never match, bugs\ncan and do happen due to the difference between \"q\" and \"r\".\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\nCc: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLKML-Reference: \u003c1273135546-29690-2-git-send-email-avi@redhat.com\u003e\n"
    },
    {
      "commit": "86603283326c9e95e5ad4e9fdddeec93cac5d9ad",
      "tree": "1a26a37434e920f9519b547814a1a9af35022de8",
      "parents": [
        "c9ad488289144ae5ef53b012e15895ef1f5e4bb6"
      ],
      "author": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Thu May 06 11:45:46 2010 +0300"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon May 10 10:48:55 2010 -0700"
      },
      "message": "x86: Introduce \u0027struct fpu\u0027 and related API\n\nCurrently all fpu state access is through tsk-\u003ethread.xstate.  Since we wish\nto generalize fpu access to non-task contexts, wrap the state in a new\n\u0027struct fpu\u0027 and convert existing access to use an fpu API.\n\nSignal frame handlers are not converted to the API since they will remain\ntask context only things.\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\nAcked-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLKML-Reference: \u003c1273135546-29690-3-git-send-email-avi@redhat.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "c9ad488289144ae5ef53b012e15895ef1f5e4bb6",
      "tree": "06c29cda09e204d3b0b5b3d9a2a97bda0b4e340d",
      "parents": [
        "250825008f1f94887bc039e9227a8adfb5ba366e"
      ],
      "author": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Thu May 06 11:45:45 2010 +0300"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon May 10 10:39:33 2010 -0700"
      },
      "message": "x86: Eliminate TS_XSAVE\n\nThe fpu code currently uses current-\u003ethread_info-\u003estatus \u0026 TS_XSAVE as\na way to distinguish between XSAVE capable processors and older processors.\nThe decision is not really task specific; instead we use the task status to\navoid a global memory reference - the value should be the same across all\nthreads.\n\nEliminate this tie-in into the task structure by using an alternative\ninstruction keyed off the XSAVE cpu feature; this results in shorter and\nfaster code, without introducing a global memory reference.\n\n[ hpa: in the future, this probably should use an asm jmp ]\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\nAcked-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLKML-Reference: \u003c1273135546-29690-2-git-send-email-avi@redhat.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "d7be0ce6afb1df60bc786f57410407ceae92b994",
      "tree": "5e91acfc12c833531ad3320f274e0cd96a129973",
      "parents": [
        "e08cae4181af9483b04ecfac48f01c8e5a5f27bf",
        "66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Sat May 08 14:59:58 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Sat May 08 14:59:58 2010 -0700"
      },
      "message": "Merge commit \u0027v2.6.34-rc6\u0027 into x86/cpu\n"
    },
    {
      "commit": "e08cae4181af9483b04ecfac48f01c8e5a5f27bf",
      "tree": "2cab8da747a6524694cc19f247d8bc4f157a601c",
      "parents": [
        "9fa02317429449e8176c9bb6da3ac00eb14d52d3"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Fri May 07 16:57:28 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Fri May 07 17:13:04 2010 -0700"
      },
      "message": "x86: Clean up the hypervisor layer\n\nClean up the hypervisor layer and the hypervisor drivers, using an ops\nstructure instead of an enumeration with if statements.\n\nThe identity of the hypervisor, if needed, can be tested by testing\nthe pointer value in x86_hyper.\n\nThe MS-HyperV private state is moved into a normal global variable\n(it\u0027s per-system state, not per-CPU state).  Being a normal bss\nvariable, it will be left at all zero on non-HyperV platforms, and so\ncan generally be tested for HyperV-specific features without\nadditional qualification.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nAcked-by: Greg KH \u003cgreg@kroah.com\u003e\nCc: Hank Janssen \u003chjanssen@microsoft.com\u003e\nCc: Alok Kataria \u003cakataria@vmware.com\u003e\nCc: Ky Srinivasan \u003cksrinivasan@novell.com\u003e\nLKML-Reference: \u003c4BE49778.6060800@zytor.com\u003e\n"
    },
    {
      "commit": "cce913178118b0b36742eb7544c2b38a0c957ee7",
      "tree": "25a6d7b4e01fea2932e6e2962a75f7a3d8c19a4f",
      "parents": [
        "d9f599e1e6d019968b35d2dc63074b9e8964fa69",
        "4fd38e4595e2f6c9d27732c042a0e16b2753049c"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri May 07 11:30:29 2010 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri May 07 11:30:30 2010 +0200"
      },
      "message": "Merge branch \u0027perf/urgent\u0027 into perf/core\n\nMerge reason: Resolve patch dependency\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "a2a47c6c3d1a7c01da4464b3b7be93b924f874c1",
      "tree": "e647047bb37cce40777bf29c4aef8f92a56cdad8",
      "parents": [
        "097c1bd5673edaf2a162724636858b71f658fdd2"
      ],
      "author": {
        "name": "Ky Srinivasan",
        "email": "ksrinivasan@novell.com",
        "time": "Thu May 06 12:08:41 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Thu May 06 18:24:15 2010 -0700"
      },
      "message": "x86: Detect running on a Microsoft HyperV system\n\nThis patch integrates HyperV detection within the framework currently\nused by VmWare. With this patch, we can avoid having to replicate the\nHyperV detection code in each of the Microsoft HyperV drivers.\n\nReworked and tweaked by Greg K-H to build properly.\n\nSigned-off-by: K. Y. Srinivasan \u003cksrinivasan@novell.com\u003e\nLKML-Reference: \u003c20100506190841.GA1605@kroah.com\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Vadim Rozenfeld \u003cvrozenfe@redhat.com\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\nCc: Gleb Natapov \u003cgleb@redhat.com\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nCc: \"K.Prasad\" \u003cprasad@linux.vnet.ibm.com\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Stephane Eranian \u003ceranian@google.com\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Alan Cox \u003calan@linux.intel.com\u003e\nCc: Haiyang Zhang \u003chaiyangz@microsoft.com\u003e\nCc: Hank Janssen \u003chjanssen@microsoft.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "4f47b4c9f0b711bf84adb8c27774ae80d346b628",
      "tree": "531887f2c6630d4b653c6e323bef16604943685e",
      "parents": [
        "7b20bd5fb902088579af4e70f7f802b93181a628"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Wed May 05 13:22:25 2010 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu May 06 08:17:51 2010 +0200"
      },
      "message": "x86, acpi/irq: Define gsi_end when X86_IO_APIC is undefined\n\nMy recent changes introducing a global gsi_end variable\nfailed to take into account the case of using acpi on a system\nnot built to support IO_APICs, causing the build to fail.\n\nDefine gsi_end to 15 when CONFIG_X86_IO_APIC is not set to avoid\ncompile errors.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nLKML-Reference: \u003cm1tyqm14la.fsf_-_@fess.ebiederm.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "7b20bd5fb902088579af4e70f7f802b93181a628",
      "tree": "f31e9c820c28caad15cb9aa6b1a9a139aefbdd39",
      "parents": [
        "988856ee1623bd37e384105f7bb2b7fe44c009f6"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Tue Mar 30 01:07:16 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 04 13:35:20 2010 -0700"
      },
      "message": "x86, irq: Kill io_apic_renumber_irq\n\nNow that the generic irq layer is performing the exact same remapping as\nio_apic_renumber_irq we can kill this weird  es7000 specific function.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-15-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "4afc51a835d3aeba11c35090f524e05c84586d27",
      "tree": "e7858e2c41b1736a6ea659e2cf6764d1ff3a4686",
      "parents": [
        "d464207c4fdd70c2a0febd4f9c58206fa915bb36"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Tue Mar 30 01:07:14 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 04 13:35:11 2010 -0700"
      },
      "message": "x86, ioapic: Simplify probe_nr_irqs_gsi.\n\nUse the global gsi_end value now that all ioapics have\nvalid gsi numbers instead of a combination of acpi_probe_gsi\nand walking all of the ioapics and couting their number of\nentries by hand if acpi_probe_gsi gave us an answer we did\nnot like.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-13-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "5777372af5c929b8f3c706ed7b295b7279537c88",
      "tree": "05a81a2c18fabe9a450ba4902f2c0d6ba1986bc7",
      "parents": [
        "eddb0c55a14074d6bac8c2ef169aefd7e2c6f139"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Tue Mar 30 01:07:10 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 04 13:34:56 2010 -0700"
      },
      "message": "x86, ioapic: Teach mp_register_ioapic to compute a global gsi_end\n\nAdd the global variable gsi_end and teach mp_register_ioapic\nto keep it uptodate as we add more ioapics into the system.\n\nioapics can only be added early in boot so the code that\nruns later can treat gsi_end as a constant.\n\nRemove the have hacks in sfi.c to second guess mp_register_ioapic\nby keeping t\u0027s own running total of how many gsi\u0027s have been seen,\nand instead use the gsi_end.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-9-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "eddb0c55a14074d6bac8c2ef169aefd7e2c6f139",
      "tree": "af2b386d675df717647602f5e6ce7bb5ed4f992b",
      "parents": [
        "4b6b19a1c7302477653d799a53d48063dd53d555"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Tue Mar 30 01:07:09 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 04 13:34:52 2010 -0700"
      },
      "message": "x86, ioapic: Fix the types of gsi values\n\nThis patches fixes the types of gsi_base and gsi_end values in\nstruct mp_ioapic_gsi, and the gsi parameter of mp_find_ioapic\nand mp_find_ioapic_pin\n\nA gsi is cannonically a u32, not an int.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-8-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "9638fa521e42c9281c874c6b5a382b1ced4ee496",
      "tree": "b5242faf24200f2cbe77a5dd44b478f65c73b934",
      "parents": [
        "0fd52670fb6400be0996ac492b5ed77f3d83d69a"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Tue Mar 30 01:07:07 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue May 04 13:34:44 2010 -0700"
      },
      "message": "x86, ioapic: Only export mp_find_ioapic and mp_find_ioapic_pin in io_apic.h\n\nMultiple declarations of the same function in different headers\nis a pain to maintain.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-6-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "d88d95eb1c2a72b6126a550debe0883ff723a948",
      "tree": "caec2837084a3ea0cdac94438a7dbd01aa12afb0",
      "parents": [
        "59d3b388741cf1a5eb7ad27fd4e9ed72643164ae"
      ],
      "author": {
        "name": "Borislav Petkov",
        "email": "borislav.petkov@amd.com",
        "time": "Sat Apr 24 09:56:53 2010 +0200"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon May 03 14:34:24 2010 -0700"
      },
      "message": "x86, k8: Fix build error when K8_NB is disabled\n\nK8_NB depends on PCI and when the last is disabled (allnoconfig) we fail\nat the final linking stage due to missing exported num_k8_northbridges.\nAdd a header stub for that.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c20100503183036.GJ26107@aftab\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "9b6dba9e0798325dab427b9d60c61630ccc39b28",
      "tree": "1c77070ab65422cf051ad05e50b70bdeb4acbce9",
      "parents": [
        "40d2e76315da38993129090dc5d56377e573c312"
      ],
      "author": {
        "name": "Brian Gerst",
        "email": "brgerst@gmail.com",
        "time": "Sun Mar 21 09:00:44 2010 -0400"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon May 03 13:39:29 2010 -0700"
      },
      "message": "x86: Merge simd_math_error() into math_error()\n\nThe only difference between FPU and SIMD exceptions is where the\nstatus bits are read from (cwd/swd vs. mxcsr).  This also fixes\nthe discrepency introduced by commit adf77bac, which fixed FPU\nbut not SIMD.\n\nSigned-off-by: Brian Gerst \u003cbrgerst@gmail.com\u003e\nLKML-Reference: \u003c1269176446-2489-3-git-send-email-brgerst@gmail.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "53ba4f2fa73225113a488584df0d85d3cba52943",
      "tree": "d85b984d9818abc3ccc0237eb53b710d9e96c39e",
      "parents": [
        "bd6d29c25bb1a24a4c160ec5de43e0004e01f72b",
        "66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon May 03 09:17:01 2010 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon May 03 09:17:01 2010 +0200"
      },
      "message": "Merge commit \u0027v2.6.34-rc6\u0027 into core/locking\n"
    },
    {
      "commit": "feef47d0cb530e8419dfa0b48141b538b89b1b1a",
      "tree": "ad40b07e8b240eca134770120b5c644ec0062ce2",
      "parents": [
        "f93a20541134fa767e8dc4eb32e956d30b9f6b92"
      ],
      "author": {
        "name": "Frederic Weisbecker",
        "email": "fweisbec@gmail.com",
        "time": "Fri Apr 23 05:59:55 2010 +0200"
      },
      "committer": {
        "name": "Frederic Weisbecker",
        "email": "fweisbec@gmail.com",
        "time": "Sat May 01 04:32:14 2010 +0200"
      },
      "message": "hw-breakpoints: Get the number of available registers on boot dynamically\n\nThe breakpoint generic layer assumes that archs always know in advance\nthe static number of address registers available to host breakpoints\nthrough the HBP_NUM macro.\n\nHowever this is not true for every archs. For example Arm needs to get\nthis information dynamically to handle the compatiblity between\ndifferent versions.\n\nTo solve this, this patch proposes to drop the static HBP_NUM macro\nand let the arch provide the number of available slots through a\nnew hw_breakpoint_slots() function. For archs that have\nCONFIG_HAVE_MIXED_BREAKPOINTS_REGS selected, it will be called once\nas the number of registers fits for instruction and data breakpoints\ntogether.\nFor the others it will be called first to get the number of\ninstruction breakpoint registers and another time to get the\ndata breakpoint registers, the targeted type is given as a\nparameter of hw_breakpoint_slots().\n\nReported-by: Will Deacon \u003cwill.deacon@arm.com\u003e\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nAcked-by: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Mahesh Salgaonkar \u003cmahesh@linux.vnet.ibm.com\u003e\nCc: K. Prasad \u003cprasad@linux.vnet.ibm.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Jason Wessel \u003cjason.wessel@windriver.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "b2812d031dea86926e9c10f7714af33ac2f6b43d",
      "tree": "a48b18b49fa064e89b7b03e057e46e5a294a8053",
      "parents": [
        "87e9b2024659c614a876ce359a57e98a47b5ef37"
      ],
      "author": {
        "name": "Frederic Weisbecker",
        "email": "fweisbec@gmail.com",
        "time": "Sun Apr 18 18:11:53 2010 +0200"
      },
      "committer": {
        "name": "Frederic Weisbecker",
        "email": "fweisbec@gmail.com",
        "time": "Sat May 01 04:32:10 2010 +0200"
      },
      "message": "hw-breakpoints: Change/Enforce some breakpoints policies\n\nThe current policies of breakpoints in x86 and SH are the following:\n\n- task bound breakpoints can only break on userspace addresses\n- cpu wide breakpoints can only break on kernel addresses\n\nThe former rule prevents ptrace breakpoints to be set to trigger on\nkernel addresses, which is good. But as a side effect, we can\u0027t\nbreakpoint on kernel addresses for task bound breakpoints.\n\nThe latter rule simply makes no sense, there is no reason why we\ncan\u0027t set breakpoints on userspace while performing cpu bound\nprofiles.\n\nWe want the following new policies:\n\n- task bound breakpoint can set userspace address breakpoints, with\nno particular privilege required.\n- task bound breakpoints can set kernelspace address breakpoints but\nmust be privileged to do that.\n- cpu bound breakpoints can do what they want as they are privileged\nalready.\n\nTo implement these new policies, this patch checks if we are dealing\nwith a kernel address breakpoint, if so and if the exclude_kernel\nparameter is set, we tell the user that the breakpoint is invalid,\nwhich makes a good generic ptrace protection.\nIf we don\u0027t have exclude_kernel, ensure the user has the right\nprivileges as kernel breakpoints are quite sensitive (risk of\ntrap recursion attacks and global performance impacts).\n\n[ Paul Mundt: keep addr space check for sh signal delivery and fix\n  double function declaration]\n\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Will Deacon \u003cwill.deacon@arm.com\u003e\nCc: Mahesh Salgaonkar \u003cmahesh@linux.vnet.ibm.com\u003e\nCc: K. Prasad \u003cprasad@linux.vnet.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Jason Wessel \u003cjason.wessel@windriver.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "e67a807f3d9a82fa91817871f1c0e2e04da993b8",
      "tree": "a11fc1799ae2e3dea2f42f87b078f0864039340d",
      "parents": [
        "66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8"
      ],
      "author": {
        "name": "Liang Li",
        "email": "liang.li@windriver.com",
        "time": "Fri Apr 30 18:01:51 2010 +0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Apr 30 12:19:53 2010 +0200"
      },
      "message": "x86: Fix \u0027reservetop\u003d\u0027 functionality\n\nWhen specifying the \u0027reservetop\u003d0xbadc0de\u0027 kernel parameter,\nthe kernel will stop booting due to a early_ioremap bug that\nrelates to commit 8827247ff.\n\nThe root cause of boot failure problem is the value of\n\u0027slot_virt[i]\u0027 was initialized in setup_arch-\u003eearly_ioremap_init().\nBut later in setup_arch, the function \u0027parse_early_param\u0027 will\nmodify \u0027FIXADDR_TOP\u0027 when \u0027reservetop\u003d0xbadc0de\u0027 being specified.\n\nThe simplest fix might be use __fix_to_virt(idx0) to get updated\nvalue of \u0027FIXADDR_TOP\u0027 in \u0027__early_ioremap\u0027 instead of reference\nold value from slot_virt[slot] directly.\n\nChangelog since v0:\n\n-v1: When reservetop being handled then FIXADDR_TOP get\n     adjusted, Hence check prev_map then re-initialize slot_virt and\n     PMD based on new FIXADDR_TOP.\n\n-v2: place fixup_early_ioremap hence call early_ioremap_init in\n     reserve_top_address  to re-initialize slot_virt and\n     corresponding PMD when parse_reservertop\n\n-v3: move fixup_early_ioremap out of reserve_top_address to make\n     sure other clients of reserve_top_address like xen/lguest won\u0027t\n     broken\n\nSigned-off-by: Liang Li \u003cliang.li@windriver.com\u003e\nTested-by: Konrad Rzeszutek Wilk \u003ckonrad.wilk@oracle.com\u003e\nAcked-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nAcked-by: Jeremy Fitzhardinge \u003cjeremy.fitzhardinge@citrix.com\u003e\nCc: Wang Chen \u003cwangchen@cn.fujitsu.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nLKML-Reference: \u003c1272621711-8683-1-git-send-email-liang.li@windriver.com\u003e\n[ fixed three small cleanliness details in fixup_early_ioremap() ]\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "d9c5841e22231e4e49fd0a1004164e6fce59b7a6",
      "tree": "e1f589c46b3ff79bbe7b1b2469f6362f94576da6",
      "parents": [
        "b701a47ba48b698976fb2fe05fb285b0edc1d26a",
        "5967ed87ade85a421ef814296c3c7f182b08c225"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Thu Apr 29 16:53:17 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Thu Apr 29 16:53:17 2010 -0700"
      },
      "message": "Merge branch \u0027x86/asm\u0027 into x86/atomic\n\nMerge reason:\n\tConflict between LOCK_PREFIX_HERE and relative alternatives\n\tpointers\n\nResolved Conflicts:\n\tarch/x86/include/asm/alternative.h\n\tarch/x86/kernel/alternative.c\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "b701a47ba48b698976fb2fe05fb285b0edc1d26a",
      "tree": "48098b5a7f4179884d59ddd8908795f6beed2ccd",
      "parents": [
        "a5c9161f27c3e1ae6c0094d262f03a7e98262181"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Thu Apr 29 16:03:57 2010 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Thu Apr 29 16:08:54 2010 -0700"
      },
      "message": "x86: Fix LOCK_PREFIX_HERE for uniprocessor build\n\nCheckin b3ac891b67bd4b1fc728d1c784cad1212dea433d:\nx86: Add support for lock prefix in alternatives\n\n... did not define LOCK_PREFIX_HERE in the case of a uniprocessor\nbuild.  As a result, it would cause any of the usages of this macro to\nfail on a uniprocessor build.  Fix this by defining LOCK_PREFIX_HERE\nas a null string.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Luca Barbieri \u003cluca@luca-barbieri.com\u003e\nLKML-Reference: \u003c1267005265-27958-2-git-send-email-luca@luca-barbieri.com\u003e\n"
    },
    {
      "commit": "6fc108a08dcddf8f9113cc7102ddaacf7ed37a6b",
      "tree": "f603e401149d7c5c64617e9e940d7da070ba9adf",
      "parents": [
        "47f9fe26299ae022ac1e3fa12e7e73def62b7898"
      ],
      "author": {
        "name": "Jan Beulich",
        "email": "JBeulich@novell.com",
        "time": "Wed Apr 21 15:23:44 2010 +0100"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Wed Apr 28 17:25:53 2010 -0700"
      },
      "message": "x86: Clean up arch/x86/Kconfig*\n\nNo functional change intended.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nLKML-Reference: \u003c4BCF2690020000780003B340@vpn.id2.novell.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "5967ed87ade85a421ef814296c3c7f182b08c225",
      "tree": "16d08b1e34308390d189ddc52e7c4e25cc841e41",
      "parents": [
        "402af0d7c692ddcfa2333e93d3f275ebd0487926"
      ],
      "author": {
        "name": "Jan Beulich",
        "email": "JBeulich@novell.com",
        "time": "Wed Apr 21 16:08:14 2010 +0100"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Wed Apr 28 17:15:47 2010 -0700"
      },
      "message": "x86-64: Reduce SMP locks table size\n\nReduce the SMP locks table size by using relative pointers instead of\nabsolute ones, thus cutting the table size by half.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nLKML-Reference: \u003c4BCF30FE020000780003B3B6@vpn.id2.novell.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "402af0d7c692ddcfa2333e93d3f275ebd0487926",
      "tree": "08d016caa7dc404d7400281b57fb634108b0291f",
      "parents": [
        "1d16b0f2f3edf05f12a9e3960588e0d4854157bb"
      ],
      "author": {
        "name": "Jan Beulich",
        "email": "JBeulich@novell.com",
        "time": "Wed Apr 21 15:21:51 2010 +0100"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Wed Apr 28 16:58:49 2010 -0700"
      },
      "message": "x86, asm: Introduce and use percpu_inc()\n\n... generating slightly smaller code.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nLKML-Reference: \u003c4BCF261F020000780003B33C@vpn.id2.novell.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "1f9cc3cb6a27521edfe0a21abf97d2bb11c4d237",
      "tree": "c9af6a71398aed690c1fa813498a0aed8abf2d7b",
      "parents": [
        "4daa2a8093ecd1148270a1fc64e99f072b8c2901"
      ],
      "author": {
        "name": "Robin Holt",
        "email": "holt@sgi.com",
        "time": "Fri Apr 23 10:36:22 2010 -0500"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Fri Apr 23 15:57:23 2010 -0700"
      },
      "message": "x86, pat: Update the page flags for memtype atomically instead of using memtype_lock\n\nWhile testing an application using the xpmem (out of kernel) driver, we\nnoticed a significant page fault rate reduction of x86_64 with respect\nto ia64.  For one test running with 32 cpus, one thread per cpu, it\ntook 01:08 for each of the threads to vm_insert_pfn 2GB worth of pages.\nFor the same test running on 256 cpus, one thread per cpu, it took 14:48\nto vm_insert_pfn 2 GB worth of pages.\n\nThe slowdown was tracked to lookup_memtype which acquires the\nspinlock memtype_lock.  This heavily contended lock was slowing down\nvm_insert_pfn().\n\nWith the cmpxchg on page-\u003eflags method, both the 32 cpu and 256 cpu\ncases take approx 00:01.3 seconds to complete.\n\nSigned-off-by: Robin Holt \u003cholt@sgi.com\u003e\nLKML-Reference: \u003c20100423153627.751194346@gulag1.americas.sgi.com\u003e\nCc: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@gmail.com\u003e\nCc: Rafael Wysocki \u003crjw@novell.com\u003e\nReviewed-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "70bce3ba77540ebe77b8c0e1ac38d281a23fbb5e",
      "tree": "34b09a49228f0949ff49dce66a433b0dfd83a2dc",
      "parents": [
        "6eca8cc35b50af1037bc919106dd6dd332c959c2",
        "d5a30458a90597915977f06e79406b664a41b8ac"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Apr 23 11:10:28 2010 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Apr 23 11:10:30 2010 +0200"
      },
      "message": "Merge branch \u0027linus\u0027 into perf/core\n\nMerge reason: merge the latest fixes, update to latest -rc.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "39447b386c846bbf1c56f6403c5282837486200f",
      "tree": "5ceaf9900919e4bd269b92c55df15e33039fefd1",
      "parents": [
        "b5a80b7e91d6c067339e4d81a0176a835e9bf910"
      ],
      "author": {
        "name": "Zhang, Yanmin",
        "email": "yanmin_zhang@linux.intel.com",
        "time": "Mon Apr 19 13:32:41 2010 +0800"
      },
      "committer": {
        "name": "Avi Kivity",
        "email": "avi@redhat.com",
        "time": "Mon Apr 19 12:35:33 2010 +0300"
      },
      "message": "perf: Enhance perf to allow for guest statistic collection from host\n\nBelow patch introduces perf_guest_info_callbacks and related\nregister/unregister functions. Add more PERF_RECORD_MISC_XXX bits\nmeaning guest kernel and guest user space.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin_zhang@linux.intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "a289cc7c70da784a2d370b91885cab4f966dcb0f",
      "tree": "7e06be85ce3754061f20ccd3f77439c2d83f4549",
      "parents": [
        "b8f7fb13d2d7ff14818fd1d3edd8b834d38b0217"
      ],
      "author": {
        "name": "Randy Dunlap",
        "email": "randy.dunlap@oracle.com",
        "time": "Fri Apr 16 17:51:42 2010 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Apr 17 10:37:20 2010 +0200"
      },
      "message": "x86, UV: uv_irq.c: Fix all sparse warnings\n\nFix all sparse warnings in building uv_irq.c.\n\n arch/x86/kernel/uv_irq.c:46:17: warning: symbol \u0027uv_irq_chip\u0027 was not declared. Should it be static?\n arch/x86/kernel/uv_irq.c:143:50: error: no identifier for function argument\n arch/x86/kernel/uv_irq.c:162:13: error: typename in expression\n arch/x86/kernel/uv_irq.c:162:13: error: undefined identifier \u0027restrict\u0027\n arch/x86/kernel/uv_irq.c:250:44: error: no identifier for function argument\n arch/x86/kernel/uv_irq.c:260:17: error: typename in expression\n arch/x86/kernel/uv_irq.c:260:17: error: undefined identifier \u0027restrict\u0027\n arch/x86/kernel/uv_irq.c:233:50: warning: incorrect type in argument 3 (different signedness)\n arch/x86/kernel/uv_irq.c:233:50:    expected int *pnode\n arch/x86/kernel/uv_irq.c:233:50:    got unsigned int *\u003cnoident\u003e\n arch/x86/include/asm/uv/uv_hub.h:318:44: warning: incorrect type in argument 2 (different address spaces)\n arch/x86/include/asm/uv/uv_hub.h:318:44:    expected void volatile [noderef] \u003casn:2\u003e*addr\n arch/x86/include/asm/uv/uv_hub.h:318:44:    got unsigned long *\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nCc: Dimitri Sivanich \u003csivanich@sgi.com\u003e\nCc: Russ Anderson \u003crja@sgi.com\u003e\nCc: Robin Holt \u003cholt@sgi.com\u003e\nCc: Mike Travis \u003ctravis@sgi.com\u003e\nCc: Cliff Wickman \u003ccpw@sgi.com\u003e\nCc: Jack Steiner \u003csteiner@sgi.com\u003e\nLKML-Reference: \u003c20100416175142.f4b59683.randy.dunlap@oracle.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "dc57da3875f527b1cc195ea4ce5bd32e1e68433d",
      "tree": "4291c437e45d978269c1280c7c4915b45ae6ad2e",
      "parents": [
        "2fed94c032316d89422d4abfca2a882897489b94",
        "2b2f862ee6ef8ae8f913fee6af2112c5ffeedf94"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Thu Apr 15 12:20:56 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Thu Apr 15 12:20:56 2010 -0700"
      },
      "message": "Merge branch \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86/gart: Disable GART explicitly before initialization\n  dma-debug: Cleanup for copy-loop in filter_write()\n  x86/amd-iommu: Remove obsolete parameter documentation\n  x86/amd-iommu: use for_each_pci_dev\n  Revert \"x86: disable IOMMUs on kernel crash\"\n  x86/amd-iommu: warn when issuing command to uninitialized cmd buffer\n  x86/amd-iommu: enable iommu before attaching devices\n  x86/amd-iommu: Use helper function to destroy domain\n  x86/amd-iommu: Report errors in acpi parsing functions upstream\n  x86/amd-iommu: Pt mode fix for domain_destroy\n  x86/amd-iommu: Protect IOMMU-API map/unmap path\n  x86/amd-iommu: Remove double NULL check in check_device\n"
    },
    {
      "commit": "b8f7fb13d2d7ff14818fd1d3edd8b834d38b0217",
      "tree": "48844c12cc443690116abbec7e836f8c08360d56",
      "parents": [
        "2acebe9ecb2b77876e87a1480729cfb2db4570dd"
      ],
      "author": {
        "name": "Cliff Wickman",
        "email": "cpw@sgi.com",
        "time": "Wed Apr 14 11:35:46 2010 -0500"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Apr 14 18:49:53 2010 +0200"
      },
      "message": "x86, UV: Improve BAU performance and error recovery\n\n- increase performance of the interrupt handler\n\n- release timed-out software acknowledge resources\n\n- recover from continuous-busy status due to a hardware issue\n\n- add a \u0027throttle\u0027 to keep a uvhub from sending more than a\n  specified number of broadcasts concurrently (work around the hardware issue)\n\n- provide a \u0027nobau\u0027 boot command line option\n\n- rename \u0027pnode\u0027 and \u0027node\u0027 to \u0027uvhub\u0027 (the \u0027node\u0027 terminology\n  is ambiguous)\n\n- add some new statistics about the scope of broadcasts, retries, the\n  hardware issue and the \u0027throttle\u0027\n\n- split off new function uv_bau_retry_msg() from\n  uv_bau_process_message() per community coding style feedback.\n\n- simplify the argument list to uv_bau_process_message(), per\n  community coding style feedback.\n\nSigned-off-by: Cliff Wickman \u003ccpw@sgi.com\u003e\nCc: linux-mm@kvack.org\nCc: Jack Steiner \u003csteiner@sgi.com\u003e\nCc: Russ Anderson \u003crja@sgi.com\u003e\nCc: Mike Travis \u003ctravis@sgi.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nLKML-Reference: \u003cE1O25Z4-0004Ur-PB@eag09.americas.sgi.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "091ebf07a2408f9a56634caa0f86d9360e9af23b",
      "tree": "62d3b3424cc1c0dc71b3b750bb1e8e063e658fd3",
      "parents": [
        "5094aeafbbd500509f648e3cd102b053bc7926b3"
      ],
      "author": {
        "name": "Rusty Russell",
        "email": "rusty@rustcorp.com.au",
        "time": "Wed Apr 14 21:43:54 2010 -0600"
      },
      "committer": {
        "name": "Rusty Russell",
        "email": "rusty@rustcorp.com.au",
        "time": "Wed Apr 14 21:43:56 2010 +0930"
      },
      "message": "lguest: stop using KVM hypercall mechanism\n\nThis is a partial revert of 4cd8b5e2a159 \"lguest: use KVM hypercalls\";\nwe revert to using (just as questionable but more reliable) int $15 for\nhypercalls.  I didn\u0027t revert the register mapping, so we still use the\nsame calling convention as kvm.\n\nKVM in more recent incarnations stopped injecting a fault when a guest\ntried to use the VMCALL instruction from ring 1, so lguest under kvm\nfails to make hypercalls.  It was nice to share code with our KVM\ncousins, but this was overreach.\n\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nCc: Matias Zabaljauregui \u003czabaljauregui@gmail.com\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\n"
    },
    {
      "commit": "2b2f862ee6ef8ae8f913fee6af2112c5ffeedf94",
      "tree": "06a89df37436f9902a37800e05541880ba3aa603",
      "parents": [
        "0d0fb0f9c5fddef4a10242fe3337f00f528a3099",
        "4b83873d3da0704987cb116833818ed96214ee29"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Apr 13 13:24:54 2010 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Apr 13 13:24:54 2010 +0200"
      },
      "message": "Merge branch \u0027iommu/fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu into x86/urgent\n"
    },
    {
      "commit": "5958f1d5d722df7a9e5d129676614a8e5219bacd",
      "tree": "968c1fcc99d4653a313a9c5e5690aa2e0792895c",
      "parents": [
        "2eaa9cfdf33b8d7fb7aff27792192e0019ae8fc6"
      ],
      "author": {
        "name": "Borislav Petkov",
        "email": "borislav.petkov@amd.com",
        "time": "Wed Mar 31 21:56:41 2010 +0200"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Fri Apr 09 14:05:23 2010 -0700"
      },
      "message": "x86, cpu: Add AMD core boosting feature flag to /proc/cpuinfo\n\nBy semi-popular demand, this adds the Core Performance Boost feature\nflag to /proc/cpuinfo. Possible use case for this is userspace tools\nlike cpufreq-aperf, for example, so that they don\u0027t have to jump through\nhoops of accessing \"/dev/cpu/%d/cpuid\" in order to check for CPB hw\nsupport, or call cpuid from userspace.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1270065406-1814-2-git-send-email-bp@amd64.org\u003e\nReviewed-by: Thomas Renninger \u003ctrenn@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "ca7e0c612005937a4a5a75d3fed90459993de65c",
      "tree": "b574fc0f0189b52ffc87ba20c418228db556faa1",
      "parents": [
        "8141d0050d76e5695011b5ab577ec66fb51a998c",
        "f5284e7635787224dda1a2bf82a4c56b1c75671f"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Apr 08 13:36:36 2010 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Apr 08 13:37:18 2010 +0200"
      },
      "message": "Merge branch \u0027linus\u0027 into perf/core\n\nSemantic conflict: arch/x86/kernel/cpu/perf_event_intel_ds.c\n\nMerge reason: pick up latest fixes, fix the conflict\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "12ff4bf58b64ad3b8fb8e27889c99dcd5aa6fb0b",
      "tree": "294170ed80ca1a3abfc8b704b74d843ba205dada",
      "parents": [
        "2eaa9cfdf33b8d7fb7aff27792192e0019ae8fc6",
        "20a1cfba340f23a7ca62391e199c40c86b762ea3"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Wed Apr 07 14:36:20 2010 +0200"
      },
      "committer": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Wed Apr 07 14:36:20 2010 +0200"
      },
      "message": "Merge branch \u0027amd-iommu/fixes\u0027 into iommu/fixes\n"
    },
    {
      "commit": "549c90dc9a6d659e792b2a42a0930c7da015ea4a",
      "tree": "e0d0115631aa40eb45b58fb24bdcd399d2e17e47",
      "parents": [
        "75f66533bc883f761a7adcab3281fe3323efbc90"
      ],
      "author": {
        "name": "Chris Wright",
        "email": "chrisw@sous-sol.org",
        "time": "Fri Apr 02 18:27:53 2010 -0700"
      },
      "committer": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Wed Apr 07 11:51:15 2010 +0200"
      },
      "message": "x86/amd-iommu: warn when issuing command to uninitialized cmd buffer\n\nTo catch future potential issues we can add a warning whenever we issue\na command before the command buffer is fully initialized.\n\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n"
    },
    {
      "commit": "d61931d89be506372d01a90d1755f6d0a9fafe2d",
      "tree": "652c34238edcb6c558163abc3cd9d6ce7c5f91a5",
      "parents": [
        "1527bc8b928dd1399c3d3467dd47d9ede210978a"
      ],
      "author": {
        "name": "Borislav Petkov",
        "email": "borislav.petkov@amd.com",
        "time": "Fri Mar 05 17:34:46 2010 +0100"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Tue Apr 06 15:52:11 2010 -0700"
      },
      "message": "x86: Add optimized popcnt variants\n\nAdd support for the hardware version of the Hamming weight function,\npopcnt, present in CPUs which advertize it under CPUID, Function\n0x0000_0001_ECX[23]. On CPUs which don\u0027t support it, we fallback to the\ndefault lib/hweight.c sw versions.\n\nA synthetic benchmark comparing popcnt with __sw_hweight64 showed almost\na 3x speedup on a F10h machine.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c20100318112015.GC11152@aftab\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "a098f4484bc7dae23f5b62360954007b99b64600",
      "tree": "11d9d6c8f9008ca191cb8d093eb3c9c3c13d99d3",
      "parents": [
        "948b1bb89a44561560531394c18da4a99215f772"
      ],
      "author": {
        "name": "Robert Richter",
        "email": "robert.richter@amd.com",
        "time": "Tue Mar 30 11:28:21 2010 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Apr 02 19:52:03 2010 +0200"
      },
      "message": "perf, x86: implement ARCH_PERFMON_EVENTSEL bit masks\n\nARCH_PERFMON_EVENTSEL bit masks are often used in the kernel. This\npatch adds macros for the bit masks and removes local defines. The\nfunction intel_pmu_raw_event() becomes x86_pmu_raw_event() which is\ngeneric for x86 models and same also for p6. Duplicate code is\nremoved.\n\nSigned-off-by: Robert Richter \u003crobert.richter@amd.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c20100330092821.GH11907@erda.amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "948b1bb89a44561560531394c18da4a99215f772",
      "tree": "b44054c805d049ffeba328c3bfc3063f5d8d11ba",
      "parents": [
        "ec5e61aabeac58670691bd0613388d16697d0d81"
      ],
      "author": {
        "name": "Robert Richter",
        "email": "robert.richter@amd.com",
        "time": "Mon Mar 29 18:36:50 2010 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Apr 02 19:52:02 2010 +0200"
      },
      "message": "perf, x86: Undo some some *_counter* -\u003e *_event* renames\n\nThe big rename:\n\n cdd6c48 perf: Do the big rename: Performance Counters -\u003e Performance Events\n\naccidentally renamed some members of stucts that were named after\nregisters in the spec. To avoid confusion this patch reverts some\nchanges. The related specs are MSR descriptions in AMD\u0027s BKDGs and the\nARCHITECTURAL PERFORMANCE MONITORING section in the Intel 64 and IA-32\nArchitectures Software Developer\u0027s Manuals.\n\nThis patch does:\n\n $ sed -i -e \u0027s:num_events:num_counters:g\u0027 \\\n   arch/x86/include/asm/perf_event.h \\\n   arch/x86/kernel/cpu/perf_event_amd.c \\\n   arch/x86/kernel/cpu/perf_event.c \\\n   arch/x86/kernel/cpu/perf_event_intel.c \\\n   arch/x86/kernel/cpu/perf_event_p6.c \\\n   arch/x86/kernel/cpu/perf_event_p4.c \\\n   arch/x86/oprofile/op_model_ppro.c\n\n $ sed -i -e \u0027s:event_bits:cntval_bits:g\u0027 -e \u0027s:event_mask:cntval_mask:g\u0027 \\\n   arch/x86/kernel/cpu/perf_event_amd.c \\\n   arch/x86/kernel/cpu/perf_event.c \\\n   arch/x86/kernel/cpu/perf_event_intel.c \\\n   arch/x86/kernel/cpu/perf_event_p6.c \\\n   arch/x86/kernel/cpu/perf_event_p4.c\n\nSigned-off-by: Robert Richter \u003crobert.richter@amd.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c1269880612-25800-2-git-send-email-robert.richter@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "ec5e61aabeac58670691bd0613388d16697d0d81",
      "tree": "59838509358f27334874b90756505785cde29b02",
      "parents": [
        "75ec5a245c7763c397f31ec8964d0a46c54a7386",
        "8bb39f9aa068262732fe44b965d7a6eb5a5a7d67"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Apr 02 19:37:50 2010 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Apr 02 19:38:10 2010 +0200"
      },
      "message": "Merge branch \u0027perf/urgent\u0027 into perf/core\n\nConflicts:\n\tarch/x86/kernel/cpu/perf_event.c\n\nMerge reason: Resolve the conflict, pick up fixes\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "57f4c226d1e095a2db20c691c3cf089188fe1c5d",
      "tree": "f6a3897880bfa6cac6773c2471e24fae2adf60f0",
      "parents": [
        "9623e5a23724d09283c238960946ec6f65733afe"
      ],
      "author": {
        "name": "Tejun Heo",
        "email": "tj@kernel.org",
        "time": "Tue Mar 23 15:32:53 2010 +0900"
      },
      "committer": {
        "name": "Tejun Heo",
        "email": "tj@kernel.org",
        "time": "Tue Mar 30 22:02:21 2010 +0900"
      },
      "message": "x86: don\u0027t include slab.h from arch/x86/include/asm/pgtable_32.h\n\nIncluding slab.h from x86 pgtable_32.h creates a troublesome\ndependency chain w/ ftrace enabled.  The following chain leads to\ninclusion of pgtable_32.h from define_trace.h.\n\n trace/define_trace.h\n trace/ftrace.h\n linux/ftrace_event.h\n linux/ring_buffer.h\n linux/mm.h\n asm/pgtable.h\n asm/pgtable_32.h\n\nslab.h itself defines trace hooks via\n\n linux/sl[aou]b_def.h\n linux/kmemtrace.h\n trace/events/kmem.h\n\nIf slab.h is not included before define_trace.h is included, this\nleads to duplicate definitions of kmemtrace hooks or other include\ndependency problems.\n\npgtable_32.h doesn\u0027t need slab.h to begin with.  Don\u0027t include it from\nthere.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nAcked-by: Pekka Enberg \u003cpenberg@cs.helsinki.fi\u003e\nAcked-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "ea8e61b7bbc4a2faef77db34eb2db2a2c2372ff6",
      "tree": "df2998225dc10245ce3d392576a724ab788e456c",
      "parents": [
        "faa4602e47690fb11221e00f9b9697c8dc0d4b19"
      ],
      "author": {
        "name": "Peter Zijlstra",
        "email": "a.p.zijlstra@chello.nl",
        "time": "Thu Mar 25 14:51:51 2010 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Mar 26 11:33:57 2010 +0100"
      },
      "message": "x86, ptrace: Fix block-step\n\nImplement ptrace-block-step using TIF_BLOCKSTEP which will set\nDEBUGCTLMSR_BTF when set for a task while preserving any other\nDEBUGCTLMSR bits.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c20100325135414.017536066@chello.nl\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "faa4602e47690fb11221e00f9b9697c8dc0d4b19",
      "tree": "af667d1cdff7dc63b6893ee3f27a1f2503229ed1",
      "parents": [
        "7c5ecaf7666617889f337296c610815b519abfa9"
      ],
      "author": {
        "name": "Peter Zijlstra",
        "email": "a.p.zijlstra@chello.nl",
        "time": "Thu Mar 25 14:51:50 2010 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Mar 26 11:33:55 2010 +0100"
      },
      "message": "x86, perf, bts, mm: Delete the never used BTS-ptrace code\n\nSupport for the PMU\u0027s BTS features has been upstreamed in\nv2.6.32, but we still have the old and disabled ptrace-BTS,\nas Linus noticed it not so long ago.\n\nIt\u0027s buggy: TIF_DEBUGCTLMSR is trampling all over that MSR without\nregard for other uses (perf) and doesn\u0027t provide the flexibility\nneeded for perf either.\n\nIts users are ptrace-block-step and ptrace-bts, since ptrace-bts\nwas never used and ptrace-block-step can be implemented using a\nmuch simpler approach.\n\nSo axe all 3000 lines of it. That includes the *locked_memory*()\nAPIs in mm/mlock.c as well.\n\nReported-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Roland McGrath \u003croland@redhat.com\u003e\nCc: Oleg Nesterov \u003coleg@redhat.com\u003e\nCc: Markus Metzger \u003cmarkus.t.metzger@intel.com\u003e\nCc: Steven Rostedt \u003crostedt@goodmis.org\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nLKML-Reference: \u003c20100325135413.938004390@chello.nl\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "7c5ecaf7666617889f337296c610815b519abfa9",
      "tree": "684b2c01b2b6aa9bacc65f63fa26b522c0da7982",
      "parents": [
        "5a10317483f606106395814ee2fdaa2f1256a3b3"
      ],
      "author": {
        "name": "Peter Zijlstra",
        "email": "a.p.zijlstra@chello.nl",
        "time": "Thu Mar 25 14:51:49 2010 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Mar 26 09:41:03 2010 +0100"
      },
      "message": "perf, x86: Clean up debugctlmsr bit definitions\n\nMove all debugctlmsr thingies into msr-index.h\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c20100325135413.861425293@chello.nl\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "d814f30105798b6677ecb73ed61d691ff96dada9",
      "tree": "cd86bae8a9790987c990a445fb70e662f3736fc6",
      "parents": [
        "88978e562302c836c1c4597700c79d971e93abc0"
      ],
      "author": {
        "name": "Cyrill Gorcunov",
        "email": "gorcunov@openvz.org",
        "time": "Wed Mar 24 12:09:26 2010 +0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Mar 26 08:45:49 2010 +0100"
      },
      "message": "x86, perf: Add raw events support for the P4 PMU\n\nThe adding of raw event support lead to complete code\nrefactoring. I hope is became more readable then it was.\n\nThe list of changes:\n\n1)  The 64bit config field is enough to hold all information we need\n    to track event details. To achieve it we used *own* enum for\n    events selection in ESCR register and map this key into proper\n    value at moment of event enabling.\n\n    For the same reason we use 12LSB bits in CCCR register -- to track\n    which exactly cache trace event was requested. And we cear this bits\n    at real \u0027write\u0027 moment.\n\n2)  There is no per-cpu area reserved for P4 PMU anymore. We\n    don\u0027t need it. All is held by config.\n\n3)  Now we may use any available counter, ie we try to grab any\n    possible counter.\n\nv2:\n  - Lin Ming reported the lack of ESCR selector in CCCR for cache events\n\nv3:\n  - Don\u0027t loose cache event codes at config unpacking procedure, we may\n    need it one day so no obscure hack behind our back, better to clear\n    reserved bits explicitly when needed (thanks Ming for pointing out)\n\n  - Lin Ming fixed misplaced opcodes in cache events\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nTested-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nCc: Arnaldo Carvalho de Melo \u003cacme@redhat.com\u003e\nCc: Stephane Eranian \u003ceranian@google.com\u003e\nCc: Robert Richter \u003crobert.richter@amd.com\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Cyrill Gorcunov \u003cgorcunov@gmail.com\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nLKML-Reference: \u003c1269403766.3409.6.camel@minggr.sh.intel.com\u003e\n[ v4: did a few whitespace fixlets ]\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "d2f1e15b661e71fd52111f51c99a6ce41384e9ef",
      "tree": "8731e7e772e6f825ebbc6eef7681bc46302149bd",
      "parents": [
        "40b7e05e17eef31ff30fe08dfc2424ef653a792c",
        "220bf991b0366cc50a94feede3d7341fa5710ee4"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Mar 22 18:46:57 2010 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Mar 22 18:47:01 2010 +0100"
      },
      "message": "Merge commit \u0027v2.6.34-rc2\u0027 into perf/core\n\nMerge reason: Pick up latest perf fixes from upstream.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "035a02c1e1de31888e8b6adac0ff667971ac04db",
      "tree": "aae59332c2e409f0a725123a8f514256a41cf869",
      "parents": [
        "ff30a0543e9a6cd732582063e7cae951cdb7acf2"
      ],
      "author": {
        "name": "Andreas Herrmann",
        "email": "andreas.herrmann3@amd.com",
        "time": "Fri Mar 19 12:09:22 2010 +0100"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Fri Mar 19 14:43:36 2010 -0700"
      },
      "message": "x86, amd: Restrict usage of c1e_idle()\n\nCurrently c1e_idle returns true for all CPUs greater than or equal to\nfamily 0xf model 0x40. This covers too many CPUs.\n\nMeanwhile a respective erratum for the underlying problem was filed\n(#400). This patch adds the logic to check whether erratum #400\napplies to a given CPU.\nEspecially for CPUs where SMI/HW triggered C1e is not supported,\nc1e_idle() doesn\u0027t need to be used. We can check this by looking at\nthe respective OSVW bit for erratum #400.\n\nCc: \u003cstable@kernel.org\u003e # .32.x .33.x\nSigned-off-by: Andreas Herrmann \u003candreas.herrmann3@amd.com\u003e\nLKML-Reference: \u003c20100319110922.GA19614@alberich.amd.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "4bd96a7a8185755b091233b16034c7436cbf57af",
      "tree": "5a6d1a5014a39f0463c79abda29a482f4dd52dd1",
      "parents": [
        "a3d3203e4bb40f253b1541e310dc0f9305be7c84"
      ],
      "author": {
        "name": "Shane Wang",
        "email": "shane.wang@intel.com",
        "time": "Wed Mar 10 14:36:10 2010 +0800"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Fri Mar 19 13:39:58 2010 -0700"
      },
      "message": "x86, tboot: Add support for S3 memory integrity protection\n\nThis patch adds support for S3 memory integrity protection within an Intel(R)\nTXT launched kernel, for all kernel and userspace memory.  All RAM used by the\nkernel and userspace, as indicated by memory ranges of type E820_RAM and\nE820_RESERVED_KERN in the e820 table, will be integrity protected.\n\nThe MAINTAINERS file is also updated to reflect the maintainers of the\nTXT-related code.\n\nAll MACing is done in tboot, based on a complexity analysis and tradeoff.\n\nv3: Compared with v2, this patch adds a check of array size in\ntboot.c, and a note to specify which c/s of tboot supports this kind\nof MACing in intel_txt.txt.\n\nSigned-off-by: Shane Wang \u003cshane.wang@intel.com\u003e\nLKML-Reference: \u003c4B973DDA.6050902@intel.com\u003e\nSigned-off-by: Joseph Cihula \u003cjoseph.cihula@intel.com\u003e\nAcked-by: Pavel Machek \u003cpavel@ucw.cz\u003e\nAcked-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "40b7e05e17eef31ff30fe08dfc2424ef653a792c",
      "tree": "915e76e0f28664707a4f41a2d75583b8dd23a9e4",
      "parents": [
        "9c8c6bad3137112d2c7bf3d215b736ee4215fa74"
      ],
      "author": {
        "name": "Lin Ming",
        "email": "ming.m.lin@intel.com",
        "time": "Fri Mar 19 15:28:58 2010 +0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Mar 19 09:23:17 2010 +0100"
      },
      "message": "perf, x86: Fix key indexing in Pentium-4 PMU\n\nIndex 0-6 in p4_templates are reserved for common hardware\nevents. So p4_templates is arranged as below:\n\n    0  -    6:  common hardware events\n    7  -    N:  cache events\n  N+1  -  ...:  other raw events\n\nReported-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nAcked-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nLKML-Reference: \u003c1268983738.13901.142.camel@minggr.sh.intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "9c8c6bad3137112d2c7bf3d215b736ee4215fa74",
      "tree": "82590bcada0d7fed60ce18c8b29b3c3837cecfc3",
      "parents": [
        "4b24a88b35e15e04bd8f2c5dda65b5dc8ebca05f"
      ],
      "author": {
        "name": "Cyrill Gorcunov",
        "email": "gorcunov@gmail.com",
        "time": "Fri Mar 19 00:12:56 2010 +0300"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Mar 18 22:17:46 2010 +0100"
      },
      "message": "x86, perf: Fix few cosmetic dabs for P4 pmu (comments and constantify)\n\n- A few ESCR have escaped fixing at previous attempt.\n- p4_escr_map is read only, make it const.\n\nNothing serious.\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Lin Ming \u003cming.m.lin@intel.com\u003e\nLKML-Reference: \u003c20100318211256.GH5062@lenovo\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "cb7d6b5053e86598735d9af19930f5929f007b7f",
      "tree": "b707d913470443c05bd637d4b7fbab3926e0ba1c",
      "parents": [
        "f34edbc1cdb0f8f83d94e1d668dd6e41abf0defb"
      ],
      "author": {
        "name": "Lin Ming",
        "email": "ming.m.lin@intel.com",
        "time": "Thu Mar 18 18:33:12 2010 +0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Mar 18 17:04:02 2010 +0100"
      },
      "message": "perf, x86: Add cache events for the Pentium-4 PMU\n\nMove the HT bit setting code from p4_pmu_event_map to\np4_hw_config. So the cache events can get HT bit set correctly.\n\nTested on my P4 desktop, below 6 cache events work:\n\n L1-dcache-load-misses\n LLC-load-misses\n dTLB-load-misses\n dTLB-store-misses\n iTLB-loads\n iTLB-load-misses\n\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nReviewed-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nLKML-Reference: \u003c1268908392.13901.128.camel@minggr.sh.intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "f34edbc1cdb0f8f83d94e1d668dd6e41abf0defb",
      "tree": "d57803bcc891a748551429d2feafec2df8007367",
      "parents": [
        "55632770d7298835645489828af87f854c47749c"
      ],
      "author": {
        "name": "Lin Ming",
        "email": "ming.m.lin@intel.com",
        "time": "Thu Mar 18 18:33:07 2010 +0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Mar 18 17:03:51 2010 +0100"
      },
      "message": "perf, x86: Add a key to simplify template lookup in Pentium-4 PMU\n\nCurrently, we use opcode(Event and Event-Selector) + emask to\nlook up template in p4_templates.\n\nBut cache events (L1-dcache-load-misses, LLC-load-misses, etc)\nuse the same event(P4_REPLAY_EVENT) to do the counting, ie, they\nhave the same opcode and emask. So we can not use current lookup\nmechanism to find the template for cache events.\n\nThis patch introduces a \"key\", which is the index into\np4_templates. The low 12 bits of CCCR are reserved, so we can\nhide the \"key\" in the low 12 bits of hwc-\u003econfig.\n\nWe extract the key from hwc-\u003econfig and then quickly find the\ntemplate.\n\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nReviewed-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nLKML-Reference: \u003c1268908387.13901.127.camel@minggr.sh.intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "d674cd1963129b70bc5f631c51fb30fb73213fb2",
      "tree": "e6e0ffadf7061512a8876b372eab3cac3f88736b",
      "parents": [
        "d6d901c23a9c4c7361aa901b5b2dda69703dd5e0"
      ],
      "author": {
        "name": "Cyrill Gorcunov",
        "email": "gorcunov@openvz.org",
        "time": "Wed Mar 17 13:37:00 2010 +0300"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Mar 18 17:03:21 2010 +0100"
      },
      "message": "x86, apic: Allow to use certain functions without APIC built-in support\n\nIn case even if the kernel is configured so that\nno APIC support is built-in we still may allow\nto use certain apic functions as dummy calls.\n\nIn particular we start using it in perf-events code.\n\nNote that this is not that same as NOOP apic driver (which\nis used if APIC support is present but no physical APIC is\navailable), this is for the case when we don\u0027t have apic code\ncompiled in at all.\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nLKML-Reference: \u003c20100317104356.011052632@openvz.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "ff30a0543e9a6cd732582063e7cae951cdb7acf2",
      "tree": "1013c443b3175d7193a96ad2ca56d2c6ba173e03",
      "parents": [
        "36e9e1eab777e077f7484d309ff676d0568e27d1"
      ],
      "author": {
        "name": "Jan Beulich",
        "email": "JBeulich@novell.com",
        "time": "Mon Mar 15 10:11:15 2010 +0000"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Mar 16 11:16:27 2010 +0100"
      },
      "message": "x86: Fix placement of FIX_OHCI1394_BASE\n\nEver for 32-bit with sufficiently high NR_CPUS, and starting\nwith commit 789d03f584484af85dbdc64935270c8e45f36ef7 also for\n64-bit, the statically allocated early fixmap page tables were\nnot covering FIX_OHCI1394_BASE, leading to a boot time crash\nwhen \"ohci1394_dma\u003dearly\" was used. Despite this entry not being\na permanently used one, it needs to be moved into the permanent\nrange since it has to be close to FIX_DBGP_BASE and\nFIX_EARLYCON_MEM_BASE.\n\nReported-bisected-and-tested-by: Justin P. Mattock \u003cjustinmattock@gmail.com\u003e\nFixes-bug: http://bugzilla.kernel.org/show_bug.cgi?id\u003d14487\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nCc: \u003cstable@kernel.org\u003e # [as far back as long as it still applies]\nLKML-Reference: \u003c4B9E15D30200007800034D23@vpn.id2.novell.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "8ea7f544100844307072cae2f5fc108afdef999a",
      "tree": "f8de71807a2f5c4a30a055f13a297177442a6240",
      "parents": [
        "1d199b1ad606ae8b88acebd295b101c4e1cf2a57"
      ],
      "author": {
        "name": "Lin Ming",
        "email": "ming.m.lin@intel.com",
        "time": "Tue Mar 16 10:12:36 2010 +0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Mar 16 09:37:46 2010 +0100"
      },
      "message": "x86, perf: Fix comments in Pentium-4 PMU definitions\n\nReported-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Mike Galbraith \u003cefault@gmx.de\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Arnaldo Carvalho de Melo \u003cacme@redhat.com\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nLKML-Reference: \u003c1268705556.3379.8.camel@minggr.sh.intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "36e9e1eab777e077f7484d309ff676d0568e27d1",
      "tree": "488fd5fb3ee1b3e755ddd08e57e3fc55e22babee",
      "parents": [
        "a3d3203e4bb40f253b1541e310dc0f9305be7c84"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Mon Mar 15 14:33:06 2010 -0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Mar 16 06:36:35 2010 +0100"
      },
      "message": "x86: Handle legacy PIC interrupts on all the cpu\u0027s\n\nIngo Molnar reported that with the recent changes of not\nstatically blocking IRQ0_VECTOR..IRQ15_VECTOR\u0027s on all the\ncpu\u0027s, broke an AMD platform (with Nvidia chipset) boot when\n\"noapic\" boot option is used.\n\nOn this platform, legacy PIC interrupts are getting delivered to\nall the cpu\u0027s instead of just the boot cpu. Thus not\ninitializing the vector to irq mapping for the legacy irq\u0027s\nresulted in not handling certain interrupts causing boot hang.\n\nFix this by initializing the vector to irq mapping on all the\nlogical cpu\u0027s, if the legacy IRQ is handled by the legacy PIC.\n\nReported-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\n[ -v2: io-apic-enabled improvement ]\nAcked-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1268692386.3296.43.camel@sbs-t61.sc.intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "e4495262826d1eabca3529fa6ac22394eb348132",
      "tree": "61ed42e15b785c20e0a1b3a9518d4699ce240199",
      "parents": [
        "8576e1971663ffdb6139041de97cdd2e1d4791cc"
      ],
      "author": {
        "name": "Cyrill Gorcunov",
        "email": "gorcunov@openvz.org",
        "time": "Mon Mar 15 12:58:22 2010 +0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Mar 15 08:14:34 2010 +0100"
      },
      "message": "perf, x86: Enable not tagged retired instruction counting on P4s\n\nThis should turn on instruction counting on P4s, which was missing in\nthe first version of the new PMU driver.\n\nIt\u0027s inaccurate for now, we still need dependant event to tag mops\nbefore we can count them precisely. The result is that the number of\ninstruction may be lifted up.\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nLKML-Reference: \u003c1268629102.3355.11.camel@minggr.sh.intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "9fdfbc2bff587f454dd95e2caa6d147c9abe39e4",
      "tree": "2feaee47cbcfb57dd0d5cf23509e22011541e717",
      "parents": [
        "8cea4eb642890a1de58980e7e1617d1765ef8f7c",
        "dc1d628a67a8f042e711ea5accc0beedc3ef0092"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sat Mar 13 14:39:42 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sat Mar 13 14:39:42 2010 -0800"
      },
      "message": "Merge branch \u0027perf-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027perf-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  perf: Provide generic perf_sample_data initialization\n  MAINTAINERS: Add Arnaldo as tools/perf/ co-maintainer\n  perf trace: Don\u0027t use pager if scripting\n  perf trace/scripting: Remove extraneous header read\n  perf, ARM: Modify kuser rmb() call to compile for Thumb-2\n  x86/stacktrace: Don\u0027t dereference bad frame pointers\n  perf archive: Don\u0027t try to collect files without a build-id\n  perf_events, x86: Fixup fixed counter constraints\n  perf, x86: Restrict the ANY flag\n  perf, x86: rename macro in ARCH_PERFMON_EVENTSEL_ENABLE\n  perf, x86: add some IBS macros to perf_event.h\n  perf, x86: make IBS macros available in perf_event.h\n  hw-breakpoints: Remove stub unthrottle callback\n  x86/hw-breakpoints: Remove the name field\n  perf: Remove pointless breakpoint union\n  perf lock: Drop the buffers multiplexing dependency\n  perf lock: Fix and add misc documentally things\n  percpu: Add __percpu sparse annotations to hw_breakpoint\n"
    },
    {
      "commit": "f41b177157718abe9a93868bb76e47d4a6f3681d",
      "tree": "555d8608a2fe320483c8761dcb2e80cc37b5e822",
      "parents": [
        "c7e67ac1f329fa28b6a411335787c786de618cba"
      ],
      "author": {
        "name": "FUJITA Tomonori",
        "email": "fujita.tomonori@lab.ntt.co.jp",
        "time": "Wed Mar 10 15:23:30 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 12 15:52:42 2010 -0800"
      },
      "message": "pci-dma: add linux/pci-dma.h to linux/pci.h\n\nAll the architectures properly set NEED_DMA_MAP_STATE now so we can safely\nadd linux/pci-dma.h to linux/pci.h and remove the linux/pci-dma.h\ninclusion in arch\u0027s asm/pci.h\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nAcked-by: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "3bc4e4590de89c2dfcfb1000344cd072574c9ad4",
      "tree": "3f870c9c14b4603977ed8c7b7ab1f7d2347276ef",
      "parents": [
        "5637f2df8d56b64697c1ee5c96cf0d6b650b30cb"
      ],
      "author": {
        "name": "FUJITA Tomonori",
        "email": "fujita.tomonori@lab.ntt.co.jp",
        "time": "Wed Mar 10 15:23:22 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 12 15:52:41 2010 -0800"
      },
      "message": "pci-dma: x86: use include/linux/pci-dma.h\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "dacbe41f776db0a5a9aee1e41594f405c95778a5",
      "tree": "f6cb1436bd50a2572b7c5b44d44044be0e8005bd",
      "parents": [
        "b3c1e01a09d6af2dd7811a066ffcfc5171be2bed"
      ],
      "author": {
        "name": "Christoph Hellwig",
        "email": "hch@lst.de",
        "time": "Wed Mar 10 15:22:46 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 12 15:52:38 2010 -0800"
      },
      "message": "ptrace: move user_enable_single_step \u0026 co prototypes to linux/ptrace.h\n\nWhile in theory user_enable_single_step/user_disable_single_step/\nuser_enable_blockstep could also be provided as an inline or macro there\u0027s\nno good reason to do so, and having the prototype in one places keeps code\nsize and confusion down.\n\nRoland said:\n\n  The original thought there was that user_enable_single_step() et al\n  might well be only an instruction or three on a sane machine (as if we\n  have any of those!), and since there is only one call site inlining\n  would be beneficial.  But I agree that there is no strong reason to care\n  about inlining it.\n\n  As to the arch changes, there is only one thought I\u0027d add to the\n  record.  It was always my thinking that for an arch where\n  PTRACE_SINGLESTEP does text-modifying breakpoint insertion,\n  user_enable_single_step() should not be provided.  That is,\n  arch_has_single_step()\u003d\u003etrue means that there is an arch facility with\n  \"pure\" semantics that does not have any unexpected side effects.\n  Inserting a breakpoint might do very unexpected strange things in\n  multi-threaded situations.  Aside from that, it is a peculiar side\n  effect that user_{enable,disable}_single_step() should cause COW\n  de-sharing of text pages and so forth.  For PTRACE_SINGLESTEP, all these\n  peculiarities are the status quo ante for that arch, so having\n  arch_ptrace() itself do those is one thing.  But for building other\n  things in the future, it is nicer to have a uniform \"pure\" semantics\n  that arch-independent code can expect.\n\n  OTOH, all such arch issues are really up to the arch maintainer.  As\n  of today, there is nothing but ptrace using user_enable_single_step() et\n  al so it\u0027s a distinction without a practical difference.  If/when there\n  are other facilities that use user_enable_single_step() and might care,\n  the affected arch\u0027s can revisit the question when someone cares about\n  the quality of the arch support for said new facility.\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Oleg Nesterov \u003coleg@redhat.com\u003e\nCc: Roland McGrath \u003croland@redhat.com\u003e\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "5cacdb4add1b1e50fe75edc50ebbb7bddd9cf5e7",
      "tree": "bd6595bb8c5c7e20ad01ed7ef766d873e5d26db3",
      "parents": [
        "e28cbf22933d0c0ccaf3c4c27a1a263b41f73859"
      ],
      "author": {
        "name": "Christoph Hellwig",
        "email": "hch@lst.de",
        "time": "Wed Mar 10 15:21:21 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 12 15:52:32 2010 -0800"
      },
      "message": "Add generic sys_olduname()\n\nAdd generic implementations of the old and really old uname system calls.\nNote that sh only implements sys_olduname but not sys_oldolduname, but I\u0027m\nnot going to bother with another ifdef for that special case.\n\nm32r implemented an old uname but never wired it up, so kill it, too.\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "e28cbf22933d0c0ccaf3c4c27a1a263b41f73859",
      "tree": "a93ff48cfd97766a23b2c4f3ea86fccfc9c51d3f",
      "parents": [
        "baed7fc9b580bd3fb8252ff1d9b36eaf1f86b670"
      ],
      "author": {
        "name": "Christoph Hellwig",
        "email": "hch@lst.de",
        "time": "Wed Mar 10 15:21:19 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 12 15:52:32 2010 -0800"
      },
      "message": "improve sys_newuname() for compat architectures\n\nOn an architecture that supports 32-bit compat we need to override the\nreported machine in uname with the 32-bit value.  Instead of doing this\nseparately in every architecture introduce a COMPAT_UTS_MACHINE define in\n\u003casm/compat.h\u003e and apply it directly in sys_newuname().\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "baed7fc9b580bd3fb8252ff1d9b36eaf1f86b670",
      "tree": "38f23cd9888b92de3f73ed1f4ce48cd83e940e0e",
      "parents": [
        "a4679373cf4ee0e7792dc56205365732b725c2c1"
      ],
      "author": {
        "name": "Christoph Hellwig",
        "email": "hch@lst.de",
        "time": "Wed Mar 10 15:21:18 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 12 15:52:32 2010 -0800"
      },
      "message": "Add generic sys_ipc wrapper\n\nAdd a generic implementation of the ipc demultiplexer syscall.  Except for\ns390 and sparc64 all implementations of the sys_ipc are nearly identical.\n\nThere are slight differences in the types of the parameters, where mips\nand powerpc as the only 64-bit architectures with sys_ipc use unsigned\nlong for the \"third\" argument as it gets casted to a pointer later, while\nit traditionally is an \"int\" like most other paramters.  frv goes even\nfurther and uses unsigned long for all parameters execept for \"ptr\" which\nis a pointer type everywhere.  The change from int to unsigned long for\n\"third\" and back to \"int\" for the others on frv should be fine due to the\nin-register calling conventions for syscalls (we already had a similar\nissue with the generic sys_ptrace), but I\u0027d prefer to have the arch\nmaintainers looks over this in details.\n\nExcept for that h8300, m68k and m68knommu lack an impplementation of the\nsemtimedop sub call which this patch adds, and various architectures have\ngets used - at least on i386 it seems superflous as the compat code on\nx86-64 and ia64 doesn\u0027t even bother to implement it.\n\n[akpm@linux-foundation.org: add sys_ipc to sys_ni.c]\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nReviewed-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nAcked-by: Jesper Nilsson \u003cjesper.nilsson@axis.com\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e\nAcked-by: Kyle McMartin \u003ckyle@mcmartin.ca\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "a4679373cf4ee0e7792dc56205365732b725c2c1",
      "tree": "6cf8040f608ad46ae7c605284af1ca585fb50eaa",
      "parents": [
        "5d0e52830e9ae09b872567f4aca3dfb5b5918079"
      ],
      "author": {
        "name": "Christoph Hellwig",
        "email": "hch@lst.de",
        "time": "Wed Mar 10 15:21:15 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 12 15:52:32 2010 -0800"
      },
      "message": "Add generic sys_old_mmap()\n\nAdd a generic implementation of the old mmap() syscall, which expects its\nargument in a memory block and switch all architectures over to use it.\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nReviewed-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nAcked-by: Jesper Nilsson \u003cjesper.nilsson@axis.com\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "5d0e52830e9ae09b872567f4aca3dfb5b5918079",
      "tree": "55a199575058da551ccc837ab35a1f4826a8c5b4",
      "parents": [
        "724ee626f38feaea215a11790e1a0cb5d83b0628"
      ],
      "author": {
        "name": "Christoph Hellwig",
        "email": "hch@lst.de",
        "time": "Wed Mar 10 15:21:13 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 12 15:52:32 2010 -0800"
      },
      "message": "Add generic sys_old_select()\n\nAdd a generic implementation of the old select() syscall, which expects\nits argument in a memory block and switch all architectures over to use\nit.\n\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nCc: Hirokazu Takata \u003ctakata@linux-m32r.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nReviewed-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nCc: Arnd Bergmann \u003carnd@arndb.de\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: James Morris \u003cjmorris@namei.org\u003e\nAcked-by: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nAcked-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\nAcked-by: Greg Ungerer \u003cgerg@uclinux.org\u003e\nAcked-by: David Howells \u003cdhowells@redhat.com\u003e\nCc: Andreas Schwab \u003cschwab@linux-m68k.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "a072738e04f0eb26370e39ec679e9a0d65e49aea",
      "tree": "0d74f160847675ed43af2353aa31ec3826120edf",
      "parents": [
        "9b33fa6ba0e2f90fdf407501db801c2511121564"
      ],
      "author": {
        "name": "Cyrill Gorcunov",
        "email": "gorcunov@openvz.org",
        "time": "Thu Mar 11 19:54:39 2010 +0300"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Mar 11 18:51:08 2010 +0100"
      },
      "message": "perf, x86: Implement initial P4 PMU driver\n\nThe netburst PMU is way different from the \"architectural\nperfomance monitoring\" specification that current CPUs use.\nP4 uses a tuple of ESCR+CCCR+COUNTER MSR registers to handle\nperfomance monitoring events.\n\nA few implementational details:\n\n1) We need a separate x86_pmu::hw_config helper in struct\n   x86_pmu since register bit-fields are quite different from P6,\n   Core and later cpu series.\n\n2) For the same reason is a x86_pmu::schedule_events helper\n   introduced.\n\n3) hw_perf_event::config consists of packed ESCR+CCCR values.\n   It\u0027s allowed since in reality both registers only use a half\n   of their size. Of course before making a real write into a\n   particular MSR we need to unpack the value and extend it to\n   a proper size.\n\n4) The tuple of packed ESCR+CCCR in hw_perf_event::config\n   doesn\u0027t describe the memory address of ESCR MSR register\n   so that we need to keep a mapping between these tuples\n   used and available ESCR (various P4 events may use same\n   ESCRs but not simultaneously), for this sake every active\n   event has a per-cpu map of hw_perf_event::idx \u003c--\u003e ESCR\n   addresses.\n\n5) Since hw_perf_event::idx is an offset to counter/control register\n   we need to lift X86_PMC_MAX_GENERIC up, otherwise kernel\n   strips it down to 8 registers and event armed may never be turned\n   off (ie the bit in active_mask is set but the loop never reaches\n   this index to check), thanks to Peter Zijlstra\n\nRestrictions:\n\n - No cascaded counters support (do we ever need them?)\n - No dependent events support (so PERF_COUNT_HW_INSTRUCTIONS\n   doesn\u0027t work for now)\n - There are events with same counters which can\u0027t work simultaneously\n   (need to use intersected ones due to broken counter 1)\n - No PERF_COUNT_HW_CACHE_ events yet\n\nTodo:\n\n - Implement dependent events\n - Need proper hashing for event opcodes (no linear search, good for\n   debugging stage but not in real loads)\n - Some events counted during a clock cycle -- need to set threshold\n   for them and count every clock cycle just to get summary statistics\n   (ie to behave the same way as other PMUs do)\n - Need to swicth to use event_constraints\n - To support RAW events we need to encode a global list of P4 events\n   into p4_templates\n - Cache events need to be added\n\nEvent support status matrix:\n\n Event\t\t\tstatus\n -----------------------------\n cycles\t\t\tworks\n cache-references\tworks\n cache-misses\t\tworks\n branch-misses\t\tworks\n bus-cycles\t\tpartially (does not work on 64bit cpu with HT enabled)\n instruction\t\tdoesnt work (needs dependent event [mop tagging])\n branches\t\tdoesnt work\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Arnaldo Carvalho de Melo \u003cacme@redhat.com\u003e\nCc: Stephane Eranian \u003ceranian@google.com\u003e\nCc: Robert Richter \u003crobert.richter@amd.com\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nLKML-Reference: \u003c20100311165439.GB5129@lenovo\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "6f4edd69e40aba4f45bf9558c1e9a950d79ab4e4",
      "tree": "5fe1b45f8e03beb66d9d4b3fdd08705963ea8658",
      "parents": [
        "522dba7134d6b2e5821d3457f7941ec34f668e6d"
      ],
      "author": {
        "name": "Jack Steiner",
        "email": "steiner@sgi.com",
        "time": "Wed Mar 10 14:44:58 2010 -0600"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Mar 11 14:11:26 2010 +0100"
      },
      "message": "x86, UV: Clean up UV headers for MMR definitions\n\nUpdate UV mmr definitions header file. Eliminate definitions no\nlonger needed. Move 2 definitions from tlb_uv.c into the header\nfile where they belong.\n\nSigned-off-by: Jack Steiner \u003csteiner@sgi.com\u003e\nLKML-Reference: \u003c20100310204458.GA28835@sgi.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "30a813ae035d3e220a89609adce878e045c49547",
      "tree": "3f778aea2c797f607702af63afa9deaa981ce914",
      "parents": [
        "7e1a40dda619b0483fbe0740494ed2c2a1f05289"
      ],
      "author": {
        "name": "Peter Zijlstra",
        "email": "a.p.zijlstra@chello.nl",
        "time": "Thu Mar 04 13:49:21 2010 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Mar 10 13:23:34 2010 +0100"
      },
      "message": "x86: Move MAX_INSN_SIZE into asm/insn.h\n\nSince there\u0027s now two users for this, place it in a common header.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Arnaldo Carvalho de Melo \u003cacme@infradead.org\u003e\nCc: Masami Hiramatsu \u003cmhiramat@redhat.com\u003e\nCc: paulus@samba.org\nCc: eranian@google.com\nCc: robert.richter@amd.com\nCc: fweisbec@gmail.com\nLKML-Reference: \u003c20100304140100.923774125@chello.nl\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "ef21f683a045a79b6aa86ad81e5fdfc0d5ddd250",
      "tree": "ccf39f5051608c1eccac9171259c2d7bc381cc96",
      "parents": [
        "caff2befffe899e63df5cc760b7ed01cfd902685"
      ],
      "author": {
        "name": "Peter Zijlstra",
        "email": "a.p.zijlstra@chello.nl",
        "time": "Wed Mar 03 13:12:23 2010 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Mar 10 13:23:32 2010 +0100"
      },
      "message": "perf, x86: use LBR for PEBS IP+1 fixup\n\nUse the LBR to fix up the PEBS IP+1 issue.\n\nAs said, PEBS reports the next instruction, here we use the LBR to find\nthe last branch and from that construct the actual IP. If the IP matches\nthe LBR-TO, we use LBR-FROM, otherwise we use the LBR-TO address as the\nbeginning of the last basic block and decode forward.\n\nOnce we find a match to the current IP, we use the previous location.\n\nThis patch introduces a new ABI element: PERF_RECORD_MISC_EXACT, which\nconveys that the reported IP (PERF_SAMPLE_IP) is the exact instruction\nthat caused the event (barring CPU errata).\n\nThe fixup can fail due to various reasons:\n\n 1) LBR contains invalid data (quite possible)\n 2) part of the basic block got paged out\n 3) the reported IP isn\u0027t part of the basic block (see 1)\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Arnaldo Carvalho de Melo \u003cacme@infradead.org\u003e\nCc: Masami Hiramatsu \u003cmhiramat@redhat.com\u003e\nCc: \"Zhang, Yanmin\" \u003cyanmin_zhang@linux.intel.com\u003e\nCc: paulus@samba.org\nCc: eranian@google.com\nCc: robert.richter@amd.com\nCc: fweisbec@gmail.com\nLKML-Reference: \u003c20100304140100.619375431@chello.nl\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "548b84166917d6f5e2296123b85ad24aecd3801d",
      "tree": "0ab0300e23a02df0fe3c0579627e4998bb122c00",
      "parents": [
        "cfb581bcd4f8c158c6f2b48bf5e232bb9e6855c0",
        "57d54889cd00db2752994b389ba714138652e60c"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Mar 09 17:11:53 2010 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Mar 09 17:11:53 2010 +0100"
      },
      "message": "Merge commit \u0027v2.6.34-rc1\u0027 into perf/urgent\n\nConflicts:\n\ttools/perf/util/probe-event.c\n\nMerge reason: Pick up -rc1 and resolve the conflict as well.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "322aafa6645a48c3b7837ca7385f126ab78127fd",
      "tree": "50f6665aedcf051cecd571183df81ba7f248014b",
      "parents": [
        "dd04265b028c00c365a78f9ff78a05e217f98656",
        "c7bbf52aa4fa332b84c4f2bb33e69561ee6870b4"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Mar 07 15:59:39 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Mar 07 15:59:39 2010 -0800"
      },
      "message": "Merge branch \u0027x86-mrst-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-mrst-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (30 commits)\n  x86, mrst: Fix whitespace breakage in apb_timer.c\n  x86, mrst: Fix APB timer per cpu clockevent\n  x86, mrst: Remove X86_MRST dependency on PCI_IOAPIC\n  x86, olpc: Use pci subarch init for OLPC\n  x86, pci: Add arch_init to x86_init abstraction\n  x86, mrst: Add Kconfig dependencies for Moorestown\n  x86, pci: Exclude Moorestown PCI code if CONFIG_X86_MRST\u003dn\n  x86, numaq: Make CONFIG_X86_NUMAQ depend on CONFIG_PCI\n  x86, pci: Add sanity check for PCI fixed bar probing\n  x86, legacy_irq: Remove duplicate vector assigment\n  x86, legacy_irq: Remove left over nr_legacy_irqs\n  x86, mrst: Platform clock setup code\n  x86, apbt: Moorestown APB system timer driver\n  x86, mrst: Add vrtc platform data setup code\n  x86, mrst: Add platform timer info parsing code\n  x86, mrst: Fill in PCI functions in x86_init layer\n  x86, mrst: Add dummy legacy pic to platform setup\n  x86/PCI: Moorestown PCI support\n  x86, ioapic: Add dummy ioapic functions\n  x86, ioapic: Early enable ioapic for timer irq\n  ...\n\nFixed up semantic conflict of new clocksources due to commit\n17622339af25 (\"clocksource: add argument to resume callback\").\n"
    },
    {
      "commit": "24cd772315c19e4d9409d0d21367ec1ebab3149f",
      "tree": "cf8a322797fb4d27c21451b1b9fbbdd234dc667e",
      "parents": [
        "cbb9d729f3433c9c2660b01dc52e6deb89488886"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Tue Jan 19 17:27:39 2010 +0100"
      },
      "committer": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Sun Mar 07 18:01:12 2010 +0100"
      },
      "message": "x86/amd-iommu: Make iommu_unmap_page and fetch_pte aware of page sizes\n\nThis patch extends the functionality of iommu_unmap_page\nand fetch_pte to support arbitrary page sizes.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n"
    },
    {
      "commit": "cbb9d729f3433c9c2660b01dc52e6deb89488886",
      "tree": "e0384945ce9d235d5d3ae4e151728ce3faeb2cdf",
      "parents": [
        "fcd95807fb61e67d602610e7ff7129ed769e9fee"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Fri Jan 15 14:41:15 2010 +0100"
      },
      "committer": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Sun Mar 07 18:01:11 2010 +0100"
      },
      "message": "x86/amd-iommu: Make iommu_map_page and alloc_pte aware of page sizes\n\nThis patch changes the old map_size parameter of alloc_pte\nto a page_size parameter which can be used more easily to\nalloc a pte for intermediate page sizes.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n"
    },
    {
      "commit": "c812a51d11bbe983f4c24e32b59b265705ddd3c2",
      "tree": "d454f518db51a4de700cf3dcd4c3c71ee7288b47",
      "parents": [
        "9467c4fdd66f6810cecef0f1173330f3c6e67d45",
        "d2be1651b736002e0c76d7095d6c0ba77b4a897c"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 05 13:12:34 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 05 13:12:34 2010 -0800"
      },
      "message": "Merge branch \u0027kvm-updates/2.6.34\u0027 of git://git.kernel.org/pub/scm/virt/kvm/kvm\n\n* \u0027kvm-updates/2.6.34\u0027 of git://git.kernel.org/pub/scm/virt/kvm/kvm: (145 commits)\n  KVM: x86: Add KVM_CAP_X86_ROBUST_SINGLESTEP\n  KVM: VMX: Update instruction length on intercepted BP\n  KVM: Fix emulate_sys[call, enter, exit]()\u0027s fault handling\n  KVM: Fix segment descriptor loading\n  KVM: Fix load_guest_segment_descriptor() to inject page fault\n  KVM: x86 emulator: Forbid modifying CS segment register by mov instruction\n  KVM: Convert kvm-\u003erequests_lock to raw_spinlock_t\n  KVM: Convert i8254/i8259 locks to raw_spinlocks\n  KVM: x86 emulator: disallow opcode 82 in 64-bit mode\n  KVM: x86 emulator: code style cleanup\n  KVM: Plan obsolescence of kernel allocated slots, paravirt mmu\n  KVM: x86 emulator: Add LOCK prefix validity checking\n  KVM: x86 emulator: Check CPL level during privilege instruction emulation\n  KVM: x86 emulator: Fix popf emulation\n  KVM: x86 emulator: Check IOPL level during io instruction emulation\n  KVM: x86 emulator: fix memory access during x86 emulation\n  KVM: x86 emulator: Add Virtual-8086 mode of emulation\n  KVM: x86 emulator: Add group9 instruction decoding\n  KVM: x86 emulator: Add group8 instruction decoding\n  KVM: do not store wqh in irqfd\n  ...\n\nTrivial conflicts in Documentation/feature-removal-schedule.txt\n"
    },
    {
      "commit": "660f6a360be399f4ebdd6572a3d24afe54e9bb1c",
      "tree": "9c16463c495a656e34577d59c97b58997b61d242",
      "parents": [
        "586fac13f8685bf9dfb32e1ee98bfb14f0dd0061",
        "e5a11016643d1ab7172193591506d33a844734cc"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 05 10:50:22 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 05 10:50:22 2010 -0800"
      },
      "message": "Merge branch \u0027perf-probes-for-linus-2\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027perf-probes-for-linus-2\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86: Issue at least one memory barrier in stop_machine_text_poke()\n  perf probe: Correct probe syntax on command line help\n  perf probe: Add lazy line matching support\n  perf probe: Show more lines after last line\n  perf probe: Check function address range strictly in line finder\n  perf probe: Use libdw callback routines\n  perf probe: Use elfutils-libdw for analyzing debuginfo\n  perf probe: Rename probe finder functions\n  perf probe: Fix bugs in line range finder\n  perf probe: Update perf probe document\n  perf probe: Do not show --line option without dwarf support\n  kprobes: Add documents of jump optimization\n  kprobes/x86: Support kprobes jump optimization on x86\n  x86: Add text_poke_smp for SMP cross modifying code\n  kprobes/x86: Cleanup save/restore registers\n  kprobes/x86: Boost probes when reentering\n  kprobes: Jump optimization sysctl interface\n  kprobes: Introduce kprobes jump optimization\n  kprobes: Introduce generic insn_slot framework\n  kprobes/x86: Cleanup RELATIVEJUMP_INSTRUCTION to RELATIVEJUMP_OPCODE\n"
    },
    {
      "commit": "2a32f2db132264c356aea30a8270d3e68d96c509",
      "tree": "f98f0e1b9d85c7964b8fc149f451ae77072c3c27",
      "parents": [
        "feaf77d51a6e2e95f60c8095ac7282e610ede798",
        "f41496607e03ab99f263b8e26689ad0fc853007f"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Mar 03 09:11:02 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Mar 03 09:11:02 2010 -0800"
      },
      "message": "Merge branch \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  resource: Fix broken indentation\n  resource: Fix generic page_is_ram() for partial RAM pages\n  x86, paravirt: Remove kmap_atomic_pte paravirt op.\n  x86, vmi: Disable highmem PTE allocation even when CONFIG_HIGHPTE\u003dy\n  x86, xen: Disable highmem PTE allocation even when CONFIG_HIGHPTE\u003dy\n"
    },
    {
      "commit": "fb7b096d949fa852442ed9d8f982bce526ccfe7e",
      "tree": "883e7e43331d9962bcc6050a3bf88615a8c61063",
      "parents": [
        "a626b46e17d0762d664ce471d40bc506b6e721ab",
        "fad539956c9e69749a03f7817d22d1bab87657bf"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Mar 03 08:15:37 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Mar 03 08:15:37 2010 -0800"
      },
      "message": "Merge branch \u0027x86-apic-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-apic-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (25 commits)\n  x86: Fix out of order of gsi\n  x86: apic: Fix mismerge, add arch_probe_nr_irqs() again\n  x86, irq: Keep chip_data in create_irq_nr and destroy_irq\n  xen: Remove unnecessary arch specific xen irq functions.\n  smp: Use nr_cpus\u003d to set nr_cpu_ids early\n  x86, irq: Remove arch_probe_nr_irqs\n  sparseirq: Use radix_tree instead of ptrs array\n  sparseirq: Change irq_desc_ptrs to static\n  init: Move radix_tree_init() early\n  irq: Remove unnecessary bootmem code\n  x86: Add iMac9,1 to pci_reboot_dmi_table\n  x86: Convert i8259_lock to raw_spinlock\n  x86: Convert nmi_lock to raw_spinlock\n  x86: Convert ioapic_lock and vector_lock to raw_spinlock\n  x86: Avoid race condition in pci_enable_msix()\n  x86: Fix SCI on IOAPIC !\u003d 0\n  x86, ia32_aout: do not kill argument mapping\n  x86, irq: Move __setup_vector_irq() before the first irq enable in cpu online path\n  x86, irq: Update the vector domain for legacy irqs handled by io-apic\n  x86, irq: Don\u0027t block IRQ0_VECTOR..IRQ15_VECTOR\u0027s on all cpu\u0027s\n  ...\n"
    },
    {
      "commit": "a626b46e17d0762d664ce471d40bc506b6e721ab",
      "tree": "445f6ac655ea9247d2e27529f23ba02d0991fec0",
      "parents": [
        "c1dcb4bb1e3e16e9baee578d9bb040e5fba1063e",
        "dce46a04d55d6358d2d4ab44a4946a19f9425fe2"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Mar 03 08:15:05 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Mar 03 08:15:05 2010 -0800"
      },
      "message": "Merge branch \u0027x86-bootmem-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-bootmem-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (30 commits)\n  early_res: Need to save the allocation name in drop_range_partial()\n  sparsemem: Fix compilation on PowerPC\n  early_res: Add free_early_partial()\n  x86: Fix non-bootmem compilation on PowerPC\n  core: Move early_res from arch/x86 to kernel/\n  x86: Add find_fw_memmap_area\n  Move round_up/down to kernel.h\n  x86: Make 32bit support NO_BOOTMEM\n  early_res: Enhance check_and_double_early_res\n  x86: Move back find_e820_area to e820.c\n  x86: Add find_early_area_size\n  x86: Separate early_res related code from e820.c\n  x86: Move bios page reserve early to head32/64.c\n  sparsemem: Put mem map for one node together.\n  sparsemem: Put usemap for one node together\n  x86: Make 64 bit use early_res instead of bootmem before slab\n  x86: Only call dma32_reserve_bootmem 64bit !CONFIG_NUMA\n  x86: Make early_node_mem get mem \u003e 4 GB if possible\n  x86: Dynamically increase early_res array size\n  x86: Introduce max_early_res and early_res_count\n  ...\n"
    },
    {
      "commit": "0a135ba14d71fb84c691a5386aff5049691fe6d7",
      "tree": "adb1de887dd6839d69d2fc16ffa2a10ff63298fa",
      "parents": [
        "4850f524b2c4c8a4e9f8ef4dd9c7c4afde2f2b2c",
        "a29d8b8e2d811a24bbe49215a0f0c536b72ebc18"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Mar 03 07:34:18 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Mar 03 07:34:18 2010 -0800"
      },
      "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:\n  percpu: add __percpu sparse annotations to what\u0027s left\n  percpu: add __percpu sparse annotations to fs\n  percpu: add __percpu sparse annotations to core kernel subsystems\n  local_t: Remove leftover local.h\n  this_cpu: Remove pageset_notifier\n  this_cpu: Page allocator conversion\n  percpu, x86: Generic inc / dec percpu instructions\n  local_t: Move local.h include to ringbuffer.c and ring_buffer_benchmark.c\n  module: Use this_cpu_xx to dynamically allocate counters\n  local_t: Remove cpu_local_xx macros\n  percpu: refactor the code in pcpu_[de]populate_chunk()\n  percpu: remove compile warnings caused by __verify_pcpu_ptr()\n  percpu: make accessors check for percpu pointer in sparse\n  percpu: add __percpu for sparse.\n  percpu: make access macros universal\n  percpu: remove per_cpu__ prefix.\n"
    }
  ],
  "next": "b622d644c7d61a5cb95b74e7b143c263bed21f0a"
}