)]}' { "log": [ { "commit": "537b60d17894b7c19a6060feae40299d7109d6e7", "tree": "11a30267b4ecb7175d02215a995c8b6461304b9c", "parents": [ "3ae684e1c48e6deedc9b9faff8fa1c391ca8a652", "a289cc7c70da784a2d370b91885cab4f966dcb0f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:46:35 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:46:35 2010 -0700" }, "message": "Merge branch \u0027x86-uv-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-uv-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, UV: uv_irq.c: Fix all sparse warnings\n x86, UV: Improve BAU performance and error recovery\n x86, UV: Delete unneeded boot messages\n x86, UV: Clean up UV headers for MMR definitions\n" }, { "commit": "3ae684e1c48e6deedc9b9faff8fa1c391ca8a652", "tree": "07082b3239c24799e8aaf2e6a8a0ac059870d34a", "parents": [ "c4fd308ed62f292518363ea9c6c2adb3c2d95f9d", "4bd96a7a8185755b091233b16034c7436cbf57af" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:28:24 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:28:24 2010 -0700" }, "message": "Merge branch \u0027x86-txt-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-txt-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, tboot: Add support for S3 memory integrity protection\n" }, { "commit": "96fbeb973a7e17594a429537201611ca0b395622", "tree": "0f90e3724f804776d6ae00009c2e30bd4ab015aa", "parents": [ "1f8caa986a5f4de2e40f3defe66a07b4c5a019c2", "fea24e28c663e62663097f0ed3b8ff1f9a87f15e" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:27:49 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:27:49 2010 -0700" }, "message": "Merge branch \u0027x86-mrst-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-mrst-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, mrst: add nop functions to x86_init mpparse functions\n x86, mrst, pci: return 0 for non-present pci bars\n x86: Avoid check hlt for newer cpus\n" }, { "commit": "d6f3875252bb703a9a3de0b92f7ae154f12c986c", "tree": "d89d745f08f467d0e197056fa956ddc701574d38", "parents": [ "cb41838bbc4403f7270a94b93a9a0d9fc9c2e7ea", "3f10940e4fb69d312602078f2c5234206797ca31" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:17:17 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:17:17 2010 -0700" }, "message": "Merge branch \u0027x86-microcode-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-microcode-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86/microcode: Use nonseekable_open()\n x86: Improve Intel microcode loader performance\n" }, { "commit": "98f01720cbe3e2eb719682777049b6514e9db556", "tree": "af2fc4642dd0bfd195b0f60f1f267e8b02aa0009", "parents": [ "41d59102e146a4423a490b8eca68a5860af4fe1c", "4f47b4c9f0b711bf84adb8c27774ae80d346b628" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:15:57 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 09:15:57 2010 -0700" }, "message": "Merge branch \u0027x86-irq-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-irq-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, acpi/irq: Define gsi_end when X86_IO_APIC is undefined\n x86, irq: Kill io_apic_renumber_irq\n x86, acpi/irq: Handle isa irqs that are not identity mapped to gsi\u0027s.\n x86, ioapic: Simplify probe_nr_irqs_gsi.\n x86, ioapic: Optimize pin_2_irq\n x86, ioapic: Move nr_ioapic_registers calculation to mp_register_ioapic.\n x86, ioapic: In mpparse use mp_register_ioapic\n x86, ioapic: Teach mp_register_ioapic to compute a global gsi_end\n x86, ioapic: Fix the types of gsi values\n x86, ioapic: Fix io_apic_redir_entries to return the number of entries.\n x86, ioapic: Only export mp_find_ioapic and mp_find_ioapic_pin in io_apic.h\n x86, acpi/irq: Generalize mp_config_acpi_legacy_irqs\n x86, acpi/irq: Fix acpi_sci_ioapic_setup so it has both bus_irq and gsi\n x86, acpi/irq: pci device dev-\u003eirq is an isa irq not a gsi\n x86, acpi/irq: Teach acpi_get_override_irq to take a gsi not an isa_irq\n x86, acpi/irq: Introduce apci_isa_irq_to_gsi\n" }, { "commit": "41d59102e146a4423a490b8eca68a5860af4fe1c", "tree": "739ed4113ccdaeb33d1723a6beab09c1e18d7048", "parents": [ "3e1dd193edefd2a806a0ba6cf0879cf1a95217da", "c9775b4cc522e5f1b40b1366a993f0f05f600f39" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:58:16 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:58:16 2010 -0700" }, "message": "Merge branch \u0027x86-fpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-fpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, fpu: Use static_cpu_has() to implement use_xsave()\n x86: Add new static_cpu_has() function using alternatives\n x86, fpu: Use the proper asm constraint in use_xsave()\n x86, fpu: Unbreak FPU emulation\n x86: Introduce \u0027struct fpu\u0027 and related API\n x86: Eliminate TS_XSAVE\n x86-32: Don\u0027t set ignore_fpu_irq in simd exception\n x86: Merge kernel_math_error() into math_error()\n x86: Merge simd_math_error() into math_error()\n x86-32: Rework cache flush denied handler\n\nFix trivial conflict in arch/x86/kernel/process.c\n" }, { "commit": "07d77759c95d899b84f8e473a01cff001019dd5f", "tree": "d039fa6b38475868ebf2bd63ec14f49031d3f0b2", "parents": [ "b7723f9d21d8d6043e63f5e3e412f321f5f1900c", "3998d095354d2a3062bdaa821ef07a1e1c82873c" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:49:13 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:49:13 2010 -0700" }, "message": "Merge branch \u0027x86-cpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-cpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, hypervisor: add missing \u003clinux/module.h\u003e\n Modify the VMware balloon driver for the new x86_hyper API\n x86, hypervisor: Export the x86_hyper* symbols\n x86: Clean up the hypervisor layer\n x86, HyperV: fix up the license to mshyperv.c\n x86: Detect running on a Microsoft HyperV system\n x86, cpu: Make APERF/MPERF a normal table-driven flag\n x86, k8: Fix build error when K8_NB is disabled\n x86, cacheinfo: Disable index in all four subcaches\n x86, cacheinfo: Make L3 cache info per node\n x86, cacheinfo: Reorganize AMD L3 cache structure\n x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments\n x86, cacheinfo: Unify AMD L3 cache index disable checking\n cpufreq: Unify sysfs attribute definition macros\n powernow-k8: Fix frequency reporting\n x86, cpufreq: Add APERF/MPERF support for AMD processors\n x86: Unify APERF/MPERF support\n powernow-k8: Add core performance boost support\n x86, cpu: Add AMD core boosting feature flag to /proc/cpuinfo\n\nFix up trivial conflicts in arch/x86/kernel/cpu/intel_cacheinfo.c and\ndrivers/cpufreq/cpufreq_ondemand.c\n" }, { "commit": "b7723f9d21d8d6043e63f5e3e412f321f5f1900c", "tree": "984098e5c060600e90e62f1b101593805f7cb2e9", "parents": [ "93c9d7f60c0cb7715890b1f9e159da6f4d1f5a65", "6fc108a08dcddf8f9113cc7102ddaacf7ed37a6b" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:40:21 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:40:21 2010 -0700" }, "message": "Merge branch \u0027x86-cleanups-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-cleanups-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86: Clean up arch/x86/Kconfig*\n x86-64: Don\u0027t export init_level4_pgt\n" }, { "commit": "93c9d7f60c0cb7715890b1f9e159da6f4d1f5a65", "tree": "6be428ca5fe52f14ebb78a8e695cec59d2f21c26", "parents": [ "7421a10de7a525f67cc082fca7a91011d00eada4", "d9c5841e22231e4e49fd0a1004164e6fce59b7a6" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:40:05 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:40:05 2010 -0700" }, "message": "Merge branch \u0027x86-atomic-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-atomic-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86: Fix LOCK_PREFIX_HERE for uniprocessor build\n x86, atomic64: In selftest, distinguish x86-64 from 586+\n x86-32: Fix atomic64_inc_not_zero return value convention\n lib: Fix atomic64_inc_not_zero test\n lib: Fix atomic64_add_unless return value convention\n x86-32: Fix atomic64_add_unless return value convention\n lib: Fix atomic64_add_unless test\n x86: Implement atomic[64]_dec_if_positive()\n lib: Only test atomic64_dec_if_positive on archs having it\n x86-32: Rewrite 32-bit atomic64 functions in assembly\n lib: Add self-test for atomic64_t\n x86-32: Allow UP/SMP lock replacement in cmpxchg64\n x86: Add support for lock prefix in alternatives\n" }, { "commit": "7421a10de7a525f67cc082fca7a91011d00eada4", "tree": "6b4509858003c6cf140e223e1dcc4250def2c75c", "parents": [ "752f114fb83c5839de37a250b4f8257ed5438341", "9e565292270a2d55524be38835104c564ac8f795" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:35:37 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:35:37 2010 -0700" }, "message": "Merge branch \u0027x86-asm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-asm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86: Use .cfi_sections for assembly code\n x86-64: Reduce SMP locks table size\n x86, asm: Introduce and use percpu_inc()\n" }, { "commit": "4d7b4ac22fbec1a03206c6cde353f2fd6942f828", "tree": "2d96a9e9c28cf6fa628a278decc00ad55a8b043b", "parents": [ "3aaf51ace5975050ab43c7d4d7e439e0ae7d13d7", "94f3ca95787ada3d64339a4ecb2754236ab563f6" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:19:03 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:19:03 2010 -0700" }, "message": "Merge branch \u0027perf-core-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027perf-core-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (311 commits)\n perf tools: Add mode to build without newt support\n perf symbols: symbol inconsistency message should be done only at verbose\u003d1\n perf tui: Add explicit -lslang option\n perf options: Type check all the remaining OPT_ variants\n perf options: Type check OPT_BOOLEAN and fix the offenders\n perf options: Check v type in OPT_U?INTEGER\n perf options: Introduce OPT_UINTEGER\n perf tui: Add workaround for slang \u003c 2.1.4\n perf record: Fix bug mismatch with -c option definition\n perf options: Introduce OPT_U64\n perf tui: Add help window to show key associations\n perf tui: Make \u003c- exit menus too\n perf newt: Add single key shortcuts for zoom into DSO and threads\n perf newt: Exit browser unconditionally when CTRL+C, q or Q is pressed\n perf newt: Fix the \u0027A\u0027/\u0027a\u0027 shortcut for annotate\n perf newt: Make \u003c- exit the ui_browser\n x86, perf: P4 PMU - fix counters management logic\n perf newt: Make \u003c- zoom out filters\n perf report: Report number of events, not samples\n perf hist: Clarify events_stats fields usage\n ...\n\nFix up trivial conflicts in kernel/fork.c and tools/perf/builtin-record.c\n" }, { "commit": "1014cfe2fb4cdd663137aafb21448cb613dd6a7d", "tree": "13b5fc4e7036b4226d94bd33aefb74a3dbb25b6a", "parents": [ "8123d8f17d8ba9d67e556688e4f025456ca97842", "4726f2a617ebd868a4fdeb5679613b897e5f1676" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:17:35 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 08:17:35 2010 -0700" }, "message": "Merge branch \u0027core-locking-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027core-locking-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n lockdep: Reduce stack_trace usage\n lockdep: No need to disable preemption in debug atomic ops\n lockdep: Actually _dec_ in debug_atomic_dec\n lockdep: Provide off case for redundant_hardirqs_on increment\n lockdep: Simplify debug atomic ops\n lockdep: Fix redundant_hardirqs_on incremented with irqs enabled\n lockstat: Make lockstat counting per cpu\n i8253: Convert i8253_lock to raw_spinlock\n" }, { "commit": "8123d8f17d8ba9d67e556688e4f025456ca97842", "tree": "1d15088a32644e464ad3536ad7bec775050065eb", "parents": [ "06ee772043c7ad125f2c2e6a08dc563706f39e8d", "795e74f7a69f9c08afa4fa7c86cc4f18a62bd630" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 07:22:37 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 18 07:22:37 2010 -0700" }, "message": "Merge branch \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86/amd-iommu: Add amd_iommu\u003doff command line option\n iommu-api: Remove iommu_{un}map_range functions\n x86/amd-iommu: Implement -\u003e{un}map callbacks for iommu-api\n x86/amd-iommu: Make amd_iommu_iova_to_phys aware of multiple page sizes\n x86/amd-iommu: Make iommu_unmap_page and fetch_pte aware of page sizes\n x86/amd-iommu: Make iommu_map_page and alloc_pte aware of page sizes\n kvm: Change kvm_iommu_map_pages to map large pages\n VT-d: Change {un}map_range functions to implement {un}map interface\n iommu-api: Add -\u003e{un}map callbacks to iommu_ops\n iommu-api: Add iommu_map and iommu_unmap functions\n iommu-api: Rename -\u003e{un}map function pointers to -\u003e{un}map_range\n" }, { "commit": "fea24e28c663e62663097f0ed3b8ff1f9a87f15e", "tree": "08ff53a480caaeecb8b8b32a069eaba6fd1c4008", "parents": [ "e4af4268a34d8cd28c46a03161fc017cbd2db887" ], "author": { "name": "Jacob Pan", "email": "jacob.jun.pan@linux.intel.com", "time": "Fri May 14 14:41:20 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Sun May 16 22:47:41 2010 -0700" }, "message": "x86, mrst: add nop functions to x86_init mpparse functions\n\nMoorestown does not have BIOS provided MP tables, we can save some time\nby avoiding scaning of these tables. e.g.\n[ 0.000000] Scan SMP from c0000000 for 1024 bytes.\n[ 0.000000] Scan SMP from c009fc00 for 1024 bytes.\n[ 0.000000] Scan SMP from c00f0000 for 65536 bytes.\n[ 0.000000] Scan SMP from c00bfff0 for 1024 bytes.\n\nSearching EBDA with the base at 0x40E will also result in random pointer\ndeferencing within 1MB. This can be a problem in Lincroft if the pointer\nhits VGA area and VGA mode is not enabled.\n\nSigned-off-by: Jacob Pan \u003cjacob.jun.pan@linux.intel.com\u003e\nLKML-Reference: \u003c1273873281-17489-8-git-send-email-jacob.jun.pan@linux.intel.com\u003e\nAcked-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n" }, { "commit": "1ff3d7d79204612ebe2e611d2592f8898908ca00", "tree": "666a907c25cc9ebeff05dfe982b5d480f42f64ad", "parents": [ "5d2be7cb198a0a6bc6088d3806fb7261b184ad89" ], "author": { "name": "Cyrill Gorcunov", "email": "gorcunov@gmail.com", "time": "Fri May 14 23:08:15 2010 +0400" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat May 15 08:38:55 2010 +0200" }, "message": "x86, perf: P4 PMU - fix counters management logic\n\nJaswinder reported this #GP:\n\n |\n | Message from syslogd@ht at May 14 09:39:32 ...\n | kernel:[ 314.908612] EIP: [\u003cc100ccca\u003e]\n | x86_perf_event_set_period+0x19d/0x1b2 SS:ESP 0068:edac3d70\n |\n\nMing has narrowed it down to a comparision issue\nbetween arguments with different sizes and\nsigns. As result event index reached a wrong\nvalue which in turn led to a GP fault.\n\nAt the same time it was found that p4_next_cntr\nhas broken logic and should return the counter\nindex only if it was not yet borrowed for\nanother event.\n\nReported-by: Jaswinder Singh Rajput \u003cjaswinderlinux@gmail.com\u003e\nReported-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nBisected-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nTested-by: Jaswinder Singh Rajput \u003cjaswinderlinux@gmail.com\u003e\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCC: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCC: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nLKML-Reference: \u003c20100514190815.GG13509@lenovo\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "ef0e9180d3589ad35eefe9be6b239f32719fd548", "tree": "16faa86808117bbc87f532b06bd727f27442daba", "parents": [ "4fc4c3ce0dc1096cbd0daa3fe8f6905cbec2b87e", "7f284d3cc96e02468a42e045f77af11e5ff8b095" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 14 12:20:09 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 14 12:20:09 2010 -0700" }, "message": "Merge branch \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments\n x86, k8: Fix build error when K8_NB is disabled\n x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs\n x86: Fix fake apicid to node mapping for numa emulation\n" }, { "commit": "7f284d3cc96e02468a42e045f77af11e5ff8b095", "tree": "7cb25ec2b39c922d8bffb48953957cc43c94ea90", "parents": [ "ade029e2aaacc8965a548b0b0f80c5bee97ffc68" ], "author": { "name": "Frank Arnold", "email": "frank.arnold@amd.com", "time": "Thu Apr 22 16:06:59 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Fri May 14 11:53:01 2010 -0700" }, "message": "x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments\n\nWhen running a quest kernel on xen we get:\n\nBUG: unable to handle kernel NULL pointer dereference at 0000000000000038\nIP: [\u003cffffffff8142f2fb\u003e] cpuid4_cache_lookup_regs+0x2ca/0x3df\nPGD 0\nOops: 0000 [#1] SMP\nlast sysfs file:\nCPU 0\nModules linked in:\n\nPid: 0, comm: swapper Tainted: G W 2.6.34-rc3 #1 /HVM domU\nRIP: 0010:[\u003cffffffff8142f2fb\u003e] [\u003cffffffff8142f2fb\u003e] cpuid4_cache_lookup_regs+0x\n2ca/0x3df\nRSP: 0018:ffff880002203e08 EFLAGS: 00010046\nRAX: 0000000000000000 RBX: 0000000000000003 RCX: 0000000000000060\nRDX: 0000000000000000 RSI: 0000000000000040 RDI: 0000000000000000\nRBP: ffff880002203ed8 R08: 00000000000017c0 R09: ffff880002203e38\nR10: ffff8800023d5d40 R11: ffffffff81a01e28 R12: ffff880187e6f5c0\nR13: ffff880002203e34 R14: ffff880002203e58 R15: ffff880002203e68\nFS: 0000000000000000(0000) GS:ffff880002200000(0000) knlGS:0000000000000000\nCS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b\nCR2: 0000000000000038 CR3: 0000000001a3c000 CR4: 00000000000006f0\nDR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000\nDR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400\nProcess swapper (pid: 0, threadinfo ffffffff81a00000, task ffffffff81a44020)\nStack:\n ffffffff810d7ecb ffff880002203e20 ffffffff81059140 ffff880002203e30\n\u003c0\u003e ffffffff810d7ec9 0000000002203e40 000000000050d140 ffff880002203e70\n\u003c0\u003e 0000000002008140 0000000000000086 ffff880040020140 ffffffff81068b8b\nCall Trace:\n \u003cIRQ\u003e\n [\u003cffffffff810d7ecb\u003e] ? sync_supers_timer_fn+0x0/0x1c\n [\u003cffffffff81059140\u003e] ? mod_timer+0x23/0x25\n [\u003cffffffff810d7ec9\u003e] ? arm_supers_timer+0x34/0x36\n [\u003cffffffff81068b8b\u003e] ? hrtimer_get_next_event+0xa7/0xc3\n [\u003cffffffff81058e85\u003e] ? get_next_timer_interrupt+0x19a/0x20d\n [\u003cffffffff8142fa23\u003e] get_cpu_leaves+0x5c/0x232\n [\u003cffffffff8106a7b1\u003e] ? sched_clock_local+0x1c/0x82\n [\u003cffffffff8106a9a0\u003e] ? sched_clock_tick+0x75/0x7a\n [\u003cffffffff8107748c\u003e] generic_smp_call_function_single_interrupt+0xae/0xd0\n [\u003cffffffff8101f6ef\u003e] smp_call_function_single_interrupt+0x18/0x27\n [\u003cffffffff8100a773\u003e] call_function_single_interrupt+0x13/0x20\n \u003cEOI\u003e\n [\u003cffffffff8143c468\u003e] ? notifier_call_chain+0x14/0x63\n [\u003cffffffff810295c6\u003e] ? native_safe_halt+0xc/0xd\n [\u003cffffffff810114eb\u003e] ? default_idle+0x36/0x53\n [\u003cffffffff81008c22\u003e] cpu_idle+0xaa/0xe4\n [\u003cffffffff81423a9a\u003e] rest_init+0x7e/0x80\n [\u003cffffffff81b10dd2\u003e] start_kernel+0x40e/0x419\n [\u003cffffffff81b102c8\u003e] x86_64_start_reservations+0xb3/0xb7\n [\u003cffffffff81b103c4\u003e] x86_64_start_kernel+0xf8/0x107\nCode: 14 d5 40 ff ae 81 8b 14 02 31 c0 3b 15 47 1c 8b 00 7d 0e 48 8b 05 36 1c 8b\n 00 48 63 d2 48 8b 04 d0 c7 85 5c ff ff ff 00 00 00 00 \u003c8b\u003e 70 38 48 8d 8d 5c ff\n ff ff 48 8b 78 10 ba c4 01 00 00 e8 eb\nRIP [\u003cffffffff8142f2fb\u003e] cpuid4_cache_lookup_regs+0x2ca/0x3df\n RSP \u003cffff880002203e08\u003e\nCR2: 0000000000000038\n---[ end trace a7919e7f17c0a726 ]---\n\nThe L3 cache index disable feature of AMD CPUs has to be disabled if the\nkernel is running as guest on top of a hypervisor because northbridge\ndevices are not available to the guest. Currently, this fixes a boot\ncrash on top of Xen. In the future this will become an issue on KVM as\nwell.\n\nCheck if northbridge devices are present and do not enable the feature\nif there are none.\n\n[ hpa: backported to 2.6.34 ]\n\nSigned-off-by: Frank Arnold \u003cfrank.arnold@amd.com\u003e\nLKML-Reference: \u003c1271945222-5283-3-git-send-email-bp@amd64.org\u003e\nAcked-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: \u003cstable@kernel.org\u003e\n" }, { "commit": "f01487119dda3d9f58c9729c7361ecc50a61c188", "tree": "bbd1d01429950207716337fbbd9e9f356560258c", "parents": [ "b0c4d952a158a6a2547672cf4fc9d55e415410de" ], "author": { "name": "Andreas Herrmann", "email": "herrmann.der.user@googlemail.com", "time": "Tue Apr 27 12:13:48 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Thu May 13 16:21:20 2010 -0700" }, "message": "x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs\n\nIf host CPU is exposed to a guest the OSVW MSRs are not guaranteed\nto be present and a GP fault occurs. Thus checking the feature flag is\nessential.\n\nCc: \u003cstable@kernel.org\u003e # .32.x .33.x\nSigned-off-by: Andreas Herrmann \u003candreas.herrmann3@amd.com\u003e\nLKML-Reference: \u003c20100427101348.GC4489@alberich.amd.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n" }, { "commit": "720019908fd5a1bb442bb0a35a6027ba21864d25", "tree": "b6a637a752f67061403664ec28c5c587c544b01c", "parents": [ "975fc2d5f20b071576e7c9920c4f1a1eae80f88d" ], "author": { "name": "Cyrill Gorcunov", "email": "gorcunov@openvz.org", "time": "Wed May 12 21:42:42 2010 +0400" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu May 13 08:51:13 2010 +0200" }, "message": "x86, perf: P4 PMU -- use hash for p4_get_escr_idx()\n\nLinear search over all p4 MSRs should be fine if only\nwe would not use it in events scheduling routine which\nis pretty time critical. Lets use hashes. It should speed\nscheduling up significantly.\n\nv2: Steven proposed to use more gentle approach than issue\n BUG on error, so we use WARN_ONCE now\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Steven Rostedt \u003crostedt@goodmis.org\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Lin Ming \u003cming.m.lin@intel.com\u003e\nLKML-Reference: \u003c20100512174242.GA5190@lenovo\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "795e74f7a69f9c08afa4fa7c86cc4f18a62bd630", "tree": "8448ece35101d8db945c49df50d0d5889687de9f", "parents": [ "a52357259680fe5368c2fabf5949209e231f2aa2", "12c7389abe5786349d3ea6da1961cf78d0c1c7cd" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue May 11 17:40:57 2010 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue May 11 17:40:57 2010 +0200" }, "message": "Merge branch \u0027iommu/largepages\u0027 into amd-iommu/2.6.35\n\nConflicts:\n\tarch/x86/kernel/amd_iommu.c\n" }, { "commit": "a52357259680fe5368c2fabf5949209e231f2aa2", "tree": "d29e61c3d2f4a01dd17b381762b81c0196045b01", "parents": [ "b57f95a38233a2e73b679bea4a5453a1cc2a1cc9" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue May 11 17:12:33 2010 +0200" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Tue May 11 17:12:33 2010 +0200" }, "message": "x86/amd-iommu: Add amd_iommu\u003doff command line option\n\nThis patch adds a command line option to tell the AMD IOMMU\ndriver to not initialize any IOMMU it finds.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "829e92458532b1dbfeb972435d45bb060cdbf5a3", "tree": "755f5c5e590aec21730afc2bcd680629fe075770", "parents": [ "de068ec048f807d4f62b7dda100c23a1365f086f" ], "author": { "name": "Masami Hiramatsu", "email": "mhiramat@redhat.com", "time": "Tue Apr 27 18:33:49 2010 -0400" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue May 11 09:14:25 2010 +0200" }, "message": "kprobes/x86: Fix removed int3 checking order\n\nFix kprobe/x86 to check removed int3 when failing to get kprobe\nfrom hlist. Since we have a time window between checking int3\nexists on probed address and getting kprobe on that address,\nwe can have following scenario:\n\n -------\n CPU1 CPU2\n hit int3\n check int3 exists\n remove int3\n remove kprobe from hlist\n get kprobe from hlist\n no kprobe-\u003eOOPS!\n -------\n\nThis patch moves int3 checking if there is no kprobe on that\naddress for fixing this problem as follows:\n\n ------\n CPU1 CPU2\n hit int3\n remove int3\n remove kprobe from hlist\n get kprobe from hlist\n no kprobe-\u003echeck int3 exists\n -\u003erollback\u0026retry\n ------\n\nSigned-off-by: Masami Hiramatsu \u003cmhiramat@redhat.com\u003e\nAcked-by: Ananth N Mavinakayanahalli \u003cananth@in.ibm.com\u003e\nCc: systemtap \u003csystemtap@sources.redhat.com\u003e\nCc: DLE \u003cdle-develop@lists.sourceforge.net\u003e\nCc: Dave Anderson \u003canderson@redhat.com\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Mike Galbraith \u003cefault@gmx.de\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Arnaldo Carvalho de Melo \u003cacme@redhat.com\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nLKML-Reference: \u003c20100427223348.2322.9112.stgit@localhost6.localdomain6\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "86603283326c9e95e5ad4e9fdddeec93cac5d9ad", "tree": "1a26a37434e920f9519b547814a1a9af35022de8", "parents": [ "c9ad488289144ae5ef53b012e15895ef1f5e4bb6" ], "author": { "name": "Avi Kivity", "email": "avi@redhat.com", "time": "Thu May 06 11:45:46 2010 +0300" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon May 10 10:48:55 2010 -0700" }, "message": "x86: Introduce \u0027struct fpu\u0027 and related API\n\nCurrently all fpu state access is through tsk-\u003ethread.xstate. Since we wish\nto generalize fpu access to non-task contexts, wrap the state in a new\n\u0027struct fpu\u0027 and convert existing access to use an fpu API.\n\nSignal frame handlers are not converted to the API since they will remain\ntask context only things.\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\nAcked-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLKML-Reference: \u003c1273135546-29690-3-git-send-email-avi@redhat.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "c9ad488289144ae5ef53b012e15895ef1f5e4bb6", "tree": "06c29cda09e204d3b0b5b3d9a2a97bda0b4e340d", "parents": [ "250825008f1f94887bc039e9227a8adfb5ba366e" ], "author": { "name": "Avi Kivity", "email": "avi@redhat.com", "time": "Thu May 06 11:45:45 2010 +0300" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon May 10 10:39:33 2010 -0700" }, "message": "x86: Eliminate TS_XSAVE\n\nThe fpu code currently uses current-\u003ethread_info-\u003estatus \u0026 TS_XSAVE as\na way to distinguish between XSAVE capable processors and older processors.\nThe decision is not really task specific; instead we use the task status to\navoid a global memory reference - the value should be the same across all\nthreads.\n\nEliminate this tie-in into the task structure by using an alternative\ninstruction keyed off the XSAVE cpu feature; this results in shorter and\nfaster code, without introducing a global memory reference.\n\n[ hpa: in the future, this probably should use an asm jmp ]\n\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\nAcked-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nLKML-Reference: \u003c1273135546-29690-2-git-send-email-avi@redhat.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "3998d095354d2a3062bdaa821ef07a1e1c82873c", "tree": "fc51a0cfe2e96f8a1fd52cc1f68af07974307843", "parents": [ "a10a569806e43b9be5fce60b21f836b50b1010e4" ], "author": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Sun May 09 22:46:54 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Sun May 09 22:46:54 2010 -0700" }, "message": "x86, hypervisor: add missing \u003clinux/module.h\u003e\n\nEXPORT_SYMBOL() needs \u003clinux/module.h\u003e to be included; fixes modular\nbuilds of the VMware balloon driver, and any future modular drivers\nwhich depends on the hypervisor.\n\nReported-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Hank Janssen \u003chjanssen@microsoft.com\u003e\nCc: Alok Kataria \u003cakataria@vmware.com\u003e\nCc: Ky Srinivasan \u003cksrinivasan@novell.com\u003e\nCc: Dmitry Torokhov \u003cdtor@vmware.com\u003e\nLKML-Reference: \u003c4BE49778.6060800@zytor.com\u003e\n" }, { "commit": "96f6e775b58687d85ee33004d414419b5ec34106", "tree": "85df676750b9c10608ddf248bf6b5a0afc5a70ee", "parents": [ "d7be0ce6afb1df60bc786f57410407ceae92b994" ], "author": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Sun May 09 01:10:34 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Sun May 09 01:10:34 2010 -0700" }, "message": "x86, hypervisor: Export the x86_hyper* symbols\n\nExport x86_hyper and the related specific structures, allowing for\nhypervisor identification by modules.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Hank Janssen \u003chjanssen@microsoft.com\u003e\nCc: Alok Kataria \u003cakataria@vmware.com\u003e\nCc: Ky Srinivasan \u003cksrinivasan@novell.com\u003e\nCc: Dmitry Torokhov \u003cdtor@vmware.com\u003e\nLKML-Reference: \u003c4BE49778.6060800@zytor.com\u003e\n" }, { "commit": "d7be0ce6afb1df60bc786f57410407ceae92b994", "tree": "5e91acfc12c833531ad3320f274e0cd96a129973", "parents": [ "e08cae4181af9483b04ecfac48f01c8e5a5f27bf", "66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8" ], "author": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Sat May 08 14:59:58 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Sat May 08 14:59:58 2010 -0700" }, "message": "Merge commit \u0027v2.6.34-rc6\u0027 into x86/cpu\n" }, { "commit": "c7993165ef0c1d636ca05f4787739f8414584e6d", "tree": "7db7d2f910bca0945d870bd4075818496cf4d564", "parents": [ "3f51b7119d052827dbb0e40c966acdf2bdc6f47f" ], "author": { "name": "Cyrill Gorcunov", "email": "gorcunov@openvz.org", "time": "Sat May 08 15:25:54 2010 +0400" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat May 08 14:17:53 2010 +0200" }, "message": "x86, perf: P4 PMU -- check for proper event index in RAW events\n\nRAW events are special and we should be ready for user passing\nin insane event index values.\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Lin Ming \u003cming.m.lin@intel.com\u003e\nLKML-Reference: \u003c20100508112717.315897547@openvz.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "3f51b7119d052827dbb0e40c966acdf2bdc6f47f", "tree": "82a204b2f2cc5acec2e0dcae4ec780ed0c97f8b1", "parents": [ "137351e0feeb9f25d99488ee1afc1c79f5499a9a" ], "author": { "name": "Cyrill Gorcunov", "email": "gorcunov@openvz.org", "time": "Sat May 08 15:25:53 2010 +0400" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat May 08 14:17:53 2010 +0200" }, "message": "x86, perf: P4 PMU -- Get rid of redundant check for array index\n\nThe caller already has done such a check.\nAnd it was wrong anyway, it had to be \u0027\u003e\u003d\u0027 rather than \u0027\u003e\u0027\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Lin Ming \u003cming.m.lin@intel.com\u003e\nLKML-Reference: \u003c20100508112717.130386882@openvz.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "137351e0feeb9f25d99488ee1afc1c79f5499a9a", "tree": "4507ec07bbf4ac9c5bb6361f90d0be3a5e989f20", "parents": [ "de902d967feb96f2dfddfbe9dbd69dc22fd5ebcb" ], "author": { "name": "Cyrill Gorcunov", "email": "gorcunov@openvz.org", "time": "Sat May 08 15:25:52 2010 +0400" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat May 08 14:17:53 2010 +0200" }, "message": "x86, perf: P4 PMU -- protect sensible procedures from preemption\n\nSteven reported:\n\n|\n| I\u0027m getting:\n|\n| Pid: 3477, comm: perf Not tainted 2.6.34-rc6 #2727\n| Call Trace:\n| [\u003cffffffff811c7565\u003e] debug_smp_processor_id+0xd5/0xf0\n| [\u003cffffffff81019874\u003e] p4_hw_config+0x2b/0x15c\n| [\u003cffffffff8107acbc\u003e] ? trace_hardirqs_on_caller+0x12b/0x14f\n| [\u003cffffffff81019143\u003e] hw_perf_event_init+0x468/0x7be\n| [\u003cffffffff810782fd\u003e] ? debug_mutex_init+0x31/0x3c\n| [\u003cffffffff810c68b2\u003e] T.850+0x273/0x42e\n| [\u003cffffffff810c6cab\u003e] sys_perf_event_open+0x23e/0x3f1\n| [\u003cffffffff81009e6a\u003e] ? sysret_check+0x2e/0x69\n| [\u003cffffffff81009e32\u003e] system_call_fastpath+0x16/0x1b\n|\n| When running perf record in latest tip/perf/core\n|\n\nDue to the fact that p4 counters are shared between HT threads\nwe synthetically divide the whole set of counters into two\nnon-intersected subsets. And while we\u0027re \"borrowing\" counters\nfrom these subsets we should not be preempted (well, strictly\nspeaking in p4_hw_config we just pre-set reference to the\nsubset which allow to save some cycles in schedule routine\nif it happens on the same cpu). So use get_cpu/put_cpu pair.\n\nAlso p4_pmu_schedule_events should use smp_processor_id rather\nthan raw_ version. This allow us to catch up preemption issue\n(if there will ever be).\n\nReported-by: Steven Rostedt \u003crostedt@goodmis.org\u003e\nTested-by: Steven Rostedt \u003crostedt@goodmis.org\u003e\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Steven Rostedt \u003crostedt@goodmis.org\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Lin Ming \u003cming.m.lin@intel.com\u003e\nLKML-Reference: \u003c20100508112716.963478928@openvz.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "de902d967feb96f2dfddfbe9dbd69dc22fd5ebcb", "tree": "f3f22deb11cf38e71cb4f08871a5d4a9e2e074f5", "parents": [ "6e85158cf5a2385264316870256fb6ad681156a0" ], "author": { "name": "Cyrill Gorcunov", "email": "gorcunov@openvz.org", "time": "Sat May 08 15:39:52 2010 +0400" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat May 08 14:17:52 2010 +0200" }, "message": "x86, perf: P4 PMU -- configure predefined events\n\nIf an event is not RAW we should not exit p4_hw_config\nearly but call x86_setup_perfctr as well.\n\nSigned-off-by: Cyrill Gorcunov \u003cgorcunov@openvz.org\u003e\nCc: Peter Zijlstra \u003cpeterz@infradead.org\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Lin Ming \u003cming.m.lin@intel.com\u003e\nCc: Robert Richter \u003crobert.richter@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "e08cae4181af9483b04ecfac48f01c8e5a5f27bf", "tree": "2cab8da747a6524694cc19f247d8bc4f157a601c", "parents": [ "9fa02317429449e8176c9bb6da3ac00eb14d52d3" ], "author": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri May 07 16:57:28 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri May 07 17:13:04 2010 -0700" }, "message": "x86: Clean up the hypervisor layer\n\nClean up the hypervisor layer and the hypervisor drivers, using an ops\nstructure instead of an enumeration with if statements.\n\nThe identity of the hypervisor, if needed, can be tested by testing\nthe pointer value in x86_hyper.\n\nThe MS-HyperV private state is moved into a normal global variable\n(it\u0027s per-system state, not per-CPU state). Being a normal bss\nvariable, it will be left at all zero on non-HyperV platforms, and so\ncan generally be tested for HyperV-specific features without\nadditional qualification.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nAcked-by: Greg KH \u003cgreg@kroah.com\u003e\nCc: Hank Janssen \u003chjanssen@microsoft.com\u003e\nCc: Alok Kataria \u003cakataria@vmware.com\u003e\nCc: Ky Srinivasan \u003cksrinivasan@novell.com\u003e\nLKML-Reference: \u003c4BE49778.6060800@zytor.com\u003e\n" }, { "commit": "9fa02317429449e8176c9bb6da3ac00eb14d52d3", "tree": "38578cbb0c0e28773ca5992768d900ff2ec77f92", "parents": [ "a2a47c6c3d1a7c01da4464b3b7be93b924f874c1" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri May 07 16:55:41 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri May 07 17:00:25 2010 -0700" }, "message": "x86, HyperV: fix up the license to mshyperv.c\n\nThis should have been GPLv2 only, we cut and pasted from the wrong file\noriginally, sorry.\n\nAlso removed some unneeded boilerplate license code, we all know where\nto find the GPLv2, and that there\u0027s no warranty as that is implicit from\nthe license.\n\nCc: Ky Srinivasan \u003cksrinivasan@novell.com\u003e\nCc: Hank Janssen \u003chjanssen@microsoft.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nLKML-Reference: \u003c20100507235541.GA15448@kroah.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "2b107d93635616db0c3f893c8cc2e6d5cd8d77b2", "tree": "c0398294e48d974887552de739b8e0bdd343b794", "parents": [ "722154e4cacf015161efe60009ae9be23d492296" ], "author": { "name": "Jacob Pan", "email": "jacob.jun.pan@linux.intel.com", "time": "Fri May 07 14:59:45 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri May 07 15:31:17 2010 -0700" }, "message": "x86: Avoid check hlt for newer cpus\n\nCheck hlt instruction was targeted for some older CPUs. It is an expensive\noperation in that it takes 4 ticks to break out the check. We can avoid\nsuch check completely for newer x86 cpus (family \u003e\u003d 5).\n\n[ hpa: corrected family \u003e 5 to family \u003e\u003d 5 ]\n\nSigned-off-by: Jacob Pan \u003cjacob.jun.pan@linux.intel.com\u003e\nLKML-Reference: \u003c1273269585-14346-1-git-send-email-jacob.jun.pan@linux.intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "4d1c52b02d977d884abb21d0bbaba6b5d6bc8374", "tree": "a2c5941951c0a793c50c93ef5de7bce701829f62", "parents": [ "6bde9b6ce0127e2a56228a2071536d422be31336" ], "author": { "name": "Lin Ming", "email": "ming.m.lin@intel.com", "time": "Fri Apr 23 13:56:12 2010 +0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:31:03 2010 +0200" }, "message": "perf, x86: implement group scheduling transactional APIs\n\nConvert to the transactional PMU API and remove the duplication of\ngroup_sched_in().\n\nReviewed-by: Stephane Eranian \u003ceranian@google.com\u003e\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nLKML-Reference: \u003c1272002172.5707.61.camel@minggr.sh.intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "ab608344bcbde4f55ec4cd911b686b0ce3eae076", "tree": "ebd38efabfaab59d6de11a24143d70e1eec36fae", "parents": [ "2b0b5c6fe9b383f3cf35a0a6371c9d577bd523ff" ], "author": { "name": "Peter Zijlstra", "email": "peterz@infradead.org", "time": "Thu Apr 08 23:03:20 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:31:02 2010 +0200" }, "message": "perf, x86: Improve the PEBS ABI\n\nRename perf_event_attr::precise to perf_event_attr::precise_ip and\nwiden it to 2 bits. This new field describes the required precision of\nthe PERF_SAMPLE_IP field:\n\n 0 - SAMPLE_IP can have arbitrary skid\n 1 - SAMPLE_IP must have constant skid\n 2 - SAMPLE_IP requested to have 0 skid\n 3 - SAMPLE_IP must have 0 skid\n\nAnd modify the Intel PEBS code accordingly. The PEBS implementation\nnow supports up to precise_ip \u003d\u003d 2, where we perform the IP fixup.\n\nAlso s/PERF_RECORD_MISC_EXACT/\u0026_IP/ to clarify its meaning, this bit\nshould be set for each PERF_SAMPLE_IP field known to match the actual\ninstruction triggering the event.\n\nThis new scheme allows for a PEBS mode that uses the buffer for more\nthan a single event.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Stephane Eranian \u003ceranian@google.com\u003e\nLKML-Reference: \u003cnew-submission\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "2b0b5c6fe9b383f3cf35a0a6371c9d577bd523ff", "tree": "673509da6a079615cb021eb5772edc472cbfd694", "parents": [ "1e9a6d8d44cb6dcd2799b36ceb23007e6a423bfe" ], "author": { "name": "Peter Zijlstra", "email": "peterz@infradead.org", "time": "Thu Apr 08 23:03:20 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:31:02 2010 +0200" }, "message": "perf, x86: Consolidate some code repetition\n\nRemove some duplicated logic.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003cnew-submission\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "1e9a6d8d44cb6dcd2799b36ceb23007e6a423bfe", "tree": "cc6f1becf1b2807827aea206918648bc2d7b567a", "parents": [ "a1f2b70a942b8d858a0ab02567da3999b60a99b2" ], "author": { "name": "Peter Zijlstra", "email": "a.p.zijlstra@chello.nl", "time": "Tue May 04 16:30:21 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:31:01 2010 +0200" }, "message": "perf, x86: Remove PEBS SAMPLE_RAW support\n\nIts broken, we really should get PERF_SAMPLE_REGS sorted.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003cnew-submission\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "a1f2b70a942b8d858a0ab02567da3999b60a99b2", "tree": "138457e3edf7d670eb0ad977b18a30be0110a355", "parents": [ "31fa58af57c41d2912debf62d47d5811062411f1" ], "author": { "name": "Robert Richter", "email": "robert.richter@amd.com", "time": "Tue Apr 13 22:23:15 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:31:01 2010 +0200" }, "message": "perf, x86: Use weight instead of cmask in for_each_event_constraint()\n\nThere may exist constraints with a cmask set to zero. In this case\nfor_each_event_constraint() will not work properly. Now weight is used\ninstead of the cmask for loop exit detection. Weight is always a value\nother than zero since the default contains the HWEIGHT from the\ncounter mask and in other cases a value of zero does not fit too.\n\nThis is in preparation of ibs event constraints that wont have a\ncmask.\n\nSigned-off-by: Robert Richter \u003crobert.richter@amd.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c1271190201-25705-7-git-send-email-robert.richter@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "31fa58af57c41d2912debf62d47d5811062411f1", "tree": "ebf17783851862e215f9f0ec966d7f4d85e15614", "parents": [ "9d0fcba67e47ff398a6fa86476d4884d472dc98a" ], "author": { "name": "Robert Richter", "email": "robert.richter@amd.com", "time": "Tue Apr 13 22:23:14 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:31:00 2010 +0200" }, "message": "perf, x86: Pass enable bit mask to __x86_pmu_enable_event()\n\nTo reuse this function for events with different enable bit masks,\nthis mask is part of the function\u0027s argument list now.\n\nThe function will be used later to control ibs events too.\n\nSigned-off-by: Robert Richter \u003crobert.richter@amd.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c1271190201-25705-6-git-send-email-robert.richter@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "9d0fcba67e47ff398a6fa86476d4884d472dc98a", "tree": "f8cd48d55b5668f0a8e0b22f0c17d3e9fefc9876", "parents": [ "c1726f343b3bfc2ee037e191907c632a31903021" ], "author": { "name": "Robert Richter", "email": "robert.richter@amd.com", "time": "Tue Apr 13 22:23:12 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:31:00 2010 +0200" }, "message": "perf, x86: Call x86_setup_perfctr() from .hw_config()\n\nThe perfctr setup calls are in the corresponding .hw_config()\nfunctions now. This makes it possible to introduce config functions\nfor other pmu events that are not perfctr specific.\n\nAlso, all of a sudden the code looks much nicer.\n\nSigned-off-by: Robert Richter \u003crobert.richter@amd.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c1271190201-25705-4-git-send-email-robert.richter@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "c1726f343b3bfc2ee037e191907c632a31903021", "tree": "da77ad3da17ac80df0af1473d1dd91beff33548f", "parents": [ "4261e0e0efd9e04b6c69e0773c3cf4d6f337c416" ], "author": { "name": "Robert Richter", "email": "robert.richter@amd.com", "time": "Tue Apr 13 22:23:11 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:31:00 2010 +0200" }, "message": "perf, x86: Move x86_setup_perfctr()\n\nMove x86_setup_perfctr(), no other changes made.\n\nSigned-off-by: Robert Richter \u003crobert.richter@amd.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c1271190201-25705-3-git-send-email-robert.richter@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "4261e0e0efd9e04b6c69e0773c3cf4d6f337c416", "tree": "47651cefd3e6c89a7acdc2d16d40cc7d384d3231", "parents": [ "a0507c84bf47dfd204299774f45fd16da33f0619" ], "author": { "name": "Robert Richter", "email": "robert.richter@amd.com", "time": "Tue Apr 13 22:23:10 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:30:59 2010 +0200" }, "message": "perf, x86: Move perfctr init code to x86_setup_perfctr()\n\nSplit __hw_perf_event_init() to configure pmu events other than\nperfctrs. Perfctr code is moved to a separate function\nx86_setup_perfctr(). This and the following patches refactor the code.\n\nSplit in multiple patches for better review.\n\nSigned-off-by: Robert Richter \u003crobert.richter@amd.com\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nLKML-Reference: \u003c1271190201-25705-2-git-send-email-robert.richter@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "cce913178118b0b36742eb7544c2b38a0c957ee7", "tree": "25a6d7b4e01fea2932e6e2962a75f7a3d8c19a4f", "parents": [ "d9f599e1e6d019968b35d2dc63074b9e8964fa69", "4fd38e4595e2f6c9d27732c042a0e16b2753049c" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:30:29 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri May 07 11:30:30 2010 +0200" }, "message": "Merge branch \u0027perf/urgent\u0027 into perf/core\n\nMerge reason: Resolve patch dependency\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "a2a47c6c3d1a7c01da4464b3b7be93b924f874c1", "tree": "e647047bb37cce40777bf29c4aef8f92a56cdad8", "parents": [ "097c1bd5673edaf2a162724636858b71f658fdd2" ], "author": { "name": "Ky Srinivasan", "email": "ksrinivasan@novell.com", "time": "Thu May 06 12:08:41 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Thu May 06 18:24:15 2010 -0700" }, "message": "x86: Detect running on a Microsoft HyperV system\n\nThis patch integrates HyperV detection within the framework currently\nused by VmWare. With this patch, we can avoid having to replicate the\nHyperV detection code in each of the Microsoft HyperV drivers.\n\nReworked and tweaked by Greg K-H to build properly.\n\nSigned-off-by: K. Y. Srinivasan \u003cksrinivasan@novell.com\u003e\nLKML-Reference: \u003c20100506190841.GA1605@kroah.com\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Vadim Rozenfeld \u003cvrozenfe@redhat.com\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\nCc: Gleb Natapov \u003cgleb@redhat.com\u003e\nCc: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nCc: \"K.Prasad\" \u003cprasad@linux.vnet.ibm.com\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Stephane Eranian \u003ceranian@google.com\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Alan Cox \u003calan@linux.intel.com\u003e\nCc: Haiyang Zhang \u003chaiyangz@microsoft.com\u003e\nCc: Hank Janssen \u003chjanssen@microsoft.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "7b20bd5fb902088579af4e70f7f802b93181a628", "tree": "f31e9c820c28caad15cb9aa6b1a9a139aefbdd39", "parents": [ "988856ee1623bd37e384105f7bb2b7fe44c009f6" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:16 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:35:20 2010 -0700" }, "message": "x86, irq: Kill io_apic_renumber_irq\n\nNow that the generic irq layer is performing the exact same remapping as\nio_apic_renumber_irq we can kill this weird es7000 specific function.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-15-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "988856ee1623bd37e384105f7bb2b7fe44c009f6", "tree": "399f084e7fcddd680b3873a4c9dc6b554405a867", "parents": [ "4afc51a835d3aeba11c35090f524e05c84586d27" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:15 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:35:17 2010 -0700" }, "message": "x86, acpi/irq: Handle isa irqs that are not identity mapped to gsi\u0027s.\n\nACPI irq source overrides are allowed for the 16 isa irqs and are\nallowed to map any gsi to any isa irq. A few motherboards have been\nseen to take advantage of this and put the isa irqs on the 2nd or\n3rd ioapic. This causes some problems, most notably the fact\nthat we can not use any gsi \u003c 16.\n\nTo correct this move the gsis that are not isa irqs and have\na gsi number \u003c 16 into the linux irq space just past gsi_end.\nThis is what the es7000 platform is doing today. Moving only the\nlow 16 gsis above the rest of the gsi\u0027s only penalizes weird\nplatforms, leaving sane acpi implementations with a 1-1 mapping\nof gsis and irqs.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-14-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "4afc51a835d3aeba11c35090f524e05c84586d27", "tree": "e7858e2c41b1736a6ea659e2cf6764d1ff3a4686", "parents": [ "d464207c4fdd70c2a0febd4f9c58206fa915bb36" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:14 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:35:11 2010 -0700" }, "message": "x86, ioapic: Simplify probe_nr_irqs_gsi.\n\nUse the global gsi_end value now that all ioapics have\nvalid gsi numbers instead of a combination of acpi_probe_gsi\nand walking all of the ioapics and couting their number of\nentries by hand if acpi_probe_gsi gave us an answer we did\nnot like.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-13-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "d464207c4fdd70c2a0febd4f9c58206fa915bb36", "tree": "f0fe275977391a5b7bb7edd839fd15c9b693bd5d", "parents": [ "7716a5c4ff5f1f3dc5e9edcab125cbf7fceef0af" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:13 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:35:08 2010 -0700" }, "message": "x86, ioapic: Optimize pin_2_irq\n\nNow that all ioapics have valid gsi_base values use this to\naccellerate pin_2_irq. In the case of acpi this also ensures\nthat pin_2_irq will compute the same irq value for an ioapic\npin as acpi will.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-12-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "7716a5c4ff5f1f3dc5e9edcab125cbf7fceef0af", "tree": "83dc3248dd5eb9e9c098ae82da8c48a11dc60b42", "parents": [ "cf7500c0ea133d66f8449d86392d83f840102632" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:12 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:35:03 2010 -0700" }, "message": "x86, ioapic: Move nr_ioapic_registers calculation to mp_register_ioapic.\n\nNow that all ioapic registration happens in mp_register_ioapic we can\nmove the calculation of nr_ioapic_registers there from enable_IO_APIC.\nThe number of ioapic registers is already calucated in mp_register_ioapic\nso all that really needs to be done is to save the caluclated value\nin nr_ioapic_registers.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-11-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "cf7500c0ea133d66f8449d86392d83f840102632", "tree": "281028646b01411abb5ce66352cb194527a9291f", "parents": [ "5777372af5c929b8f3c706ed7b295b7279537c88" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:11 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:34:59 2010 -0700" }, "message": "x86, ioapic: In mpparse use mp_register_ioapic\n\nLong ago MP_ioapic_info was the primary way of setting up our\nioapic data structures and mp_register_ioapic was a compatibility\nshim for acpi code. Now the situation is reversed and\nand mp_register_ioapic is the primary way of setting up our\nioapic data structures.\n\nKeep the setting up of ioapic data structures uniform by\nhaving mp_register_ioapic call mp_register_ioapic.\n\nThis changes a few fields:\n\n- type: is now hardset to MP_IOAPIC but type had to\n bey MP_IOAPIC or MP_ioapic_info would not have been called.\n\n- flags: is now hard coded to MPC_APIC_USABLE.\n We require flags to contain at least MPC_APIC_USEBLE in\n MP_ioapic_info and we don\u0027t ever examine flags so dropping\n a few flags that might possibly exist that we have never\n used is harmless.\n\n- apicaddr: Unchanged\n\n- apicver: Read from the ioapic instead of using the cached\n hardware value in the MP table. The real hardware value\n will be more accurate.\n\n- apicid: Now verified to be unique and changed if it is not.\n If the BIOS got this right this is a noop. If the BIOS did\n not fixing things appears to be the better solution.\n\nThis adds gsi_base and gsi_end values to our ioapics defined with\nthe mpatable, which will make our lives simpler later since\nwe can always assume gsi_base and gsi_end are valid.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-10-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "5777372af5c929b8f3c706ed7b295b7279537c88", "tree": "05a81a2c18fabe9a450ba4902f2c0d6ba1986bc7", "parents": [ "eddb0c55a14074d6bac8c2ef169aefd7e2c6f139" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:10 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:34:56 2010 -0700" }, "message": "x86, ioapic: Teach mp_register_ioapic to compute a global gsi_end\n\nAdd the global variable gsi_end and teach mp_register_ioapic\nto keep it uptodate as we add more ioapics into the system.\n\nioapics can only be added early in boot so the code that\nruns later can treat gsi_end as a constant.\n\nRemove the have hacks in sfi.c to second guess mp_register_ioapic\nby keeping t\u0027s own running total of how many gsi\u0027s have been seen,\nand instead use the gsi_end.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-9-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "eddb0c55a14074d6bac8c2ef169aefd7e2c6f139", "tree": "af2b386d675df717647602f5e6ce7bb5ed4f992b", "parents": [ "4b6b19a1c7302477653d799a53d48063dd53d555" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:09 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:34:52 2010 -0700" }, "message": "x86, ioapic: Fix the types of gsi values\n\nThis patches fixes the types of gsi_base and gsi_end values in\nstruct mp_ioapic_gsi, and the gsi parameter of mp_find_ioapic\nand mp_find_ioapic_pin\n\nA gsi is cannonically a u32, not an int.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-8-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "4b6b19a1c7302477653d799a53d48063dd53d555", "tree": "1bce228481fc2ad7d81e8cb636bcc045c53d88ff", "parents": [ "9638fa521e42c9281c874c6b5a382b1ced4ee496" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:08 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:34:48 2010 -0700" }, "message": "x86, ioapic: Fix io_apic_redir_entries to return the number of entries.\n\nio_apic_redir_entries has a huge conceptual bug. It returns the maximum\nredirection entry not the number of redirection entries. Which simply\ndoes not match what the name of the function. This just caught me\nand it caught Feng Tang, and Len Brown when they wrote sfi_parse_ioapic.\n\nModify io_apic_redir_entries to actually return the number of redirection\nentries, and fix the callers so that they properly handle receiving the\nnumber of the number of redirection table entries, instead of the\nnumber of redirection table entries less one.\n\nWhile the usage in sfi.c does not show up in this patch it is fixed\nby virtue of the fact that io_apic_redir_entries now has the semantics\nsfi_parse_ioapic most reasonably expects.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-7-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "0fd52670fb6400be0996ac492b5ed77f3d83d69a", "tree": "72b240783b05b6cd1536a2b445d3bb841229491a", "parents": [ "9d2062b879495649bb525cf7979126da2e45d288" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:06 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:34:38 2010 -0700" }, "message": "x86, acpi/irq: Generalize mp_config_acpi_legacy_irqs\n\nRemove the assumption that there is not an override for isa irq 0.\nInstead lookup the gsi and from that lookup the ioapic and pin of each\nisa irq indivdually.\n\nIn general this should not have any behavioural affect but in\nperverse cases this gets all of the details correct, instead of\ndoing something weird.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-5-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "9d2062b879495649bb525cf7979126da2e45d288", "tree": "aaaac84cb7493a4553fa96b2a46b8a567185ea42", "parents": [ "414d3448dbcb40807a1265ace64b2576ef919fbe" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:05 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:34:34 2010 -0700" }, "message": "x86, acpi/irq: Fix acpi_sci_ioapic_setup so it has both bus_irq and gsi\n\nCurrently acpi_sci_ioapic_setup calls mp_override_legacy_irq with\nbus_irq \u003d\u003d gsi, which is wrong if we are comming from an override\nInstead pass the bus_irq into acpi_sci_ioapic_setup.\n\nThis fix was inspired by a similar fix from:\nYinghai Lu \u003cyinghai@kernel.org\u003e\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-4-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "9a0a91bb56d2915cdb8585717de38376ad20fef9", "tree": "207c5f72fc4f4edc623db1e4440c5325a17ba120", "parents": [ "2c2df8418ac7908eec4558407b83f16739006c54" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:03 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:34:27 2010 -0700" }, "message": "x86, acpi/irq: Teach acpi_get_override_irq to take a gsi not an isa_irq\n\nIn perverse acpi implementations the isa irqs are not identity mapped\nto the first 16 gsi. Furthermore at least the extended interrupt\nresource capability may return gsi\u0027s and not isa irqs. So since\nwhat we get from acpi is a gsi teach acpi_get_overrride_irq to\noperate on a gsi instead of an isa_irq.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-2-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "2c2df8418ac7908eec4558407b83f16739006c54", "tree": "bfd1056e37871bf504f6e2820482e6c2b0a9a0d5", "parents": [ "d93ac51c7a129db7a1431d859a3ef45a0b1f3fc5" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Mar 30 01:07:02 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue May 04 13:34:23 2010 -0700" }, "message": "x86, acpi/irq: Introduce apci_isa_irq_to_gsi\n\nThere are a number of cases where the current code makes the assumption\nthat isa irqs identity map to the first 16 acpi global system intereupts.\nIn most instances that assumption is correct as that is the required\nbehaviour in dual i8259 mode and the default behavior in ioapic mode.\n\nHowever there are some systems out there that take advantage of acpis\ninterrupt remapping for the isa irqs to have a completely different\nmapping of isa_irq to gsi.\n\nIntroduce acpi_isa_irq_to_gsi to perform this mapping explicitly in the\ncode that needs it. Initially this will be just the current assumed\nidentity mapping to ensure it\u0027s introduction does not cause regressions.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nLKML-Reference: \u003c1269936436-7039-1-git-send-email-ebiederm@xmission.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "097c1bd5673edaf2a162724636858b71f658fdd2", "tree": "37d1718e00eea67dbe3c03628bdd6da8041407e1", "parents": [ "d88d95eb1c2a72b6126a550debe0883ff723a948" ], "author": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon May 03 15:49:31 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon May 03 15:49:31 2010 -0700" }, "message": "x86, cpu: Make APERF/MPERF a normal table-driven flag\n\nAPERF/MPERF can be handled via the table like all the other scattered\nCPU flags.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Thomas Renninger \u003ctrenn@suse.de\u003e\nCc: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1270065406-1814-4-git-send-email-bp@amd64.org\u003e\n" }, { "commit": "250825008f1f94887bc039e9227a8adfb5ba366e", "tree": "a107070df2ec321560cc2b5b2a72595a63cdca3e", "parents": [ "e2e75c915de045f0785387dc32f55e92fab0614c" ], "author": { "name": "Brian Gerst", "email": "brgerst@gmail.com", "time": "Sun Mar 21 09:00:46 2010 -0400" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon May 03 13:39:32 2010 -0700" }, "message": "x86-32: Don\u0027t set ignore_fpu_irq in simd exception\n\nAny processor that supports simd will have an internal fpu, and the\nirq13 handler will not be enabled.\n\nSigned-off-by: Brian Gerst \u003cbrgerst@gmail.com\u003e\nLKML-Reference: \u003c1269176446-2489-5-git-send-email-brgerst@gmail.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "e2e75c915de045f0785387dc32f55e92fab0614c", "tree": "35b9683f4694ad34b465155f3e6e07190ba6ca57", "parents": [ "9b6dba9e0798325dab427b9d60c61630ccc39b28" ], "author": { "name": "Brian Gerst", "email": "brgerst@gmail.com", "time": "Sun Mar 21 09:00:45 2010 -0400" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon May 03 13:39:31 2010 -0700" }, "message": "x86: Merge kernel_math_error() into math_error()\n\nClean up the kernel exception handling and make it more similar to\nthe other traps.\n\nSigned-off-by: Brian Gerst \u003cbrgerst@gmail.com\u003e\nLKML-Reference: \u003c1269176446-2489-4-git-send-email-brgerst@gmail.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "9b6dba9e0798325dab427b9d60c61630ccc39b28", "tree": "1c77070ab65422cf051ad05e50b70bdeb4acbce9", "parents": [ "40d2e76315da38993129090dc5d56377e573c312" ], "author": { "name": "Brian Gerst", "email": "brgerst@gmail.com", "time": "Sun Mar 21 09:00:44 2010 -0400" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon May 03 13:39:29 2010 -0700" }, "message": "x86: Merge simd_math_error() into math_error()\n\nThe only difference between FPU and SIMD exceptions is where the\nstatus bits are read from (cwd/swd vs. mxcsr). This also fixes\nthe discrepency introduced by commit adf77bac, which fixed FPU\nbut not SIMD.\n\nSigned-off-by: Brian Gerst \u003cbrgerst@gmail.com\u003e\nLKML-Reference: \u003c1269176446-2489-3-git-send-email-brgerst@gmail.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "40d2e76315da38993129090dc5d56377e573c312", "tree": "8f585daa23780aa0841ac72b34053f9deb00041c", "parents": [ "be1066bbcd443a65df312fdecea7e4959adedb45" ], "author": { "name": "Brian Gerst", "email": "brgerst@gmail.com", "time": "Sun Mar 21 09:00:43 2010 -0400" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Mon May 03 13:39:26 2010 -0700" }, "message": "x86-32: Rework cache flush denied handler\n\nThe cache flush denied error is an erratum on some AMD 486 clones. If an invd\ninstruction is executed in userspace, the processor calls exception 19 (13 hex)\ninstead of #GP (13 decimal). On cpus where XMM is not supported, redirect\nexception 19 to do_general_protection(). Also, remove die_if_kernel(), since\nthis was the last user.\n\nSigned-off-by: Brian Gerst \u003cbrgerst@gmail.com\u003e\nLKML-Reference: \u003c1269176446-2489-2-git-send-email-brgerst@gmail.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "b810e94c9d8e3fff6741b66cd5a6f099a7887871", "tree": "08fdfa940a10eab6fc4b5f0a1729fe8d08b9b834", "parents": [ "56f0e74c9cf98941af700b61466648a2d06277bb" ], "author": { "name": "Mark Langsdorf", "email": "mark.langsdorf@amd.com", "time": "Wed Mar 31 21:56:45 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon May 03 15:04:18 2010 +0200" }, "message": "powernow-k8: Fix frequency reporting\n\nWith F10, model 10, all valid frequencies are in the ACPI _PST table.\n\nCc: \u003cstable@kernel.org\u003e # 33.x 32.x\nSigned-off-by: Mark Langsdorf \u003cmark.langsdorf@amd.com\u003e\nLKML-Reference: \u003c1270065406-1814-6-git-send-email-bp@amd64.org\u003e\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nReviewed-by: Thomas Renninger \u003ctrenn@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "53ba4f2fa73225113a488584df0d85d3cba52943", "tree": "d85b984d9818abc3ccc0237eb53b710d9e96c39e", "parents": [ "bd6d29c25bb1a24a4c160ec5de43e0004e01f72b", "66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon May 03 09:17:01 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon May 03 09:17:01 2010 +0200" }, "message": "Merge commit \u0027v2.6.34-rc6\u0027 into core/locking\n" }, { "commit": "b2812d031dea86926e9c10f7714af33ac2f6b43d", "tree": "a48b18b49fa064e89b7b03e057e46e5a294a8053", "parents": [ "87e9b2024659c614a876ce359a57e98a47b5ef37" ], "author": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Sun Apr 18 18:11:53 2010 +0200" }, "committer": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Sat May 01 04:32:10 2010 +0200" }, "message": "hw-breakpoints: Change/Enforce some breakpoints policies\n\nThe current policies of breakpoints in x86 and SH are the following:\n\n- task bound breakpoints can only break on userspace addresses\n- cpu wide breakpoints can only break on kernel addresses\n\nThe former rule prevents ptrace breakpoints to be set to trigger on\nkernel addresses, which is good. But as a side effect, we can\u0027t\nbreakpoint on kernel addresses for task bound breakpoints.\n\nThe latter rule simply makes no sense, there is no reason why we\ncan\u0027t set breakpoints on userspace while performing cpu bound\nprofiles.\n\nWe want the following new policies:\n\n- task bound breakpoint can set userspace address breakpoints, with\nno particular privilege required.\n- task bound breakpoints can set kernelspace address breakpoints but\nmust be privileged to do that.\n- cpu bound breakpoints can do what they want as they are privileged\nalready.\n\nTo implement these new policies, this patch checks if we are dealing\nwith a kernel address breakpoint, if so and if the exclude_kernel\nparameter is set, we tell the user that the breakpoint is invalid,\nwhich makes a good generic ptrace protection.\nIf we don\u0027t have exclude_kernel, ensure the user has the right\nprivileges as kernel breakpoints are quite sensitive (risk of\ntrap recursion attacks and global performance impacts).\n\n[ Paul Mundt: keep addr space check for sh signal delivery and fix\n double function declaration]\n\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Will Deacon \u003cwill.deacon@arm.com\u003e\nCc: Mahesh Salgaonkar \u003cmahesh@linux.vnet.ibm.com\u003e\nCc: K. Prasad \u003cprasad@linux.vnet.ibm.com\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Jason Wessel \u003cjason.wessel@windriver.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "73266fc1df2f94cf72b3beba3eee3b88ed0b0664", "tree": "876f6ab9c85715665e5c5562d70d9ea2c10facea", "parents": [ "d00a47cce569a3e660a8c9de5d57af28d6a9f0f7" ], "author": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Thu Apr 22 05:05:45 2010 +0200" }, "committer": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Sat May 01 04:32:07 2010 +0200" }, "message": "hw-breakpoints: Tag ptrace breakpoint as exclude_kernel\n\nTag ptrace breakpoints with the exclude_kernel attribute set. This\nwill make it easier to set generic policies on breakpoints, when it\ncomes to ensure nobody unpriviliged try to breakpoint on the kernel.\n\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nAcked-by: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Will Deacon \u003cwill.deacon@arm.com\u003e\nCc: Mahesh Salgaonkar \u003cmahesh@linux.vnet.ibm.com\u003e\nCc: K. Prasad \u003cprasad@linux.vnet.ibm.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "bbd391a15d82e14efe9d69ba64cadb855b061dba", "tree": "fa390e76f76519efd389538f9a12027aaefd7f4d", "parents": [ "e67a807f3d9a82fa91817871f1c0e2e04da993b8" ], "author": { "name": "Prarit Bhargava", "email": "prarit@redhat.com", "time": "Tue Apr 27 11:24:42 2010 -0400" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 30 14:31:38 2010 -0700" }, "message": "x86: Fix NULL pointer access in irq_force_complete_move() for Xen guests\n\nUpstream PV guests fail to boot because of a NULL pointer in\nirq_force_complete_move(). It is possible that xen guests have\nirq_desc-\u003echip_data \u003d NULL.\n\nTest for NULL chip_data pointer before attempting to complete an irq move.\n\nSigned-off-by: Prarit Bhargava \u003cprarit@redhat.com\u003e\nLKML-Reference: \u003c20100427152434.16193.49104.sendpatchset@prarit.bos.redhat.com\u003e\nAcked-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: \u003cstable@kernel.org\u003e [2.6.33]\n" }, { "commit": "3ca50496c2677a2b3fdd3ede86660fd1433beac6", "tree": "97a76d8479a8d8a96e04ed0694b8dbf89457bfcc", "parents": [ "462b04e28a7ec1339c892117c3f20a40e55d0e83", "66f41d4c5c8a5deed66fdcc84509376c9a0bf9d8" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Apr 30 09:56:41 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Apr 30 09:56:44 2010 +0200" }, "message": "Merge commit \u0027v2.6.34-rc6\u0027 into perf/core\n\nMerge reason: update to the latest -rc.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "d9c5841e22231e4e49fd0a1004164e6fce59b7a6", "tree": "e1f589c46b3ff79bbe7b1b2469f6362f94576da6", "parents": [ "b701a47ba48b698976fb2fe05fb285b0edc1d26a", "5967ed87ade85a421ef814296c3c7f182b08c225" ], "author": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Thu Apr 29 16:53:17 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Thu Apr 29 16:53:17 2010 -0700" }, "message": "Merge branch \u0027x86/asm\u0027 into x86/atomic\n\nMerge reason:\n\tConflict between LOCK_PREFIX_HERE and relative alternatives\n\tpointers\n\nResolved Conflicts:\n\tarch/x86/include/asm/alternative.h\n\tarch/x86/kernel/alternative.c\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "dfad53d48e32cd0e10eab98e986c76cdd957600f", "tree": "f0ccb6ab5c2bee90fe6cb9d9b6b5434ed6ee482d", "parents": [ "79dba2eaa771c3173957eccfd288e0e0d12e4d3f", "7a0fc404ae663776e96db43879a0fa24fec1fa3a" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 28 20:41:55 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 28 20:41:55 2010 -0700" }, "message": "Merge branch \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-tip\n\n* \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-tip:\n x86: Disable large pages on CPUs with Atom erratum AAE44\n x86-64: Clear a 64-bit FS/GS base on fork if selector is nonzero\n x86, mrst: Conditionally register cpu hotplug notifier for apbt\n" }, { "commit": "47f9fe26299ae022ac1e3fa12e7e73def62b7898", "tree": "c9e697c5f3a5b73e8ff5b2078b16aa1c11ff4f1f", "parents": [ "1d16b0f2f3edf05f12a9e3960588e0d4854157bb" ], "author": { "name": "Jan Beulich", "email": "JBeulich@novell.com", "time": "Wed Apr 21 16:19:57 2010 +0100" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Wed Apr 28 17:25:47 2010 -0700" }, "message": "x86-64: Don\u0027t export init_level4_pgt\n\nIt\u0027s not used by any module, and i386 (as well as some other arches)\nalso doesn\u0027t export its equivalent (swapper_pg_dir).\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nLKML-Reference: \u003c4BCF33BD020000780003B3E4@vpn.id2.novell.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "5967ed87ade85a421ef814296c3c7f182b08c225", "tree": "16d08b1e34308390d189ddc52e7c4e25cc841e41", "parents": [ "402af0d7c692ddcfa2333e93d3f275ebd0487926" ], "author": { "name": "Jan Beulich", "email": "JBeulich@novell.com", "time": "Wed Apr 21 16:08:14 2010 +0100" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Wed Apr 28 17:15:47 2010 -0700" }, "message": "x86-64: Reduce SMP locks table size\n\nReduce the SMP locks table size by using relative pointers instead of\nabsolute ones, thus cutting the table size by half.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nLKML-Reference: \u003c4BCF30FE020000780003B3B6@vpn.id2.novell.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "402af0d7c692ddcfa2333e93d3f275ebd0487926", "tree": "08d016caa7dc404d7400281b57fb634108b0291f", "parents": [ "1d16b0f2f3edf05f12a9e3960588e0d4854157bb" ], "author": { "name": "Jan Beulich", "email": "JBeulich@novell.com", "time": "Wed Apr 21 15:21:51 2010 +0100" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Wed Apr 28 16:58:49 2010 -0700" }, "message": "x86, asm: Introduce and use percpu_inc()\n\n... generating slightly smaller code.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nLKML-Reference: \u003c4BCF261F020000780003B33C@vpn.id2.novell.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "453dc65931915abc61f92e12bba1fc4747ff5542", "tree": "10700e010416253dfee19748f892466ac9e98f96", "parents": [ "b8af67e2681c693a21f3933e3bdfce4cf66596d3" ], "author": { "name": "Dmitry Torokhov", "email": "dtor@vmware.com", "time": "Fri Apr 23 13:18:08 2010 -0400" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Apr 24 11:31:26 2010 -0700" }, "message": "VMware Balloon driver\n\nThis is a standalone version of VMware Balloon driver. Ballooning is a\ntechnique that allows hypervisor dynamically limit the amount of memory\navailable to the guest (with guest cooperation). In the overcommit\nscenario, when hypervisor set detects that it needs to shuffle some\nmemory, it instructs the driver to allocate certain number of pages, and\nthe underlying memory gets returned to the hypervisor. Later hypervisor\nmay return memory to the guest by reattaching memory to the pageframes and\ninstructing the driver to \"deflate\" balloon.\n\nWe are submitting a standalone driver because KVM maintainer (Avi Kivity)\nexpressed opinion (rightly) that our transport does not fit well into\nvirtqueue paradigm and thus it does not make much sense to integrate with\nvirtio.\n\nThere were also some concerns whether current ballooning technique is the\nright thing. If there appears a better framework to achieve this we are\nprepared to evaluate and switch to using it, but in the meantime we\u0027d like\nto get this driver upstream.\n\nWe want to get the driver accepted in distributions so that users do not\nhave to deal with an out-of-tree module and many distributions have\n\"upstream first\" requirement.\n\nThe driver has been shipping for a number of years and users running on\nVMware platform will have it installed as part of VMware Tools even if it\nwill not come from a distribution, thus there should not be additional\nrisk in pulling the driver into mainline. The driver will only activate\nif host is VMware so everyone else should not be affected at all.\n\nSigned-off-by: Dmitry Torokhov \u003cdtor@vmware.com\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\nCc: Jeremy Fitzhardinge \u003cjeremy@goop.org\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "7a0fc404ae663776e96db43879a0fa24fec1fa3a", "tree": "c76014dd7cd6f32d38795bbbe4a48581dfc98a28", "parents": [ "7ce5a2b9bb2e92902230e3121d8c3047fab9cb47" ], "author": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Tue Apr 13 14:40:54 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 23 16:49:51 2010 -0700" }, "message": "x86: Disable large pages on CPUs with Atom erratum AAE44\n\nAtom erratum AAE44/AAF40/AAG38/AAH41:\n\n\"If software clears the PS (page size) bit in a present PDE (page\ndirectory entry), that will cause linear addresses mapped through this\nPDE to use 4-KByte pages instead of using a large page after old TLB\nentries are invalidated. Due to this erratum, if a code fetch uses\nthis PDE before the TLB entry for the large page is invalidated then\nit may fetch from a different physical address than specified by\neither the old large page translation or the new 4-KByte page\ntranslation. This erratum may also cause speculative code fetches from\nincorrect addresses.\"\n\n[http://download.intel.com/design/processor/specupdt/319536.pdf]\n\nWhere as commit 211b3d03c7400f48a781977a50104c9d12f4e229 seems to\nworkaround errata AAH41 (mixed 4K TLBs) it reduces the window of\nopportunity for the bug to occur and does not totally remove it. This\npatch disables mixed 4K/4MB page tables totally avoiding the page\nsplitting and not tripping this processor issue.\n\nThis is based on an original patch by Colin King.\n\nOriginally-by: Colin Ian King \u003ccolin.king@canonical.com\u003e\nCc: Colin Ian King \u003ccolin.king@canonical.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\nLKML-Reference: \u003c1269271251-19775-1-git-send-email-colin.king@canonical.com\u003e\nCc: \u003cstable@kernel.org\u003e\n" }, { "commit": "7ce5a2b9bb2e92902230e3121d8c3047fab9cb47", "tree": "e8741ea11f5644d4a49ef9e4b66820977d577d3f", "parents": [ "ae7c9b70dcb4313ea3dbcc9a2f240dae6c2b50c0" ], "author": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 23 16:17:40 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 23 16:49:51 2010 -0700" }, "message": "x86-64: Clear a 64-bit FS/GS base on fork if selector is nonzero\n\nWhen we do a thread switch, we clear the outgoing FS/GS base if the\ncorresponding selector is nonzero. This is taken by __switch_to() as\nan entry invariant; it does not verify that it is true on entry.\nHowever, copy_thread() doesn\u0027t enforce this constraint, which can\nresult in inconsistent results after fork().\n\nMake copy_thread() match the behavior of __switch_to().\n\nReported-and-tested-by: Samuel Thibault \u003csamuel.thibault@inria.fr\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nLKML-Reference: \u003c4BD1E061.8030605@zytor.com\u003e\nCc: \u003cstable@kernel.org\u003e\n" }, { "commit": "70bce3ba77540ebe77b8c0e1ac38d281a23fbb5e", "tree": "34b09a49228f0949ff49dce66a433b0dfd83a2dc", "parents": [ "6eca8cc35b50af1037bc919106dd6dd332c959c2", "d5a30458a90597915977f06e79406b664a41b8ac" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Apr 23 11:10:28 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Apr 23 11:10:30 2010 +0200" }, "message": "Merge branch \u0027linus\u0027 into perf/core\n\nMerge reason: merge the latest fixes, update to latest -rc.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "59d3b388741cf1a5eb7ad27fd4e9ed72643164ae", "tree": "a1c4de47be3b0eb272ab08e661022e911166aa75", "parents": [ "ba06edb63f5ef2913aad37070eaec3c9d8ac73b8" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Apr 22 16:07:02 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Thu Apr 22 17:17:27 2010 -0700" }, "message": "x86, cacheinfo: Disable index in all four subcaches\n\nWhen disabling an L3 cache index, make sure we disable that index in\nall four subcaches of the L3. Clarify nomenclature while at it, wrt to\ndisable slots versus disable index and rename accordingly.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1271945222-5283-6-git-send-email-bp@amd64.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "ba06edb63f5ef2913aad37070eaec3c9d8ac73b8", "tree": "79605f9dfc645a6be5045e1fb18201befe27fef3", "parents": [ "9350f982e4fe539e83a2d4a13e9b53ad8253c4a8" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Apr 22 16:07:01 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Thu Apr 22 17:17:23 2010 -0700" }, "message": "x86, cacheinfo: Make L3 cache info per node\n\nCurrently, we\u0027re allocating L3 cache info and calculating indices for\neach online cpu which is clearly superfluous. Instead, we need to do\nthis per-node as is each L3 cache.\n\nNo functional change, only per-cpu memory savings.\n\n-v2: Allocate L3 cache descriptors array dynamically.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1271945222-5283-5-git-send-email-bp@amd64.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "9350f982e4fe539e83a2d4a13e9b53ad8253c4a8", "tree": "4ee595d0ba964446b2b06c026cbc6964e3ce2cdc", "parents": [ "f2b20e41407fccfcfacf927ff91ec888832a37af" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Apr 22 16:07:00 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Thu Apr 22 17:17:23 2010 -0700" }, "message": "x86, cacheinfo: Reorganize AMD L3 cache structure\n\nAdd a struct representing L3 cache attributes (subcache sizes and\nindices count) and move the respective members out of _cpuid4_info.\nAlso, stash the struct pci_dev ptr into the struct simplifying the code\neven more.\n\nThere should be no functionality change resulting from this patch except\nslightly slimming the _cpuid4_info per-cpu vars.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1271945222-5283-4-git-send-email-bp@amd64.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "f2b20e41407fccfcfacf927ff91ec888832a37af", "tree": "68159ae18522248b0e2e696240969b3f7bc8cd76", "parents": [ "b1ab1b4d9ab9812c77843abec79030292ef0a544" ], "author": { "name": "Frank Arnold", "email": "frank.arnold@amd.com", "time": "Thu Apr 22 16:06:59 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Thu Apr 22 17:17:21 2010 -0700" }, "message": "x86, cacheinfo: Turn off L3 cache index disable feature in virtualized environments\n\nWhen running a quest kernel on xen we get:\n\nBUG: unable to handle kernel NULL pointer dereference at 0000000000000038\nIP: [\u003cffffffff8142f2fb\u003e] cpuid4_cache_lookup_regs+0x2ca/0x3df\nPGD 0\nOops: 0000 [#1] SMP\nlast sysfs file:\nCPU 0\nModules linked in:\n\nPid: 0, comm: swapper Tainted: G W 2.6.34-rc3 #1 /HVM domU\nRIP: 0010:[\u003cffffffff8142f2fb\u003e] [\u003cffffffff8142f2fb\u003e] cpuid4_cache_lookup_regs+0x\n2ca/0x3df\nRSP: 0018:ffff880002203e08 EFLAGS: 00010046\nRAX: 0000000000000000 RBX: 0000000000000003 RCX: 0000000000000060\nRDX: 0000000000000000 RSI: 0000000000000040 RDI: 0000000000000000\nRBP: ffff880002203ed8 R08: 00000000000017c0 R09: ffff880002203e38\nR10: ffff8800023d5d40 R11: ffffffff81a01e28 R12: ffff880187e6f5c0\nR13: ffff880002203e34 R14: ffff880002203e58 R15: ffff880002203e68\nFS: 0000000000000000(0000) GS:ffff880002200000(0000) knlGS:0000000000000000\nCS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b\nCR2: 0000000000000038 CR3: 0000000001a3c000 CR4: 00000000000006f0\nDR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000\nDR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400\nProcess swapper (pid: 0, threadinfo ffffffff81a00000, task ffffffff81a44020)\nStack:\n ffffffff810d7ecb ffff880002203e20 ffffffff81059140 ffff880002203e30\n\u003c0\u003e ffffffff810d7ec9 0000000002203e40 000000000050d140 ffff880002203e70\n\u003c0\u003e 0000000002008140 0000000000000086 ffff880040020140 ffffffff81068b8b\nCall Trace:\n \u003cIRQ\u003e\n [\u003cffffffff810d7ecb\u003e] ? sync_supers_timer_fn+0x0/0x1c\n [\u003cffffffff81059140\u003e] ? mod_timer+0x23/0x25\n [\u003cffffffff810d7ec9\u003e] ? arm_supers_timer+0x34/0x36\n [\u003cffffffff81068b8b\u003e] ? hrtimer_get_next_event+0xa7/0xc3\n [\u003cffffffff81058e85\u003e] ? get_next_timer_interrupt+0x19a/0x20d\n [\u003cffffffff8142fa23\u003e] get_cpu_leaves+0x5c/0x232\n [\u003cffffffff8106a7b1\u003e] ? sched_clock_local+0x1c/0x82\n [\u003cffffffff8106a9a0\u003e] ? sched_clock_tick+0x75/0x7a\n [\u003cffffffff8107748c\u003e] generic_smp_call_function_single_interrupt+0xae/0xd0\n [\u003cffffffff8101f6ef\u003e] smp_call_function_single_interrupt+0x18/0x27\n [\u003cffffffff8100a773\u003e] call_function_single_interrupt+0x13/0x20\n \u003cEOI\u003e\n [\u003cffffffff8143c468\u003e] ? notifier_call_chain+0x14/0x63\n [\u003cffffffff810295c6\u003e] ? native_safe_halt+0xc/0xd\n [\u003cffffffff810114eb\u003e] ? default_idle+0x36/0x53\n [\u003cffffffff81008c22\u003e] cpu_idle+0xaa/0xe4\n [\u003cffffffff81423a9a\u003e] rest_init+0x7e/0x80\n [\u003cffffffff81b10dd2\u003e] start_kernel+0x40e/0x419\n [\u003cffffffff81b102c8\u003e] x86_64_start_reservations+0xb3/0xb7\n [\u003cffffffff81b103c4\u003e] x86_64_start_kernel+0xf8/0x107\nCode: 14 d5 40 ff ae 81 8b 14 02 31 c0 3b 15 47 1c 8b 00 7d 0e 48 8b 05 36 1c 8b\n 00 48 63 d2 48 8b 04 d0 c7 85 5c ff ff ff 00 00 00 00 \u003c8b\u003e 70 38 48 8d 8d 5c ff\n ff ff 48 8b 78 10 ba c4 01 00 00 e8 eb\nRIP [\u003cffffffff8142f2fb\u003e] cpuid4_cache_lookup_regs+0x2ca/0x3df\n RSP \u003cffff880002203e08\u003e\nCR2: 0000000000000038\n---[ end trace a7919e7f17c0a726 ]---\n\nThe L3 cache index disable feature of AMD CPUs has to be disabled if the\nkernel is running as guest on top of a hypervisor because northbridge\ndevices are not available to the guest. Currently, this fixes a boot\ncrash on top of Xen. In the future this will become an issue on KVM as\nwell.\n\nCheck if northbridge devices are present and do not enable the feature\nif there are none.\n\nSigned-off-by: Frank Arnold \u003cfrank.arnold@amd.com\u003e\nLKML-Reference: \u003c1271945222-5283-3-git-send-email-bp@amd64.org\u003e\nAcked-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "b1ab1b4d9ab9812c77843abec79030292ef0a544", "tree": "e0405fa695565e9cc6b3510a70168bd10bbd8f3c", "parents": [ "6dad2a29646ce3792c40cfc52d77e9b65a7bb143" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Thu Apr 22 16:06:58 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Thu Apr 22 17:17:20 2010 -0700" }, "message": "x86, cacheinfo: Unify AMD L3 cache index disable checking\n\nAll F10h CPUs starting with model 8 resp. 9, stepping 1, support L3\ncache index disable. Concentrate the family, model, stepping checking at\none place and enable the feature implicitly on upcoming Fam10h models.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1271945222-5283-2-git-send-email-bp@amd64.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "ae7c9b70dcb4313ea3dbcc9a2f240dae6c2b50c0", "tree": "e8b514e4e9de1236f3c370788d85beb21affe9d2", "parents": [ "05ce7bfe547c9fa967d9cab6c37867a9cb6fb3fa" ], "author": { "name": "Jacob Pan", "email": "jacob.jun.pan@linux.intel.com", "time": "Mon Apr 19 11:23:43 2010 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue Apr 20 14:38:28 2010 -0700" }, "message": "x86, mrst: Conditionally register cpu hotplug notifier for apbt\n\nAPB timer is used on Moorestown platforms but not on a standard PC.\nIf APB timer code is compiled in but not initialized at run-time due\nto lack of FW reported SFI table, kernel would panic when the non-boot\nCPUs are offlined and notifier is called.\n\nhttps://bugzilla.kernel.org/show_bug.cgi?id\u003d15786\n\nThis patch ensures CPU hotplug notifier for APB timer is only registered\nwhen the APBT timer block is initialized.\n\nSigned-off-by: Jacob Pan \u003cjacob.jun.pan@linux.intel.com\u003e\nLKML-Reference: \u003c1271701423-1162-1-git-send-email-jacob.jun.pan@linux.intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "34388d1c4feae50d61d6f4ec7594b9076d6d24db", "tree": "3c586aaae3d88c2cd0ce4d78300377935d7ea9cb", "parents": [ "186837ca3a6dd6b422a5ea316ed38eea183dca5d", "ab285f2b5290d92b7ec1a6f9aad54308dadf6157" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 20 09:20:23 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Apr 20 09:20:23 2010 -0700" }, "message": "Merge branch \u0027perf-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027perf-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n perf: Fix unsafe frame rewinding with hot regs fetching\n" }, { "commit": "dcf46b9443ad48a227a61713adea001228925adf", "tree": "1055614c98e8f6584e40fc4ca73ad611b5a77530", "parents": [ "a1645ce12adb6c9cc9e19d7695466204e3f017fe" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin_zhang@linux.intel.com", "time": "Tue Apr 20 10:13:58 2010 +0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Apr 20 08:08:28 2010 +0200" }, "message": "perf \u0026 kvm: Clean up some of the guest profiling callback API details\n\nFix some build bug and programming style issues:\n\n - use valid C\n - fix up various style details\n\nSigned-off-by: Zhang Yanmin \u003cyanmin_zhang@linux.intel.com\u003e\nCc: Avi Kivity \u003cavi@redhat.com\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Sheng Yang \u003csheng@linux.intel.com\u003e\nCc: Marcelo Tosatti \u003cmtosatti@redhat.com\u003e\nCc: oerg Roedel \u003cjoro@8bytes.org\u003e\nCc: Jes Sorensen \u003cJes.Sorensen@redhat.com\u003e\nCc: Gleb Natapov \u003cgleb@redhat.com\u003e\nCc: Zachary Amsden \u003czamsden@redhat.com\u003e\nCc: zhiteng.huang@intel.com\nCc: tim.c.chen@intel.com\nCc: Arnaldo Carvalho de Melo \u003cacme@infradead.org\u003e\nLKML-Reference: \u003c1271729638.2078.624.camel@ymzhang.sh.intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "39447b386c846bbf1c56f6403c5282837486200f", "tree": "5ceaf9900919e4bd269b92c55df15e33039fefd1", "parents": [ "b5a80b7e91d6c067339e4d81a0176a835e9bf910" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin_zhang@linux.intel.com", "time": "Mon Apr 19 13:32:41 2010 +0800" }, "committer": { "name": "Avi Kivity", "email": "avi@redhat.com", "time": "Mon Apr 19 12:35:33 2010 +0300" }, "message": "perf: Enhance perf to allow for guest statistic collection from host\n\nBelow patch introduces perf_guest_info_callbacks and related\nregister/unregister functions. Add more PERF_RECORD_MISC_XXX bits\nmeaning guest kernel and guest user space.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin_zhang@linux.intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@redhat.com\u003e\n" }, { "commit": "a289cc7c70da784a2d370b91885cab4f966dcb0f", "tree": "7e06be85ce3754061f20ccd3f77439c2d83f4549", "parents": [ "b8f7fb13d2d7ff14818fd1d3edd8b834d38b0217" ], "author": { "name": "Randy Dunlap", "email": "randy.dunlap@oracle.com", "time": "Fri Apr 16 17:51:42 2010 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 17 10:37:20 2010 +0200" }, "message": "x86, UV: uv_irq.c: Fix all sparse warnings\n\nFix all sparse warnings in building uv_irq.c.\n\n arch/x86/kernel/uv_irq.c:46:17: warning: symbol \u0027uv_irq_chip\u0027 was not declared. Should it be static?\n arch/x86/kernel/uv_irq.c:143:50: error: no identifier for function argument\n arch/x86/kernel/uv_irq.c:162:13: error: typename in expression\n arch/x86/kernel/uv_irq.c:162:13: error: undefined identifier \u0027restrict\u0027\n arch/x86/kernel/uv_irq.c:250:44: error: no identifier for function argument\n arch/x86/kernel/uv_irq.c:260:17: error: typename in expression\n arch/x86/kernel/uv_irq.c:260:17: error: undefined identifier \u0027restrict\u0027\n arch/x86/kernel/uv_irq.c:233:50: warning: incorrect type in argument 3 (different signedness)\n arch/x86/kernel/uv_irq.c:233:50: expected int *pnode\n arch/x86/kernel/uv_irq.c:233:50: got unsigned int *\u003cnoident\u003e\n arch/x86/include/asm/uv/uv_hub.h:318:44: warning: incorrect type in argument 2 (different address spaces)\n arch/x86/include/asm/uv/uv_hub.h:318:44: expected void volatile [noderef] \u003casn:2\u003e*addr\n arch/x86/include/asm/uv/uv_hub.h:318:44: got unsigned long *\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nCc: Dimitri Sivanich \u003csivanich@sgi.com\u003e\nCc: Russ Anderson \u003crja@sgi.com\u003e\nCc: Robin Holt \u003cholt@sgi.com\u003e\nCc: Mike Travis \u003ctravis@sgi.com\u003e\nCc: Cliff Wickman \u003ccpw@sgi.com\u003e\nCc: Jack Steiner \u003csteiner@sgi.com\u003e\nLKML-Reference: \u003c20100416175142.f4b59683.randy.dunlap@oracle.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "b8f7fb13d2d7ff14818fd1d3edd8b834d38b0217", "tree": "48844c12cc443690116abbec7e836f8c08360d56", "parents": [ "2acebe9ecb2b77876e87a1480729cfb2db4570dd" ], "author": { "name": "Cliff Wickman", "email": "cpw@sgi.com", "time": "Wed Apr 14 11:35:46 2010 -0500" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Apr 14 18:49:53 2010 +0200" }, "message": "x86, UV: Improve BAU performance and error recovery\n\n- increase performance of the interrupt handler\n\n- release timed-out software acknowledge resources\n\n- recover from continuous-busy status due to a hardware issue\n\n- add a \u0027throttle\u0027 to keep a uvhub from sending more than a\n specified number of broadcasts concurrently (work around the hardware issue)\n\n- provide a \u0027nobau\u0027 boot command line option\n\n- rename \u0027pnode\u0027 and \u0027node\u0027 to \u0027uvhub\u0027 (the \u0027node\u0027 terminology\n is ambiguous)\n\n- add some new statistics about the scope of broadcasts, retries, the\n hardware issue and the \u0027throttle\u0027\n\n- split off new function uv_bau_retry_msg() from\n uv_bau_process_message() per community coding style feedback.\n\n- simplify the argument list to uv_bau_process_message(), per\n community coding style feedback.\n\nSigned-off-by: Cliff Wickman \u003ccpw@sgi.com\u003e\nCc: linux-mm@kvack.org\nCc: Jack Steiner \u003csteiner@sgi.com\u003e\nCc: Russ Anderson \u003crja@sgi.com\u003e\nCc: Mike Travis \u003ctravis@sgi.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nLKML-Reference: \u003cE1O25Z4-0004Ur-PB@eag09.americas.sgi.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "3f10940e4fb69d312602078f2c5234206797ca31", "tree": "20c2b056639b9d2e01a527851c38663d4d28a5e3", "parents": [ "938179b4f8cf8a4f11234ebf2dff2eb48400acfe" ], "author": { "name": "Arnd Bergmann", "email": "arnd@relay.de.ibm.com", "time": "Sat Apr 10 16:46:21 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Apr 14 12:27:34 2010 +0200" }, "message": "x86/microcode: Use nonseekable_open()\n\nNo need to seek on this file, so prevent it outright so we can\navoid using default_llseek - removes one more BKL usage.\n\nSigned-off-by: Arnd Bergmann \u003carnd@arndb.de\u003e\n[drop useless llseek \u003d no_llseek and smp_lock.h inclusion]\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nCc: Arnd Bergmann \u003carnd@relay.de.ibm.com\u003e\nCc: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: Dmitry Adamushko \u003cdmitry.adamushko@gmail.com\u003e\nLKML-Reference: \u003c1270910781-8786-1-git-send-regression-fweisbec@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "2b2f862ee6ef8ae8f913fee6af2112c5ffeedf94", "tree": "06a89df37436f9902a37800e05541880ba3aa603", "parents": [ "0d0fb0f9c5fddef4a10242fe3337f00f528a3099", "4b83873d3da0704987cb116833818ed96214ee29" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Apr 13 13:24:54 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Apr 13 13:24:54 2010 +0200" }, "message": "Merge branch \u0027iommu/fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu into x86/urgent\n" }, { "commit": "679370641e3675633cad222449262abbe93a4a2a", "tree": "e7c6051476724b9bd0aba8869e39272200f32869", "parents": [ "a2fed573f065e526bfd5cbf26e5491973d9e9aaa" ], "author": { "name": "Mark Langsdorf", "email": "mark.langsdorf@amd.com", "time": "Wed Mar 31 21:56:45 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 09 14:07:47 2010 -0700" }, "message": "powernow-k8: Fix frequency reporting\n\nWith F10, model 10, all valid frequencies are in the ACPI _PST table.\n\nCc: \u003cstable@kernel.org\u003e # 33.x 32.x\nSigned-off-by: Mark Langsdorf \u003cmark.langsdorf@amd.com\u003e\nLKML-Reference: \u003c1270065406-1814-6-git-send-email-bp@amd64.org\u003e\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nReviewed-by: Thomas Renninger \u003ctrenn@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "a2fed573f065e526bfd5cbf26e5491973d9e9aaa", "tree": "069ea4932051dd4535de4bf896e09deff836e0b9", "parents": [ "d65ad45cd82a0db9544469b8c54f5dc5cafbb2d8" ], "author": { "name": "Mark Langsdorf", "email": "mark.langsdorf@amd.com", "time": "Thu Mar 18 18:41:46 2010 +0100" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 09 14:07:40 2010 -0700" }, "message": "x86, cpufreq: Add APERF/MPERF support for AMD processors\n\nStarting with model 10 of Family 0x10, AMD processors may have\nsupport for APERF/MPERF. Add support for identifying it and using\nit within cpufreq. Move the APERF/MPERF functions out of the\nacpi-cpufreq code and into their own file so they can easily be\nshared.\n\nSigned-off-by: Mark Langsdorf \u003cmark.langsdorf@amd.com\u003e\nLKML-Reference: \u003c20100401141956.GA1930@aftab\u003e\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nReviewed-by: Thomas Renninger \u003ctrenn@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "d65ad45cd82a0db9544469b8c54f5dc5cafbb2d8", "tree": "35055e3261c6c75e0d5bd6df00603233f8f47fea", "parents": [ "73860c6b2fd159a35637e233d735e36887c266ad" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Wed Mar 31 21:56:43 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 09 14:05:50 2010 -0700" }, "message": "x86: Unify APERF/MPERF support\n\nInitialize this CPUID flag feature in common code. It could be made a\nstandalone function later, maybe, if more functionality is duplicated.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1270065406-1814-4-git-send-email-bp@amd64.org\u003e\nReviewed-by: Thomas Renninger \u003ctrenn@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "73860c6b2fd159a35637e233d735e36887c266ad", "tree": "74c657fbd87569441ef0f0e0683637ff0de7700f", "parents": [ "5958f1d5d722df7a9e5d129676614a8e5219bacd" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Wed Mar 31 21:56:42 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 09 14:05:43 2010 -0700" }, "message": "powernow-k8: Add core performance boost support\n\nStarting with F10h, revE, AMD processors add support for a dynamic\ncore boosting feature called Core Performance Boost. When a specific\ncondition is present, a subset of the cores on a system are boosted\nbeyond their P0 operating frequency to speed up the performance of\nsingle-threaded applications.\n\nIn the normal case, the system comes out of reset with core boosting\nenabled. This patch adds a sysfs knob with which core boosting can be\nswitched on or off for benchmarking purposes.\n\nWhile at it, make the CPB code hotplug-aware so that taking cores\noffline wouldn\u0027t interfere with boosting the remaining online cores.\nFurthermore, add cpu_online_mask hotplug protection as suggested by\nAndrew.\n\nFinally, cleanup the driver init codepath and update copyrights.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1270065406-1814-3-git-send-email-bp@amd64.org\u003e\nReviewed-by: Thomas Renninger \u003ctrenn@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "5958f1d5d722df7a9e5d129676614a8e5219bacd", "tree": "968c1fcc99d4653a313a9c5e5690aa2e0792895c", "parents": [ "2eaa9cfdf33b8d7fb7aff27792192e0019ae8fc6" ], "author": { "name": "Borislav Petkov", "email": "borislav.petkov@amd.com", "time": "Wed Mar 31 21:56:41 2010 +0200" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Apr 09 14:05:23 2010 -0700" }, "message": "x86, cpu: Add AMD core boosting feature flag to /proc/cpuinfo\n\nBy semi-popular demand, this adds the Core Performance Boost feature\nflag to /proc/cpuinfo. Possible use case for this is userspace tools\nlike cpufreq-aperf, for example, so that they don\u0027t have to jump through\nhoops of accessing \"/dev/cpu/%d/cpuid\" in order to check for CPB hw\nsupport, or call cpuid from userspace.\n\nSigned-off-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nLKML-Reference: \u003c1270065406-1814-2-git-send-email-bp@amd64.org\u003e\nReviewed-by: Thomas Renninger \u003ctrenn@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "ab285f2b5290d92b7ec1a6f9aad54308dadf6157", "tree": "70ffdac1d267401330b487bc6f502a9206a4ae6b", "parents": [ "134fbadf028a5977a1b06b0253d3ee33e6f0c642" ], "author": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Thu Apr 08 14:05:50 2010 +0200" }, "committer": { "name": "Frederic Weisbecker", "email": "fweisbec@gmail.com", "time": "Thu Apr 08 19:03:28 2010 +0200" }, "message": "perf: Fix unsafe frame rewinding with hot regs fetching\n\nWhen we fetch the hot regs and rewind to the nth caller, it\nmight happen that we dereference a frame pointer outside the\nkernel stack boundaries, like in this example:\n\n\tperf_trace_sched_switch+0xd5/0x120\n schedule+0x6b5/0x860\n retint_careful+0xd/0x21\n\nSince we directly dereference a userspace frame pointer here while\nrewinding behind retint_careful, this may end up in a crash.\n\nFix this by simply using probe_kernel_address() when we rewind the\nframe pointer.\n\nThis issue will have a much more proper fix in the next version of the\nperf_arch_fetch_caller_regs() API that will only need to rewind to the\nfirst caller.\n\nReported-by: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nSigned-off-by: Frederic Weisbecker \u003cfweisbec@gmail.com\u003e\nTested-by: Eric Dumazet \u003ceric.dumazet@gmail.com\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Arnaldo Carvalho de Melo \u003cacme@redhat.com\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: David Miller \u003cdavem@davemloft.net\u003e\nCc: Archs \u003clinux-arch@vger.kernel.org\u003e\n" }, { "commit": "ca7e0c612005937a4a5a75d3fed90459993de65c", "tree": "b574fc0f0189b52ffc87ba20c418228db556faa1", "parents": [ "8141d0050d76e5695011b5ab577ec66fb51a998c", "f5284e7635787224dda1a2bf82a4c56b1c75671f" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Apr 08 13:36:36 2010 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Apr 08 13:37:18 2010 +0200" }, "message": "Merge branch \u0027linus\u0027 into perf/core\n\nSemantic conflict: arch/x86/kernel/cpu/perf_event_intel_ds.c\n\nMerge reason: pick up latest fixes, fix the conflict\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "48de8cb7847d040c8892701c1ff3c55eff1f46b4", "tree": "073f1fc21abf098d7667fcb898eda441c6b7f393", "parents": [ "63634c86365b530af5026d409fd403801abe1e75", "134fbadf028a5977a1b06b0253d3ee33e6f0c642" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 07 14:01:51 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 07 14:01:51 2010 -0700" }, "message": "Merge branch \u0027perf-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027perf-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n perf, x86: Enable Nehalem-EX support\n perf kmem: Fix breakage introduced by 5a0e3ad slab.h script\n" }, { "commit": "fb1ae635772d679eb312fa447290fc02cd0e4cf1", "tree": "45733f9820da1190cd58bfff080edbb02af961a8", "parents": [ "addb2d6c13993060ae75f5005815b19dd2abdd64", "472a474c6630efd195d3738339fd1bdc8aa3b1aa" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 07 11:02:23 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Apr 07 11:02:23 2010 -0700" }, "message": "Merge branch \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-tip\n\n* \u0027x86-fixes-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-tip:\n x86: Fix double enable_IR_x2apic() call on SMP kernel on !SMP boards\n x86: Increase CONFIG_NODES_SHIFT max to 10\n ibft, x86: Change reserve_ibft_region() to find_ibft_region()\n x86, hpet: Fix bug in RTC emulation\n x86, hpet: Erratum workaround for read after write of HPET comparator\n bootmem, x86: Fix 32bit numa system without RAM on node 0\n nobootmem, x86: Fix 32bit numa system without RAM on node 0\n x86: Handle overlapping mptables\n x86: Make e820_remove_range to handle all covered case\n x86-32, resume: do a global tlb flush in S4 resume\n" } ], "next": "4b83873d3da0704987cb116833818ed96214ee29" }