)]}'
{
  "log": [
    {
      "commit": "086ac11f6435c9dc2fe5025fc8ea3a1dbca273d6",
      "tree": "29e9445f029b73bac174900cb68d5e1fd2748cef",
      "parents": [
        "c320b976d7837c561ce4aa49dfe0a64f0e527ce4"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Tue Sep 27 15:57:16 2011 +0200"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Fri Oct 14 09:05:35 2011 -0700"
      },
      "message": "PCI: Add support for PASID capability\n\nDevices supporting Process Address Space Identifiers\n(PASIDs) can use an IOMMU to access multiple IO address\nspaces at the same time. A PCIe device indicates support for\nthis feature by implementing the PASID capability. This\npatch adds support for the capability to the Linux kernel.\n\nReviewed-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "c320b976d7837c561ce4aa49dfe0a64f0e527ce4",
      "tree": "09d12286e3c63ab15a472468795204eeb154f83c",
      "parents": [
        "d4c0636c2107010f0ef8c4dfbb1d6368ae3b3ed9"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Tue Sep 27 15:57:15 2011 +0200"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Fri Oct 14 09:05:34 2011 -0700"
      },
      "message": "PCI: Add implementation for PRI capability\n\nImplement the necessary functions to handle PRI capabilities\non PCIe devices. With PRI devices behind an IOMMU can signal\npage fault conditions to software and recover from such\nfaults.\n\nReviewed-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "db3c33c6d3fa04ee46b491e9d75d0d3b4798d074",
      "tree": "6c1031398621e1b7195b2b23b7045a2eb5e917e1",
      "parents": [
        "78d090b0be3f072a3c95022771c35183af961aaa"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Tue Sep 27 15:57:13 2011 +0200"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Fri Oct 14 09:05:33 2011 -0700"
      },
      "message": "PCI: Move ATS implementation into own file\n\nATS does not depend on IOV support, so move the code into\nits own file. This file will also include support for the\nPRI and PASID capabilities later.\nAlso give ATS its own Kconfig variable to allow selecting it\nwithout IOV support.\n\nReviewed-by: Bjorn Helgaas \u003cbhelgaas@google.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "5cdede2408e80f190c5595e592c24e77c1bf44b2",
      "tree": "86907de141057aa702a395d618605551240d25fe",
      "parents": [
        "7d0c5cc5be73f7ce26fdcca7b8ec2203f661eb93"
      ],
      "author": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Mon Apr 04 15:55:18 2011 +0200"
      },
      "committer": {
        "name": "Joerg Roedel",
        "email": "joerg.roedel@amd.com",
        "time": "Mon Apr 11 09:01:41 2011 +0200"
      },
      "message": "PCI: Move ATS declarations in seperate header file\n\nThis patch moves the relevant declarations from the local\nheader file in drivers/pci to a more accessible locations so\nthat it can be used by the AMD IOMMU driver too.\nThe file is named pci-ats.h because support for the PCI PRI\ncapability will also be added there in a later patch-set.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    }
  ]
}