)]}' { "log": [ { "commit": "9f728f53dd70396f3183d2f0861022259471824b", "tree": "e5591f2bec0d94c0eb753958c511a21b6bd00d8e", "parents": [ "a3170c1f924ce2565c4e160b9b095e65c03b2dc6" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu May 12 17:11:47 2011 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Sat May 21 12:16:44 2011 -0700" }, "message": "PCI/e1000e: Add and use pci_disable_link_state_locked()\n\nNeed to use it in _e1000e_disable_aspm. This routine is used for error\nrecovery, where the pci_bus_sem is already held, and we don\u0027t want\npci_disable_link_state to try to take it again. So add a locked variant\nfor use in cases like this.\n\nFound lock up:\n\n[ 2374.654557] kworker/32:1 D ffff881027f6b0f0 0 6075 2 0x00000000\n[ 2374.654816] ffff88503f099a68 0000000000000046 ffff88503f098000 0000000000004000\n[ 2374.654837] 00000000001d1ec0 ffff88503f099fd8 00000000001d1ec0 ffff88503f099fd8\n[ 2374.654860] 0000000000004000 00000000001d1ec0 ffff88503dcc8000 ffff88503f090000\n[ 2374.654880] Call Trace:\n[ 2374.654898] [\u003cffffffff810b1302\u003e] ? __lock_acquired+0x3a/0x224\n[ 2374.654914] [\u003cffffffff81c2b59c\u003e] ? _raw_spin_unlock_irq+0x30/0x36\n[ 2374.654925] [\u003cffffffff810b069d\u003e] ? trace_hardirqs_on_caller+0x1f/0x178\n[ 2374.654936] [\u003cffffffff81c2ab24\u003e] rwsem_down_failed_common+0xd3/0x103\n[ 2374.654945] [\u003cffffffff810b158f\u003e] ? __lock_contended+0x3a/0x2a2\n[ 2374.654955] [\u003cffffffff81c2ab7b\u003e] rwsem_down_read_failed+0x12/0x14\n[ 2374.654967] [\u003cffffffff813371e4\u003e] call_rwsem_down_read_failed+0x14/0x30\n[ 2374.654981] [\u003cffffffff8135df20\u003e] ? pci_disable_link_state+0x5f/0xf5\n[ 2374.654990] [\u003cffffffff81c2a0e6\u003e] ? down_read+0x7e/0x91\n[ 2374.654999] [\u003cffffffff8135df20\u003e] ? pci_disable_link_state+0x5f/0xf5\n[ 2374.655008] [\u003cffffffff8135df20\u003e] pci_disable_link_state+0x5f/0xf5\n[ 2374.655024] [\u003cffffffff81661796\u003e] e1000e_disable_aspm+0x55/0x5a\n[ 2374.655037] [\u003cffffffff816677eb\u003e] e1000_io_slot_reset+0x59/0xea\n[ 2374.655048] [\u003cffffffff8135fe0d\u003e] ? report_mmio_enabled+0x5d/0x5d\n[ 2374.655057] [\u003cffffffff8135fe3b\u003e] report_slot_reset+0x2e/0x5d\n[ 2374.655072] [\u003cffffffff8135369e\u003e] pci_walk_bus+0x8a/0xb7\n[ 2374.655081] [\u003cffffffff8135fe0d\u003e] ? report_mmio_enabled+0x5d/0x5d\n[ 2374.655091] [\u003cffffffff813603be\u003e] broadcast_error_message+0xa4/0xb2\n[ 2374.655101] [\u003cffffffff81352c71\u003e] ? pci_bus_read_config_dword+0x72/0x80\n[ 2374.655110] [\u003cffffffff813606df\u003e] do_recovery+0x9e/0xf9\n[ 2374.655120] [\u003cffffffff81360786\u003e] handle_error_source+0x4c/0x51\n[ 2374.655129] [\u003cffffffff81360974\u003e] aer_isr_one_error+0x1e9/0x21a\n[ 2374.655138] [\u003cffffffff81360a6c\u003e] aer_isr+0xc7/0xcc\n[ 2374.655147] [\u003cffffffff813609a5\u003e] ? aer_isr_one_error+0x21a/0x21a\n[ 2374.655159] [\u003cffffffff81096d9f\u003e] process_one_work+0x237/0x3ec\n[ 2374.655168] [\u003cffffffff81096d10\u003e] ? process_one_work+0x1a8/0x3ec\n[ 2374.655178] [\u003cffffffff8109728d\u003e] worker_thread+0x17c/0x240\n[ 2374.655186] [\u003cffffffff810b0803\u003e] ? trace_hardirqs_on+0xd/0xf\n[ 2374.655196] [\u003cffffffff81097111\u003e] ? manage_workers+0xab/0xab\n[ 2374.655209] [\u003cffffffff8109c8ed\u003e] kthread+0xa0/0xa8\n[ 2374.655223] [\u003cffffffff81c332d4\u003e] kernel_thread_helper+0x4/0x10\n[ 2374.655232] [\u003cffffffff81c2b880\u003e] ? retint_restore_args+0xe/0xe\n[ 2374.655243] [\u003cffffffff8109c84d\u003e] ? __init_kthread_worker+0x5b/0x5b\n[ 2374.655252] [\u003cffffffff81c332d0\u003e] ? gs_change+0xb/0xb\n\nwhen aer happens,\npci_walk_bus already have down_read(\u0026pci_bus_sem)...\nthen report_slot_reset\n \u003d\u003d\u003e e1000_io_slot_reset\n \u003d\u003d\u003e e1000e_disable_aspm\n \u003d\u003d\u003e pci_disable_link_state...\n\nWe can not use pci_disable_link_state, and it will try to hold pci_bus_sem again.\n\nTry to have __pci_disable_link_state that will not need to hold pci_bus_sem.\n\n-v2: change name to pci_disable_link_state_locked() according to Jesse.\n\n[jbarnes: make sure new function is exported for modules]\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1a680b7c325882188865f05b9a88d32f75f26495", "tree": "eb3844655f9ff01630157e4b2c039759970b1a94", "parents": [ "8b8bae901ce23addbdcdb54fa1696fb2d049feb5" ], "author": { "name": "Naga Chumbalkar", "email": "nagananda.chumbalkar@hp.com", "time": "Mon Mar 21 03:29:08 2011 +0000" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Mar 21 09:40:43 2011 -0700" }, "message": "PCI: PCIe links may not get configured for ASPM under POWERSAVE mode\n\nv3 -\u003e v2: Moved ASPM enabling logic to pci_set_power_state()\nv2 -\u003e v1: Preserved the logic in pci_raw_set_power_state()\n\t: Added ASPM enabling logic after scanning Root Bridge\n\t: http://marc.info/?l\u003dlinux-pci\u0026m\u003d130046996216391\u0026w\u003d2\nv1\t: http://marc.info/?l\u003dlinux-pci\u0026m\u003d130013164703283\u0026w\u003d2\n\nThe assumption made in commit 41cd766b065970ff6f6c89dd1cf55fa706c84a3d\n(PCI: Don\u0027t enable aspm before drivers have had a chance to veto it) that\npci_enable_device() will result in re-configuring ASPM when aspm_policy is\nPOWERSAVE is no longer valid. This is due to commit\n97c145f7c87453cec90e91238fba5fe2c1561b32 (PCI: read current power state\nat enable time) which resets dev-\u003ecurrent_state to D0. Due to this the\ncall to pcie_aspm_pm_state_change() is never made. Note the equality check\n(below) that returns early:\n./drivers/pci/pci.c: pci_raw_set_pci_power_state()\n546 /* Check if we\u0027re already there */\n547 if (dev-\u003ecurrent_state \u003d\u003d state)\n548 return 0;\n\nTherefore OSPM never configures the PCIe links for ASPM to turn them \"on\".\n\nFix it by configuring ASPM from the pci_enable_device() code path. This\nalso allows a driver such as the e1000e networking driver a chance to\ndisable ASPM (L0s, L1), if need be, prior to enabling the device. A\ndriver may perform this action if the device is known to mis-behave\nwrt ASPM.\n\nSigned-off-by: Naga Chumbalkar \u003cnagananda.chumbalkar@hp.com\u003e\nAcked-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nCc: Matthew Garrett \u003cmjg59@srcf.ucam.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "2f671e2dbff6eb5ef4e2600adbec550c13b8fe72", "tree": "fb5debb042218dcf1cbdf11eb4d8d603208c219f", "parents": [ "8d805286968811223cca002134ba3d81244d5313" ], "author": { "name": "Matthew Garrett", "email": "mjg@redhat.com", "time": "Mon Dec 06 14:00:56 2010 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Dec 23 12:53:08 2010 -0800" }, "message": "PCI: Disable ASPM if BIOS asks us to\n\nWe currently refuse to touch the ASPM registers if the BIOS tells us that\nASPM isn\u0027t supported. This can cause problems if the BIOS has (for any\nreason) enabled ASPM on some devices anyway. Change the code such that we\nexplicitly clear ASPM if the FADT indicates that ASPM isn\u0027t supported,\nand make sure we tidy up appropriately on device removal in order to deal\nwith the hotplug case. If ASPM is disabled because the BIOS doesn\u0027t hand\nover control then we won\u0027t touch the registers.\n\nSigned-off-by: Matthew Garrett \u003cmjg@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5fde244d39b88625ac578d83e6625138714de031", "tree": "e50762b22a94f7f7990c9dbab699a857da0982eb", "parents": [ "ce6fce4295ba727b36fdc73040e444bd1aae64cd" ], "author": { "name": "Shaohua Li", "email": "shaohua.li@intel.com", "time": "Wed Jul 23 10:32:24 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 28 14:56:09 2008 -0700" }, "message": "PCI: disable ASPM per ACPI FADT setting\n\nThe ACPI FADT table includes an ASPM control bit. If the bit is set, do\nnot enable ASPM since it may indicate that the platform doesn\u0027t actually\nsupport the feature.\n\nTested-by: Jack Howarth \u003chowarth@bromo.msbb.uc.edu\u003e\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7d715a6c1ae5785d00fb9a876b5abdfc43abc44b", "tree": "58ec6d1969739a590e0c6c976bfebf04c8e9f31e", "parents": [ "657472e9ccd9fccb82b775eb691c4b25b27451da" ], "author": { "name": "Shaohua Li", "email": "shaohua.li@intel.com", "time": "Mon Feb 25 09:46:41 2008 +0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:03 2008 -0700" }, "message": "PCI: add PCI Express ASPM support\n\nPCI Express ASPM defines a protocol for PCI Express components in the D0\nstate to reduce Link power by placing their Links into a low power state\nand instructing the other end of the Link to do likewise. This\ncapability allows hardware-autonomous, dynamic Link power reduction\nbeyond what is achievable by software-only controlled power management.\nHowever, The device should be configured by software appropriately.\nEnabling ASPM will save power, but will introduce device latency.\n\nThis patch adds ASPM support in Linux. It introduces a global policy for\nASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control\nit. The interface can be used as a boot option too. Currently we have\nbelow setting:\n -default, BIOS default setting\n -powersave, highest power saving mode, enable all available ASPM\nstate and clock power management\n -performance, highest performance, disable ASPM and clock power\nmanagement\nBy default, the \u0027default\u0027 policy is used currently.\n\nIn my test, power difference between powersave mode and performance mode\nis about 1.3w in a system with 3 PCIE links.\n\nNote: some devices might not work well with aspm, either because chipset\nissue or device issue. The patch provide API (pci_disable_link_state),\ndriver can disable ASPM for specific device.\n\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" } ] }