)]}'
{
  "log": [
    {
      "commit": "41d59102e146a4423a490b8eca68a5860af4fe1c",
      "tree": "739ed4113ccdaeb33d1723a6beab09c1e18d7048",
      "parents": [
        "3e1dd193edefd2a806a0ba6cf0879cf1a95217da",
        "c9775b4cc522e5f1b40b1366a993f0f05f600f39"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:58:16 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue May 18 08:58:16 2010 -0700"
      },
      "message": "Merge branch \u0027x86-fpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-fpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, fpu: Use static_cpu_has() to implement use_xsave()\n  x86: Add new static_cpu_has() function using alternatives\n  x86, fpu: Use the proper asm constraint in use_xsave()\n  x86, fpu: Unbreak FPU emulation\n  x86: Introduce \u0027struct fpu\u0027 and related API\n  x86: Eliminate TS_XSAVE\n  x86-32: Don\u0027t set ignore_fpu_irq in simd exception\n  x86: Merge kernel_math_error() into math_error()\n  x86: Merge simd_math_error() into math_error()\n  x86-32: Rework cache flush denied handler\n\nFix trivial conflict in arch/x86/kernel/process.c\n"
    },
    {
      "commit": "40d2e76315da38993129090dc5d56377e573c312",
      "tree": "8f585daa23780aa0841ac72b34053f9deb00041c",
      "parents": [
        "be1066bbcd443a65df312fdecea7e4959adedb45"
      ],
      "author": {
        "name": "Brian Gerst",
        "email": "brgerst@gmail.com",
        "time": "Sun Mar 21 09:00:43 2010 -0400"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon May 03 13:39:26 2010 -0700"
      },
      "message": "x86-32: Rework cache flush denied handler\n\nThe cache flush denied error is an erratum on some AMD 486 clones.  If an invd\ninstruction is executed in userspace, the processor calls exception 19 (13 hex)\ninstead of #GP (13 decimal).  On cpus where XMM is not supported, redirect\nexception 19 to do_general_protection().  Also, remove die_if_kernel(), since\nthis was the last user.\n\nSigned-off-by: Brian Gerst \u003cbrgerst@gmail.com\u003e\nLKML-Reference: \u003c1269176446-2489-2-git-send-email-brgerst@gmail.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "faa4602e47690fb11221e00f9b9697c8dc0d4b19",
      "tree": "af667d1cdff7dc63b6893ee3f27a1f2503229ed1",
      "parents": [
        "7c5ecaf7666617889f337296c610815b519abfa9"
      ],
      "author": {
        "name": "Peter Zijlstra",
        "email": "a.p.zijlstra@chello.nl",
        "time": "Thu Mar 25 14:51:50 2010 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Mar 26 11:33:55 2010 +0100"
      },
      "message": "x86, perf, bts, mm: Delete the never used BTS-ptrace code\n\nSupport for the PMU\u0027s BTS features has been upstreamed in\nv2.6.32, but we still have the old and disabled ptrace-BTS,\nas Linus noticed it not so long ago.\n\nIt\u0027s buggy: TIF_DEBUGCTLMSR is trampling all over that MSR without\nregard for other uses (perf) and doesn\u0027t provide the flexibility\nneeded for perf either.\n\nIts users are ptrace-block-step and ptrace-bts, since ptrace-bts\nwas never used and ptrace-block-step can be implemented using a\nmuch simpler approach.\n\nSo axe all 3000 lines of it. That includes the *locked_memory*()\nAPIs in mm/mlock.c as well.\n\nReported-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Roland McGrath \u003croland@redhat.com\u003e\nCc: Oleg Nesterov \u003coleg@redhat.com\u003e\nCc: Markus Metzger \u003cmarkus.t.metzger@intel.com\u003e\nCc: Steven Rostedt \u003crostedt@goodmis.org\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nLKML-Reference: \u003c20100325135413.938004390@chello.nl\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "d6cd4715e21508bebbb1928c91d628bd65f5de5f",
      "tree": "2b89de4d36032bdd3d56fbae6e0d626c2cdd38b8",
      "parents": [
        "1eca9acbf9cda6437db7de1097c7a18014b1289d",
        "0d1622d7f526311d87d7da2ee7dd14b73e45d3fc"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Feb 28 10:41:35 2010 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Feb 28 10:41:35 2010 -0800"
      },
      "message": "Merge branch \u0027x86-rwsem-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-rwsem-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86-64, rwsem: Avoid store forwarding hazard in __downgrade_write\n  x86-64, rwsem: 64-bit xadd rwsem implementation\n  x86: Fix breakage of UML from the changes in the rwsem system\n  x86-64: support native xadd rwsem implementation\n  x86: clean up rwsem type system\n"
    },
    {
      "commit": "bafaecd11df15ad5b1e598adc7736afcd38ee13d",
      "tree": "99b676d1ecc202358fe67acd095aa2c1f1ef2b1f",
      "parents": [
        "5d0b7235d83eefdafda300656e97d368afcafc9a"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue Jan 12 18:16:42 2010 -0800"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Wed Jan 13 22:39:50 2010 -0800"
      },
      "message": "x86-64: support native xadd rwsem implementation\n\nThis one is much faster than the spinlock based fallback rwsem code,\nwith certain artifical benchmarks having shown 300%+ improvement on\nthreaded page faults etc.\n\nAgain, note the 32767-thread limit here. So this really does need that\nwhole \"make rwsem_count_t be 64-bit and fix the BIAS values to match\"\nextension on top of it, but that is conceptually a totally independent\nissue.\n\nNOT TESTED! The original patch that this all was based on were tested by\nKAMEZAWA Hiroyuki, but maybe I screwed up something when I created the\ncleaned-up series, so caveat emptor..\n\nAlso note that it _may_ be a good idea to mark some more registers\nclobbered on x86-64 in the inline asms instead of saving/restoring them.\nThey are inline functions, but they are only used in places where there\nare not a lot of live registers _anyway_, so doing for example the\nclobbers of %r8-%r11 in the asm wouldn\u0027t make the fast-path code any\nworse, and would make the slow-path code smaller.\n\n(Not that the slow-path really matters to that degree. Saving a few\nunnecessary registers is the _least_ of our problems when we hit the slow\npath. The instruction/cycle counting really only matters in the fast\npath).\n\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nLKML-Reference: \u003calpine.LFD.2.00.1001121810410.17145@localhost.localdomain\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "db677ffa5f5a4f15b9dad4d132b3477b80766d82",
      "tree": "1379d67ad09bb932a8afa5c85eccacba6d8ca19c",
      "parents": [
        "6307daad8496f5807a2ef60cbada55fe3b59c44e"
      ],
      "author": {
        "name": "Rusty Russell",
        "email": "rusty@rustcorp.com.au",
        "time": "Tue Jan 05 12:48:49 2010 +1030"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue Jan 05 16:01:35 2010 -0800"
      },
      "message": "Revert \"x86: Side-step lguest problem by only building cmpxchg8b_emu for pre-Pentium\"\n\nThis reverts commit ae1b22f6e46c03cede7cea234d0bf2253b4261cf.\n\nAs Linus said in 982d007a6ee: \"There was something really messy about\ncmpxchg8b and clone CPU\u0027s, so if you enable it on other CPUs later, do it\ncarefully.\"\n\nThis breaks lguest for those configs, but we can fix that by emulating\nif we have to.\n\nFixes: http://bugzilla.kernel.org/show_bug.cgi?id\u003d14884\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nCc: stable@kernel.org\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "e33c01972239fee4696679ae5f7d1f340f424999",
      "tree": "bd4bc3223ba572719b3a53142fdb98910450fe64",
      "parents": [
        "343036cea2854acf8d4b4c930c0063223bc6b8a2",
        "ccef086454d4c97e7b722e9303390207d681cb4c"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue Dec 08 13:27:33 2009 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Tue Dec 08 13:27:33 2009 -0800"
      },
      "message": "Merge branch \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-mm-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (36 commits)\n  x86, mm: Correct the implementation of is_untracked_pat_range()\n  x86/pat: Trivial: don\u0027t create debugfs for memtype if pat is disabled\n  x86, mtrr: Fix sorting of mtrr after subtracting\n  x86: Move find_smp_config() earlier and avoid bootmem usage\n  x86, platform: Change is_untracked_pat_range() to bool; cleanup init\n  x86: Change is_ISA_range() into an inline function\n  x86, mm: is_untracked_pat_range() takes a normal semiclosed range\n  x86, mm: Call is_untracked_pat_range() rather than is_ISA_range()\n  x86: UV SGI: Don\u0027t track GRU space in PAT\n  x86: SGI UV: Fix BAU initialization\n  x86, numa: Use near(er) online node instead of roundrobin for NUMA\n  x86, numa, bootmem: Only free bootmem on NUMA failure path\n  x86: Change crash kernel to reserve via reserve_early()\n  x86: Eliminate redundant/contradicting cache line size config options\n  x86: When cleaning MTRRs, do not fold WP into UC\n  x86: remove \"extern\" from function prototypes in \u003casm/proto.h\u003e\n  x86, mm: Report state of NX protections during boot\n  x86, mm: Clean up and simplify NX enablement\n  x86, pageattr: Make set_memory_(x|nx) aware of NX support\n  x86, sleep: Always save the value of EFER\n  ...\n\nFix up conflicts (added both iommu_shutdown and is_untracked_pat_range)\nto \u0027struct x86_platform_ops\u0027) in\n\tarch/x86/include/asm/x86_init.h\n\tarch/x86/kernel/x86_init.c\n"
    },
    {
      "commit": "83be7d764dc4b860712e392197ec27645f9d74a8",
      "tree": "9d6f0a8e9e57478b206e033bbb264b739fe2b130",
      "parents": [
        "c2ed69cdc9da49a8d2d7b4212fd225abf902ceaa",
        "0d0fbbddcc27c062815732b38c44b544e656c799"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sat Dec 05 15:32:35 2009 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sat Dec 05 15:32:35 2009 -0800"
      },
      "message": "Merge branch \u0027x86-cpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-cpu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n  x86, msr, cpumask: Use struct cpumask rather than the deprecated cpumask_t\n  x86, cpuid: Simplify the code in cpuid_open\n  x86, cpuid: Remove the bkl from cpuid_open()\n  x86, msr: Remove the bkl from msr_open()\n  x86: AMD Geode LX optimizations\n  x86, msr: Unify rdmsr_on_cpus/wrmsr_on_cpus\n"
    },
    {
      "commit": "350f8f5631922c7848ec4b530c111cb8c2ff7caa",
      "tree": "d81bd9432ac1f130779fa7272322681169184867",
      "parents": [
        "508d85c2c6bc8cba53d2a54d9a306ad64a0a80bf"
      ],
      "author": {
        "name": "Jan Beulich",
        "email": "JBeulich@novell.com",
        "time": "Fri Nov 13 11:54:40 2009 +0000"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Nov 19 04:58:34 2009 +0100"
      },
      "message": "x86: Eliminate redundant/contradicting cache line size config options\n\nRather than having X86_L1_CACHE_BYTES and X86_L1_CACHE_SHIFT\n(with inconsistent defaults), just having the latter suffices as\nthe former can be easily calculated from it.\n\nTo be consistent, also change X86_INTERNODE_CACHE_BYTES to\nX86_INTERNODE_CACHE_SHIFT, and set it to 7 (128 bytes) for NUMA\nto account for last level cache line size (which here matters\nmore than L1 cache line size).\n\nFinally, make sure the default value for X86_L1_CACHE_SHIFT,\nwhen X86_GENERIC is selected, is being seen before that for the\nindividual CPU model options (other than on x86-64, where\nGENERIC_CPU is part of the choice construct, X86_GENERIC is a\nseparate option on ix86).\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nAcked-by: Ravikiran Thirumalai \u003ckiran@scalex86.org\u003e\nAcked-by: Nick Piggin \u003cnpiggin@suse.de\u003e\nLKML-Reference: \u003c4AFD5710020000780001F8F0@vpn.id2.novell.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "ae1b22f6e46c03cede7cea234d0bf2253b4261cf",
      "tree": "3a38eb7c35cf3fad8816f87cfbb0c19c079d7101",
      "parents": [
        "14a3f40aafacde1dfd6912327ae14df4baf10304"
      ],
      "author": {
        "name": "Rusty Russell",
        "email": "rusty@rustcorp.com.au",
        "time": "Mon Oct 26 14:26:04 2009 +1030"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Oct 26 12:33:02 2009 +0100"
      },
      "message": "x86: Side-step lguest problem by only building cmpxchg8b_emu for pre-Pentium\n\nCommit 79e1dd05d1a22 \"x86: Provide an alternative() based\ncmpxchg64()\" broke lguest, even on systems which have cmpxchg8b\nsupport.  The emulation code gets used until alternatives get\nrun, but it contains native instructions, not their paravirt\nalternatives.\n\nThe simplest fix is to turn this code off except for 386 and 486\nbuilds.\n\nReported-by: Johannes Stezenbach \u003cjs@sig21.net\u003e\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nAcked-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nCc: lguest@ozlabs.org\nCc: Arjan van de Ven \u003carjan@infradead.org\u003e\nCc: Jeremy Fitzhardinge \u003cjeremy@goop.org\u003e\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nLKML-Reference: \u003c200910261426.05769.rusty@rustcorp.com.au\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "98059e3463383b18fd79181179cd539b74846b47",
      "tree": "320bafcb7f03f514c133aa23dcb0ca20a017930d",
      "parents": [
        "b8a4754147d61f5359a765a3afd3eb03012aa052"
      ],
      "author": {
        "name": "Matteo Croce",
        "email": "technoboy85@gmail.com",
        "time": "Thu Oct 01 17:11:10 2009 +0200"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Fri Oct 02 11:24:28 2009 -0700"
      },
      "message": "x86: AMD Geode LX optimizations\n\nAdd CPU optimizations for AMD Geode LX.\n\nSigned-off-by: Matteo Croce \u003ctechnoboy85@gmail.com\u003e\nLKML-Reference: \u003c40101cc30910010811v5d15ff4cx9dd57c9cc9b4b045@mail.gmail.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "982d007a6eec4a0abb404d2355eeec2c041c61ea",
      "tree": "c050631e7fbf5be10edb45ee3be0ded2670b7512",
      "parents": [
        "84d88d5d4efc37dfb8a93a4a58d8a227ee86ffa4"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Wed Sep 30 17:57:27 2009 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 01 08:01:08 2009 +0200"
      },
      "message": "x86: Optimize cmpxchg64() at build-time some more\n\nTry to avoid the \u0027alternates()\u0027 code when we can statically\ndetermine that cmpxchg8b is fine. We already have that\nCONFIG_x86_CMPXCHG64 (enabled by PAE support), and we could easily\nalso enable it for some of the CPU cases.\n\nNote, this patch only adds CMPXCHG8B for the obvious Intel CPU\u0027s,\nnot for others. (There was something really messy about cmpxchg8b\nand clone CPU\u0027s, so if you enable it on other CPUs later, do it\ncarefully.)\n\nIf we avoid that asm-alternative thing when we can assume the\ninstruction exists, we\u0027ll generate less support crud, and we\u0027ll\navoid the whole issue with that extra \u0027nop\u0027 for padding instruction\nsizes etc.\n\nLKML-Reference: \u003calpine.LFD.2.01.0909301743150.6996@localhost.localdomain\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "366d19e181be873c70f4aafca3931d77d781ccd7",
      "tree": "0cdaba0911a3874c71de8b8ed24be2562c1f9b9a",
      "parents": [
        "8a517c514d5893602cf85c1b4c47afbbc04d2198"
      ],
      "author": {
        "name": "Tobias Doerffel",
        "email": "tobias.doerffel@gmail.com",
        "time": "Fri Aug 21 23:06:23 2009 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sun Aug 23 11:20:02 2009 +0200"
      },
      "message": "x86: add specific support for Intel Atom architecture\n\nAdd another option when selecting CPU family so the kernel can be\noptimized for Intel Atom CPUs. If GCC supports tuning options for\nIntel Atom they will be used.\n\nSigned-off-by: Tobias Doerffel \u003ctobias.doerffel@gmail.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nLKML-Reference: \u003c1251018457-19157-1-git-send-email-tobias.doerffel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "d45b41ae8da0f54aec0eebcc6f893ba5f22a1e8e",
      "tree": "02cb1631f336babe2c8158be17fb0d73831a0ee1",
      "parents": [
        "6cececfcece2b072d29886ed7140495f3af17153"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Apr 15 23:15:14 2009 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Apr 15 23:15:14 2009 +0200"
      },
      "message": "x86: disable X86_PTRACE_BTS for now\n\nOleg Nesterov found a couple of races in the ptrace-bts code\nand fixes are queued up for it but they did not get ready in time\nfor the merge window. We\u0027ll merge them in v2.6.31 - until then\nmark the feature as CONFIG_BROKEN. There\u0027s no user-space yet\nmaking use of this so it\u0027s not a big issue.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "48f4c485c275e9550fa1a1191768689cc3ae0037",
      "tree": "c50cbbcc959e5bb2c84d3c0d9cd9fbb33dea41a8",
      "parents": [
        "0ca0f16fd17c5d880dd0abbe03595b0c7c5b3c95"
      ],
      "author": {
        "name": "Sebastian Andrzej Siewior",
        "email": "sebastian@breakpoint.cc",
        "time": "Sat Mar 14 12:24:02 2009 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Mar 14 16:27:29 2009 +0100"
      },
      "message": "x86/centaur: merge 32 \u0026 64 bit version\n\nthere should be no difference, except:\n\n * the 64bit variant now also initializes the padlock unit.\n * -\u003ec_early_init() is executed again from -\u003ec_init()\n * the 64bit fixups made into 32bit path.\n\nSigned-off-by: Sebastian Andrzej Siewior \u003csebastian@breakpoint.cc\u003e\nCc: herbert@gondor.apana.org.au\nLKML-Reference: \u003c1237029843-28076-2-git-send-email-sebastian@breakpoint.cc\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "8f9ca475c994e4d32f405183d07e8c7eedbdbdb4",
      "tree": "3c2bdf052b53f22cbac9d2b844acbde477fad0c6",
      "parents": [
        "4f179d121885142fb907b64956228b369d495958"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Feb 05 16:21:53 2009 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Feb 05 22:30:20 2009 +0100"
      },
      "message": "x86: clean up arch/x86/Kconfig*\n\n- Consistent alignment of help text\n- Use the ---help--- keyword everywhere consistently as a visual separator\n- fix whitespace mismatches\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "9d45cf9e36bf9bcf16df6e1cbf049807c8402823",
      "tree": "2118a16701418af10d215d2174df7ee0a5cbe6bd",
      "parents": [
        "a146649bc19d5eba4f5bfac6720c5f252d517a71",
        "0cd5c3c80a0ebd68c08312fa7d8c13149cc61c4c"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jan 31 17:32:31 2009 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Feb 05 22:30:01 2009 +0100"
      },
      "message": "Merge branch \u0027x86/urgent\u0027 into x86/apic\n\nConflicts:\n\tarch/x86/mach-default/setup.c\n\nSemantic merge:\n\tarch/x86/kernel/irqinit_32.c\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "36723bfe81f374fd8abc05a46f10a7cac2f01a75",
      "tree": "a4ad3786c5283a733c27a2daf0684aedd1d1856e",
      "parents": [
        "48ec4d9537282a55d602136724f069faafcac8c8"
      ],
      "author": {
        "name": "Borislav Petkov",
        "email": "petkovbb@googlemail.com",
        "time": "Wed Feb 04 21:44:04 2009 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Feb 04 22:19:27 2009 +0100"
      },
      "message": "x86/Kconfig.cpu: make Kconfig help readable in the console\n\nImpact: cleanup\n\nSome lines exceed the 80 char width making them unreadable.\n\nSigned-off-by: Borislav Petkov \u003cpetkovbb@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "ace6c6c840878342f698f0da6588dd5ded755369",
      "tree": "ed9d68efca2ccabbc379246b2fe65607c34f0259",
      "parents": [
        "198030782cedf25391e67e7c88b04f87a5eb6563"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Jan 21 10:32:44 2009 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Jan 21 11:17:11 2009 +0100"
      },
      "message": "x86: make x86_32 use tlb_64.c, build fix, clean up X86_L1_CACHE_BYTES\n\nFix:\n\n  arch/x86/mm/tlb.c:47: error: ‘CONFIG_X86_INTERNODE_CACHE_BYTES’ undeclared here (not in a function)\n\nThe CONFIG_X86_INTERNODE_CACHE_BYTES symbol is only defined on 64-bit,\nbecause vsmp support is 64-bit only. Define it on 32-bit too - where it\nwill always be equal to X86_L1_CACHE_BYTES.\n\nAlso move the default of X86_L1_CACHE_BYTES (which is separate from the\nmore commonly used L1_CACHE_SHIFT kconfig symbol) from 128 bytes to\n64 bytes.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "0a2a18b721abc960fbcada406746877d22340a60",
      "tree": "9daea65fa737987882aa26db6199b906d74c5d91",
      "parents": [
        "09b3ec7315a18d885127544204f1e389d41058d0"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Jan 12 23:37:16 2009 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Jan 14 12:04:56 2009 +0100"
      },
      "message": "x86: change the default cache size to 64 bytes\n\nRight now the generic cacheline size is 128 bytes - that is wasteful\nwhen structures are aligned, as all modern x86 CPUs have an (effective)\ncacheline sizes of 64 bytes.\n\nIt was set to 128 bytes due to some cacheline aliasing problems on\nolder P4 systems, but those are many years old and we dont optimize\nfor them anymore. (They\u0027ll still get the 128 bytes cacheline size if\nthe kernel is specifically built for Pentium 4)\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nAcked-by: Arjan van de Ven \u003carjan@linux.intel.com\u003e\n"
    },
    {
      "commit": "5641f1fde074651ce2488e93944cf05dedd9bf74",
      "tree": "2ee93ad7f01ead38be0e16dd0ca23bbd20de4131",
      "parents": [
        "7483cb7bbc02b9471dda28e54f41287d5374e3ac"
      ],
      "author": {
        "name": "Al Viro",
        "email": "viro@ftp.linux.org.uk",
        "time": "Mon Jan 05 17:19:02 2009 +0000"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Mon Jan 05 17:41:45 2009 -0800"
      },
      "message": "X86_DEBUGCTLMSR won\u0027t work on uml\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "1e9b51c28312f7334394aa30be56ff52c2b65b7e",
      "tree": "c0a231d83541263ee938e3452475409323e4e9a9",
      "parents": [
        "8bba1bf5e2434c83f2fe8b1422604ace9bbe4cb8"
      ],
      "author": {
        "name": "Markus Metzger",
        "email": "markus.t.metzger@intel.com",
        "time": "Tue Nov 25 09:24:15 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Nov 25 17:31:13 2008 +0100"
      },
      "message": "x86, bts, ftrace: a BTS ftrace plug-in prototype\n\nImpact: add new ftrace plugin\n\nA prototype for a BTS ftrace plug-in.\n\nThe tracer collects branch trace in a cyclic buffer for each cpu.\n\nThe tracer is not configurable and the trace for each snapshot is\nappended when doing cat /debug/tracing/trace.\n\nThis is a proof of concept that will be extended with future patches\nto become a (hopefully) useful tool.\n\nSigned-off-by: Markus Metzger \u003cmarkus.t.metzger@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "531f6ed7de911e975352fbb2b228367121da630a",
      "tree": "905c7705934202b912f916391a127da6f64d5150",
      "parents": [
        "71cced6eb044f5b096d35755963f3a2035603b73"
      ],
      "author": {
        "name": "Markus Metzger",
        "email": "markus.t.metzger@intel.com",
        "time": "Fri Oct 17 09:09:27 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Oct 28 16:39:37 2008 +0100"
      },
      "message": "x86, bts: improve help text for BTS config\n\nImprove the help text of the X86_PTRACE_BTS config.\nMake X86_DS invisible and depend on X86_PTRACE_BTS.\n\nReported-by: Roland Dreier \u003crdreier@cisco.com\u003e\nSigned-off-by: Markus Metzger \u003cmarkus.t.metzger@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "79aa10dd9fb0f896ce358314fdba20606c038864",
      "tree": "bc9e90163cbd05492b71ada90f821a239ce97f5f",
      "parents": [
        "6a2ae2d9f9212de47c16e23080162aada882c8b6"
      ],
      "author": {
        "name": "Jan Beulich",
        "email": "jbeulich@novell.com",
        "time": "Fri Aug 29 12:50:38 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Oct 13 10:33:50 2008 +0200"
      },
      "message": "x86: adjust dependencies for CONFIG_X86_CMOV\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "69d45dd1c3bb512a9f5f9c464ac625eb707669ec",
      "tree": "8cd3bdec6fe440e5983e319b9909bda6ddf497c4",
      "parents": [
        "d2f904bb9a1ba88a58a03612abd8c6c54bdaf73a"
      ],
      "author": {
        "name": "Krzysztof Helt",
        "email": "krzysztof.h1@wp.pl",
        "time": "Sun Sep 28 21:28:15 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Oct 13 10:22:48 2008 +0200"
      },
      "message": "x86: merge winchip-2 and winchip-2a cpu choices\n\nThe Winchip-2 and Winchip-2A cpu choices select the\nsame options for kernel and compiler.\n\nMerge them to save few bytes and reduce confusion.\n\nSigned-off-by: Krzysztof Helt \u003ckrzysztof.h1@wp.pl\u003e\nAcked-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "1db5fff9aeab18566eb380e354629fdbbe7792f0",
      "tree": "2de6fd4a5d80e9122d28aebb6995563c13351365",
      "parents": [
        "b7b3a42533e1e41297fe517533375f9f8f7b92d0"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sun Oct 12 15:40:45 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sun Oct 12 15:44:07 2008 +0200"
      },
      "message": "x86: make processor type select depend on CONFIG_EMBEDDED\n\ndeselecting one of the CPU type CONFIG_CPU_SUP_* config options\ncan render a kernel unbootable. Make sure this option is only\navailable if CONFIG_EMBEDDED is enabled.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "b7b3a42533e1e41297fe517533375f9f8f7b92d0",
      "tree": "3602658037501ee49dd5e0718fe674701662c87c",
      "parents": [
        "8a66712ba0969aea5580b9e312badfc2490fc614"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sun Oct 12 15:36:24 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sun Oct 12 15:36:24 2008 +0200"
      },
      "message": "x86: extend processor type select help text\n\nextend the help text of the CONFIG_CPU_SUP_* config options to\nexpress what it does and what effects it has.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "59c37bf8924c30fbac7ebb66a1d92dcb9f05f6b1",
      "tree": "2ffc3f2ce655806424d022f3a4daec7665ab888f",
      "parents": [
        "ec70cae8698632917f06110fdb70c6364281ecc6",
        "adee14b2e1557d0a8559f29681732d05a89dfc35"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Sep 10 14:00:45 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Sep 10 14:00:45 2008 +0200"
      },
      "message": "Merge commit \u0027v2.6.27-rc6\u0027 into x86/unify-cpu-detect\n\nConflicts:\n\tarch/x86/kernel/cpu/amd.c\n\tarch/x86/kernel/cpu/common.c\n\tarch/x86/kernel/cpu/common_64.c\n\tarch/x86/kernel/cpu/feature_names.c\n\tinclude/asm-x86/cpufeature.h\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "879d792b66d633bbe466974f61d1acc9aa8c78eb",
      "tree": "4e1367fcde52da73daa6558606ce34aa39547e9d",
      "parents": [
        "58602c1681bdfa1a0deaa5574b8a72d6e30c0e97"
      ],
      "author": {
        "name": "Yinghai Lu",
        "email": "yhlu.kernel@gmail.com",
        "time": "Tue Sep 09 16:40:37 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Sep 10 08:21:05 2008 +0200"
      },
      "message": "x86: let intel 64-bit use intel.c\n\nnow that arch/x86/kernel/cpu/intel_64.c and\narch/x86/kernel/cpu/intel.c are equal, drop\narch/x86/kernel/cpu/intel_64.c and fix up\nthe glue.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "81faaae45701484bd7368336e02f2a846153b22f",
      "tree": "d7d8dcafe5bb22decb0024537478fb667b0c896b",
      "parents": [
        "f69feff720497237ae9dd2f4604921bd3080c421",
        "3c9339049df5cc3a468c11de6c4101a1ea8c3d83"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Sep 10 08:20:51 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Sep 10 08:20:51 2008 +0200"
      },
      "message": "Merge branch \u0027x86/pebs\u0027 into x86/unify-cpu-detect\n\nConflicts:\n\tarch/x86/Kconfig.cpu\n\tinclude/asm-x86/ds.h\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "14469a8dd23677921db5e7354a602c98d9c6300f",
      "tree": "87aab243efb6dea0a8fb38fe6207764b24b82e6b",
      "parents": [
        "0253398ca1df7e1d2bfbb452175c964a0862482c"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Sep 05 09:30:14 2008 -0700"
      },
      "committer": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Mon Sep 08 11:35:43 2008 -0700"
      },
      "message": "x86: disable static NOPLs on 32 bits\n\nOn 32-bit, at least the generic nops are fairly reasonable, but the\ndefault nops for 64-bit really look pretty sad, and the P6 nops really do\nlook better.\n\nSo I would suggest perhaps moving the static P6 nop selection into the\nCONFIG_X86_64 thing.\n\nThe alternative is to just get rid of that static nop selection, and just\nhave two cases: 32-bit and 64-bit, and just pick obviously safe cases for\nthem.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "ff73152ced60871f7d5fb7dee52fa499902a3c6d",
      "tree": "19a236b407a16e37f86f3d3cb6bd631c86814854",
      "parents": [
        "2a02505055fdd44958efd0e140dd87cb9fdecaf1"
      ],
      "author": {
        "name": "Yinghai Lu",
        "email": "yhlu.kernel@gmail.com",
        "time": "Sun Sep 07 17:58:56 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Sep 08 15:32:06 2008 +0200"
      },
      "message": "x86: make 64 bit to use amd.c\n\narch/x86/kernel/cpu/amd.c is now 100% identical to\narch/x86/kernel/cpu/amd_64.c, so use amd.c on 64-bit too\nand fix up the namespace impact.\n\nSimplify the Kconfig glue as well.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "8d02c2110b3fb8e2700b31596a582a2989fd72ba",
      "tree": "c56374a7151020a580504a6fd8669cea9b7d629a",
      "parents": [
        "774400a3ba23b63f4de39e67ce6c4e48935809dc"
      ],
      "author": {
        "name": "Thomas Petazzoni",
        "email": "thomas.petazzoni@free-electrons.com",
        "time": "Tue Aug 05 11:45:19 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon Aug 18 16:05:48 2008 +0200"
      },
      "message": "x86: configuration options to compile out x86 CPU support code\n\nThis patch adds some configuration options that allow to compile out\nCPU vendor-specific code in x86 kernels (in arch/x86/kernel/cpu). The\nnew configuration options are only visible when CONFIG_EMBEDDED is\nselected, as they are mostly interesting for space savings reasons.\n\nAn example of size saving, on x86 with only Intel CPU support:\n\n   text\t   data\t    bss\t    dec\t    hex\tfilename\n1125479\t 118760\t 212992\t1457231\t 163c4f\tvmlinux.old\n1121355\t 116536\t 212992\t1450883\t 162383\tvmlinux\n  -4124   -2224       0   -6348   -18CC +/-\n\nHowever, I\u0027m not exactly sure that the Kconfig wording is correct with\nregard to !64BIT / 64BIT.\n\n[ mingo@elte.hu: convert macro to inline ]\n\nSigned-off-by: Thomas Petazzoni \u003cthomas.petazzoni@free-electrons.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "0e2f65ee30eee2db054f7fd73f462c5da33ec963",
      "tree": "26c61eb7745da0c0d9135e9d12088f570cb8530d",
      "parents": [
        "da7878d75b8520c9ae00d27dfbbce546a7bfdfbb",
        "fb2e405fc1fc8b20d9c78eaa1c7fd5a297efde43"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Jul 25 11:37:07 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Jul 25 11:37:07 2008 +0200"
      },
      "message": "Merge branch \u0027linus\u0027 into x86/pebs\n\nConflicts:\n\n\tarch/x86/Kconfig.cpu\n\tarch/x86/kernel/cpu/intel.c\n\tarch/x86/kernel/setup_64.c\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "d536b1f86591fb081c7a56eab04e711eb4dab951",
      "tree": "1b9a1c248d773af930347e08d292aa23a71729ed",
      "parents": [
        "77be1fabd024b37423d12f832b1fbdb95dbdf494"
      ],
      "author": {
        "name": "Jan Kratochvil",
        "email": "jan.kratochvil@redhat.com",
        "time": "Tue Jul 22 14:00:47 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Jul 22 14:16:37 2008 +0200"
      },
      "message": "x86: fix crash due to missing debugctlmsr on AMD K6-3\n\ncurrently if you use PTRACE_SINGLEBLOCK on AMD K6-3 (i586) it will crash.\nKernel now wrongly assumes existing DEBUGCTLMSR MSR register there.\n\nRemoved the assumption also for some other non-K6 CPUs but I am not sure there\n(but it can only bring small inefficiency there if my assumption is wrong).\n\nBased on info from Roland McGrath, Chuck Ebbert and Mikulas Patocka.\nMore info at:\n\thttps://bugzilla.redhat.com/show_bug.cgi?id\u003d456175\n\nSigned-off-by: Jan Kratochvil \u003cjan.kratochvil@redhat.com\u003e\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "593f4a788e5d09e9f00182561437461b0b564de4",
      "tree": "aafdcb1b8553e1d3012bc81e809131482300d3f2",
      "parents": [
        "5b664cb235e97afbf34db9c4d77f08ebd725335e"
      ],
      "author": {
        "name": "Maciej W. Rozycki",
        "email": "macro@linux-mips.org",
        "time": "Wed Jul 16 19:15:30 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Fri Jul 18 12:51:21 2008 +0200"
      },
      "message": "x86: APIC: remove apic_write_around(); use alternatives\n\nUse alternatives to select the workaround for the 11AP Pentium erratum\nfor the affected steppings on the fly rather than build time.  Remove the\nX86_GOOD_APIC configuration option and replace all the calls to\napic_write_around() with plain apic_write(), protecting accesses to the\nESR as appropriate due to the 3AP Pentium erratum.  Remove\napic_read_around() and all its invocations altogether as not needed.\nRemove apic_write_atomic() and all its implementing backends.  The use of\nASM_OUTPUT2() is not strictly needed for input constraints, but I have\nused it for readability\u0027s sake.\n\nI had the feeling no one else was brave enough to do it, so I went ahead\nand here it is.  Verified by checking the generated assembly and tested\nwith both a 32-bit and a 64-bit configuration, also with the 11AP\n\"feature\" forced on and verified with gdb on /proc/kcore to work as\nexpected (as an 11AP machines are quite hard to get hands on these days).\nSome script complained about the use of \"volatile\", but apic_write() needs\nit for the same reason and is effectively a replacement for writel(), so I\nhave disregarded it.\n\nI am not sure what the policy wrt defconfig files is, they are generated\nand there is risk of a conflict resulting from an unrelated change, so I\nhave left changes to them out.  The option will get removed from them at\nthe next run.\n\nSome testing with machines other than mine will be needed to avoid some\nstupid mistake, but despite its volume, the change is not really that\nintrusive, so I am fairly confident that because it works for me, it will\neverywhere.\n\nSigned-off-by: Maciej W. Rozycki \u003cmacro@linux-mips.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "293e6a2524ae775fef41d21d17af288d4b2ee91e",
      "tree": "8bc81b0398d01d47d6685715d7f7e875f11551ab",
      "parents": [
        "5e322163b19735fbef3e294c297d38e0d2ba8f7e"
      ],
      "author": {
        "name": "Glauber Costa",
        "email": "gcosta@redhat.com",
        "time": "Wed Jun 25 11:40:42 2008 -0300"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Jul 09 09:14:21 2008 +0200"
      },
      "message": "x86: mark x86_64 as having a working WP.\n\nSelect X86_WP_WORKS_OK for x86_64 too.\n\nSigned-off-by: Glauber Costa \u003cgcosta@redhat.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "f8096f92b87d81c55ed63964d27baa9ce5ffe508",
      "tree": "fe9686eea010725efc815d42e91154f8cd5c5f13",
      "parents": [
        "492c2e476eac010962850006c49df326919b284c"
      ],
      "author": {
        "name": "Jan Beulich",
        "email": "jbeulich@novell.com",
        "time": "Tue Apr 22 16:27:29 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon May 12 21:28:09 2008 +0200"
      },
      "message": "x86: separate cmpxchg8b checking from PAE checking\n\n.. allowing the former to be use in non-PAE kernels, too.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n\n"
    },
    {
      "commit": "93fa7636dfdc059b25df148f230c0991096afdef",
      "tree": "cf277bd09091ac69abb5f7fdc21c705b8f186f88",
      "parents": [
        "492c2e476eac010962850006c49df326919b284c"
      ],
      "author": {
        "name": "Markus Metzger",
        "email": "markus.t.metzger@intel.com",
        "time": "Tue Apr 08 11:01:58 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Mon May 12 21:27:53 2008 +0200"
      },
      "message": "x86, ptrace: PEBS support\n\nPolish the ds.h interface and add support for PEBS.\n\nDs.c is meant to be the resource allocator for per-thread and per-cpu\nBTS and PEBS recording.\nIt is used by ptrace/utrace to provide execution tracing of debugged tasks.\nIt will be used by profilers (e.g. perfmon2).\nIt may be used by kernel debuggers to provide a kernel execution trace.\n\nChanges in detail:\n- guard DS and ptrace by CONFIG macros\n- separate DS and BTS more clearly\n- simplify field accesses\n- add functions to manage PEBS buffers\n- add simple protection/allocation mechanism\n- added support for Atom\n\nOpens:\n- buffer overflow handling\n  Currently, only circular buffers are supported. This is all we need\n  for debugging. Profilers would want an overflow notification.\n  This is planned to be added when perfmon2 is made to use the ds.h\n  interface.\n- utrace intermediate layer\n\nSigned-off-by: Markus Metzger \u003cmarkus.t.metzger@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n\n"
    },
    {
      "commit": "acbaa93e3d38db0e67b070d97598f87a7a6779da",
      "tree": "dd9ad636adf138956b61070c7bccd915808f0966",
      "parents": [
        "c9af1e33231912cedae3e49e56621b6c765e57fe"
      ],
      "author": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Apr 30 08:58:27 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Apr 30 23:15:35 2008 +0200"
      },
      "message": "x86: CONFIG_X86_ELAN fix\n\nmove the X86_CPU section out of the !X86_ELAN branch.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n"
    },
    {
      "commit": "19870def587554c4055df3e74a21508e3647fb7e",
      "tree": "d1c483a58e0ec684b8e3678a906dc115ffee5006",
      "parents": [
        "f19dcf4a61ea4a3d155acb239348d09cb264f6a0"
      ],
      "author": {
        "name": "Alexander van Heukelum",
        "email": "heukelum@mailshack.com",
        "time": "Fri Apr 25 13:12:53 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Apr 26 19:21:17 2008 +0200"
      },
      "message": "x86, bitops: select the generic bitmap search functions\n\nIntroduce GENERIC_FIND_FIRST_BIT and GENERIC_FIND_NEXT_BIT in\nlib/Kconfig, defaulting to off. An arch that wants to use the\ngeneric implementation now only has to use a select statement\nto include them.\n\nI added an always-y option (X86_CPU) to arch/x86/Kconfig.cpu\nand used that to select the generic search functions. This\nway ARCH\u003dum SUBARCH\u003di386 automatically picks up the change\ntoo, and arch/um/Kconfig.i386 can therefore be simplified a\nbit. ARCH\u003dum SUBARCH\u003dx86_64 does things differently, but\nstill compiles fine. It seems that a \"def_bool y\" always\nwins over a \"def_bool n\"?\n\nSigned-off-by: Alexander van Heukelum \u003cheukelum@fastmail.fm\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "12d9c8420b9daa1da3d9e090640fb24bcd0deba2",
      "tree": "60affb5bdc5b857dfb3969234659caedbf2ff02a",
      "parents": [
        "64970b68d2b3ed32b964b0b30b1b98518fde388e"
      ],
      "author": {
        "name": "Alexander van Heukelum",
        "email": "heukelum@mailshack.com",
        "time": "Sat Mar 15 13:04:42 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Apr 26 19:21:16 2008 +0200"
      },
      "message": "x86: merge the simple bitops and move them to bitops.h\n\nSome of those can be written in such a way that the same\ninline assembly can be used to generate both 32 bit and\n64 bit code.\n\nFor ffs and fls, x86_64 unconditionally used the cmov\ninstruction and i386 unconditionally used a conditional\nbranch over a mov instruction. In the current patch I\nchose to select the version based on the availability\nof the cmov instruction instead. A small detail here is\nthat x86_64 did not previously set CONFIG_X86_CMOV\u003dy.\n\nImproved comments for ffs, ffz, fls and variations.\n\nSigned-off-by: Alexander van Heukelum \u003cheukelum@fastmail.fm\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "f7f17a67c589f031c567d9fdc809dee7c5868c8a",
      "tree": "1022dde20e24c97919a334adcc75b3bc31ee1c70",
      "parents": [
        "a2b4bd9c95a799ce1002e699187f17ddaa754eb1"
      ],
      "author": {
        "name": "Dmitri Vorobiev",
        "email": "dmitri.vorobiev@gmail.com",
        "time": "Mon Apr 21 00:47:55 2008 +0400"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Apr 26 17:35:47 2008 +0200"
      },
      "message": "x86: remove NexGen support\n\nIt is claimed that NexGen CPUs were never shipped:\n\n   http://lkml.org/lkml/2008/4/20/179\n\nAlso, the kernel support for these chips has been broken for\na long time, the code intended to support NexGen thereby being\nessentially dead.\n\nAs an outcome of the discussion that can be found using the URL\nabove, this patch removes the NexGen support altogether.\n\nThe changes in this patch survived a defconfig build for i386, a\ncouple of successful randconfig builds, as well as a runtime test,\nwhich consisted in booting a 32-bit x86 box up to the shell prompt.\n\nSigned-off-by: Dmitri Vorobiev \u003cdmitri.vorobiev@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "d2b3bab63bd9999a29eb74326a7baf61901385e6",
      "tree": "f065540d231ae7f0ca16c28ed0fb865295746d21",
      "parents": [
        "431ef7a2a486201967304fcc9cfc33e945626fed"
      ],
      "author": {
        "name": "Hugh Dickins",
        "email": "hugh@veritas.com",
        "time": "Thu Apr 03 23:48:29 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Apr 17 17:41:34 2008 +0200"
      },
      "message": "x86: MPSC should use P6 NOPs\n\nI\u0027ve now noticed that the machine I call MPENTIUM4 for 32-bit kernels\nis called MPSC for 64-bit kernels, and in that case it still doesn\u0027t\nget the P6 NOPs it ought to.  hpa explains that MK8 should still be\nexcluded, so it\u0027s just a matter of including MPSC along with MPENTIUM4.\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nAcked-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "fcab59a3186640ce085e89ee6dfc03cacfb6c7c9",
      "tree": "3b68cfba7e3b116809bfb173d7d61fa1452264a5",
      "parents": [
        "6275487806fbc17e92595b5880d7b0ee49363c4f"
      ],
      "author": {
        "name": "Hugh Dickins",
        "email": "hugh@veritas.com",
        "time": "Tue Mar 04 19:33:24 2008 +0000"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Tue Mar 04 11:55:34 2008 -0800"
      },
      "message": "x86: a P4 is a P6 not an i486\n\nP4 has been coming out as CPU_FAMILY\u003d4 instead of 6: fix MPENTIUM4 typo.\n\nSigned-off-by: Hugh Dickins \u003chugh@veritas.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "959b3be64cab9160cd74532a49b89cdd918d38e9",
      "tree": "838955725add661e1e82894be13a32b5380eceae",
      "parents": [
        "7343b3b3a627eb30e24e921f004f659c8ebb91c5"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Thu Feb 14 14:56:45 2008 -0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Feb 26 12:55:51 2008 +0100"
      },
      "message": "x86: don\u0027t use P6_NOPs if compiling with CONFIG_X86_GENERIC\n\nP6_NOPs are definitely not supported on some VIA CPUs, and possibly\n(unverified) on AMD K7s.  It is also the only thing that prevents a\n686 kernel from running on Transmeta TM3x00/5x00 (Crusoe) series.\n\nThe performance benefit over generic NOPs is very small, so when\nbuilding for generic consumption, avoid using them.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n"
    },
    {
      "commit": "7343b3b3a627eb30e24e921f004f659c8ebb91c5",
      "tree": "1e7c77a864c4a3e0186f9192a71520d0d39edf73",
      "parents": [
        "a7ef94e6889186848573a10c5bdb8271405f44de"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Thu Feb 14 14:52:05 2008 -0800"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Tue Feb 26 12:55:51 2008 +0100"
      },
      "message": "x86: require family \u003e\u003d 6 if we are using P6 NOPs\n\nThe P6 family of NOPs are only available on family \u003e\u003d 6 or above, so\nenforce that in the boot code.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n"
    },
    {
      "commit": "fb0328e2e6407d6f48a608aefa62b2be91989e7e",
      "tree": "63b622b88dd422a0c6a62daa649ba48e9870f653",
      "parents": [
        "583d0e90ea52f02ae4d103359ee59e8218799e27"
      ],
      "author": {
        "name": "Nick Piggin",
        "email": "npiggin@suse.de",
        "time": "Wed Jan 30 13:32:31 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Jan 30 13:32:31 2008 +0100"
      },
      "message": "x86: reduce CONFIG_X86_PPRO_FENCE bloat\n\nCONFIG_X86_PPRO_FENCE bloats text:\n\ni386 allmodconf: size mm/built-in.o\n           text    data     bss     dec     hex         text ratio\nvanilla: 163082   20372   40120  223574   36956          100.00%\nbugfix : 163509   20372   40120  224001   36b01            0.26%\nnoppro : 162191   20372   40120  222683   365db         -  0.55%\nboth   : 162267   20372   40120  222759   36627         -  0.50% (+0.05% vs noppro)\n\nSo with the ppro memory ordering bug out of the way, the PG_uptodate fix\nonly adds 76 bytes of text.\n\nallow this config to be specified by distros.\n\n[ mingo@elte.hu: x86.git merge ]\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n"
    },
    {
      "commit": "96daa8cd53945a1220d2b2f4a44bc57f0cc46760",
      "tree": "b187e25cd5b30e9f9f149fa4f38cc3af04da1b73",
      "parents": [
        "6612538ca9b38f0f45d0aec2aae8992c43313705"
      ],
      "author": {
        "name": "Harvey Harrison",
        "email": "harvey.harrison@gmail.com",
        "time": "Wed Jan 30 13:31:03 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Jan 30 13:31:03 2008 +0100"
      },
      "message": "x86: use def_bool where possible in Kconfig.cpu\n\nx86: Use def_bool where possible in Kconfig.cpu\n\nChange occurances of:\n\tbool\n\tdefault X\n\nto:\n\tdef_bool X\n\nSigned-off-by: Harvey Harrison \u003charvey.harrison@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n"
    },
    {
      "commit": "0a049bb0ab807b4a95dce9cd0b603c01c199a287",
      "tree": "2a89d562b28844a4b496fe8db8e307df2174f4a4",
      "parents": [
        "d2499d8b6c94df02629631807dd96deae7aa7637"
      ],
      "author": {
        "name": "Roland McGrath",
        "email": "roland@redhat.com",
        "time": "Wed Jan 30 13:30:54 2008 +0100"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Wed Jan 30 13:30:54 2008 +0100"
      },
      "message": "x86: debugctlmsr kconfig\n\nThis adds the (internal) Kconfig macro CONFIG_X86_DEBUGCTLMSR,\nto be defined when configuring to support only hardware that\ndefinitely supports MSR_IA32_DEBUGCTLMSR with the BTF flag.\n\nThe Intel documentation says \"P6 family\" and later processors all have it.\nI think the Kconfig dependencies are right to have it set for those and\nunset for others (i.e., when 586 and earlier are supported).\n\nSigned-off-by: Roland McGrath \u003croland@redhat.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n"
    },
    {
      "commit": "1032c0ba9da5c5b53173ad2dcf8b2a2da78f8b17",
      "tree": "3477a72cf0a0c0a04540826b54e12afe45eb8ac6",
      "parents": [
        "e279b6c1d329e50b766bce96aacc197eae8a053b"
      ],
      "author": {
        "name": "Sam Ravnborg",
        "email": "sam@ravnborg.org",
        "time": "Tue Nov 06 21:35:08 2007 +0100"
      },
      "committer": {
        "name": "Sam Ravnborg",
        "email": "sam@ravnborg.org",
        "time": "Mon Nov 12 21:02:19 2007 +0100"
      },
      "message": "x86: arch/x86/Kconfig.cpu unification\n\nMove all CPU definitions to Kconfig.cpu\nAlways define X86_MINIMUM_CPU_FAMILY and do the\nobvious code cleanup in boot/cpucheck.c\n\nComments from: Adrian Bunk \u003cbunk@kernel.org\u003e incorporated.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nCc: Adrian Bunk \u003cbunk@kernel.org\u003e\nCc: Brian Gerst \u003cbgerst@didntduck.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: \"H. Peter Anvin\" \u003chpa@zytor.com\u003e\n"
    },
    {
      "commit": "47572387d58a9584c60ebbbdee56fc92c627f16f",
      "tree": "04ac61fdc84b080dac72c30a06cee449b6c3e847",
      "parents": [
        "e703f75d620824739148142c3734ae8223e4d1f5"
      ],
      "author": {
        "name": "Sam Ravnborg",
        "email": "sam@ravnborg.org",
        "time": "Thu Oct 25 21:04:16 2007 +0200"
      },
      "committer": {
        "name": "Sam Ravnborg",
        "email": "sam@ravnborg.org",
        "time": "Thu Oct 25 22:37:02 2007 +0200"
      },
      "message": "x86: move i386 and x86_64 Kconfig files to x86 directory\n\nAfter a small change in kconfig Makefile we could\nmove all x86 Kconfig files to x86 directory.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\n"
    },
    {
      "commit": "75e3808b67f88cdd8c531dda3e00deb3623a3dac",
      "tree": "5eb3ee2b3f7b18ed4e77af4c7b52cc10ddcd528e",
      "parents": [
        "fb893e99080f1a01397fcf8afc480163826b23d4"
      ],
      "author": {
        "name": "Oliver Pinter",
        "email": "oliver.pntr@gmail.com",
        "time": "Wed Oct 17 18:04:36 2007 +0200"
      },
      "committer": {
        "name": "Thomas Gleixner",
        "email": "tglx@inhelltoy.tec.linutronix.de",
        "time": "Wed Oct 17 20:15:59 2007 +0200"
      },
      "message": "x86: add cpu codenames for Kconfig.cpu\n\nadd cpu core name for arch/i386/Kconfig.cpu:Pentium 4 sections help\nadd Pentium D for arch/i386/Kconfig.cpu\nadd Pentium D for arch/x86_64/Kconfig\n\nAK: Clarified some of the descriptions\n[ tglx: arch/x86 adaptation ]\n\nSigned-off-by: Oliver Pinter \u003coliver.pntr@gmail.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nAcked-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n"
    },
    {
      "commit": "2d9ce177e68645945e3366cfe2d66ee3c28cd4f2",
      "tree": "a98a3a8b0f1e92f0b8f9ecb44b67bb46c3b4451a",
      "parents": [
        "3e1f900bff40460d7bbab0ccd1a9efc3c70aee49"
      ],
      "author": {
        "name": "Avi Kivity",
        "email": "avi@qumranet.com",
        "time": "Thu Jul 19 14:30:14 2007 +0300"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Thu Jul 19 14:37:05 2007 -0700"
      },
      "message": "i386: Allow KVM on i386 nonpae\n\nCurrently, CONFIG_X86_CMPXCHG64 both enables boot-time checking of\nthe cmpxchg64b feature and enables compilation of the set_64bit() family.\nSince the option is dependent on PAE, and since KVM depends on set_64bit(),\nthis effectively disables KVM on i386 nopae.\n\nSimplify by removing the config option altogether: the boot check is made\ndependent on CONFIG_X86_PAE directly, and the set_64bit() family is exposed\nwithout constraints.  It is up to users to check for the feature flag (KVM\ndoes not as virtualiation extensions imply its existence).\n\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "de32e04175efbc1ff5e0f509253d5dfc84f173b3",
      "tree": "f6cad93a71f3bbd15b072c959f6e33126ac85db0",
      "parents": [
        "ec481536b15eb0520d8f0204b0294480050fe1f8"
      ],
      "author": {
        "name": "H. Peter Anvin",
        "email": "hpa@zytor.com",
        "time": "Wed Jul 11 12:18:30 2007 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Thu Jul 12 10:55:54 2007 -0700"
      },
      "message": "x86 Kconfig: change X86_MINIMUM_CPU_MODEL to X86_MINIMUM_CPU_FAMILY\n\nThe X86_MINIMUM_CPU_MODEL name isn\u0027t really right, so change it to\nX86_MINIMUM_CPU_FAMILY.  Also, the default minimum should be 3, not 0.\n\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "9d9bbd4d247a674deb43565582151acdc22e90d1",
      "tree": "1bab60b6457812b10dd62f8bbddb7985b53d5495",
      "parents": [
        "3f2c6d0f4f0dafdc99af0df71edba57e7815cb13"
      ],
      "author": {
        "name": "Andi Kleen",
        "email": "ak@suse.de",
        "time": "Sat Jun 23 02:29:23 2007 +0200"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Fri Jun 22 18:41:18 2007 -0700"
      },
      "message": "i386: Make CMPXCHG64 only dependent on PAE\n\nIt is only used for PAE kernels in set_64bit.\n\nThe problem is that due to a old Windows bug many CPUs need magic MSRs\nto enable CMPXCHG64, and we can\u0027t do that nicely early enough before\nit is potentially used.\n\nBut since we only need it in PAE kernels so only force the checking\nfor CMPXCHG65 with PAE.\n\nThis fixes a boot failure on Transmeta Crusoe\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "3dde6ad8fc3939d345a3768464ecff43c91d511a",
      "tree": "bf36419973a724f854ba69de793daaf3d916f9a0",
      "parents": [
        "ccf6780dc3d228f380e17b6858b93fc48e40afd4"
      ],
      "author": {
        "name": "David Sterba",
        "email": "dave@jikos.cz",
        "time": "Wed May 09 07:12:20 2007 +0200"
      },
      "committer": {
        "name": "Adrian Bunk",
        "email": "bunk@stusta.de",
        "time": "Wed May 09 07:12:20 2007 +0200"
      },
      "message": "Fix trivial typos in Kconfig* files\n\nFix several typos in help text in Kconfig* files.\n\nSigned-off-by: David Sterba \u003cdave@jikos.cz\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\n"
    },
    {
      "commit": "c7f81c9453375d6416658995eafd3397cb9bba1d",
      "tree": "44e018745a0b7c12b127eb54106f2f0c2bb5a570",
      "parents": [
        "484ad393659f20d784a3a93613fb3fd3d9f171fa"
      ],
      "author": {
        "name": "Andi Kleen",
        "email": "ak@suse.de",
        "time": "Wed May 02 19:27:20 2007 +0200"
      },
      "committer": {
        "name": "Andi Kleen",
        "email": "andi@basil.nowhere.org",
        "time": "Wed May 02 19:27:20 2007 +0200"
      },
      "message": "[PATCH] i386: Verify important CPUID bits in real mode\n\nCheck some CPUID bits that are needed for compiler generated early in boot.\nWhen the system is still in real mode before changing the VESA BIOS mode\nit is possible to still display an visible error message on the screen.\n\nSimilar to x86-64.\n\nIncludes cleanups from Eric Biederman\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n"
    },
    {
      "commit": "0949be35095b53dbaa72db700cb5074c5c249629",
      "tree": "4dcca21a4e726dae5dd7afcaaebff2a5dd154031",
      "parents": [
        "f5e8861583a591020176c90c10c6a130fed4f3ec"
      ],
      "author": {
        "name": "Simon Arlott",
        "email": "simon@arlott.org",
        "time": "Wed May 02 19:27:05 2007 +0200"
      },
      "committer": {
        "name": "Andi Kleen",
        "email": "andi@basil.nowhere.org",
        "time": "Wed May 02 19:27:05 2007 +0200"
      },
      "message": "[PATCH] i386: Add an option for the VIA C7 which sets appropriate L1 cache\n\nThe VIA C7 is a 686 (with TSC) that supports MMX, SSE and SSE2, it also has\na cache line length of 64 according to\nhttp://www.digit-life.com/articles2/cpu/rmma-via-c7.html.  This patch sets\ngcc to -march\u003d686 and select s the correct cache shift.\n\nSigned-off-by: Simon Arlott \u003csimon@fire.lp0.eu\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Dave Jones \u003cdavej@codemonkey.org.uk\u003e\nCc: Alan Cox \u003calan@lxorguk.ukuu.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\n"
    },
    {
      "commit": "a4af60aa64c828b7c047e7a67b2f896d4bfbd700",
      "tree": "00c65a93497296c5a1a5606db3fff6c703e12094",
      "parents": [
        "f0a5a58aa812b31fd9f197c4ba48245942364eae"
      ],
      "author": {
        "name": "Robert P. J. Day",
        "email": "rpjday@mindspring.com",
        "time": "Tue Feb 13 13:26:25 2007 +0100"
      },
      "committer": {
        "name": "Andi Kleen",
        "email": "andi@basil.nowhere.org",
        "time": "Tue Feb 13 13:26:25 2007 +0100"
      },
      "message": "[PATCH] i386: Remove unused kernel config option X86_XADD\n\nRemove the unused kernel config option X86_XADD, which is unused in any\nsource or header file.\n\nSigned-off-by: Robert P. J. Day \u003crpjday@mindspring.com\u003e\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\n"
    },
    {
      "commit": "f0d1b0b30d250a07627ad8b9fbbb5c7cc08422e8",
      "tree": "0aa5379150574374351fb92af7881a48dbfcf2ce",
      "parents": [
        "b3d7ae5f47a58a9f7b152deeaf7daa1fc558a8f1"
      ],
      "author": {
        "name": "David Howells",
        "email": "dhowells@redhat.com",
        "time": "Fri Dec 08 02:37:49 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.osdl.org",
        "time": "Fri Dec 08 08:28:51 2006 -0800"
      },
      "message": "[PATCH] LOG2: Implement a general integer log2 facility in the kernel\n\nThis facility provides three entry points:\n\n\tilog2()\t\tLog base 2 of unsigned long\n\tilog2_u32()\tLog base 2 of u32\n\tilog2_u64()\tLog base 2 of u64\n\nThese facilities can either be used inside functions on dynamic data:\n\n\tint do_something(long q)\n\t{\n\t\t...;\n\t\ty \u003d ilog2(x)\n\t\t...;\n\t}\n\nOr can be used to statically initialise global variables with constant values:\n\n\tunsigned n \u003d ilog2(27);\n\nWhen performing static initialisation, the compiler will report \"error:\ninitializer element is not constant\" if asked to take a log of zero or of\nsomething not reducible to a constant.  They treat negative numbers as\nunsigned.\n\nWhen not dealing with a constant, they fall back to using fls() which permits\nthem to use arch-specific log calculation instructions - such as BSR on\nx86/x86_64 or SCAN on FRV - if available.\n\n[akpm@osdl.org: MMC fix]\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Wojtek Kaniewski \u003cwojtekka@toxygen.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "c55d92d141b9c40c67db249de91f5c224eb49859",
      "tree": "578a34bf9768bb418d820395415cbd27acc54c1b",
      "parents": [
        "713819989aa4dd141a37074dbc369e7c620bc619"
      ],
      "author": {
        "name": "Andi Kleen",
        "email": "ak@suse.de",
        "time": "Thu Dec 07 02:14:09 2006 +0100"
      },
      "committer": {
        "name": "Andi Kleen",
        "email": "andi@basil.nowhere.org",
        "time": "Thu Dec 07 02:14:09 2006 +0100"
      },
      "message": "[PATCH] i386: Add support for compilation for Core2\n\ngcc doesn\u0027t support -mtune\u003dcore2 yet, but will be soon. Use -mtune\u003dgeneric or -mtune\u003di686\nas fallback\n\nTBD need benchmarking for INTEL_USERCOPY etc. So far I used the same defaults as MPENTIUMM\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\n"
    },
    {
      "commit": "1b4ad242fcfcf1e261604cb91ee5fb8032900997",
      "tree": "84ffb5ef172dc4142b132dc84e6585d26353fa07",
      "parents": [
        "b5cdb5797d364a112879e49cc708083853ffc592"
      ],
      "author": {
        "name": "Paolo \u0027Blaisorblade\u0027 Giarrusso",
        "email": "blaisorblade@yahoo.it",
        "time": "Wed Oct 11 01:21:35 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Oct 11 11:14:20 2006 -0700"
      },
      "message": "[PATCH] uml: fix processor selection to exclude unsupported processors and features\n\nMakes UML compile on any possible processor choice.  The two problems were:\n\n*) x86 code, when 386 is selected, checks at runtime boot_cpuflags, which we do\n   not have.\n\n*) 3Dnow support for memcpy() et al. does not compile currently and fixing this\n   is not trivial, so simply disable it; with this change, if one selects MK7\n   UML compiles (while it did not).\n\nSigned-off-by: Paolo \u0027Blaisorblade\u0027 Giarrusso \u003cblaisorblade@yahoo.it\u003e\nCc: Jeff Dike \u003cjdike@addtoit.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "48a1204c462985378e02b4c5129901f3dbc93f80",
      "tree": "6a786025abe0f1100302e6f18bee16e0a0f9c75e",
      "parents": [
        "bc940c40c6473cb40178458e2c74aea6b45aac03"
      ],
      "author": {
        "name": "Egry Gabor",
        "email": "gaboregry@t-online.hu",
        "time": "Mon Jun 26 18:47:15 2006 +0200"
      },
      "committer": {
        "name": "Adrian Bunk",
        "email": "bunk@stusta.de",
        "time": "Mon Jun 26 18:47:15 2006 +0200"
      },
      "message": "i386: Trivial typo fixes\n\nTrivial typo fixes in Kconfig files (i386).\n\nSigned-off-by: Egry Gabor \u003cgaboregry@t-online.hu\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\n"
    },
    {
      "commit": "1c08ca89b07eeca241fcf1ec297d3ef173a999a9",
      "tree": "c88c0920be1637b837f24dfc859e5c248eb6ca2d",
      "parents": [
        "edd711f3810f46787593fb79eda9a9fbb82cbb62"
      ],
      "author": {
        "name": "Jordan Crouse",
        "email": "jordan.crouse@amd.com",
        "time": "Mon Apr 10 22:53:15 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Tue Apr 11 06:18:34 2006 -0700"
      },
      "message": "[PATCH] Enable TSC for AMD Geode GX/LX\n\nGeode GX/LX should enable X86_TSC.   Pointed out by Adrian Bunk.\n\nSigned-off-by: Jordan Crouse \u003cjordan.crouse@amd.com\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "f90b8116032f4216d260e31f966a3585319387ac",
      "tree": "c7234671ff0ee152e40dc0175fe46a0d7147641d",
      "parents": [
        "6b7f430ee0a269464aa29159eb464e647ca313d3"
      ],
      "author": {
        "name": "Jordan Crouse",
        "email": "jordan.crouse@amd.com",
        "time": "Fri Jan 06 00:12:14 2006 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Fri Jan 06 08:33:38 2006 -0800"
      },
      "message": "[PATCH] Base support for AMD Geode GX/LX processors\n\nProvide basic support for the AMD Geode GX and LX processors.\n\nSigned-off-by: Jordan Crouse \u003cjordan.crouse@amd.com\u003e\nCc: Alan Cox \u003calan@lxorguk.ukuu.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "96d55b882b85b26711a06d8fb2c901df9d52a48b",
      "tree": "309b8993ad321c050411a8dd74729180488a5dcc",
      "parents": [
        "f3ac9fbf7a0b9493377ee88d9b5b2933ff3f7ade"
      ],
      "author": {
        "name": "Paolo \u0027Blaisorblade\u0027 Giarrusso",
        "email": "blaisorblade@yahoo.it",
        "time": "Sun Oct 30 15:00:07 2005 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Sun Oct 30 17:37:16 2005 -0800"
      },
      "message": "[PATCH] uml: reuse i386 cpu-specific tuning\n\nMake UML share the underlying cpu-specific tuning done on i386.\n\nActually, for now many config options aren\u0027t used a lot - but that can be done\nlater.  Also, UML relies on GCC optimization for things like memcpy and such\nmore than i386, so specifying the correct -march and -mtune should be enough.\nLater, we may want to correct some other stuff.\n\nFor instance, since FPU context switching, for us, is done (at least\npartially, i.e.  between our kernelspace and userspace) by the host, we may\nallow usage of FPU operations by GCC.  This doesn\u0027t hold for kernelspace vs.\nkernelspace, but we don\u0027t support preemption.\n\nSigned-off-by: Paolo \u0027Blaisorblade\u0027 Giarrusso \u003cblaisorblade@yahoo.it\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    }
  ]
}