)]}' { "log": [ { "commit": "4f2c774856708bccecb74c0e6296e9e2c9136ee1", "tree": "33ebceafd0f2f21b155dde40344addf45e2cb4ed", "parents": [ "fbaf666b854c04b2d8ebca17114ee409ddea08b5" ], "author": { "name": "Grant Grundler", "email": "grundler@google.com", "time": "Wed Apr 14 18:43:32 2010 -0700" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Fri May 14 17:08:02 2010 -0400" }, "message": "[libata] Disable R_OK (Early ACK) on SII 3726 PMP\n\nIn 2009, While running \"cache read\" performance test of drives behind\nSII PMP we encountered a \"all 5 drives\" timeout on more than 30% of the\nmachines under test. This patch reduces the rate by a factor of about 70.\nLow enough that we didn\u0027t care to further investigate the issue.\n\nPerformance impact with any sort of \"normal\" use was ~2%+ CPU and less\nthan 1% throughput degradation. Worst case impact (cached read) was\n6% IOPS reduction. This is with NCQ off (q\u003d1) but I believe FIS based\nswitching enabled in the SATA driver.\n\nThe patch disables \"Early ACK\" in the 3726 port multiplier.\n\"Early ACK\" is issued when device sends a FIS to the host (via PMP)\nand the PMP sends an ACK immediately back to the device - well before\nthe host gets the response. Under worst case IOPs load (cached read\ntest) and more than 2 PMPs connected to a 4-port SATA controller,\nI suspect the time to service all of the PMPs is exceeding the PMPs\nability to keep track of outstanding FIS it owes the Host. Reducing\nthe number of PMPs to 2 (or 1) reduces the frequency by several orders\nof magnitude. Kudos to Gwendal for initial debugging of this issue.\n[Any errors in the description are mine, not his.]\n\nPatch is currently in production on Google servers.\n\nSigned-off-by: Grant Grundler \u003cgrundler@google.com\u003e\nSigned-off-by: Gwendal Grignou \u003cgwendal@google.com\u003e\nAcked-by: Tejun Heo \u003ctj@kernel.org\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "5a0e3ad6af8660be21ca98a971cd00f331318c05", "tree": "5bfb7be11a03176a87296a43ac6647975c00a1d1", "parents": [ "ed391f4ebf8f701d3566423ce8f17e614cde9806" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Wed Mar 24 17:04:11 2010 +0900" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Mar 30 22:02:32 2010 +0900" }, "message": "include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\npercpu.h is included by sched.h and module.h and thus ends up being\nincluded when building most .c files. percpu.h includes slab.h which\nin turn includes gfp.h making everything defined by the two files\nuniversally available and complicating inclusion dependencies.\n\npercpu.h -\u003e slab.h dependency is about to be removed. Prepare for\nthis change by updating users of gfp and slab facilities include those\nheaders directly instead of assuming availability. As this conversion\nneeds to touch large number of source files, the following script is\nused as the basis of conversion.\n\n http://userweb.kernel.org/~tj/misc/slabh-sweep.py\n\nThe script does the followings.\n\n* Scan files for gfp and slab usages and update includes such that\n only the necessary includes are there. ie. if only gfp is used,\n gfp.h, if slab is used, slab.h.\n\n* When the script inserts a new include, it looks at the include\n blocks and try to put the new include such that its order conforms\n to its surrounding. It\u0027s put in the include block which contains\n core kernel includes, in the same order that the rest are ordered -\n alphabetical, Christmas tree, rev-Xmas-tree or at the end if there\n doesn\u0027t seem to be any matching order.\n\n* If the script can\u0027t find a place to put a new include (mostly\n because the file doesn\u0027t have fitting include block), it prints out\n an error message indicating which .h file needs to be added to the\n file.\n\nThe conversion was done in the following steps.\n\n1. The initial automatic conversion of all .c files updated slightly\n over 4000 files, deleting around 700 includes and adding ~480 gfp.h\n and ~3000 slab.h inclusions. The script emitted errors for ~400\n files.\n\n2. Each error was manually checked. Some didn\u0027t need the inclusion,\n some needed manual addition while adding it to implementation .h or\n embedding .c file was more appropriate for others. This step added\n inclusions to around 150 files.\n\n3. The script was run again and the output was compared to the edits\n from #2 to make sure no file was left behind.\n\n4. Several build tests were done and a couple of problems were fixed.\n e.g. lib/decompress_*.c used malloc/free() wrappers around slab\n APIs requiring slab.h to be added manually.\n\n5. The script was run on all .h files but without automatically\n editing them as sprinkling gfp.h and slab.h inclusions around .h\n files could easily lead to inclusion dependency hell. Most gfp.h\n inclusion directives were ignored as stuff from gfp.h was usually\n wildly available and often used in preprocessor macros. Each\n slab.h inclusion directive was examined and added manually as\n necessary.\n\n6. percpu.h was updated not to include slab.h.\n\n7. Build test were done on the following configurations and failures\n were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my\n distributed build env didn\u0027t work with gcov compiles) and a few\n more options had to be turned off depending on archs to make things\n build (like ipr on powerpc/64 which failed due to missing writeq).\n\n * x86 and x86_64 UP and SMP allmodconfig and a custom test config.\n * powerpc and powerpc64 SMP allmodconfig\n * sparc and sparc64 SMP allmodconfig\n * ia64 SMP allmodconfig\n * s390 SMP allmodconfig\n * alpha SMP allmodconfig\n * um on x86_64 SMP allmodconfig\n\n8. percpu.h modifications were reverted so that it could be applied as\n a separate patch and serve as bisection point.\n\nGiven the fact that I had only a couple of failures from tests on step\n6, I\u0027m fairly confident about the coverage of this conversion patch.\nIf there is a breakage, it\u0027s likely to be something in one of the arch\nheaders which should be easily discoverable easily on most builds of\nthe specific arch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nGuess-its-ok-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Lee Schermerhorn \u003cLee.Schermerhorn@hp.com\u003e\n" }, { "commit": "deeb003e5e01c0db02bb68fd9c93faf75ab9002d", "tree": "5998f81312cbb8276277fa3cae6e13a88df44006", "parents": [ "ac8672ea922bde59acf50eaa1eaa1640a6395fd2" ], "author": { "name": "Shane Huang", "email": "shane.huang@amd.com", "time": "Tue Sep 08 17:37:01 2009 +0800" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Tue Sep 08 21:21:14 2009 -0400" }, "message": "libata: add SATA PMP revision information for spec 1.2\n\nThis small patch is just adding the information for PMP spec 1.2\n\nSigned-off-by: Shane Huang \u003cshane.huang@amd.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "a07d499b4759881db1359dd8812eecd00b0e0a28", "tree": "aaa5a5c95b64ab121ca89a71899abfe8837890f6", "parents": [ "99cf610aa4840d822cdc67d194b23b55010ca9bd" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Thu Jan 29 20:31:33 2009 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Mon Feb 02 23:03:22 2009 -0500" }, "message": "libata: add @spd_limit to sata_down_spd_limit()\n\nAdd @spd_limit to sata_down_spd_limit() so that the caller can specify\nthe SPD limit it wants. This parameter doesn\u0027t get in the way even\nwhen it\u0027s too low. The closest possible limit is applied.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "1eca4365be25c540650693e941bc06a66cf38f94", "tree": "e3ed82850da00308180bf166118f9f9e69d92898", "parents": [ "3c92ec8ae91ecf59d88c798301833d7cf83f2179" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Mon Nov 03 20:03:17 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Sun Dec 28 22:43:20 2008 -0500" }, "message": "libata: beef up iterators\n\nThere currently are the following looping constructs.\n\n* __ata_port_for_each_link() for all available links\n* ata_port_for_each_link() for edge links\n* ata_link_for_each_dev() for all devices\n* ata_link_for_each_dev_reverse() for all devices in reverse order\n\nNow there\u0027s a need for looping construct which is similar to\n__ata_port_for_each_link() but iterates over PMP links before the host\nlink. Instead of adding another one with long name, do the following\ncleanup.\n\n* Implement and export ata_link_next() and ata_dev_next() which take\n @mode parameter and can be used to build custom loop.\n* Implement ata_for_each_link() and ata_for_each_dev() which take\n looping mode explicitly.\n\nThe following iteration modes are implemented.\n\n* ATA_LITER_EDGE\t\t: loop over edge links\n* ATA_LITER_HOST_FIRST\t\t: loop over all links, host link first\n* ATA_LITER_PMP_FIRST\t\t: loop over all links, PMP links first\n\n* ATA_DITER_ENABLED\t\t: loop over enabled devices\n* ATA_DITER_ENABLED_REVERSE\t: loop over enabled devices in reverse order\n* ATA_DITER_ALL\t\t\t: loop over all devices\n* ATA_DITER_ALL_REVERSE\t\t: loop over all devices in reverse order\n\nThis change removes exlicit device enabledness checks from many loops\nand makes it clear which ones are iterated over in which direction.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "0a2c0f56159999e20015241d3b8fa89b1ab14309", "tree": "2c516452d3b3f85e9a4092b6092160e123d5f5d4", "parents": [ "341c2c958ec7bdd9f54733a8b0b432fe76842a82" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Tue May 20 02:17:52 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Mon Jul 14 15:59:32 2008 -0400" }, "message": "libata: improve EH retry delay handling\n\nEH retries were delayed by 5 seconds to ensure that resets don\u0027t occur\nback-to-back. However, this 5 second delay is superflous or excessive\nin many cases. For example, after IDENTIFY times out, there\u0027s no\nreason to wait five more seconds before retrying.\n\nThis patch adds ehc-\u003elast_reset timestamp and record the timestamp for\nthe last reset trial or success and uses it to space resets by\nATA_EH_RESET_COOL_DOWN which is 5 secs and removes unconditional 5 sec\nsleeps.\n\nAs this change makes inter-try waits often shorter and they\u0027re\nredundant in nature, this patch also removes the \"retrying...\"\nmessages.\n\nWhile at it, convert explicit rounding up division to DIV_ROUND_UP().\n\nThis change speeds up EH in many cases w/o sacrificing robustness.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "341c2c958ec7bdd9f54733a8b0b432fe76842a82", "tree": "1af1983fe82ad032de6142229fe6c70f04466918", "parents": [ "bce7f793daec3e65ec5c5705d2457b81fe7b5725" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Tue May 20 02:17:51 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Mon Jul 14 15:59:32 2008 -0400" }, "message": "libata: consistently use msecs for time durations\n\nlibata has been using mix of jiffies and msecs for time druations.\nThis is getting confusing. As writing sub HZ values in jiffies is\nPITA and msecs_to_jiffies() can\u0027t be used as initializer, unify unit\nfor all time durations to msecs. So, durations are in msecs and\ndeadlines are in jiffies. ata_deadline() is added to compute deadline\nfrom a start time and duration in msecs.\n\nWhile at it, drop now superflous _msec suffix from arguments and\nrename @timeout to @deadline if it represents a fixed point in time\nrather than duration.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "19ef9d5e45ce805700f34c248a71a511877b8a5d", "tree": "4ee73bc26ce18704fc98e14393b899980b9a1ffe", "parents": [ "ec2a20e61974f7c9ebe6dd99ac479ec309a750bc" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Wed May 21 14:11:24 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Fri May 30 12:37:56 2008 -0400" }, "message": "libata: SRST can\u0027t be trusted on PMP sil3726\n\nAs in sil4726, SRST can\u0027t be trusted on sil3726 causing detection\nproblems under certain configuraitons. I thought it was from the\nConfig Disk device but apparently not.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "f1bbfb90e81dd84d59de6370689ee6fe6a71fee0", "tree": "d4d8357816cbd578e967a2f0bd07f60f02a73a3d", "parents": [ "bf1bff6fa9fdd4e92e57d80a5434fd5201c051fc" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Mon May 19 01:15:11 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Mon May 19 17:51:48 2008 -0400" }, "message": "libata: make sure PMP notification is turned off during recovery\n\nPMP notification during reset can make some controllers fail reset\nprocessing and needs to be turned off during resets. PMP attach and\nfull-revalidation path did this via sata_pmp_configure() but the quick\nrevalidation wasn\u0027t. Move the notification disable code right above\nfan-out port recovery so that it\u0027s always turned off.\n\nThis fixes obscure reset failures.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "bf1bff6fa9fdd4e92e57d80a5434fd5201c051fc", "tree": "0ebd09fbf4e7f9f5e81e479685930c180eaece76", "parents": [ "e0614db2a398d4d0dc5fb47fe2c2783141262a3e" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Mon May 19 01:15:10 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Mon May 19 17:51:47 2008 -0400" }, "message": "libata: increase PMP register access timeout to 3s\n\nThis timeout was set low because previously PMP register access was\ndone via polling and register access timeouts could stack up. This is\nno longer the case. One timeout will make all following accesses fail\nimmediately.\n\nIn rare cases both marvell and SIMG PMPs need almost a second. Bump\nit to 3s.\n\nWhile at it, rename it to SATA_PMP_RW_TIMEOUT. It\u0027s not specific to\nSCR access.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "dc98c32cbe80750ae2d9d9fbdae305d38f005de7", "tree": "52bff671e5ed5b39056bb4a5c531476c83e9f708", "parents": [ "932648b007de76badc61c1b13d7282288dbe887e" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Mon May 19 01:15:07 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Mon May 19 17:51:47 2008 -0400" }, "message": "libata: move reset freeze/thaw handling into ata_eh_reset()\n\nPreviously reset freeze/thaw handling lived outside of ata_eh_reset()\nmainly because the original PMP reset code needed the port frozen\nwhile resetting all the fan-out ports, which is no longer the case.\n\nThis patch moves freeze/thaw handling into ata_eh_reset().\n@prereset() and @postreset() are now called w/o freezing the port\nalthough @prereset() an be called frozen if the port is frozen prior\nto entering ata_eh_reset().\n\nThis makes code simpler and will help removing hotplug event related\nraces.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\n" }, { "commit": "071f44b1d2c051641b62a3571223314737ccbe59", "tree": "a07794c8109e5d82a78223ae0159eadbf862c463", "parents": [ "48515f6c006c2a9d7b624ee8ad068018c2d3fe0e" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Mon Apr 07 22:47:22 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:25 2008 -0400" }, "message": "libata: implement PMP helpers\n\nImplement helpers to test whether PMP is supported, attached and\ndetermine pmp number to use when issuing SRST to a link. While at it,\nmove ata_is_host_link() so that it\u0027s together with the two new PMP\nhelpers.\n\nThis change simplifies LLDs and helps making PMP support optional.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "48515f6c006c2a9d7b624ee8ad068018c2d3fe0e", "tree": "0ade033552ccb297ac7736a6b2d77dd249be4eb8", "parents": [ "127102aea2ea9ec4e9ca233e2b1a75c8d3b058c4" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Mon Apr 07 22:47:21 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:25 2008 -0400" }, "message": "libata: separate PMP support code from core code\n\nMost of PMP support code is already in libata-pmp.c. All that are in\nlibata-core.c are sata_pmp_port_ops and EXPORTs. Move them to\nlibata-pmp.c. Also, collect PMP related prototypes and declarations\nin header files and move them right above of SFF stuff.\n\nThis change is to make PMP support optional.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "5958e3025fd9d97429163e074d9cfa3848f51f28", "tree": "f20492dc35fc2651452c871fbc812bd4f8379b40", "parents": [ "ac371987a81c61c2efbd6931245cdcaf43baad89" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Mon Apr 07 22:47:20 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:23 2008 -0400" }, "message": "libata: move PMP SCR access failure during reset to ata_eh_reset()\n\nIf PMP fan-out reset fails and SCR isn\u0027t accessible, PMP should be\nreset. This used to be tested by sata_pmp_std_hardreset() and\ncommunicated to EH by -ERESTART. However, this logic is generic and\ndoesn\u0027t really have much to do with specific hardreset implementation.\n\nThis patch moves SCR access failure detection logic to ata_eh_reset()\nwhere it belongs. As this makes sata_pmp_std_hardreset() identical to\nsata_std_hardreset(), the function is killed and replaced with the\nstandard method.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "ac371987a81c61c2efbd6931245cdcaf43baad89", "tree": "f88970931b26d2ad344d7d67ddabc64d9b48181d", "parents": [ "57c9efdfb3cee5d4564fcb5f70555e2edb1bc52a" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Mon Apr 07 22:47:19 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:23 2008 -0400" }, "message": "libata: clear SError after link resume\n\nSError used to be cleared in -\u003epostreset. This has small hotplug race\ncondition. If a device is plugged in after reset is complete but\npostreset hasn\u0027t run yet, its hotplug event gets lost when SError is\ncleared. This patch makes sata_link_resume() clear SError. This\nkills the race condition and makes a lot of sense as some PMP and host\nPHYs don\u0027t work properly without SError cleared.\n\nThis change makes sata_pmp_std_{pre|post}_reset()\u0027s unnecessary as\nthey become identical to ata_std counterparts. It also simplifies\nsata_pmp_hardreset() and ahci_vt8251_hardreset().\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "9dadd45b24145d6aee2fabb28d7aef972301892b", "tree": "c97c323e2edd400bc94eaceddf20f84e9a6da005", "parents": [ "a89611e8489ac24f371c9fd6fef6605b170b16ba" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Mon Apr 07 22:47:19 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:22 2008 -0400" }, "message": "libata: move generic hardreset code from sata_sff_hardreset() to sata_link_hardreset()\n\nsata_sff_hardreset() contains link readiness wait logic which isn\u0027t\nSFF specific. Move that part into sata_link_hardreset(), which now\ntakes two more parameters - @online and @check_ready. Both are\noptional. The former is out parameter for link onlineness after\nreset. The latter is used to wait for link readiness after hardreset.\n\nUsers of sata_link_hardreset() is updated to use new funtionality and\nahci_hardreset() is updated to use sata_link_hardreset() instead of\nsata_sff_hardreset(). This doesn\u0027t really cause any behavior change.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "a1efdaba2dbd6fb89e23a87b66d3f4dd92c9f5af", "tree": "6197c537892e0d887b2a90e369b74abf0500b9ac", "parents": [ "959471936241bd83da7d0a76411cef6772140fe6" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Tue Mar 25 12:22:50 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:18 2008 -0400" }, "message": "libata: make reset related methods proper port operations\n\nCurrently reset methods are not specified directly in the\nata_port_operations table. If a LLD wants to use custom reset\nmethods, it should construct and use a error_handler which uses those\nreset methods. It\u0027s done this way for two reasons.\n\nFirst, the ops table already contained too many methods and adding\nfour more of them would noticeably increase the amount of necessary\nboilerplate code all over low level drivers.\n\nSecond, as -\u003eerror_handler uses those reset methods, it can get\nconfusing. ie. By overriding -\u003eerror_handler, those reset ops can be\nmade useless making layering a bit hazy.\n\nNow that ops table uses inheritance, the first problem doesn\u0027t exist\nanymore. The second isn\u0027t completely solved but is relieved by\nproviding default values - most drivers can just override what it has\nimplemented and don\u0027t have to concern itself about higher level\ncallbacks. In fact, there currently is no driver which actually\nmodifies error handling behavior. Drivers which override\n-\u003eerror_handler just wraps the standard error handler only to prepare\nthe controller for EH. I don\u0027t think making ops layering strict has\nany noticeable benefit.\n\nThis patch makes -\u003eprereset, -\u003esoftreset, -\u003ehardreset, -\u003epostreset and\ntheir PMP counterparts propoer ops. Default ops are provided in the\nbase ops tables and drivers are converted to override individual reset\nmethods instead of creating custom error_handler.\n\n* ata_std_error_handler() doesn\u0027t use sata_std_hardreset() if SCRs\n aren\u0027t accessible. sata_promise doesn\u0027t need to use separate\n error_handlers for PATA and SATA anymore.\n\n* softreset is broken for sata_inic162x and sata_sx4. As libata now\n always prefers hardreset, this doesn\u0027t really matter but the ops are\n forced to NULL using ATA_OP_NULL for documentation purpose.\n\n* pata_hpt374 needs to use different prereset for the first and second\n PCI functions. This used to be done by branching from\n hpt374_error_handler(). The proper way to do this is to use\n separate ops and port_info tables for each function. Converted.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "b558edddb1c42c70a30cfe494984d4be409f7b2b", "tree": "b03275d15675a519de7d4edde709892f885a5fa0", "parents": [ "8cebf274dd1c955a6e03385a85fd6569ce445946" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Thu Jan 24 00:05:14 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:16 2008 -0400" }, "message": "libata: kill ata_ehi_schedule_probe()\n\nata_ehi_schedule_probe() was created to hide details of link-resuming\nreset magic. Now that all the softreset workarounds are gone,\nscheduling probe is very simple - set probe_mask and request RESET.\nKill ata_ehi_schedule_probe() and open code it. This also increases\nconsistency as ata_ehi_schedule_probe() couldn\u0027t cover individual\ndevice probings so they were open-coded even when the helper existed.\n\nWhile at it, define ATA_ALL_DEVICES as mask of all possible devices on\na link and always use it when requesting probe on link level for\nsimplicity and consistency. Setting extra bits in the probe_mask\ndoesn\u0027t hurt anybody.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "672b2d65ba83a6f3f801fd3d58851aa9c0725a54", "tree": "ed3a2fe8013bf8322df637838deccf9f2bc9c92c", "parents": [ "d692abd92f22a81b38d52c39601871003262841c" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Thu Jan 24 00:05:14 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:16 2008 -0400" }, "message": "libata: kill ATA_EHI_RESUME_LINK\n\nATA_EHI_RESUME_LINK has two functions - promote reset to hardreset if\nATA_LFLAG_HRST_TO_RESUME is set and preventing EH from shortcutting\nreset action when probing is requested. The former is gone now and\nthe latter can easily be achieved by making EH to perform at least one\nreset if reset is requested, which also makes more sense than\ndepending on RESUME_LINK flag.\n\nAs ATA_EHI_RESUME_LINK was the only EHI reset modifier, this also\nkills reset modifier handling.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "d692abd92f22a81b38d52c39601871003262841c", "tree": "4ff3f35d88762a52fb4d48adda1f39e1966b9f26", "parents": [ "cf48062658e7ab3bc55e10c65676c3c73c16f8bf" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Thu Jan 24 00:05:14 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:15 2008 -0400" }, "message": "libata: kill ATA_LFLAG_HRST_TO_RESUME\n\nNow that hardreset is the preferred method of resetting, there\u0027s no\nneed for ATA_LFLAG_HRST_TO_RESUME flag. Kill it.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "cf48062658e7ab3bc55e10c65676c3c73c16f8bf", "tree": "9a50a016ceb6051d8a30a43ea39f2a4d3d25570e", "parents": [ "4b119e21d0c66c22e8ca03df05d9de623d0eb50f" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Thu Jan 24 00:05:14 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jgarzik@redhat.com", "time": "Thu Apr 17 15:44:15 2008 -0400" }, "message": "libata: prefer hardreset\n\nWhen both soft and hard resets are available, libata preferred\nsoftreset till now. The logic behind it was to be softer to devices;\nhowever, this doesn\u0027t really help much. Rationales for the change:\n\n* BIOS may freeze lock certain things during boot and softreset can\u0027t\n unlock those. This by itself is okay but during operation PHY event\n or other error conditions can trigger hardreset and the device may\n end up with different configuration.\n\n For example, after a hardreset, previously unlockable HPA can be\n unlocked resulting in different device size and thus revalidation\n failure. Similar condition can occur during or after resume.\n\n* Certain ATAPI devices require hardreset to recover after certain\n error conditions. On PATA, this is done by issuing the DEVICE RESET\n command. On SATA, COMRESET has equivalent effect. The problem is\n that DEVICE RESET needs its own execution protocol.\n\n For SFF controllers with bare TF access, it can be easily\n implemented but more advanced controllers (e.g. ahci and sata_sil24)\n require specialized implementations. Simply using hardreset solves\n the problem nicely.\n\n* COMRESET initialization sequence is the norm in SATA land and many\n SATA devices don\u0027t work properly if only SRST is used. For example,\n some PMPs behave this way and libata works around by always issuing\n hardreset if the host supports PMP.\n\n Like the above example, libata has developed a number of mechanisms\n aiming to promote softreset to hardreset if softreset is not going\n to work. This approach is time consuming and error prone.\n\n Also, note that, dependingon how you read the specs, it could be\n argued that PMP fan-out ports require COMRESET to start operation.\n In fact, all the PMPs on the market except one don\u0027t work properly\n if COMRESET is not issued to fan-out ports after PMP reset.\n\n* COMRESET is an integral part of SATA connection and any working\n device should be able to handle COMRESET properly. After all, it\u0027s\n the way to signal hardreset during reboot. This is the most used\n and recommended (at least by the ahci spec) method of resetting\n devices.\n\nSo, this patch makes libata prefer hardreset over softreset by making\nthe following changes.\n\n* Rename ATA_EH_RESET_MASK to ATA_EH_RESET and use it whereever\n ATA_EH_{SOFT|HARD}RESET used to be used. ATA_EH_{SOFT|HARD}RESET is\n now only used to tell prereset whether soft or hard reset will be\n issued.\n\n* Strip out now unneeded promote-to-hardreset logics from\n ata_eh_reset(), ata_std_prereset(), sata_pmp_std_prereset() and\n other places.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\n" }, { "commit": "39f25e70ca37b8a719e8274e6f3ec2ce2ea8df04", "tree": "5462aab37b324f239015ad025f443669014128ca", "parents": [ "9116300634c5c76cfcd0d2af689846e04d172256" ], "author": { "name": "Mark Lord", "email": "liml@rtr.ca", "time": "Thu Feb 21 15:52:25 2008 -0500" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Sun Feb 24 00:28:23 2008 -0500" }, "message": "libata-pmp: clear hob for pmp register accesses\n\n\u003e\u003e Mark Lord wrote:\n\u003e\u003e\u003e Tejun, I\u0027ve added PMP to sata_mv, and am now trying to get it\n\u003e\u003e\u003e to work with a Marvell PM attached.\n\u003e\u003e\u003e\n\u003e\u003e\u003e And the behaviour I see is very bizarre.\n\u003e\u003e\u003e\n\u003e\u003e\u003e After hard+soft resets, the PM signature is found,\n\u003e\u003e\u003e and libata interrogates the PM registers.\n\u003e\u003e\u003e\n\u003e\u003e\u003e It successfully reads register 0, and then register 1.\n\u003e\u003e\u003e But all subsequent registers read out (incorrectly) as zeros.\n...\n\nThis behavior has been confirmed by Marvell with a SATA analyzer.\nThe Marvell port-multiplier apparently likes to see clean HOB\ninformation when accessing PMP registers.\n\nSince sata_mv uses PIO shadow register access, this doesn\u0027t happen\nautomatically, as it might in a more purely FIS-based driver (eg. ahci).\n\nOne way to fix this is to flag these commands with ATA_TFLAG_LBA48,\nforcing libata to write out the HOB fields with known (zero) values.\n\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nAcked-by: Mark Lord \u003cmlord@pobox.com\u003e\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n" }, { "commit": "8048307dbc3cfc30690b131e786fb57157fbdb11", "tree": "44564349e6e54fef1813071325252700bc8b1cba", "parents": [ "af183748044cefb1050ab47519e6bdcfcecec226" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Thu Jan 10 13:38:46 2008 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Thu Jan 10 16:53:12 2008 -0500" }, "message": "libata-pmp: 4726 hates SRST\n\n4726 hates SRST even on non-config ports. Don\u0027t use it.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n" }, { "commit": "b06ce3e51e3df4394a584c234f11240b1c6f8d5b", "tree": "6a6f5a1cccdc2972b236d376afeba4fd296d5400", "parents": [ "afaa5c373d2c49ee4865847031b82f1377f609d0" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Tue Oct 09 15:06:48 2007 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Fri Oct 12 14:55:47 2007 -0400" }, "message": "libata: use ata_exec_internal() for PMP register access\n\nPMP registers used to be accessed with dedicated accessors -\u003epmp_read\nand -\u003epmp_write. During reset, those callbacks are called with the\nport frozen so they should be able to run without depending on\ninterrupt delivery. To achieve this, they were implemented polling.\n\nHowever, as resetting the host port makes the PMP to isolate fan-out\nports until SError.X is cleared, resetting fan-out ports while port is\nfrozen doesn\u0027t buy much additional safety.\n\nThis patch updates libata PMP support such that PMP registers are\naccessed using regular ata_exec_internal() mechanism and kills\n-\u003epmp_read/write() callbacks. The following changes are made.\n\n* PMP access helpers - sata_pmp_read_init_tf(), sata_pmp_read_val(),\n sata_pmp_write_init_tf() are folded into sata_pmp_read/write() which\n are now standalone PMP register access functions.\n\n* sata_pmp_read/write() returns err_mask instead of rc. This is\n consistent with other functions which issue internal commands and\n allows more detailed error reporting.\n\n* ahci interrupt handler is modified to ignore BAD_PMP and\n spurious/illegal completion IRQs while reset is in progress. These\n conditions are expected during reset.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n" }, { "commit": "31f88384443b3e0d7e2c9d36a96647b7e82edad3", "tree": "7bd6321d668f86adbf266513b83a75ae8d568772", "parents": [ "d0df8b5d0fb547a3351c2a4b1ded7f7cde5d713a" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Sun Sep 23 13:19:54 2007 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Fri Oct 12 14:55:44 2007 -0400" }, "message": "libata-pmp: implement qc_defer for command switching PMP support\n\nImplement sata_pmp_qc_defer_cmd_switch() - standard qc_defer for\ncommand switching PMP support.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n" }, { "commit": "d0df8b5d0fb547a3351c2a4b1ded7f7cde5d713a", "tree": "a2005ec3be6e493844b092edeca9306fbc70f4b8", "parents": [ "633273a3ed1cf37ced90475b0f95cf81deab04f1" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Sun Sep 23 13:19:54 2007 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Fri Oct 12 14:55:44 2007 -0400" }, "message": "libata-pmp: extend ACPI support to cover PMP\n\nExtend ata_acpi_associate_sata_port() such that it can handle PMP and\ncall it when PMP is attached and detached.\n\nBuild breakage when !CONFIG_ATA_ACPI was spotted and fixed by Petr\nVandrovec.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nCc: Petr Vandrovec \u003cpetr@vandrovec.name\u003e\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n" }, { "commit": "3af9a77af9e2b72366363864bfcd3d51465ff98a", "tree": "f6a311a56353cf81d34d64cf1a3f86aa6f659246", "parents": [ "3495de733633d24ee97852080b737b436c110d6e" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Sun Sep 23 13:19:54 2007 +0900" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Fri Oct 12 14:55:44 2007 -0400" }, "message": "libata-pmp: implement Port Multiplier support\n\nImplement Port Multiplier support. To support PMP, a LLDD has to\nsupply ops-\u003epmp_read() and pmp_write(). If non-null, -\u003epmp_attach and\n-\u003epmp_detach are called on PMP attach and detach, respectively.\n\n-\u003epmp_read/write() can be called while the port is frozen, so they\nmust be implemented by polling. This patch supplies several helpers\nto ease -\u003epmp_read/write() implementation.\n\nAlso, irq_handler and error_handler must be PMP aware. Most of PMP\naware EH can be done by calling ata_pmp_do_eh() with appropriate\nmethods. PMP EH uses separate set of reset methods and this patch\nimplements standard prereset, hardreset and postreset methods.\n\nThis patch only implements PMP support. The next patch will integrate\nPMP into the reset of libata and thus enable PMP support.\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n" } ] }