)]}'
{
  "log": [
    {
      "commit": "9c3a50b7d7ec45da34e73cac66cde12dd6092dd8",
      "tree": "a16b2dd972ba8ebdd9e6796ad8f0027513316f49",
      "parents": [
        "a1c03319018061304be28d131073ac13a5cb86fb"
      ],
      "author": {
        "name": "Ira Snyder",
        "email": "iws@ovro.caltech.edu",
        "time": "Wed Jan 06 13:34:06 2010 +0000"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Feb 02 14:51:42 2010 -0700"
      },
      "message": "fsldma: major cleanups and fixes\n\nFix locking. Use two queues in the driver, one for pending transacions, and\none for transactions which are actually running on the hardware. Call\ndma_run_dependencies() on descriptor cleanup so that the async_tx API works\ncorrectly.\n\nThere are a number of places throughout the code where lists of descriptors\nare freed in a loop. Create functions to handle this, and use them instead\nof open-coding the loop each time.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "e7a29151de1bd52081f27f149b68074fac0323be",
      "tree": "72fa616e49d5ca99e0a1dc79f467e73d071d5dd9",
      "parents": [
        "738f5f7e1ae876448cb7d9c82bea258b69386647"
      ],
      "author": {
        "name": "Ira Snyder",
        "email": "iws@ovro.caltech.edu",
        "time": "Wed Jan 06 13:34:03 2010 +0000"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Feb 02 14:51:41 2010 -0700"
      },
      "message": "fsldma: clean up the OF subsystem routines\n\nThis fixes some errors in the cleanup paths of the OF subsystem, including\nmissing checks for ioremap failing. Also, some variables were renamed for\nbrevity.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "738f5f7e1ae876448cb7d9c82bea258b69386647",
      "tree": "61616b4be922b7e3461f26d0d4dc2f9e5b0ac8cc",
      "parents": [
        "a4f56d4b103d4e5d1a59a9118db0185a6bd1a83b"
      ],
      "author": {
        "name": "Ira Snyder",
        "email": "iws@ovro.caltech.edu",
        "time": "Wed Jan 06 13:34:02 2010 +0000"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Feb 02 14:51:41 2010 -0700"
      },
      "message": "fsldma: rename dest to dst for uniformity\n\nMost functions in the standard library use \"dst\" as a parameter, rather\nthan \"dest\". This renames all use of \"dest\" to \"dst\" to match the usual\nconvention.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "a4f56d4b103d4e5d1a59a9118db0185a6bd1a83b",
      "tree": "aa00d6faf06d168e57c090f1eb05b16596b9a299",
      "parents": [
        "4ce0e953f6286777452bf07c83056342d6b9b257"
      ],
      "author": {
        "name": "Ira Snyder",
        "email": "iws@ovro.caltech.edu",
        "time": "Wed Jan 06 13:34:01 2010 +0000"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Feb 02 14:51:41 2010 -0700"
      },
      "message": "fsldma: rename struct fsl_dma_chan to struct fsldma_chan\n\nThis is the beginning of a cleanup which will change all instances of\n\"fsl_dma\" to \"fsldma\" to match the name of the driver itself.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "4ce0e953f6286777452bf07c83056342d6b9b257",
      "tree": "69a182aaa86cad2e8680132464b122374d7a53b0",
      "parents": [
        "272ca655090978bdaa2630fc44fb2c03da5576fd"
      ],
      "author": {
        "name": "Ira Snyder",
        "email": "iws@ovro.caltech.edu",
        "time": "Wed Jan 06 13:34:00 2010 +0000"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Feb 02 14:51:40 2010 -0700"
      },
      "message": "fsldma: remove unused structure members\n\nRemove some unused members from the fsldma data structures. A few trivial\nuses of struct resource were converted to use the stack rather than keeping\nthe memory allocated for the lifetime of the driver.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "e6c7ecb64e08ef346cb7062b4a5421f00bc602bd",
      "tree": "73424d223391302a9a16df65378d78f25fd05929",
      "parents": [
        "162b96e63e518aa6ff029ce23de12d7f027483bf"
      ],
      "author": {
        "name": "Ira Snyder",
        "email": "iws@ovro.caltech.edu",
        "time": "Tue Sep 08 17:53:04 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:53:04 2009 -0700"
      },
      "message": "fsldma: split apart external pause and request count features\n\nWhen using the Freescale DMA controller in external control mode, both the\nrequest count and external pause bits need to be setup correctly. This was\nbeing done with the same function.\n\nThe 83xx controller lacks the external pause feature, but has a similar\nfeature called external start. This feature requires that the request count\nbits be setup correctly.\n\nSplit the function into two parts, to make it possible to use the external\nstart feature on the 83xx controller.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "eda34234578fd822c950fd06b5c5ff7ac08b3001",
      "tree": "860b3c9d347ddd57e6884f9f1e019370de4d45b1",
      "parents": [
        "e0bd0f8cb09cf3ccac1425f0f3a6705106c4d65c"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:53:02 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Sep 08 17:53:02 2009 -0700"
      },
      "message": "fsldma: implement a private tx_list\n\nDrop fsldma\u0027s use of tx_list from struct dma_async_tx_descriptor in\npreparation for removal of this field.\n\nCc: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n\n\n"
    },
    {
      "commit": "a7aea373b4ca428f1be2c1fedd2f26c8e3f2864d",
      "tree": "ca05d01f882aee0f5fd54fd6f649ca0ab566f938",
      "parents": [
        "07a2039b8eb0af4ff464efd3dfd95de5c02648c6"
      ],
      "author": {
        "name": "Ira W. Snyder",
        "email": "iws@ovro.caltech.edu",
        "time": "Thu Apr 23 16:17:54 2009 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jun 16 11:29:17 2009 -0700"
      },
      "message": "fsldma: use PCI Read Multiple command\n\nBy default, the Freescale 83xx DMA controller uses the PCI Read Line\ncommand when reading data over the PCI bus. Setting the controller to use\nthe PCI Read Multiple command instead allows the controller to read much\nlarger bursts of data, which provides a drastic speed increase.\n\nThe slowdown due to using PCI Read Line was only observed when a PCI-to-PCI\nbridge was between the devices trying to communicate.\n\nA simple test driver showed an increase from 4MB/sec to 116MB/sec when\nperforming DMA over the PCI bus. Using DMA to transfer between blocks of\nlocal SDRAM showed no change in performance with this patch. The dmatest\ndriver was also used to verify the correctness of the transfers, and showed\nno errors.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nAcked-by: Timur Tabi \u003ctimur@freescale.com\u003e\nAcked-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "77cd62e8082b9743b59ee1946a4c3ee2e3cd2bce",
      "tree": "8fe08914499988f47f51e74395522e5862b0c31d",
      "parents": [
        "59f647c25a4f27c1e5c84710e0608b36303089f9"
      ],
      "author": {
        "name": "Timur Tabi",
        "email": "timur@freescale.com",
        "time": "Fri Sep 26 17:00:11 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Fri Sep 26 17:00:11 2008 -0700"
      },
      "message": "fsldma: allow Freescale Elo DMA driver to be compiled as a module\n\nModify the Freescale Elo / Elo Plus DMA driver so that it can be compiled as\na module.\n\nThe primary change is to stop treating the DMA controller as a bus, and the\nDMA channels as devices on the bus.  This is because the Open Firmware (OF)\nkernel code does not allow busses to be removed, so although we can call\nof_platform_bus_probe() to probe the DMA channels, there is no\nof_platform_bus_remove().  Instead, the DMA channels are manually probed,\nsimilar to what fsl_elbc_nand.c does.\n\nCc: Scott Wood \u003cscottwood@freescale.com\u003e\nAcked-by: Li Yang \u003cleoli@freescale.com\u003e\nSigned-off-by: Timur Tabi \u003ctimur@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "a4e6d5d3817ebae167e78e5957cd9e624be200c7",
      "tree": "5d69f988bc7bdb5d4c5f9c31210fc1d98848c76a",
      "parents": [
        "f0bb3cfde03ae6d492447883f786c6ee9a4db2ca"
      ],
      "author": {
        "name": "Al Viro",
        "email": "viro@ftp.linux.org.uk",
        "time": "Sat Mar 29 03:10:18 2008 +0000"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Mar 30 14:20:24 2008 -0700"
      },
      "message": "fix the broken annotations in fsldma\n\n a) every bitwise declaration will give a unique type; use typedefs.\n\n b) no need to bother with the stuff pointed to by iomem pointers,\n    unless it\u0027s accessed directly.  noderef will force us to use helpers\n    anyway.\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "f79abb627f033c85a6088231f20c85bc4a9bd757",
      "tree": "151538a3a33026ae516606240a13404d1f1e7037",
      "parents": [
        "f920bb6f5fe21047e669381fe4dd346f6a9d3562"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Tue Mar 18 18:45:00 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Mar 18 17:00:59 2008 -0700"
      },
      "message": "fsldma: Fix the DMA halt when using DMA_INTERRUPT async_tx transfer.\n\nThe DMA_INTERRUPT async_tx is a NULL transfer, thus the BCR(count register)\nis 0. When the transfer started with a byte count of zero, the DMA\ncontroller will triger a PE(programming error) event and halt, not a normal\ninterrupt. I add special codes for PE event and DMA_INTERRUPT\nasync_tx testing.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "173acc7ce8538f1f3040791dc622a92aadc12cf4",
      "tree": "f408e415851cf3343af6077287984169958951ad",
      "parents": [
        "976dde010e513a9c7c3117a32b7b015f84b37430"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Sat Mar 01 07:42:48 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Mar 04 10:16:46 2008 -0700"
      },
      "message": "dmaengine: add driver for Freescale MPC85xx DMA controller\n\nThe driver implements DMA engine API for Freescale MPC85xx DMA controller,\nwhich could be used by devices in the silicon.  The driver supports the\nBasic mode of Freescale MPC85xx DMA controller.  The MPC85xx processors\nsupported include MPC8540/60, MPC8555, MPC8548, MPC8641 and so on.\n\nThe MPC83xx(MPC8349, MPC8360) are also supported.\n\n[kamalesh@linux.vnet.ibm.com: build fix]\n[dan.j.williams@intel.com: merge mm fixes, rebase on async_tx-2.6.25]\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Ebony Zhu \u003cebony.zhu@freescale.com\u003e\nAcked-by: Kumar Gala \u003cgalak@gate.crashing.org\u003e\nCc: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    }
  ]
}