)]}' { "log": [ { "commit": "0961d6581c870850342ad6ea25263763433d666f", "tree": "371c61fd7f621397907983031003e784a040402e", "parents": [ "1756ac3d3c41341297ea25b818b7fce505bb2a9a", "fd0c8894893cba722bdea12de25b49f980795d06" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 21 17:25:01 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 21 17:25:01 2010 -0700" }, "message": "Merge git://git.infradead.org/iommu-2.6\n\n* git://git.infradead.org/iommu-2.6:\n intel-iommu: Set a more specific taint flag for invalid BIOS DMAR tables\n intel-iommu: Combine the BIOS DMAR table warning messages\n panic: Add taint flag TAINT_FIRMWARE_WORKAROUND (\u0027I\u0027)\n panic: Allow warnings to set different taint flags\n intel-iommu: intel_iommu_map_range failed at very end of address space\n intel-iommu: errors with smaller iommu widths\n intel-iommu: Fix boot inside 64bit virtualbox with io-apic disabled\n intel-iommu: use physfn to search drhd for VF\n intel-iommu: Print out iommu seq_id\n intel-iommu: Don\u0027t complain that ACPI_DMAR_SCOPE_TYPE_IOAPIC is not supported\n intel-iommu: Avoid global flushes with caching mode.\n intel-iommu: Use correct domain ID when caching mode is enabled\n intel-iommu mistakenly uses offset_pfn when caching mode is enabled\n intel-iommu: use for_each_set_bit()\n intel-iommu: Fix section mismatch dmar_ir_support() uses dmar_tbl.\n" }, { "commit": "fd0c8894893cba722bdea12de25b49f980795d06", "tree": "1101c32f0c154df0255252ea8bfc1be3dbb74184", "parents": [ "3a8663ee6171e1e61f5c139ed65aa0a769380f00" ], "author": { "name": "Ben Hutchings", "email": "ben@decadent.org.uk", "time": "Sat Apr 03 19:38:43 2010 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed May 19 08:38:11 2010 +0100" }, "message": "intel-iommu: Set a more specific taint flag for invalid BIOS DMAR tables\n\nWe now know how to deal with these tables so that they are harmless.\nSet TAINT_FIRMWARE_WORKAROUND instead of the default TAINT_WARN.\n\nSigned-off-by: Ben Hutchings \u003cben@decadent.org.uk\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "3a8663ee6171e1e61f5c139ed65aa0a769380f00", "tree": "1950967276af3cc4579c20a7ab925d8c7ecf04fb", "parents": [ "92946bc72f2e74c3281b7fc12be9704d455fb3ed" ], "author": { "name": "Ben Hutchings", "email": "ben@decadent.org.uk", "time": "Sat Apr 03 19:37:23 2010 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed May 19 08:37:58 2010 +0100" }, "message": "intel-iommu: Combine the BIOS DMAR table warning messages\n\nWe have nearly the same code for warnings repeated four times. Move\nit into a separate function.\n\nSigned-off-by: Ben Hutchings \u003cben@decadent.org.uk\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "4f506e07e0a3dff34427cece255a8f390a78d5a0", "tree": "a2814c43af0bf82f84028272107740402c7f7eab", "parents": [ "dda565492776b7dff5f8507298d868745e734aab" ], "author": { "name": "Arnaud Patard", "email": "apatard@mandriva.com", "time": "Thu Mar 25 18:02:58 2010 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Apr 14 15:38:59 2010 +0100" }, "message": "intel-iommu: Fix boot inside 64bit virtualbox with io-apic disabled\n\nCommit 074835f0143b83845af5044af2739c52c9f53808 (\"intel-iommu: Fix\nkernel hand if interrupt remapping disabled in BIOS\") is adding a check\nfor interrupt remapping disabled and is dereferencing the dmar_tbl\npointer without checking its value.\n\nUnfortunately, this value is null when booting inside a 64bit virtual\nbox guest with io-apic disabled, leading to a crash. With a check on it,\nthe guest is now booting. It\u0027s triggering a WARN() in\nclockevent_delta2ns but it\u0027s better than not booting at all and allows\nthe user to see there\u0027s something wrong on their io-apic setup.\n\nSigned-off-by: Arnaud Patard \u003capatard@mandriva.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "dda565492776b7dff5f8507298d868745e734aab", "tree": "0e93c6d3cad304b860fa8b8715a3dbd03832b2ae", "parents": [ "680a7524622356f5476e8fad2fe32b2b68b432c0" ], "author": { "name": "Yinghai", "email": "yinghai.lu@oracle.com", "time": "Fri Apr 09 01:07:55 2010 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Apr 09 17:00:00 2010 +0100" }, "message": "intel-iommu: use physfn to search drhd for VF\n\nWhen virtfn is used, we should use physfn to find correct drhd\n\n-v2: add pci_physfn() Suggested by Roland Dreier \u003crdreier@cisco.com\u003e\n do can remove ifdef in dmar.c\n-v3: Chris pointed out we need that for dma_find_matched_atsr_unit too\n also change dmar_pci_device_match() static\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nAcked-by: Roland Dreier \u003crdreier@cisco.com\u003e\nAcked-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "680a7524622356f5476e8fad2fe32b2b68b432c0", "tree": "d0c3db810e627ef590ed3e9f952a80809990bf25", "parents": [ "5715f0f9d3814e83e5f2f754d3f7abdfa096a0b9" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Apr 08 19:58:23 2010 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Apr 09 16:33:13 2010 +0100" }, "message": "intel-iommu: Print out iommu seq_id\n\nmore info on system with more than one IOMMU\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "5715f0f9d3814e83e5f2f754d3f7abdfa096a0b9", "tree": "1c32484fbfbfd0a04333db3c962db92827d36a9c", "parents": [ "78d5f0f500e6ba8f6cfd0673475ff4d941d705a2" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Thu Apr 08 19:58:22 2010 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Apr 09 16:32:18 2010 +0100" }, "message": "intel-iommu: Don\u0027t complain that ACPI_DMAR_SCOPE_TYPE_IOAPIC is not supported\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "5a0e3ad6af8660be21ca98a971cd00f331318c05", "tree": "5bfb7be11a03176a87296a43ac6647975c00a1d1", "parents": [ "ed391f4ebf8f701d3566423ce8f17e614cde9806" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Wed Mar 24 17:04:11 2010 +0900" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Mar 30 22:02:32 2010 +0900" }, "message": "include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\npercpu.h is included by sched.h and module.h and thus ends up being\nincluded when building most .c files. percpu.h includes slab.h which\nin turn includes gfp.h making everything defined by the two files\nuniversally available and complicating inclusion dependencies.\n\npercpu.h -\u003e slab.h dependency is about to be removed. Prepare for\nthis change by updating users of gfp and slab facilities include those\nheaders directly instead of assuming availability. As this conversion\nneeds to touch large number of source files, the following script is\nused as the basis of conversion.\n\n http://userweb.kernel.org/~tj/misc/slabh-sweep.py\n\nThe script does the followings.\n\n* Scan files for gfp and slab usages and update includes such that\n only the necessary includes are there. ie. if only gfp is used,\n gfp.h, if slab is used, slab.h.\n\n* When the script inserts a new include, it looks at the include\n blocks and try to put the new include such that its order conforms\n to its surrounding. It\u0027s put in the include block which contains\n core kernel includes, in the same order that the rest are ordered -\n alphabetical, Christmas tree, rev-Xmas-tree or at the end if there\n doesn\u0027t seem to be any matching order.\n\n* If the script can\u0027t find a place to put a new include (mostly\n because the file doesn\u0027t have fitting include block), it prints out\n an error message indicating which .h file needs to be added to the\n file.\n\nThe conversion was done in the following steps.\n\n1. The initial automatic conversion of all .c files updated slightly\n over 4000 files, deleting around 700 includes and adding ~480 gfp.h\n and ~3000 slab.h inclusions. The script emitted errors for ~400\n files.\n\n2. Each error was manually checked. Some didn\u0027t need the inclusion,\n some needed manual addition while adding it to implementation .h or\n embedding .c file was more appropriate for others. This step added\n inclusions to around 150 files.\n\n3. The script was run again and the output was compared to the edits\n from #2 to make sure no file was left behind.\n\n4. Several build tests were done and a couple of problems were fixed.\n e.g. lib/decompress_*.c used malloc/free() wrappers around slab\n APIs requiring slab.h to be added manually.\n\n5. The script was run on all .h files but without automatically\n editing them as sprinkling gfp.h and slab.h inclusions around .h\n files could easily lead to inclusion dependency hell. Most gfp.h\n inclusion directives were ignored as stuff from gfp.h was usually\n wildly available and often used in preprocessor macros. Each\n slab.h inclusion directive was examined and added manually as\n necessary.\n\n6. percpu.h was updated not to include slab.h.\n\n7. Build test were done on the following configurations and failures\n were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my\n distributed build env didn\u0027t work with gcov compiles) and a few\n more options had to be turned off depending on archs to make things\n build (like ipr on powerpc/64 which failed due to missing writeq).\n\n * x86 and x86_64 UP and SMP allmodconfig and a custom test config.\n * powerpc and powerpc64 SMP allmodconfig\n * sparc and sparc64 SMP allmodconfig\n * ia64 SMP allmodconfig\n * s390 SMP allmodconfig\n * alpha SMP allmodconfig\n * um on x86_64 SMP allmodconfig\n\n8. percpu.h modifications were reverted so that it could be applied as\n a separate patch and serve as bisection point.\n\nGiven the fact that I had only a couple of failures from tests on step\n6, I\u0027m fairly confident about the coverage of this conversion patch.\nIf there is a breakage, it\u0027s likely to be something in one of the arch\nheaders which should be easily discoverable easily on most builds of\nthe specific arch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nGuess-its-ok-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Lee Schermerhorn \u003cLee.Schermerhorn@hp.com\u003e\n" }, { "commit": "0b8973a81876d90f916507ac40d1381068dc986a", "tree": "3cc063537da1b2e041223add104aa6ca3d64ba04", "parents": [ "a79960e576ebca9dbf24489b562689f2be7e9ff0" ], "author": { "name": "Luck, Tony", "email": "tony.luck@intel.com", "time": "Wed Dec 16 22:59:29 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Thu Dec 31 19:42:05 2009 +0000" }, "message": "intel-iommu: Fix section mismatch dmar_ir_support() uses dmar_tbl.\n\ndmar_tbl is declared as __initdata, but dmar_ir_support() is not declared\nas an __init function. Fix is simple since the only caller of dmar_ir_support\n(intr_remapping_supported) is an __init function.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "a79960e576ebca9dbf24489b562689f2be7e9ff0", "tree": "b0748839230c2bba1d49ccdd732608d7d1f334cb", "parents": [ "661e338f728d101b4839b6b157d44cfcb80e3c5e", "cd7bcf32d42b15891620b3f1387a00178b54291a" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 16 10:11:38 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 16 10:11:38 2009 -0800" }, "message": "Merge git://git.infradead.org/iommu-2.6\n\n* git://git.infradead.org/iommu-2.6:\n implement early_io{re,un}map for ia64\n Revert \"Intel IOMMU: Avoid memory allocation failures in dma map api calls\"\n intel-iommu: ignore page table validation in pass through mode\n intel-iommu: Fix oops with intel_iommu\u003digfx_off\n intel-iommu: Check for an RMRR which ends before it starts.\n intel-iommu: Apply BIOS sanity checks for interrupt remapping too.\n intel-iommu: Detect DMAR in hyperspace at probe time.\n dmar: Fix build failure without NUMA, warn on bogus RHSA tables and don\u0027t abort\n iommu: Allocate dma-remapping structures using numa locality info\n intr_remap: Allocate intr-remapping table using numa locality info\n dmar: Allocate queued invalidation structure using numa locality info\n dmar: support for parsing Remapping Hardware Static Affinity structure\n" }, { "commit": "11bd04f6f35621193311c32e0721142b073a7794", "tree": "00979740582bb26e8d3756bf3526c85f19f66a46", "parents": [ "4e2ccdb0409146f8cf64a11b6ef82a9c928ced2a", "9e0b5b2c447ad0caa075a5cfef86def62e1782ff" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Dec 11 12:18:16 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Dec 11 12:18:16 2009 -0800" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (109 commits)\n PCI: fix coding style issue in pci_save_state()\n PCI: add pci_request_acs\n PCI: fix BUG_ON triggered by logical PCIe root port removal\n PCI: remove ifdefed pci_cleanup_aer_correct_error_status\n PCI: unconditionally clear AER uncorr status register during cleanup\n x86/PCI: claim SR-IOV BARs in pcibios_allocate_resource\n PCI: portdrv: remove redundant definitions\n PCI: portdrv: remove unnecessary struct pcie_port_data\n PCI: portdrv: minor cleanup for pcie_port_device_register\n PCI: portdrv: add missing irq cleanup\n PCI: portdrv: enable device before irq initialization\n PCI: portdrv: cleanup service irqs initialization\n PCI: portdrv: check capabilities first\n PCI: portdrv: move PME capability check\n PCI: portdrv: remove redundant pcie type calculation\n PCI: portdrv: cleanup pcie_device registration\n PCI: portdrv: remove redundant pcie_port_device_probe\n PCI: Always set prefetchable base/limit upper32 registers\n PCI: read-modify-write the pcie device control register when initiating pcie flr\n PCI: show dma_mask bits in /sys\n ...\n\nFixed up conflicts in:\n\tarch/x86/kernel/amd_iommu_init.c\n\tdrivers/pci/dmar.c\n\tdrivers/pci/hotplug/acpiphp_glue.c\n" }, { "commit": "6ecbf01c7ce4c0f4c3bdfa0e64ac6258328fda6c", "tree": "91b5c5cdf8aa7a3f4dea1c8ae46a98765fdd9a6f", "parents": [ "2c99220810c1c79322034628b993573b088ff2da" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Dec 02 09:20:27 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 10:02:39 2009 +0000" }, "message": "intel-iommu: Apply BIOS sanity checks for interrupt remapping too.\n\nThe BIOS errors where an IOMMU is reported either at zero or a bogus\naddress are causing problems even when the IOMMU is disabled -- because\ninterrupt remapping uses the same hardware. Ensure that the checks get\napplied for the interrupt remapping initialisation too.\n\nCc: stable@kernel.org\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "2c99220810c1c79322034628b993573b088ff2da", "tree": "0b5e69d0ad7a6da667b752ffd727781c875cccff", "parents": [ "ec208491936d6adb8a70c3dd4a517cdfe54e823d" ], "author": { "name": "Chris Wright", "email": "chrisw@sous-sol.org", "time": "Wed Dec 02 09:17:13 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 10:02:15 2009 +0000" }, "message": "intel-iommu: Detect DMAR in hyperspace at probe time.\n\nMany BIOSes will lie to us about the existence of an IOMMU, and claim\nthat there is one at an address which actually returns all 0xFF.\n\nWe need to detect this early, so that we know we don\u0027t have a viable\nIOMMU and can set up swiotlb before it\u0027s too late.\n\nCc: stable@kernel.org\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "ec208491936d6adb8a70c3dd4a517cdfe54e823d", "tree": "c7291450e8e559c5fbf3360df30999432204af3c", "parents": [ "aa697079ee66315c4b9747a5eb3e48487fb1b8be", "7b626acb8f983eb83b396ab96cc24b18d635d487" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 09:58:33 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 09:59:24 2009 +0000" }, "message": "Merge branch \u0027master\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6\n\nMerge the BIOS workarounds from 2.6.32, and the swiotlb fallback on failure.\n" }, { "commit": "7b626acb8f983eb83b396ab96cc24b18d635d487", "tree": "8c3320191311e6186d3aa722f1acd12acd47ece8", "parents": [ "1ebb275afcf5a47092e995541d6c604eef96062a", "4528752f49c1f4025473d12bc5fa9181085c3f22" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Dec 05 09:49:07 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Dec 05 09:49:07 2009 -0800" }, "message": "Merge branch \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (63 commits)\n x86, Calgary IOMMU quirk: Find nearest matching Calgary while walking up the PCI tree\n x86/amd-iommu: Remove amd_iommu_pd_table\n x86/amd-iommu: Move reset_iommu_command_buffer out of locked code\n x86/amd-iommu: Cleanup DTE flushing code\n x86/amd-iommu: Introduce iommu_flush_device() function\n x86/amd-iommu: Cleanup attach/detach_device code\n x86/amd-iommu: Keep devices per domain in a list\n x86/amd-iommu: Add device bind reference counting\n x86/amd-iommu: Use dev-\u003earch-\u003eiommu to store iommu related information\n x86/amd-iommu: Remove support for domain sharing\n x86/amd-iommu: Rearrange dma_ops related functions\n x86/amd-iommu: Move some pte allocation functions in the right section\n x86/amd-iommu: Remove iommu parameter from dma_ops_domain_alloc\n x86/amd-iommu: Use get_device_id and check_device where appropriate\n x86/amd-iommu: Move find_protection_domain to helper functions\n x86/amd-iommu: Simplify get_device_resources()\n x86/amd-iommu: Let domain_for_device handle aliases\n x86/amd-iommu: Remove iommu specific handling from dma_ops path\n x86/amd-iommu: Remove iommu parameter from __(un)map_single\n x86/amd-iommu: Make alloc_new_range aware of multiple IOMMUs\n ...\n" }, { "commit": "5d990b627537e59a3a2f039ff588a4750e9c1a6a", "tree": "8c0e723c3f9146da52b30c087a80fc417df2b41b", "parents": [ "b26a34aa4792b3db2500b8a98cb7702765c1a92e" ], "author": { "name": "Chris Wright", "email": "chrisw@sous-sol.org", "time": "Fri Dec 04 12:15:21 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Dec 04 16:19:24 2009 -0800" }, "message": "PCI: add pci_request_acs\n\nCommit ae21ee65e8bc228416bbcc8a1da01c56a847a60c \"PCI: acs p2p upsteram\nforwarding enabling\" doesn\u0027t actually enable ACS.\n\nAdd a function to pci core to allow an IOMMU to request that ACS\nbe enabled. The existing mechanism of using iommu_found() in the pci\ncore to know when ACS should be enabled doesn\u0027t actually work due to\ninitialization order; iommu has only been detected not initialized.\n\nHave Intel and AMD IOMMUs request ACS, and Xen does as well during early\ninit of dom0.\n\nCc: Allen Kay \u003callen.m.kay@intel.com\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nCc: Jeremy Fitzhardinge \u003cjeremy@goop.org\u003e\nCc: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5f4d91a1228ac85c75b099efd36fff1a3407335c", "tree": "ed0d13811c60bf3357ef70ea2931e29a358ed023", "parents": [ "7eb776c42e75d17bd8107a1359068d8c742639d1" ], "author": { "name": "Kenji Kaneshige", "email": "kaneshige.kenji@jp.fujitsu.com", "time": "Wed Nov 11 14:36:17 2009 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Nov 24 15:25:16 2009 -0800" }, "message": "PCI: use pci_is_pcie() in pci core\n\nChange for PCI core to use pci_is_pcie() instead of checking\npci_dev-\u003eis_pcie.\n\nSigned-off-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5854d9c8d18359b1fc2f23c0ef2d51dd53281bd6", "tree": "09a4ca21c3f6358db12f60a599f47150e60f4aea", "parents": [ "66b00a7c93ec782d118d2c03bd599cfd041e80a1" ], "author": { "name": "David Woodhouse", "email": "dwmw2@infradead.org", "time": "Thu Nov 19 02:18:44 2009 +0000" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Nov 19 13:42:02 2009 -0800" }, "message": "Fix handling of the HP/Acer \u0027DMAR at zero\u0027 BIOS error for machines with \u003c4GiB RAM.\n\nCommit 86cf898e1d0fca245173980e3897580db38569a8 (\"intel-iommu: Check for\n\u0027DMAR at zero\u0027 BIOS error earlier.\") was supposed to work by pretending\nnot to detect an IOMMU if it was actually being reported by the BIOS at\nphysical address zero.\n\nHowever, the intel_iommu_init() function is called unconditionally, as\nare the corresponding functions for other IOMMU hardware.\n\nSo the patch only worked if you have RAM above the 4GiB boundary. It\ncaused swiotlb to be initialised when no IOMMU was detected during early\nboot, and thus the later IOMMU init would refuse to run.\n\nBut if you have less RAM than that, swiotlb wouldn\u0027t get set up and the\nIOMMU _would_ still end up being initialised, even though we never\nclaimed to detect it.\n\nThis patch also sets the dmar_disabled flag when the error is detected\nduring the initial detection phase -- so that the later call to\nintel_iommu_init() will return without doing anything, regardless of\nwhether swiotlb is used or not.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "75f1cdf1dda92cae037ec848ae63690d91913eac", "tree": "9c12705002ebfa2d75333c20a19d0ac15f1db1d9", "parents": [ "ad32e8cb86e7894aac51c8963eaa9f36bb8a4e14" ], "author": { "name": "FUJITA Tomonori", "email": "fujita.tomonori@lab.ntt.co.jp", "time": "Tue Nov 10 19:46:20 2009 +0900" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Nov 10 12:32:07 2009 +0100" }, "message": "x86: Handle HW IOMMU initialization failure gracefully\n\nIf HW IOMMU initialization fails (Intel VT-d often does this,\ntypically due to BIOS bugs), we fall back to nommu. It doesn\u0027t\nwork for the majority since nowadays we have more than 4GB\nmemory so we must use swiotlb instead of nommu.\n\nThe problem is that it\u0027s too late to initialize swiotlb when HW\nIOMMU initialization fails. We need to allocate swiotlb memory\nearlier from bootmem allocator. Chris explained the issue in\ndetail:\n\n http://marc.info/?l\u003dlinux-kernel\u0026m\u003d125657444317079\u0026w\u003d2\n\nThe current x86 IOMMU initialization sequence is too complicated\nand handling the above issue makes it more hacky.\n\nThis patch changes x86 IOMMU initialization sequence to handle\nthe above issue cleanly.\n\nThe new x86 IOMMU initialization sequence are:\n\n1. we initialize the swiotlb (and setting swiotlb to 1) in the case\n of (max_pfn \u003e MAX_DMA32_PFN \u0026\u0026 !no_iommu). dma_ops is set to\n swiotlb_dma_ops or nommu_dma_ops. if swiotlb usage is forced by\n the boot option, we finish here.\n\n2. we call the detection functions of all the IOMMUs\n\n3. the detection function sets x86_init.iommu.iommu_init to the\n IOMMU initialization function (so we can avoid calling the\n initialization functions of all the IOMMUs needlessly).\n\n4. if the IOMMU initialization function doesn\u0027t need to swiotlb\n then sets swiotlb to zero (e.g. the initialization is\n sucessful).\n\n5. if we find that swiotlb is set to zero, we free swiotlb\n resource.\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nCc: chrisw@sous-sol.org\nCc: dwmw2@infradead.org\nCc: joerg.roedel@amd.com\nCc: muli@il.ibm.com\nLKML-Reference: \u003c1257849980-22640-10-git-send-email-fujita.tomonori@lab.ntt.co.jp\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "9d5ce73a64be2be8112147a3e0b551ad9cd1247b", "tree": "8593dc2ca29e95b1a25e6f677459f3fe5c68dee9", "parents": [ "ea1b0d3945c7374849235b6ecaea1191ee1d9d50" ], "author": { "name": "FUJITA Tomonori", "email": "fujita.tomonori@lab.ntt.co.jp", "time": "Tue Nov 10 19:46:16 2009 +0900" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Tue Nov 10 12:31:36 2009 +0100" }, "message": "x86: intel-iommu: Convert detect_intel_iommu to use iommu_init hook\n\nThis changes detect_intel_iommu() to set intel_iommu_init() to\niommu_init hook if detect_intel_iommu() finds the IOMMU.\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nCc: chrisw@sous-sol.org\nCc: dwmw2@infradead.org\nCc: joerg.roedel@amd.com\nCc: muli@il.ibm.com\nLKML-Reference: \u003c1257849980-22640-6-git-send-email-fujita.tomonori@lab.ntt.co.jp\u003e\n[ -v2: build fix for the !CONFIG_DMAR case ]\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "86cf898e1d0fca245173980e3897580db38569a8", "tree": "fe9ba4ed67ef8e5ae430f0d7d69fba68f70869d7", "parents": [ "799dd75b1a8380a967c929a4551895788c374b31" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon Nov 09 22:15:15 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon Nov 09 22:15:15 2009 +0000" }, "message": "intel-iommu: Check for \u0027DMAR at zero\u0027 BIOS error earlier.\n\nChris Wright has some patches which let us fall back to swiotlb nicely\nif IOMMU initialisation fails. But those are a bit much for 2.6.32.\n\nInstead, let\u0027s shift the check for the biggest problem, the HP and Acer\nBIOS bug which reports a DMAR at physical address zero. That one can\nactually be checked much earlier -- before we even admit to having\ndetected an IOMMU in the first place. So the swiotlb init goes ahead as\nwe want.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "aa697079ee66315c4b9747a5eb3e48487fb1b8be", "tree": "4e34bf80f0257c1462a5e0602de62812dc77ee01", "parents": [ "4c923d4714821cf32ff115bb9c91867dff711972" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Oct 07 12:18:00 2009 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Oct 07 12:18:00 2009 +0100" }, "message": "dmar: Fix build failure without NUMA, warn on bogus RHSA tables and don\u0027t abort\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "751cafe3aeceb9ff887c97237f6daaf596c9e547", "tree": "810ea3e51dd942afb850e3523b97d61f296dcff0", "parents": [ "ee34b32d8c2950f66038c8975747ef9aec855289" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Fri Oct 02 11:01:22 2009 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon Oct 05 07:55:26 2009 +0100" }, "message": "dmar: Allocate queued invalidation structure using numa locality info\n\nAllocate queued invalidation descriptor structures using numa locality info.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "ee34b32d8c2950f66038c8975747ef9aec855289", "tree": "572eef281a2b41b3e5ca5d6889752f5e7736526b", "parents": [ "e0fc7e0b4b5e69616f10a894ab9afff3c64be74e" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Fri Oct 02 11:01:21 2009 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon Oct 05 07:55:22 2009 +0100" }, "message": "dmar: support for parsing Remapping Hardware Static Affinity structure\n\nAdd support for parsing Remapping Hardware Static Affinity (RHSA) structure.\nThis enables identifying the association between remapping hardware units and\nthe corresponding proximity domain. This enables to allocate transalation\nstructures closer to the remapping hardware unit.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "17b6097753e926ca546189463070a7e94e7ea9fa", "tree": "a39bb6715db3951e3dbb2f7b64fc57ef46f3f04b", "parents": [ "4de75cf9391b538bbfe7dc0a9782f1ebe8e242ad" ], "author": { "name": "Roland Dreier", "email": "rdreier@cisco.com", "time": "Thu Sep 24 12:14:00 2009 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Thu Sep 24 12:19:39 2009 -0700" }, "message": "intel-iommu: Decode (and ignore) RHSA entries\n\nI recently got a system where the DMAR table included a couple of RHSA\n(remapping hardware static affinity) entries. Rather than printing a\nmessage about an \"Unknown DMAR structure,\" it would probably be more\nuseful to dump the RHSA structure (as other DMAR structures are dumped).\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "4de75cf9391b538bbfe7dc0a9782f1ebe8e242ad", "tree": "e9ddd0d95767fd2868498e7e86305e579d9fe8ec", "parents": [ "b09a75fc5e77b7c58d097236f89b1ff72dcdb562" ], "author": { "name": "Roland Dreier", "email": "rdreier@cisco.com", "time": "Thu Sep 24 01:01:29 2009 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Sep 23 17:31:27 2009 -0700" }, "message": "intel-iommu: Make \"Unknown DMAR structure\" message more informative\n\nWe might as well print the type of the DMAR structure we don\u0027t know how\nto handle when skipping it. Then someone getting this message has a\nchance of telling whether the structure is just bogus, or if there\nreally is something valid that the kernel doesn\u0027t know how to handle.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "b09a75fc5e77b7c58d097236f89b1ff72dcdb562", "tree": "8f818f1b3e44d9bc822b13dc7c368077981dd6ea", "parents": [ "cf63ff5fa4399e215cc5ef322ccd8bddfff9afa6", "b94996c99c8befed9cbbb8804a4625e203913318" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Sep 23 10:06:10 2009 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Sep 23 10:06:10 2009 -0700" }, "message": "Merge git://git.infradead.org/iommu-2.6\n\n* git://git.infradead.org/iommu-2.6: (23 commits)\n intel-iommu: Disable PMRs after we enable translation, not before\n intel-iommu: Kill DMAR_BROKEN_GFX_WA option.\n intel-iommu: Fix integer wrap on 32 bit kernels\n intel-iommu: Fix integer overflow in dma_pte_{clear_range,free_pagetable}()\n intel-iommu: Limit DOMAIN_MAX_PFN to fit in an \u0027unsigned long\u0027\n intel-iommu: Fix kernel hang if interrupt remapping disabled in BIOS\n intel-iommu: Disallow interrupt remapping if not all ioapics covered\n intel-iommu: include linux/dmi.h to use dmi_ routines\n pci/dmar: correct off-by-one error in dmar_fault()\n intel-iommu: Cope with yet another BIOS screwup causing crashes\n intel-iommu: iommu init error path bug fixes\n intel-iommu: Mark functions with __init\n USB: Work around BIOS bugs by quiescing USB controllers earlier\n ia64: IOMMU passthrough mode shouldn\u0027t trigger swiotlb init\n intel-iommu: make domain_add_dev_info() call domain_context_mapping()\n intel-iommu: Unify hardware and software passthrough support\n intel-iommu: Cope with broken HP DC7900 BIOS\n iommu\u003dpt is a valid early param\n intel-iommu: double kfree()\n intel-iommu: Kill pointless intel_unmap_single() function\n ...\n\nFixed up trivial include lines conflict in drivers/pci/intel-iommu.c\n" }, { "commit": "d26f0528d588e596955bf296a609afe52eafc099", "tree": "314f7a5637d5517a19f29d64a17e3459505def8f", "parents": [ "b963bd39c9000328f6ce4f12aa52abbb0c68ee91", "df43176c934f2bc01f7615a6e20a4b8e77dcdd11" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Sep 19 02:14:45 2009 -0400" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Sep 19 02:14:45 2009 -0400" }, "message": "Merge branch \u0027misc-2.6.32\u0027 into release\n\nConflicts:\n\tdrivers/pci/dmar.c\n\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "eb27cae8adaa658a0bf31631baa1ce29d8183759", "tree": "bd7bca44cd16854deac228f1598d9fa2f8bf22af", "parents": [ "74fca6a42863ffacaf7ba6f1936a9f228950f657" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Mon Jul 06 23:40:19 2009 -0400" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Sep 19 01:33:27 2009 -0400" }, "message": "ACPI: linux/acpi.h should not include linux/dmi.h\n\nusers of acpi.h that need dmi.h should include it directly.\n\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "003d6a38ce1a59e0053a02fd9e9a65b588bc8e33", "tree": "c9b941f4798a2accca200b0b01c07353ce5b07e1", "parents": [ "71fd68e7d234f6b7d8407c8f486764d24f8411f4", "e55a5999ffcf72dc4d43d73618957964cb87065a" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Sep 19 00:37:13 2009 -0400" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sat Sep 19 00:37:13 2009 -0400" }, "message": "Merge branch \u0027sfi-base\u0027 into release\n\nConflicts:\n\tdrivers/acpi/power.c\n\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "074835f0143b83845af5044af2739c52c9f53808", "tree": "f573860163fda805b97656f7bc400f148179e1a9", "parents": [ "e936d0773df172ec8600777fdd72bbc1f75f22ad" ], "author": { "name": "Youquan Song", "email": "youquan.song@intel.com", "time": "Wed Sep 09 12:05:39 2009 -0400" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Sep 11 16:40:10 2009 +0100" }, "message": "intel-iommu: Fix kernel hang if interrupt remapping disabled in BIOS\n\nBIOS clear DMAR table INTR_REMAP flag to disable interrupt remapping. Current\nkernel only check interrupt remapping(IR) flag in DRHD\u0027s extended capability\nregister to decide interrupt remapping support or not. But IR flag will not\nchange when BIOS disable/enable interrupt remapping.\n\nWhen user disable interrupt remapping in BIOS or BIOS often defaultly disable\ninterrupt remapping feature when BIOS is not mature.Though BIOS disable\ninterrupt remapping but intr_remapping_supported function will always report\nto OS support interrupt remapping if VT-d2 chipset populated. On this\ncases, kernel will continue enable interrupt remapping and result kernel panic.\nThis bug exist on almost all platforms with interrupt remapping support.\n\nThis patch add DMAR table INTR_REMAP flag check before enable interrupt\nremapping.\n\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "e936d0773df172ec8600777fdd72bbc1f75f22ad", "tree": "c778f4d6aaee3e9ecbccbb4d0d31565a78e49a26", "parents": [ "adb2fe0277607d50f4e9ef06e1d180051a609c25" ], "author": { "name": "Youquan Song", "email": "youquan.song@intel.com", "time": "Mon Sep 07 10:58:07 2009 -0400" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Sep 11 16:38:53 2009 +0100" }, "message": "intel-iommu: Disallow interrupt remapping if not all ioapics covered\n\nCurrent kernel enable interrupt remapping only when all the vt-d unit support\ninterrupt remapping. So it is reasonable we should also disallow enabling\nintr-remapping if there any io-apics that are not listed under vt-d units.\nOtherwise we can run into issues.\n\nAcked-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "69575d388603365f2afbf4166df93152df59b165", "tree": "ca3d66668c8ec47befc0adbfa62cf135229bda59", "parents": [ "62a3207b8cf3de35368cdc3822b30b82d59eea95" ], "author": { "name": "Shane Wang", "email": "shane.wang@intel.com", "time": "Tue Sep 01 18:25:07 2009 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue Sep 01 18:25:07 2009 -0700" }, "message": "x86, intel_txt: clean up the impact on generic code, unbreak non-x86\n\nMove tboot.h from asm to linux to fix the build errors of intel_txt\npatch on non-X86 platforms. Remove the tboot code from generic code\ninit/main.c and kernel/cpu.c.\n\nSigned-off-by: Shane Wang \u003cshane.wang@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "8211a7b5857914058c52ae977c96463e419b37ab", "tree": "3a3d61d43dd08892d0d1bb1ffa8dc635f634b31e", "parents": [ "2ff729f5445cc47d1910386c36e53fc6b1c5e47a" ], "author": { "name": "Troy Heber", "email": "troy.heber@hp.com", "time": "Wed Aug 19 15:26:11 2009 -0600" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sun Aug 30 19:05:04 2009 +0100" }, "message": "pci/dmar: correct off-by-one error in dmar_fault()\n\nDMAR faults are recorded into a ring of \"fault recording registers\".\nfault_index is a 0-based index into the ring. The code allows the\n0-based fault_index to be equal to the total number of fault registers\navailable from the cap_num_fault_regs() macro, which causes access\nbeyond the last available register.\n\nSigned-off-by Troy Heber \u003ctroy.heber@hp.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "a192a9580bcc41692be1f36b77c3b681827f566a", "tree": "8cf1637f87faa880fdffab62a701b47f699945f9", "parents": [ "2a4ab640d3c28c2952967e5f63ea495555bf2a5f" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Tue Jul 28 16:45:54 2009 -0400" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Fri Aug 28 19:57:27 2009 -0400" }, "message": "ACPI: Move definition of PREFIX from acpi_bus.h to internal..h\n\nLinux/ACPI core files using internal.h all PREFIX \"ACPI: \",\nhowever, not all ACPI drivers use/want it -- and they\nshould not have to #undef PREFIX to define their own.\n\nAdd GPL commment to internal.h while we are there.\n\nThis does not change any actual console output,\nasside from a whitespace fix.\n\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "0815565adfe3f4c369110c57d8ffe83caefeed68", "tree": "c1a2436a7f8c7b61a09ab1b809f65bd5b1325ccc", "parents": [ "cfc65dd57967f2e0c7b3a8b73e6d12470b1cf1c1" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Aug 04 09:17:20 2009 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Aug 04 09:17:24 2009 +0100" }, "message": "intel-iommu: Cope with broken HP DC7900 BIOS\n\nYet another reason why trusting this stuff to the BIOS was a bad idea.\nThe HP DC7900 BIOS reports an iommu at an address which just returns all\nones, when VT-d is disabled in the BIOS.\n\nFix up the missing iounmap in the error paths while we\u0027re at it.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "a59b50e995465911ba580df0bd10cf64aa81fc43", "tree": "b3e97a338ebfd2299675af14b5863ff0dd0b2548", "parents": [ "86886e55b273f565935491816c7c96b82469d4f8" ], "author": { "name": "Joseph Cihula", "email": "joseph.cihula@intel.com", "time": "Tue Jun 30 19:31:10 2009 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Tue Jul 21 11:50:42 2009 -0700" }, "message": "intel_txt: Force IOMMU on for Intel TXT launch\n\nThe tboot module will DMA protect all of memory in order to ensure the that\nkernel will be able to initialize without compromise (from DMA). Consequently,\nthe kernel must enable Intel Virtualization Technology for Directed I/O\n(VT-d or Intel IOMMU) in order to replace this broad protection with the\nappropriate page-granular protection. Otherwise DMA devices will be unable\nto read or write from memory and the kernel will eventually panic.\n\nBecause runtime IOMMU support is configurable by command line options, this\npatch will force it to be enabled regardless of the options specified, and will\nlog a message if it was required to force it on.\n\n dmar.c | 7 +++++++\n intel-iommu.c | 17 +++++++++++++++--\n 2 files changed, 22 insertions(+), 2 deletions(-)\n\nSigned-off-by: Joseph Cihula \u003cjoseph.cihula@intel.com\u003e\nSigned-off-by: Shane Wang \u003cshane.wang@intel.com\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "6ba6c3a4cacfd68bf970e3e04e2ff0d66fa0f695", "tree": "02afc5c010ec841f7e6ad9fc68e8a76f7f18909a", "parents": [ "aa5d2b515b6fca5f8a56eac84f7fa0a68c1ce9b7" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Mon May 18 13:51:35 2009 +0800" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon May 18 14:45:13 2009 +0100" }, "message": "VT-d: add device IOTLB invalidation support\n\nSupport device IOTLB invalidation to flush the translation cached\nin the Endpoint.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "aa5d2b515b6fca5f8a56eac84f7fa0a68c1ce9b7", "tree": "c98753254dfe2f3e54a4c38c9191ab5f4afb4c39", "parents": [ "e277d2fc79d6abb86fafadb58dca0b9c498a9aa7" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Mon May 18 13:51:34 2009 +0800" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon May 18 14:45:09 2009 +0100" }, "message": "VT-d: parse ATSR in DMA Remapping Reporting Structure\n\nParse the Root Port ATS Capability Reporting Structure in the DMA\nRemapping Reporting Structure ACPI table.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "dd7264355a203c3456dbba04db471947d3b55e7e", "tree": "391c6b86f71c78053f7a01c163e27f988ffdefbd", "parents": [ "c416daa98a584596df21ee2c26fac6579ee58f57" ], "author": { "name": "Chris Wright", "email": "chrisw@sous-sol.org", "time": "Wed May 13 15:55:52 2009 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Thu May 14 16:07:37 2009 +0100" }, "message": "intel-iommu: dmar_set_interrupt return error value\n\ndmar_set_interrupt feigns success when arch_setup_dmar_msi\nfails, return error value.\n\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "c416daa98a584596df21ee2c26fac6579ee58f57", "tree": "161a5aaf1e63a14ce8895046139c2ce695b89531", "parents": [ "462b60f6ccc685f7e8aa04ff430e6b4ffedf629f" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sun May 10 20:30:58 2009 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sun May 10 20:32:37 2009 +0100" }, "message": "intel-iommu: Tidy up iommu-\u003egcmd handling\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "1f0ef2aa18802a8ce7eb5a5164aaaf4d59073801", "tree": "953fd29f1853b0773e9dcd72ab1ecb3231c6b457", "parents": [ "4c25a2c1b90bf785fc2e2f0f0c74a80b3e070d39" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sun May 10 19:58:49 2009 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sun May 10 19:58:49 2009 +0100" }, "message": "intel-iommu: Clean up handling of \"caching mode\" vs. IOTLB flushing.\n\nAs we just did for context cache flushing, clean up the logic around\nwhether we need to flush the iotlb or just the write-buffer, depending\non caching mode.\n\nFix the same bug in qi_flush_iotlb() that qi_flush_context() had -- it\nisn\u0027t supposed to be returning an error; it\u0027s supposed to be returning a\nflag which triggers a write-buffer flush.\n\nRemove some superfluous conditional write-buffer flushes which could\nnever have happened because they weren\u0027t for non-present-to-present\nmapping changes anyway.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "4c25a2c1b90bf785fc2e2f0f0c74a80b3e070d39", "tree": "2784fbbf4d6782db300b92870d2bf6111ef26627", "parents": [ "fa3b6dcd5298db2e7b63c17795c9e5570d3df8d9" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sun May 10 17:16:06 2009 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sun May 10 19:49:52 2009 +0100" }, "message": "intel-iommu: Clean up handling of \"caching mode\" vs. context flushing.\n\nIt really doesn\u0027t make a lot of sense to have some of the logic to\nhandle caching vs. non-caching mode duplicated in qi_flush_context() and\n__iommu_flush_context(), while the return value indicates whether the\ncaller should take other action which depends on the same thing.\n\nEspecially since qi_flush_context() thought it was returning something\nentirely different anyway.\n\nThis patch makes qi_flush_context() and __iommu_flush_context() both\nreturn void, removes the \u0027non_present_entry_flush\u0027 argument and makes\nthe only call site which _set_ that argument to 1 do the right thing.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "4ed0d3e6c64cfd9ba4ceb2099b10d1cf8ece4320", "tree": "950bacfaf57040aafbcc2ea9b52eb171d35c23bd", "parents": [ "091069740304c979f957ceacec39c461d0192158" ], "author": { "name": "Fenghua Yu", "email": "fenghua.yu@intel.com", "time": "Fri Apr 24 17:30:20 2009 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Apr 29 06:54:34 2009 +0100" }, "message": "Intel IOMMU Pass Through Support\n\nThe patch adds kernel parameter intel_iommu\u003dpt to set up pass through\nmode in context mapping entry. This disables DMAR in linux kernel; but\nKVM still runs on VT-d and interrupt remapping still works.\n\nIn this mode, kernel uses swiotlb for DMA API functions but other VT-d\nfunctionalities are enabled for KVM. KVM always uses multi level\ntranslation page table in VT-d. By default, pass though mode is disabled\nin kernel.\n\nThis is useful when people don\u0027t want to enable VT-d DMAR in kernel but\nstill want to use KVM and interrupt remapping for reasons like DMAR\nperformance concern or debug purpose.\n\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nAcked-by: Weidong Han \u003cweidong@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "e523b38e2f568af58baa13120a994cbf24e6dee0", "tree": "2601f9c24420cb7c7c381062965908287fdde9a8", "parents": [ "31d3568dfeb1dfb2735f119efe5ece7c6d40969c" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Apr 10 22:27:48 2009 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Apr 10 22:27:48 2009 -0700" }, "message": "intel-iommu: Avoid panic() for DRHD at address zero.\n\nIf the BIOS does something obviously stupid, like claiming that the\nregisters for the IOMMU are at physical address zero, then print a nasty\nmessage and abort, rather than trying to set up the IOMMU and then later\npanicking.\n\nIt\u0027s becoming more and more obvious that trusting this stuff to the BIOS\nwas a mistake.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "276dbf997043cbf38f0087624e0f9c51742c8885", "tree": "eface2519a6ad4c25c2864ee1ee69361ea3f594c", "parents": [ "924b6231edfaf1e764ffb4f97ea382bf4facff58" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sat Apr 04 01:45:37 2009 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sat Apr 04 10:43:31 2009 +0100" }, "message": "intel-iommu: Handle PCI domains appropriately.\n\nWe were comparing {bus,devfn} and assuming that a match meant it was the\nsame device. It doesn\u0027t -- the same {bus,devfn} can exist in\nmultiple PCI domains. Include domain number in device identification\n(and call it \u0027segment\u0027 in most places, because there\u0027s already a lot of\nreferences to \u0027domain\u0027 which means something else, and this code is\ninfected with ACPI thinking already).\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "eb4a52bc660ea835482c582eaaf4893742cbd160", "tree": "c405de01851eb0a2cdd9aa4f8c2b98d3b1eb7bba", "parents": [ "f59c7b69bcba31cd355ababe067202b9895d6102" ], "author": { "name": "Fenghua Yu", "email": "fenghua.yu@intel.com", "time": "Fri Mar 27 14:22:43 2009 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Apr 03 21:45:57 2009 +0100" }, "message": "Intel IOMMU Suspend/Resume Support - Queued Invalidation\n\nThis patch supports queued invalidation suspend/resume.\n\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "fa4b57cc045d6134b9862b2873f9c8ba9ed53ffe", "tree": "7c31d15426e29d86314545be3cf9553ab91ef574", "parents": [ "68a8ca593fac82e336a792226272455901fa83df" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Mon Mar 16 17:05:05 2009 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Tue Mar 17 16:49:30 2009 -0700" }, "message": "x86, dmar: use atomic allocations for QI and Intr-remapping init\n\nImpact: invalid use of GFP_KERNEL in interrupt context\n\nQueued invalidation and interrupt-remapping will get initialized with\ninterrupts disabled (while enabling interrupt-remapping). So use\nGFP_ATOMIC instead of GFP_KERNEL for memory alloacations.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n" }, { "commit": "1531a6a6b81a4e6f9eec9a5608758a6ea14b96e0", "tree": "3b1523516192fdd19b286879376b4d3d7c827b0d", "parents": [ "eba67e5da6e971993b2899d2cdf459ce77d3dbc5" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Mon Mar 16 17:04:57 2009 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Tue Mar 17 15:39:58 2009 -0700" }, "message": "x86, dmar: start with sane state while enabling dma and interrupt-remapping\n\nImpact: cleanup/sanitization\n\nStart from a sane state while enabling dma and interrupt-remapping, by\nclearing the previous recorded faults and disabling previously\nenabled queued invalidation and interrupt-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n" }, { "commit": "eba67e5da6e971993b2899d2cdf459ce77d3dbc5", "tree": "1776415c0ed65e6ad309b6790110941fadef243f", "parents": [ "9d783ba042771284fb4ee5013c3d94220755ae7f" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Mon Mar 16 17:04:56 2009 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Tue Mar 17 15:39:20 2009 -0700" }, "message": "x86, dmar: routines for disabling queued invalidation and intr remapping\n\nImpact: new interfaces (not yet used)\n\nRoutines for disabling queued invalidation and interrupt remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n" }, { "commit": "9d783ba042771284fb4ee5013c3d94220755ae7f", "tree": "102ec9f89d363589108ae35e4b38c12fc6e2765c", "parents": [ "0ac2491f57af5644f88383d28809760902d6f4d7" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Mon Mar 16 17:04:55 2009 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Tue Mar 17 15:38:59 2009 -0700" }, "message": "x86, x2apic: enable fault handling for intr-remapping\n\nImpact: interface augmentation (not yet used)\n\nEnable fault handling flow for intr-remapping aswell. Fault handling\ncode now shared by both dma-remapping and intr-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n" }, { "commit": "0ac2491f57af5644f88383d28809760902d6f4d7", "tree": "0dcf5875ef83a5bd14cbe37f8b4671a4601cc797", "parents": [ "4c5502b1c5744b2090414e1b80ca6388d5c46e06" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Mon Mar 16 17:04:54 2009 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@linux.intel.com", "time": "Tue Mar 17 15:37:06 2009 -0700" }, "message": "x86, dmar: move page fault handling code to dmar.c\n\nImpact: code movement\n\nMove page fault handling code to dmar.c\nThis will be shared both by DMA-remapping and Intr-remapping code.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@linux.intel.com\u003e\n" }, { "commit": "55f2b78995826d549401bdf20abeac1832636bb6", "tree": "931b31f3b6e0879df0f9a1d58ffd040d9a652f2e", "parents": [ "f5c1aa1537be39d8b9bb5279b5881d81898fd3cd", "92b9af9e4f144535c65aee673cfad309f25fa465" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sun Mar 01 12:47:58 2009 +0100" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sun Mar 01 12:47:58 2009 +0100" }, "message": "Merge branch \u0027x86/urgent\u0027 into x86/pat\n" }, { "commit": "084eb960e81505680a9963665722d1bfd94af6a7", "tree": "cfb6ed5b4449b4ae22b941529ece53ce0c705217", "parents": [ "704126ad81b8cb7d3d70adb9ecb143f4d3fb38af" ], "author": { "name": "Tony Battersby", "email": "tonyb@cybernetics.com", "time": "Wed Feb 11 13:24:19 2009 -0800" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sat Feb 14 08:33:34 2009 +0000" }, "message": "intel-iommu: fix endless \"Unknown DMAR structure type\" loop\n\nI have a SuperMicro C2SBX motherboard with BIOS revision 1.0b. With vt-d\nenabled in the BIOS, Linux gets into an endless loop printing\n\"DMAR:Unknown DMAR structure type\" when booting. Here is the DMAR ACPI\ntable:\n\nDMAR @ 0x7fe86dec\n 0000: 44 4d 41 52 98 00 00 00 01 6f 49 6e 74 65 6c 20 DMAR.....oIntel\n 0010: 4f 45 4d 44 4d 41 52 20 00 00 04 06 4c 4f 48 52 OEMDMAR ....LOHR\n 0020: 01 00 00 00 23 00 00 00 00 00 00 00 00 00 00 00 ....#...........\n 0030: 01 00 58 00 00 00 00 00 00 a0 e8 7f 00 00 00 00 ..X.............\n 0040: ff ff ef 7f 00 00 00 00 01 08 00 00 00 00 1d 00 ................\n 0050: 01 08 00 00 00 00 1d 01 01 08 00 00 00 00 1d 02 ................\n 0060: 01 08 00 00 00 00 1d 07 01 08 00 00 00 00 1a 00 ................\n 0070: 01 08 00 00 00 00 1a 01 01 08 00 00 00 00 1a 02 ................\n 0080: 01 08 00 00 00 00 1a 07 01 08 00 00 00 00 1a 07 ................\n 0090: c0 00 68 00 04 10 66 60 ..h...f`\n\nHere are the messages printed by the kernel:\n\nDMAR:Host address width 36\nDMAR:RMRR base: 0x000000007fe8a000 end: 0x000000007fefffff\nDMAR:Unknown DMAR structure type\nDMAR:Unknown DMAR structure type\nDMAR:Unknown DMAR structure type\n...\n\nAlthough I not very familiar with ACPI, to me it looks like struct\nacpi_dmar_header::length \u003d\u003d 0x0058 is incorrect, causing\nparse_dmar_table() to look at an invalid offset on the next loop. This\noffset happens to have struct acpi_dmar_header::length \u003d\u003d 0x0000, which\nprevents the loop from ever terminating. This patch checks for this\ncondition and bails out instead of looping forever.\n\nSigned-off-by: Tony Battersby \u003ctonyb@cybernetics.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "8e1568f3500287d0b36c9776132cb53a42d5651d", "tree": "82740294d41f0e6268b5c3b44f08ef4be5bed708", "parents": [ "b825e6cc7b1401862531df497a4a4daff8102ed5" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Wed Feb 11 01:06:59 2009 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Wed Feb 11 14:20:10 2009 +0100" }, "message": "pci, x86, acpi: fix early_ioremap() leak\n\nPawel reported:\n------------[ cut here ]------------\nWARNING: at arch/x86/mm/ioremap.c:616 check_early_ioremap_leak+0x52/0x67()\nHardware name:\nDebug warning: early ioremap leak of 1 areas detected.\nModules linked in:\nPid: 1, comm: swapper Not tainted 2.6.29-rc4-tip #2\n...\n\nReported-by: Pawel Dziekonski \u003cdzieko@gmail.com\u003e\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "704126ad81b8cb7d3d70adb9ecb143f4d3fb38af", "tree": "e73c4d595799661757b7505cd67833addef0635e", "parents": [ "43f7392ba9e2585bf34f21399b1ed78692b5d437" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Sun Jan 04 16:28:52 2009 +0800" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon Feb 09 11:03:17 2009 +0000" }, "message": "VT-d: handle Invalidation Queue Error to avoid system hang\n\nWhen hardware detects any error with a descriptor from the invalidation\nqueue, it stops fetching new descriptors from the queue until software\nclears the Invalidation Queue Error bit in the Fault Status register.\nFollowing fix handles the IQE so the kernel won\u0027t be trapped in an\ninfinite loop.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "43f7392ba9e2585bf34f21399b1ed78692b5d437", "tree": "c39a18e7bd3185bdfae392b8074fff75a90f39eb", "parents": [ "8e4921515c1a379539607eb443d51c30f4f7f338" ], "author": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Sat Jan 03 23:56:27 2009 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Mon Feb 09 10:00:53 2009 +0000" }, "message": "intel-iommu: fix build error with INTR_REMAP\u003dy and DMAR\u003dn\n\nThis fix should be safe since iommu-\u003eagaw is only used in intel-iommu.c.\nAnd this file is only compiled with DMAR\u003dy.\n\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "1b5736839ae13dadc5947940144f95dd0f4a4a8c", "tree": "2b6ce6b68850d905e4ce5d38b6872b82f6328208", "parents": [ "8c11e798eee2ce4475134eaf61302b28ea4f205d" ], "author": { "name": "Weidong Han", "email": "weidong.han@intel.com", "time": "Mon Dec 08 15:34:06 2008 +0800" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Sat Jan 03 14:02:18 2009 +0100" }, "message": "calculate agaw for each iommu\n\n\"SAGAW\" capability may be different across iommus. Use a default agaw, but if default agaw is not supported in some iommus, choose a less supported agaw.\n\nSigned-off-by: Weidong Han \u003cweidong.han@intel.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "2e824f79240476d57a8589f46232cabf151efe90", "tree": "0e6011ff3237ba92ddae39029ea501358c7de6b7", "parents": [ "19c239ce3d089fee339d1ab7e97b43d6f0557ce5" ], "author": { "name": "Yu Zhao", "email": "yu.zhao@intel.com", "time": "Mon Dec 22 16:54:58 2008 +0800" }, "committer": { "name": "Joerg Roedel", "email": "joerg.roedel@amd.com", "time": "Sat Jan 03 12:05:28 2009 +0100" }, "message": "VT-d: fix segment number being ignored when searching DRHD\n\nOn platforms with multiple PCI segments, any of the segments can have a DRHD\nwith INCLUDE_PCI_ALL flag. So need to check the DRHD\u0027s segment number against\nthe PCI device\u0027s when searching its DRHD.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\nSigned-off-by: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\n" }, { "commit": "b876d08f816527af257e13d89fb0d3b4b849223c", "tree": "40569f568230f918ca55f04b355e251747f913ed", "parents": [ "b364776ad1208a71f0c53578c84619a395412a8d", "2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Oct 21 19:42:20 2008 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Oct 21 19:42:20 2008 +0100" }, "message": "Merge branch \u0027master\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6\n\nConflicts:\n\n\tdrivers/pci/dmar.c\n" }, { "commit": "9301975ec251bab1ad7cfcb84a688b26187e4e4a", "tree": "91e48be0bdc67cbcb75bc8a299a3dcf168e0a814", "parents": [ "7110879cf2afbfb7af79675f5ff109e63d631c25", "dd3a1db900f2a215a7d7dd71b836e149a6cf5fed" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 20 13:22:50 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Oct 20 13:23:01 2008 -0700" }, "message": "Merge branch \u0027genirq-v28-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\nThis merges branches irq/genirq, irq/sparseirq-v4, timers/hpet-percpu\nand x86/uv.\n\nThe sparseirq branch is just preliminary groundwork: no sparse IRQs are\nactually implemented by this tree anymore - just the new APIs are added\nwhile keeping the old way intact as well (the new APIs map 1:1 to\nirq_desc[]). The \u0027real\u0027 sparse IRQ support will then be a relatively\nsmall patch ontop of this - with a v2.6.29 merge target.\n\n* \u0027genirq-v28-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (178 commits)\n genirq: improve include files\n intr_remapping: fix typo\n io_apic: make irq_mis_count available on 64-bit too\n genirq: fix name space collisions of nr_irqs in arch/*\n genirq: fix name space collision of nr_irqs in autoprobe.c\n genirq: use iterators for irq_desc loops\n proc: fixup irq iterator\n genirq: add reverse iterator for irq_desc\n x86: move ack_bad_irq() to irq.c\n x86: unify show_interrupts() and proc helpers\n x86: cleanup show_interrupts\n genirq: cleanup the sparseirq modifications\n genirq: remove artifacts from sparseirq removal\n genirq: revert dynarray\n genirq: remove irq_to_desc_alloc\n genirq: remove sparse irq code\n genirq: use inline function for irq_to_desc\n genirq: consolidate nr_irqs and for_each_irq_desc()\n x86: remove sparse irq from Kconfig\n genirq: define nr_irqs for architectures with GENERIC_HARDIRQS\u003dn\n ...\n" }, { "commit": "f82851a8a480a26611175f064f54e17f5f7b01ae", "tree": "6649d01d7adb0f1e3e5357f10082cb9823d2a40d", "parents": [ "bb9e6d65078da2f38cfe1067cfd31a896ca867c0" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sat Oct 18 15:43:14 2008 +0100" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sat Oct 18 15:45:48 2008 +0100" }, "message": "dmar: fix uninitialised \u0027ret\u0027 variable in dmar_parse_dev()\n\nThis was introduced by commit 1886e8a90a580f3ad343f2065c84c1b9e1dac9ef\n(\"x64, x2apic/intr-remap: code re-structuring, to be used by both DMA\nand Interrupt remapping\"). It was causing bogus results to be returned\nfrom dmar_parse_dev() when the first unit with the INCLUDE_ALL flag was\nprocessed.\n\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "5b6985ce8ec7127b4d60ad450b64ca8b82748a3b", "tree": "f1d5a27601df04a3481690a1a2f90fc688034aff", "parents": [ "cacd4213d8ffed83676f38d5d8e93c673e0f1af7" ], "author": { "name": "Fenghua Yu", "email": "fenghua.yu@intel.com", "time": "Thu Oct 16 18:02:32 2008 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Sat Oct 18 14:29:15 2008 +0100" }, "message": "intel-iommu: IA64 support\n\nThe current Intel IOMMU code assumes that both host page size and Intel\nIOMMU page size are 4KiB. The first patch supports variable page size.\nThis provides support for IA64 which has multiple page sizes.\n\nThis patch also adds some other code hooks for IA64 platform including\nDMAR_OPERATION_TIMEOUT definition.\n\n[dwmw2: some cleanup]\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "cacd4213d8ffed83676f38d5d8e93c673e0f1af7", "tree": "ffaba6f6b6597973ac7f605809446621dbc8fc6c", "parents": [ "a77b67d4023770805141014b8fa9eb5467457817" ], "author": { "name": "Youquan Song", "email": "youquan.song@intel.com", "time": "Thu Oct 16 16:31:57 2008 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Oct 17 08:05:30 2008 +0100" }, "message": "dmar: remove the quirk which disables dma-remapping when intr-remapping enabled\n\nNow that we have DMA-remapping support for queued invalidation, we\ncan enable both DMA-remapping and interrupt-remapping at the same time.\n\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "3481f21097cb560392c411377893b5109fbde557", "tree": "5bc3165cb45a0d4bc04ce3d945b5ec8483939ed7", "parents": [ "f05810c9962bba3e809f07619bda1bfdebbfbfb9" ], "author": { "name": "Youquan Song", "email": "youquan.song@intel.com", "time": "Thu Oct 16 16:31:55 2008 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Oct 17 08:03:14 2008 +0100" }, "message": "dmar: context cache and IOTLB invalidation using queued invalidation\n\nImplement context cache invalidate and IOTLB invalidation using\nqueued invalidation interface. This interface will be used by\nDMA remapping, when queued invalidation is supported.\n\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "f05810c9962bba3e809f07619bda1bfdebbfbfb9", "tree": "d226f13a0d93cda208f9aea85d2a9ac29086f3e1", "parents": [ "2e532d68a2b3e2aa6b19731501222069735c741c" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Oct 16 16:31:54 2008 -0700" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Fri Oct 17 08:03:05 2008 +0100" }, "message": "dmar: use spin_lock_irqsave() in qi_submit_sync()\n\nNext patch in the series will use queued invalidation interface\nqi_submit_sync() for DMA-remapping aswell, which can be called from interrupt\ncontext.\n\nSo use spin_lock_irqsave() instead of spin_lock() in qi_submit_sync().\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Youquan Song \u003cyouquan.song@intel.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "1c7d1bcad218808a4f67a4492a5e1d920e85c239", "tree": "c38074ceba9a32fd42a815b459205cc0ed715923", "parents": [ "04e2ea67069e285404192a35c24dfe7c53b9c61f" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Wed Sep 03 16:58:35 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Oct 16 16:53:05 2008 +0200" }, "message": "dmar: fix dmar_parse_dev() devices_cnt error condition check\n\nIt is possible that,\ninstead of PCI endpoint/sub-hierarchy structures, only IO-APIC/HPET\ndevices may be reported under device scope structures. Fix the devices_cnt\nerror check, which cares about only PCI structures and removes the\ndma-remapping unit structure (dmaru) when the devices_cnt is zero\nand include_all flag is not set.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nAcked-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "04e2ea67069e285404192a35c24dfe7c53b9c61f", "tree": "38386a8889d61b64d595172b52de96d9f501cc89", "parents": [ "74d04bd7dcb4c6130fd8a314d28bfecc9ae7c360" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Wed Sep 03 16:58:34 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Oct 16 16:53:05 2008 +0200" }, "message": "dmar: use list_for_each_entry_safe() in dmar_dev_scope_init()\n\nIn dmar_dev_scope_init(), functions called under for_each_drhd_unit()/\nfor_each_rmrr_units() can delete the list entry under some error conditions.\n\nSo we should use list_for_each_entry_safe() for safe traversal.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nAcked-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "74d04bd7dcb4c6130fd8a314d28bfecc9ae7c360", "tree": "90efec3fc887afb79ec86ea7b7a190244579d1b6", "parents": [ "f6dd5c3106fb283e37d915eeb33019ef40510f85" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel@gmail.com", "time": "Wed Sep 03 16:58:33 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Oct 16 16:53:05 2008 +0200" }, "message": "dmar: initialize the return value in dmar_parse_dev()\n\ninitialize the return value in dmar_parse_dev()\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "f6dd5c3106fb283e37d915eeb33019ef40510f85", "tree": "61d95e10b63847c8dfdc13e40e7e3291427d3123", "parents": [ "a11b5abef50722e42a7d13f6b799c4f606fcb797" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel@gmail.com", "time": "Wed Sep 03 16:58:32 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Oct 16 16:53:04 2008 +0200" }, "message": "dmar: fix using early fixmap mapping for DMAR table parsing\n\nVery early detection of the DMAR tables will setup fixmap mapping. For\nparsing these tables later (while enabling dma and/or interrupt remapping),\nearly fixmap mapping shouldn\u0027t be used. Fix it by calling table detection\nroutines again, which will call generic apci_get_table() for setting up\nthe correct mapping.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "387179464257921eb9aa3d15cc3ff194f6945a7c", "tree": "a7f06903688df8a1d3231faf1ab68bf80e032ea6", "parents": [ "aa3a816b6d0bd59e1a9c548cc7d2dd829f26534f" ], "author": { "name": "Kay, Allen M", "email": "allen.m.kay@intel.com", "time": "Tue Sep 09 18:37:29 2008 +0300" }, "committer": { "name": "Avi Kivity", "email": "avi@redhat.com", "time": "Wed Oct 15 14:24:08 2008 +0200" }, "message": "VT-d: Changes to support KVM\n\nThis patch extends the VT-d driver to support KVM\n\n[Ben: fixed memory pinning]\n[avi: move dma_remapping.h as well]\n\nSigned-off-by: Kay, Allen M \u003callen.m.kay@intel.com\u003e\nSigned-off-by: Weidong Han \u003cweidong.han@intel.com\u003e\nSigned-off-by: Ben-Ami Yassour \u003cbenami@il.ibm.com\u003e\nSigned-off-by: Amit Shah \u003camit.shah@qumranet.com\u003e\nAcked-by: Mark Gross \u003cmgross@linux.intel.com\u003e\nSigned-off-by: Avi Kivity \u003cavi@qumranet.com\u003e\n" }, { "commit": "1cb11583a6c4ceda7426eb36f7bf0419da8dfbc2", "tree": "ee13b5125001f49fc162719cf5412f87707df54a", "parents": [ "32e1d0a0651004f5fe47f85a2a5c725ad579a90c" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:51 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:45:00 2008 +0200" }, "message": "x64, x2apic/intr-remap: disable DMA-remapping if Interrupt-remapping is detected (temporary quirk)\n\nInterrupt-remapping enables queued invalidation. And once queued invalidation\nis enabled, IOTLB invalidation also needs to use the queued invalidation\nmechanism and the register based IOTLB invalidation doesn\u0027t work.\n\nFor now, Support for IOTLB invalidation using queued invalidation is\nmissing. Meanwhile, disable DMA-remapping, if Interrupt-remapping\nsupport is detected.\n\nFor the meanwhile, if someone wants to really enable DMA-remapping, they\ncan use nox2apic, which will disable interrupt-remapping and as such\ndoesn\u0027t enable queued invalidation.\n\nAnd given that none of the release platforms support intr-remapping yet,\nwe should be ok for this temporary hack.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "2ae21010694e56461a63bfc80e960090ce0a5ed9", "tree": "d4ecdb710c4361df473b063eda9e1426fcf5c309", "parents": [ "fe962e90cb17a8426e144dee970e77ed789d98ee" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:43 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:44:53 2008 +0200" }, "message": "x64, x2apic/intr-remap: Interrupt remapping infrastructure\n\nInterrupt remapping (part of Intel Virtualization Tech for directed I/O)\ninfrastructure.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "fe962e90cb17a8426e144dee970e77ed789d98ee", "tree": "c7b3343df9bf58e047333758a89c78f6615fb97b", "parents": [ "cf1337f0447e5be8e66daa944f0ea3bcac2b6179" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:42 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:44:52 2008 +0200" }, "message": "x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d)\n\nQueued invalidation (part of Intel Virtualization Technology for\nDirected I/O architecture) infrastructure.\n\nThis will be used for invalidating the interrupt entry cache in the\ncase of Interrupt-remapping and IOTLB invalidation in the case\nof DMA-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "ad3ad3f6a2caebf56869b83b69e23eb9fa5e0ab6", "tree": "7bc99dde6a6313eb43783086a33f6eebc1da1907", "parents": [ "2d6b5f85bb4ca919d8ab0f30311309b53fb93bc3" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:40 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:44:50 2008 +0200" }, "message": "x64, x2apic/intr-remap: parse ioapic scope under vt-d structures\n\nParse the vt-d device scope structures to find the mapping between IO-APICs\nand the interrupt remapping hardware units.\n\nThis will be used later for enabling Interrupt-remapping for IOAPIC devices.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "2d6b5f85bb4ca919d8ab0f30311309b53fb93bc3", "tree": "518ea92478e5d39a41db9dc89d78976fec7254f2", "parents": [ "aaa9d1dd63bf89b62f4ea9f46de376ab1a3fbc6c" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:39 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:44:50 2008 +0200" }, "message": "x64, x2apic/intr-remap: Fix the need for RMRR in the DMA-remapping detection\n\nPresence of RMRR structures is not compulsory for enabling DMA-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Yong Y Wang \u003cyong.y.wang@intel.com\u003e\nCc: Yong Y Wang \u003cyong.y.wang@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "aaa9d1dd63bf89b62f4ea9f46de376ab1a3fbc6c", "tree": "918c5fc937ea45f26660742a0a9a0d6c22df68f1", "parents": [ "1886e8a90a580f3ad343f2065c84c1b9e1dac9ef" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:38 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:44:49 2008 +0200" }, "message": "x64, x2apic/intr-remap: use CONFIG_DMAR for DMA-remapping specific code\n\nDMA remapping specific code covered with CONFIG_DMAR in\nthe generic code which will also be used later for enabling Interrupt-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "1886e8a90a580f3ad343f2065c84c1b9e1dac9ef", "tree": "1f0a6b536a1bb7b24585973e70ad8e1a9a076f09", "parents": [ "c42d9f32443397aed2d37d37df161392e6a5862f" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:37 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:44:48 2008 +0200" }, "message": "x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and Interrupt remapping\n\nAllocate the iommu during the parse of DMA remapping hardware\ndefinition structures. And also, introduce routines for device\nscope initialization which will be explicitly called during\ndma-remapping initialization.\n\nThese will be used for enabling interrupt remapping separately from the\nexisting DMA-remapping enabling sequence.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "c42d9f32443397aed2d37d37df161392e6a5862f", "tree": "564126849bb2e31d2cfb719c3b03457a597733d2", "parents": [ "e61d98d8dad0048619bb138b0ff996422ffae53b" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:36 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:44:47 2008 +0200" }, "message": "x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus\n\nClean up the intel-iommu code related to deferred iommu flush logic. There is\nno need to allocate all the iommu\u0027s as a sequential array.\n\nThis will be used later in the interrupt-remapping patch series to\nallocate iommu much early and individually for each device remapping\nhardware unit.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "e61d98d8dad0048619bb138b0ff996422ffae53b", "tree": "f31fe1610a082e0e12605db879ff56546ad971e5", "parents": [ "1ba89386db0a3f39590b90b5dd20d7149ae52de0" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Thu Jul 10 11:16:35 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Jul 12 08:44:46 2008 +0200" }, "message": "x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganization\n\ncode reorganization of the generic Intel vt-d parsing related routines and linux\niommu routines specific to Intel vt-d.\n\ndrivers/pci/dmar.c\tnow contains the generic vt-d parsing related routines\ndrivers/pci/intel_iommu.c contains the iommu routines specific to vt-d\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "98bcef56cadb4da138e2c1a2a0790f372382b236", "tree": "a33c72c26d6075e3bab1c27791ccbabac7ebd0af", "parents": [ "eaeb16883bd6aa2d6b6b61b825c0d2b0dc793f60" ], "author": { "name": "mark gross", "email": "mgross@linux.intel.com", "time": "Sat Feb 23 15:23:35 2008 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Sat Feb 23 17:12:14 2008 -0800" }, "message": "copyright owner and author clean up for intel iommu and related files\n\nThe following is a clean up and correction of the copyright holding\nentities for the files associated with the intel iommu code.\n\nSigned-off-by: \u003cmgross@linux.intel.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "f661197e0a95ec7305e1e790d95b72a74a1c4a0f", "tree": "a6916d877a3d9db9bc658758bd347d4f436f6d59", "parents": [ "b1ed88b47f5e18c6efb8041275c16eeead5377df" ], "author": { "name": "David Miller", "email": "davem@davemloft.net", "time": "Wed Feb 06 01:36:23 2008 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Wed Feb 06 10:41:01 2008 -0800" }, "message": "Genericizing iova.[ch]\n\nI would like to potentially move the sparc64 IOMMU code over to using\nthe nice new drivers/pci/iova.[ch] code for free area management..\n\nIn order to do that we have to detach the IOMMU page size assumptions\nwhich only really need to exist in the intel-iommu.[ch] code.\n\nThis patch attempts to implement that.\n\n[akpm@linux-foundation.org: build fix]\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "093f87d279669c74e84530e925e4735c9aae8898", "tree": "b388fed2eaedde4ad103d706666c84e5799dbe04", "parents": [ "652c538eb5bc3fa04bc5f27db9014f0168aefe97" ], "author": { "name": "Fenghua Yu", "email": "fenghua.yu@intel.com", "time": "Wed Nov 21 15:07:14 2007 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:21 2008 -0800" }, "message": "PCI: More Sanity checks for DMAR\n\nAdd and changes a few sanity checks in dmar.c.\n\n1. The haw field in ACPI DMAR table in VT-d spec doesn\u0027t describe the\n range of haw. But since DMA page size is 4KB in DMA remapping, haw\n should be at least 4KB. The current VT-d code in dmar.c returns failure\n when haw\u003d\u003d0. This sanity check is not accurate and execution can pass\n when haw is less than one page size 4KB. This patch changes the haw\n sanity check to validate if haw is less than 4KB.\n\n2. Add dmar_rmrr_units verification.\n\n3. Add parse_dmar_table() verification.\n\n[akpm@linux-foundation.org: coding-style fixes]\n\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nAcked-by: mark gross \u003cmgross@linux.intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "10e5247f40f3bf7508a0ed2848c9cae37bddf4bc", "tree": "adca606f00ebcbdbdc5c474f012105d7e59152f6", "parents": [ "89910cccb8fec0c1140d33a743e72a712efd4f05" ], "author": { "name": "Keshavamurthy, Anil S", "email": "anil.s.keshavamurthy@intel.com", "time": "Sun Oct 21 16:41:41 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Oct 22 08:13:18 2007 -0700" }, "message": "Intel IOMMU: DMAR detection and parsing logic\n\nThis patch supports the upcomming Intel IOMMU hardware a.k.a. Intel(R)\nVirtualization Technology for Directed I/O Architecture and the hardware spec\nfor the same can be found here\nhttp://www.intel.com/technology/virtualization/index.htm\n\nFAQ! (questions from akpm, answers from ak)\n\n\u003e So... what\u0027s all this code for?\n\u003e\n\u003e I assume that the intent here is to speed things up under Xen, etc?\n\nYes in some cases, but not this code. That would be the Xen version of this\ncode that could potentially assign whole devices to guests. I expect this to\nbe only useful in some special cases though because most hardware is not\nvirtualizable and you typically want an own instance for each guest.\n\nOk at some point KVM might implement this too; i likely would use this code\nfor this.\n\n\u003e Do we\n\u003e have any benchmark results to help us to decide whether a merge would be\n\u003e justified?\n\nThe main advantage for doing it in the normal kernel is not performance, but\nmore safety. Broken devices won\u0027t be able to corrupt memory by doing random\nDMA.\n\nUnfortunately that doesn\u0027t work for graphics yet, for that need user space\ninterfaces for the X server are needed.\n\nThere are some potential performance benefits too:\n\n- When you have a device that cannot address the complete address range an\n IOMMU can remap its memory instead of bounce buffering. Remapping is likely\n cheaper than copying.\n\n- The IOMMU can merge sg lists into a single virtual block. This could\n potentially speed up SG IO when the device is slow walking SG lists. [I\n long ago benchmarked 5% on some block benchmark with an old MPT Fusion; but\n it probably depends a lot on the HBA]\n\nAnd you get better driver debugging because unexpected memory accesses from\nthe devices will cause a trappable event.\n\n\u003e\n\u003e Does it slow anything down?\n\nIt adds more overhead to each IO so yes.\n\nThis patch:\n\nAdd support for early detection and parsing of DMAR\u0027s (DMA Remapping) reported\nto OS via ACPI tables.\n\nDMA remapping(DMAR) devices support enables independent address translations\nfor Direct Memory Access(DMA) from Devices. These DMA remapping devices are\nreported via ACPI tables and includes pci device scope covered by these DMA\nremapping device.\n\nFor detailed info on the specification of \"Intel(R) Virtualization Technology\nfor Directed I/O Architecture\" please see\nhttp://www.intel.com/technology/virtualization/index.htm\n\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nCc: \"Siddha, Suresh B\" \u003csuresh.b.siddha@intel.com\u003e\nCc: Arjan van de Ven \u003carjan@infradead.org\u003e\nCc: Ashok Raj \u003cashok.raj@intel.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Christoph Lameter \u003cclameter@sgi.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Len Brown \u003clenb@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" } ] }