)]}'
{
  "log": [
    {
      "commit": "2c21fd4b333e4c780a46edcd6d1e85bfc6cdf371",
      "tree": "13ceefadd0221f1494f708dcf16b8bfd74955295",
      "parents": [
        "2fc90f6133a87da8177636866557d4cc5f56e661"
      ],
      "author": {
        "name": "Hidetoshi Seto",
        "email": "seto.hidetoshi@jp.fujitsu.com",
        "time": "Tue Jun 23 17:40:04 2009 +0900"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Mon Jun 29 12:15:19 2009 -0700"
      },
      "message": "PCI MSI: shorten PCI_MSIX_ENTRY_* symbol names\n\nThese names are too long!  Drop _OFFSET to save some bytes/lines.\n\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Hidetoshi Seto \u003cseto.hidetoshi@jp.fujitsu.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "67b5db6502ddd27d65dea43bf036abbd82d0dfc9",
      "tree": "c48ed504f52682b88f91e82a50586013410edd7f",
      "parents": [
        "64f039d3d7f574943165b1afb72ee25caa1a9a91"
      ],
      "author": {
        "name": "Hidetoshi Seto",
        "email": "seto.hidetoshi@jp.fujitsu.com",
        "time": "Mon Apr 20 10:54:59 2009 +0900"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Thu Jun 11 12:04:06 2009 -0700"
      },
      "message": "PCI MSI: Define PCI_MSI_MASK_32/64\n\nImpact: cleanup, improve readability\n\nDefine PCI_MSI_MASK_32/64 for 32/64bit devices, instead of using\nimplicit offset (-4), \"PCI_MSI_MASK_BIT - 4\" and \"PCI_MSI_MASK_BIT\".\n\nSigned-off-by: Hidetoshi Seto \u003cseto.hidetoshi@jp.fujitsu.com\u003e\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "04846b5b8112e53b588038349b3e92b8485c1807",
      "tree": "26f8cdce9c8bf7207b44bf3c0be232f4d2d9ee88",
      "parents": [
        "07a2039b8eb0af4ff464efd3dfd95de5c02648c6"
      ],
      "author": {
        "name": "Hidetoshi Seto",
        "email": "seto.hidetoshi@jp.fujitsu.com",
        "time": "Mon Apr 20 10:54:52 2009 +0900"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Thu Jun 11 12:04:03 2009 -0700"
      },
      "message": "PCI MSI: Remove unused/obsolete macros and definitions\n\nImpact: cleanup, spec compliance\n\nThis patch does:\n\n - Remove unused msi/msix_enable/disable macros.\n   User should use msi/msix_set_enable() functions instead.\n\n - Remove unused msix_mask/unmask/pending macros.\n   These macros are useless because they are not based on any of\n   the PCI Local Bus Specifications properly.\n   It seems that they were written based on a draft of PCI spec,\n   and that the draft was the MSI-X ECN that underwent membership\n   review in September 2002.\n   (* In the draft, the size of a entry in MSI-X table was 64bit,\n      containing 32bit message data and DWORD aligned lower address\n      plus a pending bit and a mask bit.(30+1+1bit)  The higher\n      address was placed in MSI-X capability structure and shared\n      by all entries.)\n\n - Remove PCI_MSIX_FLAGS_BITMASK.\n   This definition also come from the draft ECN.\n\nSigned-off-by: Hidetoshi Seto \u003cseto.hidetoshi@jp.fujitsu.com\u003e\nReviewed-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "1c8d7b0a562da06d3ebe83f01b1ed553205d1ae4",
      "tree": "79c84432f5aed5a08b3bef262a10d933daae6a9b",
      "parents": [
        "f2440d9acbe866b917b16cc0f927366341ce9215"
      ],
      "author": {
        "name": "Matthew Wilcox",
        "email": "willy@linux.intel.com",
        "time": "Tue Mar 17 08:54:10 2009 -0400"
      },
      "committer": {
        "name": "Jesse Barnes",
        "email": "jbarnes@virtuousgeek.org",
        "time": "Fri Mar 20 10:48:14 2009 -0700"
      },
      "message": "PCI MSI: Add support for multiple MSI\n\nAdd the new API pci_enable_msi_block() to allow drivers to\nrequest multiple MSI and reimplement pci_enable_msi in terms of\npci_enable_msi_block.  Ensure that the architecture back ends don\u0027t\nhave to know about multiple MSI.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n"
    },
    {
      "commit": "e65e5fb5ceb02aaea7b65bf8b3b0d0c9057718b6",
      "tree": "0a77bfb7da117da88bd021691a8afde10671a007",
      "parents": [
        "009af1ff78bfc30b9a27807dd0207fc32848218a"
      ],
      "author": {
        "name": "Michael Ellerman",
        "email": "michael@ellerman.id.au",
        "time": "Tue Nov 07 18:21:21 2006 +1100"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Fri Dec 01 14:36:56 2006 -0800"
      },
      "message": "PCI: Make some MSI-X #defines generic\n\nMove some MSI-X #defines into pci_regs.h so they can be used\noutside of drivers/pci.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n"
    },
    {
      "commit": "3b7d1921f4cdd6d6ddb7899ae7a8d413991c5cf4",
      "tree": "5f809e0c4310f60dfa6f65d54fbaf9f01e2ebff9",
      "parents": [
        "277bc33bc2479707e88b0b2ae6fe56e8e4aabe81"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Wed Oct 04 02:16:59 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Oct 04 07:55:29 2006 -0700"
      },
      "message": "[PATCH] msi: refactor and move the msi irq_chip into the arch code\n\nIt turns out msi_ops was simply not enough to abstract the architecture\nspecific details of msi.  So I have moved the resposibility of constructing\nthe struct irq_chip to the architectures, and have two architecture specific\nfunctions arch_setup_msi_irq, and arch_teardown_msi_irq.\n\nFor simple architectures those functions can do all of the work.  For\narchitectures with platform dependencies they can call into the appropriate\nplatform code.\n\nWith this msi.c is finally free of assuming you have an apic, and this\nactually takes less code.\n\nThe helpers for the architecture specific code are declared in the linux/msi.h\nto keep them separate from the msi functions used by drivers in linux/pci.h\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "1f80025e624bb14fefadfef7e80fbfb9740d4714",
      "tree": "1d6f18ebd2855e882213922036d8df8cd7e88db4",
      "parents": [
        "8b955b0dddb35e398b07e217a81f8bd49400796f"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Wed Oct 04 02:16:56 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Oct 04 07:55:29 2006 -0700"
      },
      "message": "[PATCH] msi: simplify msi sanity checks by adding with generic irq code\n\nCurrently msi.c is doing sanity checks that make certain before an irq is\ndestroyed it has no more users.\n\nBy adding irq_has_action I can perform the test is a generic way, instead of\nrelying on a msi specific data structure.\n\nBy performing the core check in dynamic_irq_cleanup I ensure every user of\ndynamic irqs has a test present and we don\u0027t free resources that are in use.\n\nIn msi.c this allows me to kill the attrib.state member of msi_desc and all of\nthe assciated code to maintain it.\n\nTo keep from freeing data structures when irq cleanup code is called to soon\nchanging dyanamic_irq_cleanup is insufficient because there are msi specific\ndata structures that are also not safe to free.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "1ce03373a7f4b5fa8ca5be02ff35229800a6e12b",
      "tree": "918fd844d371ec0fd9d19ac16a7798e361cb5583",
      "parents": [
        "c4fa0bbf384496ae4acc0a150719d9d8fa8d11b3"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Wed Oct 04 02:16:41 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Oct 04 07:55:28 2006 -0700"
      },
      "message": "[PATCH] genirq: msi: make the msi code irq based and not vector based\n\nThe msi currently allocates irqs backwards.  First it allocates a platform\ndependent routing value for an interrupt the ``vector\u0027\u0027 and then it figures\nout from the vector which irq you are on.\n\nFor ia64 this is fine.  For x86 and x86_64 this is complete nonsense and makes\nan enourmous mess of the irq handling code and prevents some pretty\nsignificant cleanups in the code for handling large numbers of irqs.\n\nThis patch refactors msi.c to work in terms of irqs and create_irq/destroy_irq\nfor dynamically managing irqs.\n\nHopefully this is finally a version of msi.c that is useful on more than just\nx86 derivatives.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "92db6d10bc1bc43330a4c540fa5b64c83d9d865f",
      "tree": "d889ea4ba6d2e55a33d89f05d2b2222bed7788e7",
      "parents": [
        "38bc0361303535c86f6b67b151a541728d7bdae6"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Wed Oct 04 02:16:35 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Oct 04 07:55:27 2006 -0700"
      },
      "message": "[PATCH] genirq: msi: simplify the msi irq limit policy\n\nCurrently we attempt to predict how many irqs we will be able to allocate with\nmsi using pci_vector_resources and some complicated accounting, and then we\nonly allow each device as many irqs as we think are available on average.\n\nOnly the s2io driver even takes advantage of this feature all other drivers\nhave a fixed number of irqs they need and bail if they can\u0027t get them.\n\npci_vector_resources is inaccurate if anyone ever frees an irq.  The whole\nimplmentation is racy.  The current irq limit policy does not appear to make\nsense with current drivers.  So I have simplified things.  We can revisit this\nwe we need a more sophisticated policy.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "38bc0361303535c86f6b67b151a541728d7bdae6",
      "tree": "6a3939b1f7aea3b00fc4ecd72646fd8442c95766",
      "parents": [
        "0366f8f7137deb072991e4c50769c6da31f8940c"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Wed Oct 04 02:16:34 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Oct 04 07:55:27 2006 -0700"
      },
      "message": "[PATCH] genirq: msi: refactor the msi_ops\n\nThe current msi_ops are short sighted in a number of ways, this patch attempts\nto fix the glaring deficiences.\n\n- Report in msi_ops if a 64bit address is needed in the msi message, so we\n  can fail 32bit only msi structures.\n\n- Send and receive a full struct msi_msg in both setup and target.  This is\n  a little cleaner and allows for architectures that need to modify the data\n  to retarget the msi interrupt to a different cpu.\n\n- In target pass in the full cpu mask instead of just the first cpu in case\n  we can make use of the full cpu mask.\n\n- Operate in terms of irqs and not vectors, currently there is still a 1-1\n  relationship but on architectures other than ia64 I expect this will change.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "0366f8f7137deb072991e4c50769c6da31f8940c",
      "tree": "11cb801b0fe9bc1742f1c47716a7d815b9d98dee",
      "parents": [
        "dd159eeca971d594fa30176733b66d37acda82a3"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Wed Oct 04 02:16:33 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Oct 04 07:55:27 2006 -0700"
      },
      "message": "[PATCH] genirq: msi: implement helper functions read_msi_msg and write_msi_msg\n\nIn support of this I also add a struct msi_msg that captures the the two\naddress and one data field ina typical msi message, and I remember the pos and\nif the address is 64bit in struct msi_desc.\n\nThis makes the code a little more readable and easier to maintain, and paves\nthe way to further simplfications.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "dd159eeca971d594fa30176733b66d37acda82a3",
      "tree": "e972734436cb13a2d8a452779882f001162fe6ae",
      "parents": [
        "7bd007e480672c99d8656c7b7b12ef0549432c37"
      ],
      "author": {
        "name": "Eric W. Biederman",
        "email": "ebiederm@xmission.com",
        "time": "Wed Oct 04 02:16:32 2006 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Oct 04 07:55:27 2006 -0700"
      },
      "message": "[PATCH] genirq: msi: make the msi boolean tests return either 0 or 1\n\nThis allows the output of the msi tests to be stored directly in a bit field.\nIf you don\u0027t do this a value greater than one will be truncated and become 0.\nChanging true to false with bizare consequences.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "fd58e55fcf5568e51da2ed54d7acd049c3fdb184",
      "tree": "2cf41864d66b8db39f637549d4652c7664256155",
      "parents": [
        "c34b4c734482dda750deb6089521f7c891b48736"
      ],
      "author": {
        "name": "Mark Maule",
        "email": "maule@sgi.com",
        "time": "Mon Apr 10 21:17:48 2006 -0500"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Wed Jun 21 11:59:58 2006 -0700"
      },
      "message": "[PATCH] PCI: msi abstractions and support for altix\n\nAbstract portions of the MSI core for platforms that do not use standard\nAPIC interrupt controllers.  This is implemented through a new arch-specific\nmsi setup routine, and a set of msi ops which can be set on a per platform\nbasis.\n\nSigned-off-by: Mark Maule \u003cmaule@sgi.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n"
    },
    {
      "commit": "8169b5d2384a0acd9ea3bb86bf5988cd7d62d03a",
      "tree": "89a2d459bb2f0d9cc854c0708db1b11d81d313d2",
      "parents": [
        "f8d65713332cf6306889a3036142a17e01e3447e"
      ],
      "author": {
        "name": "Grant Grundler",
        "email": "iod00d@hp.com",
        "time": "Tue Jan 03 18:51:46 2006 -0800"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Tue Jan 31 18:00:11 2006 -0800"
      },
      "message": "[PATCH] PCI: make it easier to see that set_msi_affinity() is used\n\nI missed this usage in drivers/pci/msi.h:\n\n#ifdef CONFIG_SMP\n#define set_msi_irq_affinity    set_msi_affinity\n#else\n#define set_msi_irq_affinity    NULL\n#endif\n\nset_msi_affinity() is declared and exclusively used in msi.c.\nHere\u0027s a better way so (hopefully) history doesn\u0027t repeat itself.\n\nSigned-off-by: Grant Grundler \u003ciod00d@hp.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n"
    },
    {
      "commit": "54d5d42404e7705cf3804593189e963350d470e5",
      "tree": "7cf8a7fce163b19672193d8cf4ef6a7f6c131d9e",
      "parents": [
        "f63ed39c578a2a2d067356a85ce7c28a7c795d8a"
      ],
      "author": {
        "name": "Ashok Raj",
        "email": "ashok.raj@intel.com",
        "time": "Tue Sep 06 15:16:15 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Wed Sep 07 16:57:15 2005 -0700"
      },
      "message": "[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity\n\nWhen handling writes to /proc/irq, current code is re-programming rte\nentries directly. This is not recommended and could potentially cause\nchipset\u0027s to lockup, or cause missing interrupts.\n\nCONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the\ninterrupt is pending. The same needs to be done for /proc/irq handling as well.\nOtherwise user space irq balancers are really not doing the right thing.\n\n- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for\n  lack of a generic name.\n- added move_irq out of IRQ_BALANCE, and added this same to X86_64\n- Added new proc handler for write, so we can do deferred write at irq\n  handling time.\n- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead\n  it now shows only active cpu masks, or exactly what was set.\n- Provided a common move_irq implementation, instead of duplicating\n  when using generic irq framework.\n\nTested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.\nTested UP builds as well.\n\nMSI testing: tbd: I have cards, need to look for a x-over cable, although I\ndid test an earlier version of this patch.  Will test in a couple days.\n\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nAcked-by: Zwane Mwaikambo \u003czwane@holomorphy.com\u003e\nGrudgingly-acked-by: Andi Kleen \u003cak@muc.de\u003e\nSigned-off-by: Coywolf Qi Hunt \u003ccoywolf@lovecn.org\u003e\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "70549ad9cf074e12f12cdc931b29b2616dfb873a",
      "tree": "dde5cdc320df87f1eee4b6ef94146dd741a31d14",
      "parents": [
        "bb4a61b6eaee01707f24deeefc5d7136f25f75c5"
      ],
      "author": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Mon Jun 06 23:07:46 2005 -0700"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Mon Jun 27 21:52:46 2005 -0700"
      },
      "message": "[PATCH] PCI: clean up the MSI code a bit.\n\nMostly just cleans up the irq handling logic to be smaller and a bit more\ndescriptive as to what it really does.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n"
    },
    {
      "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2",
      "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d",
      "parents": [],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n"
    }
  ]
}
