)]}'
{
  "log": [
    {
      "commit": "e19553427c2e8fdb04fdd98e407164bb59a840ba",
      "tree": "5332234b2dad07c03c27e4608afb16f297f41e61",
      "parents": [
        "35f6cd4a06432034665a1499ca4b022437423aac",
        "83515bc7df812555e20cda48614674e2f346f9f5"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Apr 26 16:08:27 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Apr 26 16:08:27 2010 +0900"
      },
      "message": "Merge branch \u0027sh/stable-updates\u0027\n\nConflicts:\n\tarch/sh/kernel/dwarf.c\n\tdrivers/dma/shdma.c\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "dc825b17904a06bbd2f79d720b23156e4c01a22f",
      "tree": "8f1e13b850a06264530f1f1bb680a541e73cef34",
      "parents": [
        "fecf066c2d2fbc7e6a7e7e3a5af772a165bdd7b0"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu Apr 15 13:13:52 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu Apr 15 13:13:52 2010 +0900"
      },
      "message": "sh: intc: IRQ auto-distribution support.\n\nThis implements support for hardware-managed IRQ balancing as implemented\nby SH-X3 cores (presently only hooked up for SH7786, but can probably be\ncarried over to other SH-X3 cores, too).\n\nCPUs need to specify their distribution register along with the mask\ndefinitions, as these follow the same format. Peripheral IRQs that don\u0027t\nopt out of balancing will be automatically distributed at the whim of the\nhardware block, while each CPU needs to verify whether it is handling the\nIRQ or not, especially before clearing the mask.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "43b8774dc409ea5d9369b978e2e7bc79289f0522",
      "tree": "13aa346ff8f30786e8ce3ccfdd8341d182ce4c87",
      "parents": [
        "12129fea50edcd696a9556523b058d6c445f21d8"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Apr 13 14:43:03 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Apr 13 14:43:03 2010 +0900"
      },
      "message": "sh: intc: userimask support.\n\nThis adds support for hardware-assisted userspace irq masking for\nspecial priority levels. Due to the SR.IMASK interactivity, only some\nplatforms implement this in hardware (including but not limited to\nSH-4A interrupt controllers, and ARM-based SH-Mobile CPUs). Each CPU\nneeds to wire this up on its own, for now only SH7786 is wired up as an\nexample.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "12129fea50edcd696a9556523b058d6c445f21d8",
      "tree": "02242dd533fc1e78fdbda02c894ad23665fbd15d",
      "parents": [
        "0ded75428605213641897d6b8d8e9cf9fdb6eb8d"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Apr 13 13:49:54 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Apr 13 13:49:54 2010 +0900"
      },
      "message": "sh: intc: Tidy up loglevel mismatches.\n\nThe printk loglevels are all over the place, make them a bit more\ncoherent, and add some registration notification while we\u0027re at it.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "0ded75428605213641897d6b8d8e9cf9fdb6eb8d",
      "tree": "ca9088ff89b42190df432650c2294abcbc3c735b",
      "parents": [
        "050d4cc7029b73997d6821d89487b1f777d4873c"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Apr 13 10:16:34 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Apr 13 10:16:34 2010 +0900"
      },
      "message": "sh: intc: Provide sysdev name for intc controllers.\n\nPresently the sysdevs are simply numbered based on the list position,\nwithout having any direct way of figuring out which controller these are\nactually mapping to. This provides a name attr for mapping out the chip\nname.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "5a0e3ad6af8660be21ca98a971cd00f331318c05",
      "tree": "5bfb7be11a03176a87296a43ac6647975c00a1d1",
      "parents": [
        "ed391f4ebf8f701d3566423ce8f17e614cde9806"
      ],
      "author": {
        "name": "Tejun Heo",
        "email": "tj@kernel.org",
        "time": "Wed Mar 24 17:04:11 2010 +0900"
      },
      "committer": {
        "name": "Tejun Heo",
        "email": "tj@kernel.org",
        "time": "Tue Mar 30 22:02:32 2010 +0900"
      },
      "message": "include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\npercpu.h is included by sched.h and module.h and thus ends up being\nincluded when building most .c files.  percpu.h includes slab.h which\nin turn includes gfp.h making everything defined by the two files\nuniversally available and complicating inclusion dependencies.\n\npercpu.h -\u003e slab.h dependency is about to be removed.  Prepare for\nthis change by updating users of gfp and slab facilities include those\nheaders directly instead of assuming availability.  As this conversion\nneeds to touch large number of source files, the following script is\nused as the basis of conversion.\n\n  http://userweb.kernel.org/~tj/misc/slabh-sweep.py\n\nThe script does the followings.\n\n* Scan files for gfp and slab usages and update includes such that\n  only the necessary includes are there.  ie. if only gfp is used,\n  gfp.h, if slab is used, slab.h.\n\n* When the script inserts a new include, it looks at the include\n  blocks and try to put the new include such that its order conforms\n  to its surrounding.  It\u0027s put in the include block which contains\n  core kernel includes, in the same order that the rest are ordered -\n  alphabetical, Christmas tree, rev-Xmas-tree or at the end if there\n  doesn\u0027t seem to be any matching order.\n\n* If the script can\u0027t find a place to put a new include (mostly\n  because the file doesn\u0027t have fitting include block), it prints out\n  an error message indicating which .h file needs to be added to the\n  file.\n\nThe conversion was done in the following steps.\n\n1. The initial automatic conversion of all .c files updated slightly\n   over 4000 files, deleting around 700 includes and adding ~480 gfp.h\n   and ~3000 slab.h inclusions.  The script emitted errors for ~400\n   files.\n\n2. Each error was manually checked.  Some didn\u0027t need the inclusion,\n   some needed manual addition while adding it to implementation .h or\n   embedding .c file was more appropriate for others.  This step added\n   inclusions to around 150 files.\n\n3. The script was run again and the output was compared to the edits\n   from #2 to make sure no file was left behind.\n\n4. Several build tests were done and a couple of problems were fixed.\n   e.g. lib/decompress_*.c used malloc/free() wrappers around slab\n   APIs requiring slab.h to be added manually.\n\n5. The script was run on all .h files but without automatically\n   editing them as sprinkling gfp.h and slab.h inclusions around .h\n   files could easily lead to inclusion dependency hell.  Most gfp.h\n   inclusion directives were ignored as stuff from gfp.h was usually\n   wildly available and often used in preprocessor macros.  Each\n   slab.h inclusion directive was examined and added manually as\n   necessary.\n\n6. percpu.h was updated not to include slab.h.\n\n7. Build test were done on the following configurations and failures\n   were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my\n   distributed build env didn\u0027t work with gcov compiles) and a few\n   more options had to be turned off depending on archs to make things\n   build (like ipr on powerpc/64 which failed due to missing writeq).\n\n   * x86 and x86_64 UP and SMP allmodconfig and a custom test config.\n   * powerpc and powerpc64 SMP allmodconfig\n   * sparc and sparc64 SMP allmodconfig\n   * ia64 SMP allmodconfig\n   * s390 SMP allmodconfig\n   * alpha SMP allmodconfig\n   * um on x86_64 SMP allmodconfig\n\n8. percpu.h modifications were reverted so that it could be applied as\n   a separate patch and serve as bisection point.\n\nGiven the fact that I had only a couple of failures from tests on step\n6, I\u0027m fairly confident about the coverage of this conversion patch.\nIf there is a breakage, it\u0027s likely to be something in one of the arch\nheaders which should be easily discoverable easily on most builds of\nthe specific arch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nGuess-its-ok-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Lee Schermerhorn \u003cLee.Schermerhorn@hp.com\u003e\n"
    },
    {
      "commit": "720fcb36ac1aa2df2c54c170253b6b29600cbefc",
      "tree": "1ce654508a1efe164841fe37c34a471b2e96b1af",
      "parents": [
        "6ae6650232ddcf2f50e8817acd63cde37cf1d093",
        "dec710b77c2cf04bf512acada3c14a16f11708d9",
        "3089f381fbaf53560dcbcb4aef6ef17fe44e347c",
        "f4cff0d0ffc0162636357d0475409ecf1304f854"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Mar 30 11:26:43 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Mar 30 11:26:43 2010 +0900"
      },
      "message": "Merge branches \u0027sh/intc-extension\u0027, \u0027sh/dmaengine\u0027, \u0027sh/serial-dma\u0027 and \u0027sh/clkfwk\u0027\n\nConflicts:\n\tarch/sh/kernel/cpu/clock.c\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "e4d806377b069881f930089bf880918d3ad555ab",
      "tree": "ed03416ddaa770bed16880ffea32b9b71dd5c7c7",
      "parents": [
        "b50df7d1fb37eb6aea87590b391d7111fde87121",
        "3f7581d66ece6b7ff643c8c817bfbd72cdbe9077"
      ],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 19 18:16:20 2010 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Fri Mar 19 18:16:20 2010 -0700"
      },
      "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:\n  serial: sh-sci: remove duplicated #include\n  sh: Export uncached helper symbols.\n  sh: Fix up NUMA build for 29-bit.\n  serial: sh-sci: Fix build failure for non-sh architectures.\n  sh: Fix up uncached offset for legacy 29-bit mode.\n  sh: Support CPU affinity masks for INTC controllers.\n"
    },
    {
      "commit": "dec710b77c2cf04bf512acada3c14a16f11708d9",
      "tree": "e2e25d5afa00df0eccb7c2881b29167ad4ff3b63",
      "parents": [
        "01e9651a21bc0e6731da733593e4aaf4cf46b5e5"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@opensource.se",
        "time": "Fri Mar 19 16:48:01 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Mar 19 16:48:01 2010 +0900"
      },
      "message": "sh: INTC ioremap support\n\nExtend the INTC code with ioremap() support V2.\n\nSupport INTC controllers that are not accessible through\na 1:1 virt:phys window. Needed by SH-Mobile ARM INTCS.\n\nThe INTC code behaves as usual if the io window resource\nis omitted. The slow phys-\u003evirt lookup only happens during\nsetup. The fast path code operates on virtual addresses.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "01e9651a21bc0e6731da733593e4aaf4cf46b5e5",
      "tree": "133befa54fca69f3b4c4bc1ffcc621bb5fb4f9b0",
      "parents": [
        "39710479303fd3affb3e204e9a7a75cc676977b5"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@opensource.se",
        "time": "Wed Mar 10 09:31:01 2010 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Mar 19 16:45:31 2010 +0900"
      },
      "message": "sh: add INTC out of memory error handling\n\nExtend the INTC code to warn and return an error code\nin the case of memory allocation failure.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "988addf82e4c03739375279de73929580a2d4a6a",
      "tree": "989ae1cd4e264bbad80c65f04480486246e7b9f3",
      "parents": [
        "004c1c7096659d352b83047a7593e91d8a30e3c5",
        "25cf84cf377c0aae5dbcf937ea89bc7893db5176"
      ],
      "author": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Mar 08 20:21:04 2010 +0000"
      },
      "committer": {
        "name": "Russell King",
        "email": "rmk+kernel@arm.linux.org.uk",
        "time": "Mon Mar 08 20:21:04 2010 +0000"
      },
      "message": "Merge branch \u0027origin\u0027 into devel-stable\n\nConflicts:\n\tarch/arm/mach-mx2/devices.c\n\tarch/arm/mach-mx2/devices.h\n\tsound/soc/pxa/pxa-ssp.c\n"
    },
    {
      "commit": "a8941dad1f12b4e8a87a517ed27f29d0209c817c",
      "tree": "ad2efbcf2bd39f023450fe247f0a5622d671e780",
      "parents": [
        "25cf84cf377c0aae5dbcf937ea89bc7893db5176"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Mar 08 13:33:17 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Mar 08 13:33:17 2010 +0900"
      },
      "message": "sh: Support CPU affinity masks for INTC controllers.\n\nThis hooks up the -\u003eset_affinity() for the INTC controllers, which can be\ndone as just a simple copy of the cpumask. The enable/disable paths\nalready handle SMP register strides, so we just test the affinity mask in\nthese paths to determine which strides to skip over.\n\nThe early enable/disable path happens prior to the IRQs being registered,\nso we have no affinity mask established at that point, in which case we\njust default to CPU_MASK_ALL. This is left as it is to permit the force\nenable/disable code to retain existing semantics.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "4d2185d93c670902b6e4716b360e2bcb7d2f7b2f",
      "tree": "c64add5c030ff50660af80664d5e294d6c3f2e9d",
      "parents": [
        "319c2cc761505ee54a9536c5d0b9c2ee3fb33866"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Feb 17 12:37:42 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Feb 17 12:37:42 2010 +0900"
      },
      "message": "sh: Use dummy_irq_chip for INTC redirect vectors.\n\nPresently there\u0027s an ordering issue with the chained handler change\nwhich places the set_irq_chip() after set_irq_chained_handler(). This\ncauses a warning to be emitted as the IRQ chip needs to be set first.\nHowever, there is the caveat that redirect IRQs can\u0027t use the parent\nIRQ\u0027s irq chip as they are just dummy redirects, resulting in\nintc_enable() blowing up when set_irq_chained_handler() attempts to\nstart up the redirect IRQ. In these cases we can just use dummy_irq_chip\ndirectly, as we already extract the parent IRQ and chip from the redirect\nhandler.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "d85429a31790361b9e952be3817134c23b3b758a",
      "tree": "b5a5fa7e81345e92c518bf5ff3a81ae8d032df7d",
      "parents": [
        "92e1f9a7ed613b36f3aaf8b04a79e2fd4fa37ec1"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@opensource.se",
        "time": "Mon Feb 15 11:40:25 2010 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Feb 16 13:38:56 2010 +0900"
      },
      "message": "sh: extend INTC with force_disable\n\nExtend the shared INTC code with force_disable support to\nallow keeping mask bits statically disabled. Needed for\nSDHI support to mask out unsupported interrupt sources.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "e6f077592d1de2f6a4fc760e7b5d6f20b37d3a27",
      "tree": "b8d6e785f2de334321a956d86e42777b71b47ce4",
      "parents": [
        "3844eadcfd2ba975110e3ca8479efa8c093129ce"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@opensource.se",
        "time": "Tue Feb 09 07:17:20 2010 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Feb 09 18:24:31 2010 +0900"
      },
      "message": "sh: fix INTC to use set_irq_chained_handler() for redirects\n\nThis patch updates the shared INTC code to use\nset_irq_chained_handler() for intc_redirect_irq().\n\nWith this in place request_irq() on a merged irq\nwhich has been redirected will now return -EINVAL\ninstead of 0 together with a crash. This thanks to\nthe protection of the IRQ_NOREQUEST flag set for\nchained interrupt handlers.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "7896cd0f5a4fa7eb833064e31d8970b95c9faac5",
      "tree": "faebb4f65d314b12d76dacba7c0c7ac55cf0c419",
      "parents": [
        "7561f2dd393bd0c6397e6b2a6b021cdb827a2eb1",
        "d519095344fda705c9840a579acf6aa6205c37cc"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Feb 09 18:24:14 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Feb 09 18:24:14 2010 +0900"
      },
      "message": "Merge branch \u0027sh/intc-extension\u0027\n"
    },
    {
      "commit": "d519095344fda705c9840a579acf6aa6205c37cc",
      "tree": "9fc60de49712b6625eb9adb30153d88d86c433da",
      "parents": [
        "577cd7584cf5199f1ea22cca0ad1fa129a98effa"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@opensource.se",
        "time": "Tue Feb 09 04:29:22 2010 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Feb 09 18:23:58 2010 +0900"
      },
      "message": "sh: extend INTC with force_enable\n\nExtend the shared INTC code with force_enable support to\nallow keeping mask bits statically enabled. Needed by\nupcoming INTC SDHI patches that mux together a bunch of\nvectors to a single linux interrupt which is masked by\na priority register, but needs individual mask bits\nconstantly enabled.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "577cd7584cf5199f1ea22cca0ad1fa129a98effa",
      "tree": "35a88578e4dc1da2df4bb8b14e8ef6f010819223",
      "parents": [
        "6339204ecc2aa2067a99595522de0403f0854bb8"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@opensource.se",
        "time": "Tue Feb 09 04:24:46 2010 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Feb 09 18:23:57 2010 +0900"
      },
      "message": "sh: extend INTC with struct intc_hw_desc\n\nThis patch updates the INTC code by moving all vectors,\ngroups and registers from struct intc_desc to struct\nintc_hw_desc.\n\nThe idea is that INTC tables should go from using the\nmacro(s) DECLARE_INTC_DESC..() only to using struct\nintc_desc with name and hw initialized using the macro\nINTC_HW_DESC(). This move makes it easy to initialize\nan extended struct intc_desc in the future.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "65a5b28f0af00dddd785b516914739460562638f",
      "tree": "9a3385f82aefebc9775d97a02d239d671cbcf0a6",
      "parents": [
        "13d605de2ece8c8f7c17a88747d90b7931350ee5"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@opensource.se",
        "time": "Fri Feb 05 11:15:25 2010 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Feb 08 12:45:48 2010 +0900"
      },
      "message": "sh: Let INTC set IRQF_VALID on ARM platforms.\n\nReuse the SuperH INTC code on ARM by using set_irq_flags()\nto set IRQF_VALID on ARM platforms.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "e9867c569970d8afb4b882bafbbe81426bd46333",
      "tree": "9d3f1cafaa9bbb7cf1f989fc9726704463c51646",
      "parents": [
        "b4f74767a04e175c028336e06507fcc05f5a8618"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Feb 02 17:35:13 2010 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Feb 02 17:35:13 2010 +0900"
      },
      "message": "sh: Provide create_irq_nr() for dynamic IRQ creation by number.\n\nThis just reworks the existing create_irq_on_node() in to the new\ncreate_irq_nr() which is generally exposed. This permits boards that\nhaven\u0027t converted over to sparseirq to try and use their existing ranges,\nrather than having arbitrary vectors assigned to them.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "0a753d58f901913e3e6416baeac437ee83eda90d",
      "tree": "e3b32e6ae07787fe80381a8dbe154da9716cd853",
      "parents": [
        "fb2e9daffe32ba1bf8e777a841f7206acf567aac"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Dec 09 14:36:16 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Dec 09 14:36:16 2009 +0900"
      },
      "message": "sh: intc: Fixup compile breakage.\n\nThe resume from hibernation patch introduced build failure, fix it up..\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "87a705dde49d0c482fa818f0923af59ed0954d5d",
      "tree": "412bfb76135982dee94e790b459b5e853edbdeda",
      "parents": [
        "e717cc6c07f006be36e35189aacb28be4e30ad14"
      ],
      "author": {
        "name": "Francesco VIRLINZI",
        "email": "francesco.virlinzi@st.com",
        "time": "Fri Dec 04 08:57:58 2009 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Dec 09 12:35:18 2009 +0900"
      },
      "message": "sh: intc: Fixed resume from hibernation\n\nThis patch fixes the resume from hibernation\nin the intc sysdev device when it manages \u0027redirect\u0027 irq\n\nSigned-off-by: Francesco Virlinzi \u003cfrancesco.virlinzi@st.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "45b9deaf14e74543371aa8faea69c14e27b038c6",
      "tree": "485b9beab7f908557ab816fa473d7a5bdb494841",
      "parents": [
        "3d0de414423a20af741b692243317f423827489b"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Nov 02 15:43:20 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Nov 02 15:43:20 2009 +0900"
      },
      "message": "sh: intc: Handle legacy IRQ reservation in vector map.\n\nDifferent CPUs will have different starting vectors, with varying\namounts of reserved or unusable vector space prior to the first slot.\nThis introduces a legacy vector reservation system that inserts itself in\nbetween the CPU vector map registration and the platform specific IRQ\nsetup. This works fine in practice as the only new vectors that boards\nneed to establish on their own should be dynamically allocated rather\nthan arbitrarily assigned. As a plus, this also makes all of the\nconverted platforms sparseirq ready.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "1ce7b039b5029ab698f9d64c0ad603794bc31ae7",
      "tree": "d116ee849d48b470730ff209125e7ce3d2315582",
      "parents": [
        "58ee987e2fd8acff6263d194d8fa43267cc8b1c9"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Nov 02 10:30:26 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Nov 02 10:30:26 2009 +0900"
      },
      "message": "sh: intc: dynamic IRQ support.\n\nThis adds support for dynamic IRQ allocation/deallocation for all parts\nusing the SH-style vectored IRQs. While this is not inherently\nINTC-specific, the INTC code is the main tie-in for vectored IRQ\nregistration, and is the only place that a full view of the utilized\nvector map is possible.\n\nThe implementation is fairly straightforward, implementing a flat IRQ map\nwhere each registered vector is reserved, allowing us to scan for holes\nand dynamically wire up IRQs lazily later on in the boot stage. This\npiggybacks on top of sparseirq in order to make the best use of the\navailable vector space.\n\nDynamic IRQs can be used for any number of things, ranging from MSI in\nthe SH-X3 PCIe case down to demux vectors for board FPGAs and system\ncontrollers that presently allocate an arbitrary range. In the latter\ncase, this also allows those platforms to use sparseirq without blowing\nup, which brings us one step closer to enabling sparseirq as the default\nfor all platform and CPU combinations.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "9b798d50df3a98d22a6cbae565d9f4f630d161a6",
      "tree": "51ea0f11a29fedd14b1c0ff70fcbef87509aea12",
      "parents": [
        "0a993b0a290a2672500000b0ce811efc093f8467"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Oct 27 11:36:43 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Oct 27 11:36:43 2009 +0900"
      },
      "message": "sh: intc: Make ack_regs generally available.\n\nCurrently this is ifdef\u0027ed under SH-3 and SH-4A, but there are other CPUs\nthat will need this as well. Given the size of the existing data\nstructures, this doesn\u0027t cause any additional cacheline utilization for\nthe existing users, so has no direct impact on the data structures.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "1279b7f1168ad6a2606191090f8a96eba64766a4",
      "tree": "dc2a8ab17c70ab8704d5a36d9c3ec1e7c4e8e9e7",
      "parents": [
        "2f6dafc5fcbf3fddce345c47da1f277a156fe22a"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Aug 31 15:15:33 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Aug 31 15:15:33 2009 +0900"
      },
      "message": "sh: Fix up simplified multi-evt handling under sparseirq.\n\nThis fixes up the simplified multi-evt handling when sparseirq support is\nenabled. While vectors are redirected through the single unique masking\nsource, each one of the redirected vectors still requires its own backing\nirq_desc, which needs to be manually allocated in the sparseirq case.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "05ecd5a1f76c183cca381705b3adb7d77c9a0439",
      "tree": "b10313518bb21df0290ec4d8d7088835b7fec457",
      "parents": [
        "788e6af37a4ace8721eda72e4abe66fe0f6b49fd"
      ],
      "author": {
        "name": "Pawel Moll",
        "email": "pawel.moll@st.com",
        "time": "Mon Aug 24 19:52:38 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Aug 24 19:52:38 2009 +0900"
      },
      "message": "sh: Simplify \"multi-evt\" interrupt handling.\n\nThis patch changes the way in which \"multi-evt\" interrups are handled.\nThe intc_evt2irq_table and related intc_evt2irq() have been removed and\nthe \"redirecting\" handler is installed for the coupled interrupts.\n\nThanks to that the do_IRQ() function don\u0027t have to use another level\nof indirection for all the interrupts...\n\nSigned-off-by: Pawel Moll \u003cpawel.moll@st.com\u003e\nSigned-off-by: Stuart Menefy \u003cstuart.menefy@st.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "6000fc4d6f3e55ad52cce8d76317187fe01af2aa",
      "tree": "bc86a1f13465a791b7e77f7663280bcb23fdd378",
      "parents": [
        "bd4fb4d4c1e4a5a2ffbf57a83817a749df1339dd"
      ],
      "author": {
        "name": "Stuart Menefy",
        "email": "stuart.menefy@st.com",
        "time": "Mon Aug 24 18:27:33 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Aug 24 18:27:33 2009 +0900"
      },
      "message": "sh: Fixes some write posting issues in the interrupt handling for SH\n\nIt is possible for the CPU to re-enable it\u0027s interrupt block bit\nbefore the write to the interrupt controller has actually masked out\nthe external interupt at the controller. We get around this by\nreading back from the interrupt controller which will ensure the\nwrite has happened.\n\nSigned-off-by: Stuart Menefy \u003cstuart.menefy@st.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "11b6aa9555d0c2f4d195695cd151e1fd07413387",
      "tree": "fc25ad08834ddee97b4d2e84e4b60e6418284a2b",
      "parents": [
        "19470e185a088591c228e1e8473006567719aa1c"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Jun 12 01:34:12 2009 +0300"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Jun 12 01:34:12 2009 +0300"
      },
      "message": "sh: intc: alloc_bootmem() -\u003e kzalloc() conversion.\n\nNow that the slab allocators are available much earlier, this triggers a\nthe slab_is_available() warning when registering the interrupt\ncontroller. Convert to kzalloc() with GFP_NOWAIT, as per the generic\nchanges.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "54ff328b46e58568c4b3350c2fa3223ef862e5a4",
      "tree": "93a39c2dffa2490fd62f6441acba5538abf56b03",
      "parents": [
        "6a1555fdde407dad23b8a119cf5feeb7c6466de9"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu Jun 11 10:33:09 2009 +0300"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu Jun 11 10:33:09 2009 +0300"
      },
      "message": "sh: Tie sparseirq in to Kconfig.\n\nNow that the dependent patches are merged, we are ready to enable\nsparseirq support. This simply adds the Kconfig option, and then converts\nfrom the _cpu to the _node allocation routines to follow the upstream\nsparseirq API changes.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "2f3ed17e010e8c0873094016f93c1afbb4adb666",
      "tree": "751170dbd792f40c5540f115d91d3b3b3146f610",
      "parents": [
        "5f8371cec93b94a24a55ba1de642ce6eade6d62c"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri May 22 13:47:52 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri May 22 13:47:52 2009 +0900"
      },
      "message": "sh: Wrap irq_to_desc_alloc_cpu() around CONFIG_SPARSE_IRQ temporarily.\n\nirq_to_desc_alloc_cpu() has been renamed to irq_to_desc_alloc_node() in\n-next, but as we can not presently enable SPARSE_IRQ without the early\nirq_desc alloc patch, protect it with an ifdef until the interface has\nsettled and we are ready to enable it system-wide.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "05ff3004d278b54760abd71530506d803182c71d",
      "tree": "d00343e85051b7cf4d671b9131581dfa6ad35456",
      "parents": [
        "fa1d43ab451084785153d37ae559c4fdd1546a5b"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri May 22 01:28:33 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri May 22 01:28:33 2009 +0900"
      },
      "message": "sh: irq: Teach ipr and intc about dynamically allocating irq_descs.\n\nThis hooks in irq_to_desc_alloc_cpu() to the necessary code paths in the\nintc and ipr controller registration paths. As these are the primary call\npaths for all SH CPUs, this alone will make all CPUs sparse IRQ ready.\n\nThere is the added benefit now that each CPU contains specific IPR and\nINTC tables, so only the vectors with interrupt sources backing them will\never see an irq_desc instantiation. This effectively packs irq_desc\ndown to match the CPU, rather than padding NR_IRQS out to cover the valid\nvector range.\n\nBoards with extra sources will still have to fiddle with the nr_irqs\nsetting, but they can continue doing so through the machvec as before.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "7fd87b3f1a6955da0a21b4fd99f8939701055172",
      "tree": "8461dd19d75747499ee9cbebad2bbaafa42a0478",
      "parents": [
        "0221c81b1b8eb0cbb6b30a0ced52ead32d2b4e4c"
      ],
      "author": {
        "name": "Francesco VIRLINZI",
        "email": "francesco.virlinzi@st.com",
        "time": "Mon Apr 06 07:17:04 2009 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Apr 06 08:55:19 2009 -0700"
      },
      "message": "sh: intc: Added resume from hibernation support to the intc\n\nIt\u0027s required for all modules loaded in the previous runtime\nsession because not initilized duing the kernel start-up.\n\nSigned-off-by: Francesco Virlinzi \u003cfrancesco.virlinzi@st.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "2dcec7a988a1895540460a0bf5603bab63d5a3ed",
      "tree": "8f03591269afafd31382c118b99cc51c69ad9bf3",
      "parents": [
        "f7dd2548c471b1c7758611f6cd6393367d7ff649"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Wed Apr 01 14:30:59 2009 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu Apr 02 11:19:57 2009 +0900"
      },
      "message": "sh: intc: set_irq_wake() support\n\nAdd set_irq_wake() support to intc using sysdev and suspend.\n\nThe intc controllers are put on a list at registration time\nand registered as sysdev devices later on during the boot.\n\nThe sysdev class suspend callback is used to find irqs with\nwakeup enabled belonging to our intc controller. Such irqs\nare simply enabled so wakeup interrupts may reach the cpu.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "f7dd2548c471b1c7758611f6cd6393367d7ff649",
      "tree": "244e2e172157a298daae60c6e84b0fd08031142d",
      "parents": [
        "3093e78ebab100ada1c724c9f751d9da39602a97"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Wed Apr 01 14:20:58 2009 +0000"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu Apr 02 11:19:29 2009 +0900"
      },
      "message": "sh: intc: install enable, disable and shutdown callbacks\n\nModify the intc code to install a disable callback. The current\nsolution without a disable callback results in use of the\ngeneric default_disable() function. This function is a no-op\nso suspend_device_irqs() will not disable any intc interrupts\nat suspend time without this patch. Also, install enable and\nshutdown callbacks while at it.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "f033599aac86f4eb08a1b6b851568a2587e8c6ad",
      "tree": "f0e29f2e4096d098e4bd25acccd1cfe031b685de",
      "parents": [
        "075901af281b2afb47b1423ac488e713844db396"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Mar 06 17:56:58 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Mar 06 17:56:58 2009 +0900"
      },
      "message": "sh: intc: Make missing unique IRQ mask warning more verbose.\n\nThis includes the IRQ number in addition to the vector, as not all\nplatforms wrap in with INTC_VECT().\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "bdaa6e8062d7f8085d8ed94ff88c99406ad53d79",
      "tree": "c68310adbcea90c5c8bdb4b4b7c6517c40ecb0de",
      "parents": [
        "3e91faec47e9e12b965c952d698b0bb64847af06"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Tue Feb 24 22:58:57 2009 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Feb 27 16:53:50 2009 +0900"
      },
      "message": "sh: multiple vectors per irq - base\n\nInstead of keeping the single vector -\u003e single linux irq mapping\nwe extend the intc code to support merging of vectors to a single\nlinux irq. This helps processors such as sh7750, sh7780 and sh7785\nwhich have more vectors than masking ability. With this patch in\nplace we can modify the intc tables to use one irq per maskable\nirq source. Please note the following:\n\n - If multiple vectors share the same enum then only the\n   first vector will be available as a linux irq.\n\n - Drivers may need to be rewritten to get pending irq\n   source from the hardware block instead of irq number.\n\nThis patch together with the sh7785 specific intc tables solves\nDMA controller irq issues related to buggy interrupt masking.\n\nReported-by: Yoshihiro Shimoda \u003cshimoda.yoshihiro@renesas.com\u003e\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "bbfbd8b151fe35c9a1180a7f5254c5d6b8387cc0",
      "tree": "e39f364221492d64c7f8fd80c1ceb2065350c4d7",
      "parents": [
        "7ff731aeba1cdac473c818a9884eb94ddad18e7f"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Oct 01 16:13:54 2008 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Oct 01 16:13:54 2008 +0900"
      },
      "message": "sh: Move the shared INTC code out to drivers/sh/\n\nThe INTC code will be re-used across different architectures, so move\nthis out to drivers/sh/ and include/linux/sh_intc.h respectively.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "62429e03644833693e6f94afe537f252e2d3b475",
      "tree": "d2c3c3139fb7d2e86480ab3f55c7b976d4becf16",
      "parents": [
        "64c9627c2628bc3bd3291710b8ee6f8335883f8b"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Oct 01 15:19:10 2008 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Oct 01 15:19:10 2008 +0900"
      },
      "message": "sh: Use __raw_xxx() I/O accessors for INTC and IPR.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "b21a91043592434e2847c4b552be7b51851d92c3",
      "tree": "610ca37711d0888adcc65d34fc6cd0236050dca1",
      "parents": [
        "6eb2139b3dc3e1c5181a7cdf83a517c57c34bb12"
      ],
      "author": {
        "name": "roel kluin",
        "email": "roel.kluin@gmail.com",
        "time": "Tue Sep 09 23:02:43 2008 +0200"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Wed Sep 10 12:01:46 2008 +0900"
      },
      "message": "sh: intc_prio_data() test before subtraction on unsigned\n\nbit is unsigned, so test before subtraction\n\nSigned-off-by: Roel Kluin \u003croel.kluin@gmail.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "6bdfb22a8e1ffa37ae4ad35b87cb02958d1901e5",
      "tree": "afc8f27f1044be5787fb38d181292dd861f9a1c5",
      "parents": [
        "f12ae6bc4ad0054386b380dbf90e63617cd5ab92"
      ],
      "author": {
        "name": "Yoshihiro Shimoda",
        "email": "shimoda.yoshihiro@renesas.com",
        "time": "Fri Jul 04 12:37:12 2008 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Jul 28 18:10:33 2008 +0900"
      },
      "message": "sh: add interrupt ack code to sh4a\n\nThis patch is based on interrupt acknowledge code for external\ninterrupt sources on sh3 processors and adds on sh4a processors.\n\nSigned-off-by: Yoshihiro Shimoda \u003cshimoda.yoshihiro@renesas.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "4370fe1c06ffa251b63b12a41e2599037a4b7f87",
      "tree": "9b08db220fafe5c7fa9160fc17a924a5fe1e59dc",
      "parents": [
        "720be99006c5830970d5b62633c92b29e4cef137"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "magnus.damm@gmail.com",
        "time": "Thu Apr 24 21:53:07 2008 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu May 08 19:52:07 2008 +0900"
      },
      "message": "sh: intc register modify fix\n\nMake sure register modifications stay atomic. Fixes processors with\nshared priority register masking. Dual bitmap masking is unaffected.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "720be99006c5830970d5b62633c92b29e4cef137",
      "tree": "cf99c87ca821fb55a745ad68487237abec699d19",
      "parents": [
        "995d538a5b09e3c129d8aac559f07a0f5cc3fc3c"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "magnus.damm@gmail.com",
        "time": "Thu Apr 24 21:47:15 2008 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu May 08 19:52:06 2008 +0900"
      },
      "message": "sh: no high level trigger on some sh3 cpus\n\nThe processor models sh7706, sh7707 and sh7709 don\u0027t support high\nlevel trigger sense configuration. And the intc code looks like\ncrap these days so what\u0027s the difference.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "d58876e289b0153bf86162aa1a43249e0f0aa03d",
      "tree": "bcba99bfb89b61142a81a651958c10e4c9828778",
      "parents": [
        "a276e588a92737889c21e736f2bbed8aecda25fb"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "magnus.damm@gmail.com",
        "time": "Thu Apr 24 21:36:34 2008 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Thu May 08 19:52:03 2008 +0900"
      },
      "message": "sh: add interrupt ack code to sh3\n\nThis patch adds interrupt acknowledge code for external interrupt\nsources on sh3 processors. Only really required for edge triggered\ninterrupts, but we ack regardless of sense configuration.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "7f3edee81fbd49114c28057512906f169caa0bed",
      "tree": "d1c604fc6cddcd42f00eff1d153e8151ef00ba07",
      "parents": [
        "b62ad83d91ebf1368e9e72d476b18698ac67bef9"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Thu Jan 10 14:08:55 2008 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Mon Jan 28 13:19:02 2008 +0900"
      },
      "message": "sh: intc - remove default interrupt priority tables\n\nThis patch removes interrupt priority tables from the intc code.\nOptimal priority assignment varies with embedded application anyway,\nso keeping the interrupt priority tables together with cpu-specific\ncode doesn\u0027t make sense.\n\nThe function intc_set_priority() should be used instead to set the\ndesired interrupt priority level.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "f18d533e3cd476aedf41fe1e6e9dc3e0a2446bba",
      "tree": "64e54cb0572f62f8d171ce7f779b50226bfe931f",
      "parents": [
        "9964fa8bf952c5c4df9676223fab4cd886d18200"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Fri Sep 21 18:16:42 2007 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Sep 21 18:16:42 2007 +0900"
      },
      "message": "sh: intc - initial SMP support.\n\nThis implements initial support for the SMP INTC (particularly\nINTC2) controllers.\n\nThese are largely implemented as conventional blocks, with\nregister sets grouped together at fixed strides relative to\nthe CPU id.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "3d37d94e5aab669f5a492bb3cda67bbbbbca50b8",
      "tree": "7066d6e40e2da4b9fdc9b169909ae65d88068df1",
      "parents": [
        "5c37e025352b993d8726b0207ff2270b2f2bc7d6"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Fri Aug 17 00:50:44 2007 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Sep 21 11:57:50 2007 +0900"
      },
      "message": "sh: intc - primary priority masking fixes\n\nThis patch contains various intc fixes for problems reported by\nMarkus Brunner on the linuxsh-dev mailing list:\n\nhttp://marc.info/?l\u003dlinuxsh-dev\u0026m\u003d118701948224991\u0026w\u003d1\n\nApart from added comments, the fixes are:\n\n- add intc_set_priority() function prototype to hw_irq.h\n- fix off-by-one error in intc_set_priority()\n- make sure _INTC_WIDTH() is set for primary priority masking\n\nBig thanks to Markus for finding these problems. Version two fixes\na compile error and an inverted primary check.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nAcked-by: Markus Brunner \u003csuper.firetwister@gmail.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "73505b445dbb8ad12df468404c4dd5cde9c40c65",
      "tree": "c248710475090f01dc874e2c878efc769b24d2af",
      "parents": [
        "6ef5fb2cfcedaab4a43493c8f2305a67c0ce1af6"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Sun Aug 12 15:26:12 2007 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Sep 21 11:57:50 2007 +0900"
      },
      "message": "sh: intc - rework core code\n\nThis patch reworks the intc core, implementing the following features:\n\n- Support dual priority registers - one set and one clear register\n- All 8/16/32 bit register combinations are now supported\n- Both single mask and single enable bitmap register are supported\n- Add code to set interrupt priority\n- Speedup sense and priority configuration code\n- Allocate data using bootmem, allows intc data structures to be\n  __initdata\n- Save memory - allocated memory footprint is smaller than intc\n  structures\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "6ef5fb2cfcedaab4a43493c8f2305a67c0ce1af6",
      "tree": "ba5b4c0a19a1d81047d49488b6fe3e3b02e824cf",
      "parents": [
        "d6aee69ca11550f3ca325ceaa020ea74e173478f"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Sun Aug 12 15:22:02 2007 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Sep 21 11:57:49 2007 +0900"
      },
      "message": "sh: intc - add a clear register to struct intc_prio_reg\n\nWe need a secondary register member in struct intc_prio_reg to support\ndual priority registers used by ipi on x3.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "6d64d4256cccd3a452ebd8c37a1d41e2d5dab8c6",
      "tree": "baacb7d40fac6a97ac98dc8bbcd703045f03bd94",
      "parents": [
        "96290d808fa4c9b8e744dc1cd032b005179f4710"
      ],
      "author": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Tue Aug 07 18:51:19 2007 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Sep 21 11:57:48 2007 +0900"
      },
      "message": "sh: intc: Fix sense regs oops for IRL IRQs.\n\nIRL doesn\u0027t always define sense registers, so don\u0027t bother trying to\niterate through the table. This ended up causing an oops on SH-X3\nwhen using IRL mode.\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "51da64264b8d59a1e5fceebd94a975690b70b086",
      "tree": "bb3042c8e14f162bda662ec9e93c807aef37de05",
      "parents": [
        "2635e8558a7ec0002724e3da8c0a221d2c08af33"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Fri Aug 03 14:25:32 2007 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Sep 21 11:57:47 2007 +0900"
      },
      "message": "sh: intc - add single bitmap register support\n\nThis patch adds single bitmap register support to intc. The current\ncode only handles 16 and 32 bit registers where a set bit means\ninterrupt enabled, but this is easy to extend in the future.\n\nThe INTC_IRQ() macro is also added to provide a way to hook in\ninterrupt controllers for FPGAs in boards or companion chips.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "680c45981ae2b4029878806d76aa17bb62d3c674",
      "tree": "57d0f10573fb577d1330f15ac6177666fe3cfb25",
      "parents": [
        "d0afa579698f33a65bc5c21d3d667dbb46f9e440"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Fri Jul 20 12:09:29 2007 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Jul 20 12:18:21 2007 +0900"
      },
      "message": "sh: intc - improve group support\n\nThis patch improves intc group support, ie it makes it possible to\ngroup interrupts together and mask / unmask the entire group. This\nalso works with priorities, so setting a priority for an entire group\nis also possible. This patch is needed to properly support certain\nprocessors such as the 7780.\n\nFixes for NULL pointers in DECLARE_INTC_DESC() are also included.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    },
    {
      "commit": "02ab3f70791f7d5c9098acaa31a72dd7d0961cb0",
      "tree": "b95f0ec8cc57ed2166eb28e53bb604374e6f0f44",
      "parents": [
        "53aba19f82045c1df838570b8484043e93c4442a"
      ],
      "author": {
        "name": "Magnus Damm",
        "email": "damm@igel.co.jp",
        "time": "Wed Jul 18 17:25:09 2007 +0900"
      },
      "committer": {
        "name": "Paul Mundt",
        "email": "lethal@linux-sh.org",
        "time": "Fri Jul 20 12:18:20 2007 +0900"
      },
      "message": "sh: intc - shared IPR and INTC2 controller\n\nThis is the second version of the shared interrupt controller patch\nfor the sh architecture, fixing up handling of intc_reg_fns[].\n\nThe three main advantages with this controller over the existing\nones are:\n\n\t- Both priority (ipr) and bitmap (intc2) registers are\n\t  supported\n\t- External pin sense configuration is supported, ie edge\n\t  vs level triggered\n\t- CPU/Board specific code maps 1:1 with datasheet for\n\t  easy verification\n\nThis controller can easily coexist with the current IPR and INTC2\ncontrollers, but the idea is that CPUs/Boards should be moved over\nto this controller over time so we have a single code base to\nmaintain.\n\nSigned-off-by: Magnus Damm \u003cdamm@igel.co.jp\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n"
    }
  ]
}