)]}' { "log": [ { "commit": "3e6b02d9f5a9715f7d4ff9e0978e5f9cef53d31f", "tree": "0e08d7cdff6856b7df8ec6a93f05787debb0f04c", "parents": [ "123f94f22e3d283dfe68742b269c245b0501ad82" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 02 15:46:17 2010 -0600" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Fri Jul 02 15:46:17 2010 -0600" }, "message": "of/dma: fix build breakage in ppc4xx adma driver\n\nConvert ppc4xx adma driver to use new node pointer location\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "05c02542c20aa00dc9a66f4bfb1a89d1131457f2", "tree": "416689b42957b8217f50966ea325a0251f262f98", "parents": [ "c8a4d0fd2ac2ce6b3409f51fcf918dcb3617ec97" ], "author": { "name": "Anatolij Gustschin", "email": "agust@denx.de", "time": "Thu Jun 03 02:46:37 2010 +0200" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Wed Jun 02 21:02:39 2010 -0600" }, "message": "of/dma: fix build breakage in ppc4xx adma driver\n\nFixes build error caused by the OF device_node\npointer being moved into struct device\n\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "b4a75c91b8a6cb80ba7772f69613025ddf75ebc2", "tree": "f2e20c6470b6c0e0c06ba923ceccfb5ef7032b88", "parents": [ "14acbbf8bada18f19930d38ce33c3947b2c718e0" ], "author": { "name": "Anatolij Gustschin", "email": "agust@denx.de", "time": "Mon May 31 18:39:13 2010 +0200" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Wed Jun 02 13:45:08 2010 -0600" }, "message": "of/dma: mpc512x_dma.c: Fix build failures\n\nFixes build errors caused by the:\n - OF device_node pointer being moved into struct device\n - removal of the match_table field from struct of_platform_driver\n\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "e38c1e54ce51059a1aa8744c895762906cf43b32", "tree": "6af00994b3d07da2db3419346f740ae06f3cfe7e", "parents": [ "3e9345edd8562dc4f9bbca88a598c91c8779a9c4", "7b8ddb06e54ad98edeb7951f317aee4d1feda9d6" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun May 30 09:12:43 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun May 30 09:12:43 2010 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:\n DMAENGINE: DMA40 U8500 platform configuration\n DMA: PL330: Add dma api driver\n" }, { "commit": "4be929be34f9bdeffa40d815d32d7d60d2c7f03b", "tree": "4d2c6e2b8ef766e565e2e050ee151de2e02081d3", "parents": [ "940370fc86b920b51a34217a1facc3e9e97c2456" ], "author": { "name": "Alexey Dobriyan", "email": "adobriyan@gmail.com", "time": "Mon May 24 14:33:03 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue May 25 08:07:02 2010 -0700" }, "message": "kernel-wide: replace USHORT_MAX, SHORT_MAX and SHORT_MIN with USHRT_MAX, SHRT_MAX and SHRT_MIN\n\n- C99 knows about USHRT_MAX/SHRT_MAX/SHRT_MIN, not\n USHORT_MAX/SHORT_MAX/SHORT_MIN.\n\n- Make SHRT_MIN of type s16, not int, for consistency.\n\n[akpm@linux-foundation.org: fix drivers/dma/timb_dma.c]\n[akpm@linux-foundation.org: fix security/keys/keyring.c]\nSigned-off-by: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nAcked-by: WANG Cong \u003cxiyou.wangcong@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "0fed2b5cb4c04336b26b0cbf6f9a8c07081f79a6", "tree": "a9be0f082d3c2f53eb2d5f9de9ad900c31236b34", "parents": [ "0163916f1db7f345963dad1af78b7628c759c6ee", "41ec7ebee14189a0424176279c227168960c28ad" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 24 07:58:28 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon May 24 07:58:28 2010 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (25 commits)\n sh: fix up sh7785lcr_32bit_defconfig.\n arch/sh/lib/strlen.S: Checkpatch cleanup\n sh: fix up sh7786 dmaengine build.\n sh: guard cookie consistency across termination in the DMA driver\n sh: prevent the DMA driver from unloading, while in use\n sh: fix Oops in the serial SCI driver\n sh: allow platforms to specify SD-card supported voltages\n mmc: let MFD\u0027s provide supported Vdd card voltages to tmio_mmc\n sh: disable SD-card write-protection detection on kfr2r09\n mfd: pass platform flags down to the tmio_mmc driver\n tmio: add a platform flag to disable card write-protection detection\n sh: Add SDHI DMA support to migor\n sh: Add SDHI DMA support to kfr2r09\n sh: Add SDHI DMA support to ms7724se\n sh: Add SDHI DMA support to ecovec\n mmc: add DMA support to tmio_mmc driver, when used on SuperH\n sh: prepare the SDHI MFD driver to pass DMA configuration to tmio_mmc.c\n mmc: prepare tmio_mmc for passing of DMA configuration from the MFD cell\n sh: add DMA slave definitions to sh7724\n sh: add DMA slaves for two SDHI controllers to sh7722\n ...\n" }, { "commit": "b3040e40675ec2c43542331cd30d4ee3dae797e8", "tree": "a327c4a92118dd0e1c61b8455e744910cd121f57", "parents": [ "6f68fbaafbaa033205cd131d3e1f3c4b914e9b78" ], "author": { "name": "Jassi Brar", "email": "jassi.brar@samsung.com", "time": "Sun May 23 20:28:19 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun May 23 20:28:19 2010 -0700" }, "message": "DMA: PL330: Add dma api driver\n\nAdd DMA Engine API driver for the PL330 DMAC.\nThis driver is supposed to be reusable by various\nplatforms that have one or more PL330 DMACs.\nAtm, DMA_SLAVE and DMA_MEMCPY capabilities have been\nimplemented.\n\nSigned-off-by: Jassi Brar \u003cjassi.brar@samsung.com\u003e\nReviewed-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\n[dan.j.williams@intel.com: missing slab.h and -\u003edevice_control() fixups]\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9255f1deec151ac0e84871d06bc27406cb81f26f", "tree": "b4e454e2339207a1ce3bbe826f624c1f80323487", "parents": [ "7a5c106a0e8fd03a806d0da77eef10b4045c43a6" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Fri May 21 15:30:12 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Sat May 22 17:06:35 2010 +0900" }, "message": "sh: guard cookie consistency across termination in the DMA driver\n\nIf all descriptors on a channel are terminated or the channel is released,\nupdate the completed cookie counter to match the last cookie. This prevents\ninconsistency warning on resumed DMA operation.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "7a5c106a0e8fd03a806d0da77eef10b4045c43a6", "tree": "610e6c8474d0d6d9947c3c90509b85319076841a", "parents": [ "85b8e3ffc47b2a1913be3079e9f1c1f66a6240b2" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Fri May 21 15:28:51 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Sat May 22 17:06:34 2010 +0900" }, "message": "sh: prevent the DMA driver from unloading, while in use\n\nThis prevents the driver from unloading, while it is in use. Unloading of the\ndriver, while its DMA channels are held, leads to a kernel Oops.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "cf9b59e9d3e008591d1f54830f570982bb307a0d", "tree": "113478ce8fd8c832ba726ffdf59b82cb46356476", "parents": [ "44504b2bebf8b5823c59484e73096a7d6574471d", "f4b87dee923342505e1ddba8d34ce9de33e75050" ], "author": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Sat May 22 00:36:56 2010 -0600" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Sat May 22 00:36:56 2010 -0600" }, "message": "Merge remote branch \u0027origin\u0027 into secretlab/next-devicetree\n\nMerging in current state of Linus\u0027 tree to deal with merge conflicts and\nbuild failures in vio.c after merge.\n\nConflicts:\n\tdrivers/i2c/busses/i2c-cpm.c\n\tdrivers/i2c/busses/i2c-mpc.c\n\tdrivers/net/gianfar.c\n\nAlso fixed up one line in arch/powerpc/kernel/vio.c to use the\ncorrect node pointer.\n\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "4018294b53d1dae026880e45f174c1cc63b5d435", "tree": "6db3538eaf91b653381720a6d92f4f15634a93d0", "parents": [ "597b9d1e44e9ba69f2454a5318bbe7a6d5e6930a" ], "author": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Tue Apr 13 16:13:02 2010 -0700" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Sat May 22 00:10:40 2010 -0600" }, "message": "of: Remove duplicate fields from of_platform_driver\n\n.name, .match_table and .owner are duplicated in both of_platform_driver\nand device_driver. This patch is a removes the extra copies from struct\nof_platform_driver and converts all users to the device_driver members.\n\nThis patch is a pretty mechanical change. The usage model doesn\u0027t change\nand if any drivers have been missed, or if anything has been fixed up\nincorrectly, then it will fail with a compile time error, and the fixup\nwill be trivial. This patch looks big and scary because it touches so\nmany files, but it should be pretty safe.\n\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nAcked-by: Sean MacLennan \u003csmaclennan@pikatech.com\u003e\n\n" }, { "commit": "6f68fbaafbaa033205cd131d3e1f3c4b914e9b78", "tree": "56b434496064ed170f94381e3ec4c6c340b71376", "parents": [ "6e4513972a5ad28517477d21f301a02ac7a0df76", "0b28330e39bbe0ffee4c56b09fc415fcec595ea3" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 21 17:05:46 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri May 21 17:05:46 2010 -0700" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:\n DMAENGINE: extend the control command to include an arg\n async_tx: trim dma_async_tx_descriptor in \u0027no channel switch\u0027 case\n DMAENGINE: DMA40 fix for allocation of logical channel 0\n DMAENGINE: DMA40 support paused channel status\n dmaengine: mpc512x: Use resource_size\n DMA ENGINE: Do not reset \u0027private\u0027 of channel\n ioat: Remove duplicated devm_kzalloc() calls for ioatdma_device\n ioat3: disable cacheline-unaligned transfers for raid operations\n ioat2,3: convert to producer/consumer locking\n ioat: convert to circ_buf\n DMAENGINE: Support for ST-Ericssons DMA40 block v3\n async_tx: use of kzalloc/kfree requires the include of slab.h\n dmaengine: provide helper for setting txstate\n DMAENGINE: generic channel status v2\n DMAENGINE: generic slave control v2\n dma: timb-dma: Update comment and fix compiler warning\n dma: Add timb-dma\n DMAENGINE: COH 901 318 fix bytesleft\n DMAENGINE: COH 901 318 rename confusing vars\n" }, { "commit": "7c7cbaf5b82c418cd3b1dcf718f71d0e6057e639", "tree": "da9aaa5a246af464b1e10d88618c1cad07b76314", "parents": [ "ba0234ec35127fe21d373db53cbaf9fe20620cb6", "4d0956b8f597aac10208ca763f8fe641fde16aab" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 19 11:36:03 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed May 19 11:36:03 2010 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (127 commits)\n sh: update defconfigs.\n sh: Fix up the NUMA build for recent LMB changes.\n sh64: provide a stub per_cpu_trap_init() definition.\n sh: fix up CONFIG_KEXEC\u003dn build.\n sh: fixup the docbook paths for clock framework shuffling.\n driver core: Early dev_name() depends on slab_is_available().\n sh: simplify WARN usage in SH clock driver\n sh: Check return value of clk_get on ms7724\n sh: Check return value of clk_get on ecovec24\n sh: move sh clock-cpg.c contents to drivers/sh/clk-cpg.c\n sh: move sh clock.c contents to drivers/sh/clk.\n sh: move sh asm/clock.h contents to linux/sh_clk.h V2\n sh: remove unused clock lookup\n sh: switch boards to clkdev\n sh: switch sh4-202 to clkdev\n sh: switch shx3 to clkdev\n sh: switch sh7757 to clkdev\n sh: switch sh7763 to clkdev\n sh: switch sh7780 to clkdev\n sh: switch sh7786 to clkdev\n ...\n" }, { "commit": "61c7a080a5a061c976988fd4b844dfb468dda255", "tree": "8cb492b73f2755c38a6164d770da34d5af6486a0", "parents": [ "d12d42f744f805a9ccc33cd76f04b237cd83ce56" ], "author": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Tue Apr 13 16:12:29 2010 -0700" }, "committer": { "name": "Grant Likely", "email": "grant.likely@secretlab.ca", "time": "Tue May 18 16:10:44 2010 -0600" }, "message": "of: Always use \u0027struct device.of_node\u0027 to get device node pointer.\n\nThe following structure elements duplicate the information in\n\u0027struct device.of_node\u0027 and so are being eliminated. This patch\nmakes all readers of these elements use device.of_node instead.\n\n(struct of_device *)-\u003enode\n(struct dev_archdata *)-\u003eprom_node (sparc)\n(struct dev_archdata *)-\u003eof_node (powerpc \u0026 microblaze)\n\nSigned-off-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\n" }, { "commit": "0b28330e39bbe0ffee4c56b09fc415fcec595ea3", "tree": "fcf504879883763557e696eff81427b1ab78f76b", "parents": [ "058276303dbc4ed089c1f7dad0871810b1f5ddf1", "caa20d974c86af496b419eef70010e63b7fab7ac" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 16:30:58 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 16:30:58 2010 -0700" }, "message": "Merge branch \u0027ioat\u0027 into dmaengine\n" }, { "commit": "058276303dbc4ed089c1f7dad0871810b1f5ddf1", "tree": "df26ff701721b2a91d61bd29e48bad7cbcedd746", "parents": [ "4aed79b2818e7330b5d00143e4c20bc6555df91f" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Mon May 17 16:30:42 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 16:30:42 2010 -0700" }, "message": "DMAENGINE: extend the control command to include an arg\n\nThis adds an argument to the DMAengine control function, so that\nwe can later provide control commands that need some external data\npassed in through an argument akin to the ioctl() operation\nprototype.\n\n[dan.j.williams@intel.com: fix up some missed conversions]\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "caa20d974c86af496b419eef70010e63b7fab7ac", "tree": "a38165bd839a398528a4ef4c7fa8481fb0fefed3", "parents": [ "c86e1401c9f2ba8d989fa1c4b33d0f0ec3ba8aaf" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 16:24:16 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 16:24:16 2010 -0700" }, "message": "async_tx: trim dma_async_tx_descriptor in \u0027no channel switch\u0027 case\n\nSaves 24 bytes per descriptor (64-bit) when the channel-switching\ncapabilities of async_tx are not required.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4aed79b2818e7330b5d00143e4c20bc6555df91f", "tree": "af69dd8e9a09ea2eb1df8a58e67d36cf3a77cb1f", "parents": [ "a5ebca4769f28ceade28ff59fcbffb8e184e599c" ], "author": { "name": "Marcin Mielczarczyk", "email": "marcin.mielczarczyk@tieto.com", "time": "Tue May 18 00:41:21 2010 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 15:45:06 2010 -0700" }, "message": "DMAENGINE: DMA40 fix for allocation of logical channel 0\n\nFix for allocation failure of logical channel when event line\nhappens to be number 0.\n\nSigned-off-by: Marcin Mielczarczyk \u003cmarcin.mielczarczyk@tieto.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "a5ebca4769f28ceade28ff59fcbffb8e184e599c", "tree": "cc951614a700e0139d8d786a854eb74c2a05075d", "parents": [ "8381fc35244dbdf58cfc49e04e0d7c3498c8aa03" ], "author": { "name": "Jonas Aaberg", "email": "jonas.aberg@stericsson.com", "time": "Tue May 18 00:41:09 2010 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 15:45:03 2010 -0700" }, "message": "DMAENGINE: DMA40 support paused channel status\n\nSupport determining whether a channel is paused or\nnot using the status function.\n\nSigned-off-by: Jonas Aaberg \u003cjonas.aberg@stericsson.com\u003e\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8381fc35244dbdf58cfc49e04e0d7c3498c8aa03", "tree": "dc6e2deb84db53242c4904b295ded5ef1294ad3d", "parents": [ "cc05ea0cd63437da2033b3ce6e033b1f1aaaf640" ], "author": { "name": "Tobias Klauser", "email": "tklauser@distanz.ch", "time": "Thu May 06 11:58:55 2010 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 11:13:51 2010 -0700" }, "message": "dmaengine: mpc512x: Use resource_size\n\nUse the resource_size function instead of manually calculating the\nresource size. This reduces the chance of introducing off-by-one\nerrors.\n\nSigned-off-by: Tobias Klauser \u003ctklauser@distanz.ch\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cc05ea0cd63437da2033b3ce6e033b1f1aaaf640", "tree": "78b2786870053f56d3ba077c628d2cc975a4c737", "parents": [ "8d318a50b3d72e3daf94131f91e1ab799a8d5ad4" ], "author": { "name": "Jassi Brar", "email": "jassi.brar@samsung.com", "time": "Tue May 04 18:22:15 2010 +0900" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon May 17 01:33:56 2010 -0700" }, "message": "DMA ENGINE: Do not reset \u0027private\u0027 of channel\n\nThe member \u0027private\u0027 of \u0027struct dma_chan\u0027 is meant for passing\ndata between client and the controller driver.\n\nThe DMA client driver may point it to platform specific stuff after\nacquiring the channel. So, it is the responsiblity of the same code\nto reset it, if it must.\n\nThe DMA engine doesn\u0027t set it and hence, shouldn\u0027t reset it either.\n\nThis reseting of private by DMA Engine comes in the way of implementing\ndefault channel settings during DMAC probe. That capability is useful\nfor not having the clients to always provide platform specific data,\nlike Rx/Tx FIFO addresses, which usually doesn\u0027t change across channel\nrequests.\n\nSigned-off-by: Jassi Brar \u003cjassi.brar@samsung.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "bbfdbe9dc00dc3fd6cba9b0f96adc46d025c9079", "tree": "578a2c07181a1832eea2dd4195b6ff2fcebf4c83", "parents": [ "722154e4cacf015161efe60009ae9be23d492296", "8bed90557d2600d25e58de30df48b244980164ec" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu May 06 08:37:39 2010 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu May 06 08:37:39 2010 -0700" }, "message": "Merge branch \u0027sh/for-2.6.34\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6\n\n* \u0027sh/for-2.6.34\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:\n sh: fix a number of Oopses and leaks in SH framebuffer driver\n SH: fix error paths in DMA driver\n sh: sh7751 pci controller io port fix\n sh: Fix maximum number of SCIF ports in R2D defconfigs\n SH: fix TS field shift calculation for DMA drivers\n" }, { "commit": "c86e1401c9f2ba8d989fa1c4b33d0f0ec3ba8aaf", "tree": "f835f2fa83130eecc9e0a2d2e218e6f942bf134e", "parents": [ "2adfc550b6d9646301c810643bc309fa49375987" ], "author": { "name": "Minskey Guo", "email": "chaohong_guo@linux.intel.com", "time": "Sun May 02 12:52:35 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun May 02 12:52:35 2010 -0700" }, "message": "ioat: Remove duplicated devm_kzalloc() calls for ioatdma_device\n\nThe memory for ioatdma_device structure is being allocated in\nalloc_ioatdma()\n\nSigned-off-by: Minskey Guo \u003cchaohong_guo@linux.intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "2adfc550b6d9646301c810643bc309fa49375987", "tree": "1e1fe80772dc588be2dc294d8b9f371caec3f0b0", "parents": [ "074cc47679f8b0931d7d5384e95822d82768f149" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat May 01 15:22:56 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat May 01 15:22:56 2010 -0700" }, "message": "ioat3: disable cacheline-unaligned transfers for raid operations\n\nThere are cases where cacheline-unaligned raid operations can hang the\ndma channel. Simply disable these operations by increasing the\nalignment constraints published to async_tx. The raid456 driver always\nissues page aligned requests, so the only in-kernel user of the ioatdma\ndriver that is affected by this change is dmatest.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "074cc47679f8b0931d7d5384e95822d82768f149", "tree": "bd4699a1c769553f2bbfa931913352d26c81dc4d", "parents": [ "abb12dfd50c7580d7dcbd581cf6265ba4d01ea7e" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat May 01 15:22:55 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat May 01 15:22:55 2010 -0700" }, "message": "ioat2,3: convert to producer/consumer locking\n\nUse separate locks for the descriptor prep (producer) and descriptor\ncleanup (consumer) paths. Allows the producer path to run concurrently\nwith the cleanup path. Inspired by Documentation/circular-buffer.txt.\n\nCc: David Howells \u003cdhowells@redhat.com\u003e\nCc: Paul E. McKenney \u003cpaulmck@linux.vnet.ibm.com\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "abb12dfd50c7580d7dcbd581cf6265ba4d01ea7e", "tree": "d774315dd2620028f1801c8ec0ec31b0e78a536d", "parents": [ "0d0fb0f9c5fddef4a10242fe3337f00f528a3099" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat May 01 15:22:54 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat May 01 15:22:54 2010 -0700" }, "message": "ioat: convert to circ_buf\n\nUse the common power-of-2 circular buffer macros.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b0b4ce38a535ed3de5ec6fdd4f3c34435a1c1d1e", "tree": "4b8a41ca3c8e147703471db2dcedeffa7bcab088", "parents": [ "7270be03bc300f67c0b9eccde730937e802892b6" ], "author": { "name": "Geert Uytterhoeven", "email": "geert@linux-m68k.org", "time": "Thu Apr 08 20:52:00 2010 +0200" }, "committer": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Fri Apr 30 20:52:40 2010 +0100" }, "message": "MIPS: TXx9: Add missing MODULE_ALIAS definitions for TXx9 platform devices\n\nThis enables autoloading of the TXx9 sound driver on RBTX4927.\n\nSigned-off-by: Geert Uytterhoeven \u003cgeert@linux-m68k.org\u003e\nTo: Atsushi Nemoto \u003canemo@mba.ocn.ne.jp\u003e\nCc: Linux MIPS Mailing List \u003clinux-mips@linux-mips.org\u003e\nPatchwork: http://patchwork.linux-mips.org/patch/1101/\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n" }, { "commit": "e19553427c2e8fdb04fdd98e407164bb59a840ba", "tree": "5332234b2dad07c03c27e4608afb16f297f41e61", "parents": [ "35f6cd4a06432034665a1499ca4b022437423aac", "83515bc7df812555e20cda48614674e2f346f9f5" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Apr 26 16:08:27 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Apr 26 16:08:27 2010 +0900" }, "message": "Merge branch \u0027sh/stable-updates\u0027\n\nConflicts:\n\tarch/sh/kernel/dwarf.c\n\tdrivers/dma/shdma.c\n\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "83515bc7df812555e20cda48614674e2f346f9f5", "tree": "c0ca604767a430ae328c5e44a6e3e0dada89345f", "parents": [ "e3a4317e1d9970c56ba19d29393e4289809a1aa5" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Mon Apr 19 08:39:39 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Apr 26 16:04:48 2010 +0900" }, "message": "SH: fix error paths in DMA driver\n\nIf channel allocation is failing, mark the channel unused and give PM a chance\nto power down the hardware.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "5bac942db3d2c4738df04104240d65a5d1eaec6a", "tree": "253c75407764fc5cb3483283941b14a99fad389a", "parents": [ "6b6b18e62cfba44ce7b6489c7100f12b199232d7" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed Apr 21 15:36:49 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Apr 26 15:50:50 2010 +0900" }, "message": "SH: constify multiple DMA related objects and references to them\n\nLists of DMA channels and slaves are not changed, make them constant. Besides,\nSH7724 channel and slave configuration of both DMA controllers is identical,\nremove the extra copy of the configuration data.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "8d318a50b3d72e3daf94131f91e1ab799a8d5ad4", "tree": "ae36452931d2e836f725b3f91eebd7f4d9e27589", "parents": [ "6a3cd3ea48584d14f60dce0b3c4e9e4428beb0fe" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Tue Mar 30 15:33:42 2010 +0200" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Apr 14 14:49:20 2010 -0700" }, "message": "DMAENGINE: Support for ST-Ericssons DMA40 block v3\n\nThis is a straightforward driver for the ST-Ericsson DMA40 DMA\ncontroller found in U8500, implemented akin to the existing\nCOH 901 318 driver.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nAcked-by: Srinidh Kasagar \u003csrinidhi.kasagar@stericsson.com\u003e\nCc: STEricsson_nomadik_linux@list.st.com\nCc: Alessandro Rubini \u003crubini@unipv.it\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5a0e3ad6af8660be21ca98a971cd00f331318c05", "tree": "5bfb7be11a03176a87296a43ac6647975c00a1d1", "parents": [ "ed391f4ebf8f701d3566423ce8f17e614cde9806" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Wed Mar 24 17:04:11 2010 +0900" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Mar 30 22:02:32 2010 +0900" }, "message": "include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h\n\npercpu.h is included by sched.h and module.h and thus ends up being\nincluded when building most .c files. percpu.h includes slab.h which\nin turn includes gfp.h making everything defined by the two files\nuniversally available and complicating inclusion dependencies.\n\npercpu.h -\u003e slab.h dependency is about to be removed. Prepare for\nthis change by updating users of gfp and slab facilities include those\nheaders directly instead of assuming availability. As this conversion\nneeds to touch large number of source files, the following script is\nused as the basis of conversion.\n\n http://userweb.kernel.org/~tj/misc/slabh-sweep.py\n\nThe script does the followings.\n\n* Scan files for gfp and slab usages and update includes such that\n only the necessary includes are there. ie. if only gfp is used,\n gfp.h, if slab is used, slab.h.\n\n* When the script inserts a new include, it looks at the include\n blocks and try to put the new include such that its order conforms\n to its surrounding. It\u0027s put in the include block which contains\n core kernel includes, in the same order that the rest are ordered -\n alphabetical, Christmas tree, rev-Xmas-tree or at the end if there\n doesn\u0027t seem to be any matching order.\n\n* If the script can\u0027t find a place to put a new include (mostly\n because the file doesn\u0027t have fitting include block), it prints out\n an error message indicating which .h file needs to be added to the\n file.\n\nThe conversion was done in the following steps.\n\n1. The initial automatic conversion of all .c files updated slightly\n over 4000 files, deleting around 700 includes and adding ~480 gfp.h\n and ~3000 slab.h inclusions. The script emitted errors for ~400\n files.\n\n2. Each error was manually checked. Some didn\u0027t need the inclusion,\n some needed manual addition while adding it to implementation .h or\n embedding .c file was more appropriate for others. This step added\n inclusions to around 150 files.\n\n3. The script was run again and the output was compared to the edits\n from #2 to make sure no file was left behind.\n\n4. Several build tests were done and a couple of problems were fixed.\n e.g. lib/decompress_*.c used malloc/free() wrappers around slab\n APIs requiring slab.h to be added manually.\n\n5. The script was run on all .h files but without automatically\n editing them as sprinkling gfp.h and slab.h inclusions around .h\n files could easily lead to inclusion dependency hell. Most gfp.h\n inclusion directives were ignored as stuff from gfp.h was usually\n wildly available and often used in preprocessor macros. Each\n slab.h inclusion directive was examined and added manually as\n necessary.\n\n6. percpu.h was updated not to include slab.h.\n\n7. Build test were done on the following configurations and failures\n were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my\n distributed build env didn\u0027t work with gcov compiles) and a few\n more options had to be turned off depending on archs to make things\n build (like ipr on powerpc/64 which failed due to missing writeq).\n\n * x86 and x86_64 UP and SMP allmodconfig and a custom test config.\n * powerpc and powerpc64 SMP allmodconfig\n * sparc and sparc64 SMP allmodconfig\n * ia64 SMP allmodconfig\n * s390 SMP allmodconfig\n * alpha SMP allmodconfig\n * um on x86_64 SMP allmodconfig\n\n8. percpu.h modifications were reverted so that it could be applied as\n a separate patch and serve as bisection point.\n\nGiven the fact that I had only a couple of failures from tests on step\n6, I\u0027m fairly confident about the coverage of this conversion patch.\nIf there is a breakage, it\u0027s likely to be something in one of the arch\nheaders which should be easily discoverable easily on most builds of\nthe specific arch.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nGuess-its-ok-by: Christoph Lameter \u003ccl@linux-foundation.org\u003e\nCc: Ingo Molnar \u003cmingo@redhat.com\u003e\nCc: Lee Schermerhorn \u003cLee.Schermerhorn@hp.com\u003e\n" }, { "commit": "6a3cd3ea48584d14f60dce0b3c4e9e4428beb0fe", "tree": "f7ecd232b9ac463142c493ede51dcf409fd64973", "parents": [ "bca3469205402d9fb14060d255d8786ae2256640" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Mon Mar 29 15:54:40 2010 +1100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Mar 29 15:26:06 2010 -0700" }, "message": "async_tx: use of kzalloc/kfree requires the include of slab.h\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "bca3469205402d9fb14060d255d8786ae2256640", "tree": "3b0c7f246fb9a6eafd3a82dd621dd9753589b3f4", "parents": [ "0793448187643b50af89d36b08470baf45a3cab4" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 26 16:52:10 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 26 16:52:10 2010 -0700" }, "message": "dmaengine: provide helper for setting txstate\n\nSimple conditional struct filler to cut out some duplicated code.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0793448187643b50af89d36b08470baf45a3cab4", "tree": "b3313ff58d47e26a8cf707d196177effa1aadfbe", "parents": [ "c3635c78e500a52c9fcd55de381a72928d9e054d" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Fri Mar 26 16:50:49 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 26 16:50:49 2010 -0700" }, "message": "DMAENGINE: generic channel status v2\n\nConvert the device_is_tx_complete() operation on the\nDMA engine to a generic device_tx_status()operation which\ncan return three states, DMA_TX_RUNNING, DMA_TX_COMPLETE,\nDMA_TX_PAUSED.\n\n[dan.j.williams@intel.com: update for timberdale]\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nAcked-by: Mark Brown \u003cbroonie@opensource.wolfsonmicro.com\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nCc: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nCc: Pavel Machek \u003cpavel@ucw.cz\u003e\nCc: Li Yang \u003cleoli@freescale.com\u003e\nCc: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nCc: Magnus Damm \u003cdamm@opensource.se\u003e\nCc: Liam Girdwood \u003clrg@slimlogic.co.uk\u003e\nCc: Joe Perches \u003cjoe@perches.com\u003e\nCc: Roland Dreier \u003crdreier@cisco.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c3635c78e500a52c9fcd55de381a72928d9e054d", "tree": "87403f402227cd8b5572550e70facf81c9eaa0d9", "parents": [ "0f65169b1bf44220308e1ce1f6666ad03ddc27af" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Fri Mar 26 16:44:01 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 26 16:44:01 2010 -0700" }, "message": "DMAENGINE: generic slave control v2\n\nConvert the device_terminate_all() operation on the\nDMA engine to a generic device_control() operation\nwhich can now optionally support also pausing and\nresuming DMA on a certain channel. Implemented for the\nCOH 901 318 DMAC as an example.\n\n[dan.j.williams@intel.com: update for timberdale]\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nAcked-by: Mark Brown \u003cbroonie@opensource.wolfsonmicro.com\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nCc: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nCc: Pavel Machek \u003cpavel@ucw.cz\u003e\nCc: Li Yang \u003cleoli@freescale.com\u003e\nCc: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nCc: Paul Mundt \u003clethal@linux-sh.org\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nCc: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nCc: Magnus Damm \u003cdamm@opensource.se\u003e\nCc: Liam Girdwood \u003clrg@slimlogic.co.uk\u003e\nCc: Joe Perches \u003cjoe@perches.com\u003e\nCc: Roland Dreier \u003crdreier@cisco.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0f65169b1bf44220308e1ce1f6666ad03ddc27af", "tree": "90f1e1955d63e876409ce54d8b9cbaf832619671", "parents": [ "de5d4453c5b224eefd02b6a141ed411a76d458af" ], "author": { "name": "Richard Röjfors", "email": "richard.rojfors@pelagicore.com", "time": "Fri Mar 26 08:23:58 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Mar 26 16:08:20 2010 -0700" }, "message": "dma: timb-dma: Update comment and fix compiler warning\n\nAn incremental patch which clarifies what the spinlock is used for\nand fixes a compiler warning.\n\nSigned-off-by: Richard Röjfors \u003crichard.rojfors@pelagicore.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "de5d4453c5b224eefd02b6a141ed411a76d458af", "tree": "2c208ec52e52363b1f403b82b570b843e98d1384", "parents": [ "84c8447c544bc7579097649273bc3f4e1b5de6af" ], "author": { "name": "Richard Röjfors", "email": "richard.rojfors@pelagicore.com", "time": "Thu Mar 25 19:44:21 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Mar 25 17:18:43 2010 -0700" }, "message": "dma: Add timb-dma\n\nAdds the support for the DMA engine withing the timberdale FPGA.\n\nThe DMA channels are strict device to host, or host to device\nand can not be used for generic memcpy.\n\nSigned-off-by: Richard Röjfors \u003crichard.rojfors@pelagicore.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "84c8447c544bc7579097649273bc3f4e1b5de6af", "tree": "7b91a03a61044612d511283e03f545893ba8c464", "parents": [ "cecd87da83869ad4157295b87a2e51e38c3e03bf" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Thu Mar 04 14:40:30 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 24 14:24:44 2010 -0700" }, "message": "DMAENGINE: COH 901 318 fix bytesleft\n\nThis makes the function to get the number of bytes left in the\nongoing DMA transaction actually work: the old code did not take\nneither lli:s nor queued jobs into account. Also fix a missing\nspinlock while we\u0027re at it.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cecd87da83869ad4157295b87a2e51e38c3e03bf", "tree": "83f46a1dec97d0c4d4a8d483b4c2eee216395826", "parents": [ "220bf991b0366cc50a94feede3d7341fa5710ee4" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Thu Mar 04 14:31:47 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 24 13:51:43 2010 -0700" }, "message": "DMAENGINE: COH 901 318 rename confusing vars\n\nThis fixes up the code with a lot of comments that make it readable,\nrename things with opaque names like \"data\" into something more\nappropriate, and remove some very confusing BUG() statements.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b2623a61cfd3c6badb8396dc85ab5a70f4a05f61", "tree": "186d032c4005f37be7af1d657f193405cd7d3af3", "parents": [ "f354a38175f5219146f4675dca770e114cf3c502" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Fri Mar 19 04:47:10 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 23 17:20:06 2010 +0900" }, "message": "dmaengine: shdma: Introduce include/linux/sh_dma.h\n\nCreate a common platform data header file for the\nshdma dmaengine driver. This is done by moving\ncommon structures from sh asm/dmaengine.h to\nlinux/sh_dma.h. DMA registers are also copied from\nsh asm/dma-register.h to make the code architecture\nindependent.\n\nThe sh header file asm/dmaengine.h is still kept\nwith the slave id enum. This allows us to keep the\nold processor specific code as is and slowly move\nover to slave id enums in per-processor headers.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "02ca5083f60521d09f13224596564a405108bc4c", "tree": "610eae56f7731208b00dd3b95b534a1877296c83", "parents": [ "4bab9d426e6dbd9ea09330919a33d35d5faab400" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Fri Mar 19 04:46:47 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 23 17:19:39 2010 +0900" }, "message": "dmaengine: shdma: Common SH_DMA_SLAVE_NUMBER\n\nMove SHDMA_SLAVE_NUMBER from asm/dmaengine.h to\nshdma.h. Set it to 256 to support a wide range\nof processors. The amount of memory consumed by\nthis change is limited to 256 bits.\n\nWhile at it, rename to SH_DMA_SLAVE_NUMBER to\nmatch with the rest of the file.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nAcked-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "4bab9d426e6dbd9ea09330919a33d35d5faab400", "tree": "cb78032733f4a45e8b36719b70854cc567b56b55", "parents": [ "ae6be51ed01d6c4aaf249a207b4434bc7785853b" ], "author": { "name": "Magnus Damm", "email": "damm@opensource.se", "time": "Fri Mar 19 04:46:38 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 23 17:19:30 2010 +0900" }, "message": "dmaengine: shdma: Remove sh_dmae_slave_chan_id enum\n\nThis patch replaces the sh_dmae_slave_chan_id enum\nwith an unsigned int. The purpose of this chainge is\nto make it possible to separate the slave id enums\nfrom the dmaengine header.\n\nThe slave id enums varies with processor model, so in\nthe future it makes sense to put these in the processor\nspecific headers together with the pinmux enums.\n\nSigned-off-by: Magnus Damm \u003cdamm@opensource.se\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "c32da02342b7521df25fefc2ef20aee0e61cf887", "tree": "7e38f664fa3e13602c357d37f77d8adcf82fccc2", "parents": [ "dca1d9f6d7ae428c193f32bd3e9a4ca13176648b", "318ae2edc3b29216abd8a2510f3f80b764f06858" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 12 16:04:50 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Mar 12 16:04:50 2010 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (56 commits)\n doc: fix typo in comment explaining rb_tree usage\n Remove fs/ntfs/ChangeLog\n doc: fix console doc typo\n doc: cpuset: Update the cpuset flag file\n Fix of spelling in arch/sparc/kernel/leon_kernel.c no longer needed\n Remove drivers/parport/ChangeLog\n Remove drivers/char/ChangeLog\n doc: typo - Table 1-2 should refer to \"status\", not \"statm\"\n tree-wide: fix typos \"ass?o[sc]iac?te\" -\u003e \"associate\" in comments\n No need to patch AMD-provided drivers/gpu/drm/radeon/atombios.h\n devres/irq: Fix devm_irq_match comment\n Remove reference to kthread_create_on_cpu\n tree-wide: Assorted spelling fixes\n tree-wide: fix \u0027lenght\u0027 typo in comments and code\n drm/kms: fix spelling in error message\n doc: capitalization and other minor fixes in pnp doc\n devres: typo fix s/dev/devm/\n Remove redundant trailing semicolons from macros\n fix typo \"definetly\" -\u003e \"definitely\" in comment\n tree-wide: s/widht/width/g typo in comments\n ...\n\nFix trivial conflict in Documentation/laptops/00-INDEX\n" }, { "commit": "318ae2edc3b29216abd8a2510f3f80b764f06858", "tree": "ce595adde342f57f379d277b25e4dd206988a052", "parents": [ "25cf84cf377c0aae5dbcf937ea89bc7893db5176", "3e58974027b04e84f68b964ef368a6cd758e2f84" ], "author": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Mon Mar 08 16:55:37 2010 +0100" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Mon Mar 08 16:55:37 2010 +0100" }, "message": "Merge branch \u0027for-next\u0027 into for-linus\n\nConflicts:\n\tDocumentation/filesystems/proc.txt\n\tarch/arm/mach-u300/include/mach/debug-macro.S\n\tdrivers/net/qlge/qlge_ethtool.c\n\tdrivers/net/qlge/qlge_main.c\n\tdrivers/net/typhoon.c\n" }, { "commit": "52cf25d0ab7f78eeecc59ac652ed5090f69b619e", "tree": "031d1ffb3890bd69c0260c864c512e0be62ac05c", "parents": [ "6c1733aca0b48db4d0e660d54976a1cca25b5eaf" ], "author": { "name": "Emese Revfy", "email": "re.emese@gmail.com", "time": "Tue Jan 19 02:58:23 2010 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Mar 07 17:04:49 2010 -0800" }, "message": "Driver core: Constify struct sysfs_ops in struct kobj_type\n\nConstify struct sysfs_ops.\n\nThis is part of the ops structure constification\neffort started by Arjan van de Ven et al.\n\nBenefits of this constification:\n\n * prevents modification of data that is shared\n (referenced) by many other structure instances\n at runtime\n\n * detects/prevents accidental (but not intentional)\n modification attempts on archs that enforce\n read-only kernel data at runtime\n\n * potentially better optimized code as the compiler\n can assume that the const data cannot be changed\n\n * the compiler/linker move const data into .rodata\n and therefore exclude them from false sharing\n\nSigned-off-by: Emese Revfy \u003cre.emese@gmail.com\u003e\nAcked-by: David Teigland \u003cteigland@redhat.com\u003e\nAcked-by: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nAcked-by: Hans J. Koch \u003chjk@linutronix.de\u003e\nAcked-by: Pekka Enberg \u003cpenberg@cs.helsinki.fi\u003e\nAcked-by: Jens Axboe \u003cjens.axboe@oracle.com\u003e\nAcked-by: Stephen Hemminger \u003cshemminger@vyatta.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "4a31c08d2fecc74a630653828f5388fbb037f8c2", "tree": "c3baf80157bab2cf6bdf3d26772001e43233aad6", "parents": [ "2ddb3b15f1b46836c61cfac5b00d8f08a24236e6", "0272282f7cffb469cd2676dcb6e58bc942fcf8a8" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 07 15:47:19 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 07 15:47:19 2010 -0800" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (26 commits)\n sh: Convert sh to use read/update_persistent_clock\n sh: Move PMB debugfs entry initialization to later stage\n sh: Fix up flush_cache_vmap() on SMP.\n sh: fix up MMU reset with variable PMB mapping sizes.\n sh: establish PMB mappings for NUMA nodes.\n sh: check for existing mappings for bolted PMB entries.\n sh: fixed virt/phys mapping helpers for PMB.\n sh: make pmb iomapping configurable.\n sh: reworked dynamic PMB mapping.\n sh: Fix up cpumask_of_pcibus() for the NUMA build.\n serial: sh-sci: Tidy up build warnings.\n sh: Fix up ctrl_read/write stragglers in migor setup.\n serial: sh-sci: Add DMA support.\n dmaengine: shdma: extend .device_terminate_all() to record partial transfer\n sh: merge sh7722 and sh7724 DMA register definitions\n sh: activate runtime PM for dmaengine on sh7722 and sh7724\n dmaengine: shdma: add runtime PM support.\n dmaengine: shdma: separate DMA headers.\n dmaengine: shdma: convert to platform device resources\n dmaengine: shdma: fix DMA error handling.\n ...\n" }, { "commit": "984b3f5746ed2cde3d184651dabf26980f2b66e5", "tree": "87dc2162b4778b0075874d9592384530022e15a4", "parents": [ "e3cb91ce1ac1d93a7cc6f81bb5247f7602b572bb" ], "author": { "name": "Akinobu Mita", "email": "akinobu.mita@gmail.com", "time": "Fri Mar 05 13:41:37 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Mar 06 11:26:23 2010 -0800" }, "message": "bitops: rename for_each_bit() to for_each_set_bit()\n\nRename for_each_bit to for_each_set_bit in the kernel source tree. To\npermit for_each_clear_bit(), should that ever be added.\n\nThe patch includes a macro to map the old for_each_bit() onto the new\nfor_each_set_bit(). This is a (very) temporary thing to ease the migration.\n\n[akpm@linux-foundation.org: add temporary for_each_bit()]\nSuggested-by: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nSuggested-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Akinobu Mita \u003cakinobu.mita@gmail.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nCc: Artem Bityutskiy \u003cdedekind@infradead.org\u003e\nCc: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "9bb676966aa85e56af00b353387d3c274a26e480", "tree": "cafc9a409aa05cc9060eb53f03c35881f41b6cec", "parents": [ "0f2cc4ecd81dc1917a041dc93db0ada28f8356fa", "dd58ffcf5a5352fc10820c8ffbcd5fed416a2c3a" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 04 08:20:14 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Mar 04 08:20:14 2010 -0800" }, "message": "Merge branch \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (28 commits)\n ioat: cleanup -\u003etimer_fn() and -\u003ecleanup_fn() prototypes\n ioat3: interrupt coalescing\n ioat: close potential BUG_ON race in the descriptor cleanup path\n ioat2: kill pending flag\n ioat3: use ioat2_quiesce()\n ioat3: cleanup, don\u0027t enable DCA completion writes\n DMAENGINE: COH 901 318 lli sg offset fix\n DMAENGINE: COH 901 318 configure channel direction\n DMAENGINE: COH 901 318 remove irq counting\n DMAENGINE: COH 901 318 descriptor pool refactoring\n DMAENGINE: COH 901 318 cleanups\n dma: Add MPC512x DMA driver\n Debugging options for the DMA engine subsystem\n iop-adma: redundant/wrong tests in iop_*_count()?\n dmatest: fix handling of an even number of xor_sources\n dmatest: correct raid6 PQ test\n fsldma: Fix cookie issues\n fsldma: Fix cookie issues\n dma: cases IPU_PIX_FMT_BGRA32, BGR32 and ABGR32 are the same in ipu_ch_param_set_size()\n dma: make Open Firmware device id constant\n ...\n" }, { "commit": "dd58ffcf5a5352fc10820c8ffbcd5fed416a2c3a", "tree": "f36172b40f9f3fc2c646f70da40e01705399b6b8", "parents": [ "aa4d72ae946a4fa40486b871717778734184fa29", "56a5d3cf21c71963c8fc506e9b9d3f71641d9c71" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 21:22:21 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 21:22:21 2010 -0700" }, "message": "Merge branch \u0027coh\u0027 into dmaengine\n" }, { "commit": "aa4d72ae946a4fa40486b871717778734184fa29", "tree": "5c98641f00a7866e28a364861b9af9b6df606fdd", "parents": [ "b9cc98697d1ca35a86bbb708acc6d93993c28f0f" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 21:21:13 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 21:21:13 2010 -0700" }, "message": "ioat: cleanup -\u003etimer_fn() and -\u003ecleanup_fn() prototypes\n\nIf the calling convention of -\u003etimer_fn() and -\u003ecleanup_fn() are unified\nacross hardware versions we can drop parameters to ioat_init_channel() and\nunify ioat_is_dma_complete() implementations.\n\nBoth -\u003etimer_fn() and -\u003ecleanup_fn() are modified to expect a struct\ndma_chan pointer.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b9cc98697d1ca35a86bbb708acc6d93993c28f0f", "tree": "22bace58c86068483209b8b2d9a2b6238eb0c179", "parents": [ "aa75db0080603bae27961c0502812dfd0f522bb3" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 21:21:13 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 21:21:13 2010 -0700" }, "message": "ioat3: interrupt coalescing\n\nThe hardware automatically disables further interrupts after each event\nuntil rearmed. This allows a delay to be injected between the occurence\nof the interrupt and the running of the cleanup routine. The delay is\nscaled by the descriptor backlog and then written to the INTRDELAY\nregister which specifies the number of microseconds to hold off\ninterrupt delivery after an interrupt event occurs. According to\npowertop this reduces the interrupt rate from ~5000 intr/s to ~150\nintr/s per without affecting throughput (simple dd to a raid6 array).\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "aa75db0080603bae27961c0502812dfd0f522bb3", "tree": "3e7fbb0ef4415c9f36107a81378f00bba6db9440", "parents": [ "281befa5592b0c5f9a3856b5666c62ac66d3d9ee" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 21:21:10 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 21:21:10 2010 -0700" }, "message": "ioat: close potential BUG_ON race in the descriptor cleanup path\n\nSince ioat_cleanup_preamble() and the update of the last completed\ndescriptor are not synchronized there is a chance that two cleanup threads\ncan see descriptors to clean. If the first cleans up all pending\ndescriptors then the second will trigger the BUG_ON.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "281befa5592b0c5f9a3856b5666c62ac66d3d9ee", "tree": "a0e7ca560fd1f2c43d3352786b0a5317af97ccf7", "parents": [ "b372ec2d900a5b50e47ef9e9624536ad146236be" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 11:47:43 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 11:47:43 2010 -0700" }, "message": "ioat2: kill pending flag\n\nThe pending \u003d\u003d 2 case no longer exists in the driver so, we can use\nioat2_ring_pending() outside the lock to determine if there might be any\ndescriptors in the ring that the hardware has not seen.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b372ec2d900a5b50e47ef9e9624536ad146236be", "tree": "3c9efbdcac54e7b924057d8b60e223058195d768", "parents": [ "773d9e2d8dbf02cfaf65786cf9100eef02c9fda4" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 11:47:42 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 11:47:42 2010 -0700" }, "message": "ioat3: use ioat2_quiesce()\n\nReplace open coded ioat2_quiesce() call in ioat3_restart_channel\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "773d9e2d8dbf02cfaf65786cf9100eef02c9fda4", "tree": "f4cdd84bb7ebd3ae8340f02c3c1e0e641601f88c", "parents": [ "0fb6f739bb612bc989d295056877374b749e721b" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 11:47:42 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Mar 03 11:47:42 2010 -0700" }, "message": "ioat3: cleanup, don\u0027t enable DCA completion writes\n\nWe already disallow raid operations while DCA is globally enabled, so\nhaving it locally enabled is a nop and confusing when reading the code.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0a135ba14d71fb84c691a5386aff5049691fe6d7", "tree": "adb1de887dd6839d69d2fc16ffa2a10ff63298fa", "parents": [ "4850f524b2c4c8a4e9f8ef4dd9c7c4afde2f2b2c", "a29d8b8e2d811a24bbe49215a0f0c536b72ebc18" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 03 07:34:18 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 03 07:34:18 2010 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu:\n percpu: add __percpu sparse annotations to what\u0027s left\n percpu: add __percpu sparse annotations to fs\n percpu: add __percpu sparse annotations to core kernel subsystems\n local_t: Remove leftover local.h\n this_cpu: Remove pageset_notifier\n this_cpu: Page allocator conversion\n percpu, x86: Generic inc / dec percpu instructions\n local_t: Move local.h include to ringbuffer.c and ring_buffer_benchmark.c\n module: Use this_cpu_xx to dynamically allocate counters\n local_t: Remove cpu_local_xx macros\n percpu: refactor the code in pcpu_[de]populate_chunk()\n percpu: remove compile warnings caused by __verify_pcpu_ptr()\n percpu: make accessors check for percpu pointer in sparse\n percpu: add __percpu for sparse.\n percpu: make access macros universal\n percpu: remove per_cpu__ prefix.\n" }, { "commit": "56a5d3cf21c71963c8fc506e9b9d3f71641d9c71", "tree": "3f793e6f9323fa4d34b71c2f1bb85e0497135207", "parents": [ "516fd4305e5f5718475e81fe5c17c95888a8157b" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Tue Mar 02 20:12:56 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 02 14:17:46 2010 -0700" }, "message": "DMAENGINE: COH 901 318 lli sg offset fix\n\nThis makes the COH 901 318 respect the scatter offset field by using\nthe sg_phys() rather than the sg_dma_address() so we get a pointer\nto the actual data we want to send rather than the beginning of the\nbuffer. Also initialize the lli:s a bit more thoroughly.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "516fd4305e5f5718475e81fe5c17c95888a8157b", "tree": "33d6648233b48178d58426d1659fd1234d9f95b0", "parents": [ "0b58828c923e57f1bfbbd2c4277ceb60666314fa" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Tue Mar 02 20:12:46 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 02 14:17:46 2010 -0700" }, "message": "DMAENGINE: COH 901 318 configure channel direction\n\nThis makes the COH 901 318 configure channel direction (to or from\ndevice) dynamically, instead of being passed in from the platform\ndata. This was necessary in order to get the MMC/SD-card channel\nbidirectional (all other channels on the U300 were either RX or\nTX but this one was both). This also sets memcpy() alignent to\neven 2^2 (32bit) boundaries, which makes the memcpy() stress tests\nstart working.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0b58828c923e57f1bfbbd2c4277ceb60666314fa", "tree": "399402924ea132fdea66a0fce141c9cae6020b8e", "parents": [ "b87108a772e001af3fa79f9cfd87b190375f47a2" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Tue Mar 02 14:17:44 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 02 14:17:44 2010 -0700" }, "message": "DMAENGINE: COH 901 318 remove irq counting\n\nThis removes the pointless irq counting for the COH 901 318, as\nit turns out the hardware will only ever fire one IRQ for a linked\nlist anyway. In the process also a missing spinlock was introduced.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "b87108a772e001af3fa79f9cfd87b190375f47a2", "tree": "003099acce3eb98244bbef317b4db52fe9cbe933", "parents": [ "848ad121240f539e14a59eddd69e164aea9560b2" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Tue Mar 02 14:17:20 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 02 14:17:20 2010 -0700" }, "message": "DMAENGINE: COH 901 318 descriptor pool refactoring\n\nThis centralize some spread-out initialization of descriptors into\none function and cleans up the error paths.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "848ad121240f539e14a59eddd69e164aea9560b2", "tree": "c35cea653fa13f3ec83031a296204606fbaa9aa5", "parents": [ "734c2992828c66cee3feb21ecd30a6ac44aecc51" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Tue Mar 02 14:17:15 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 02 14:17:15 2010 -0700" }, "message": "DMAENGINE: COH 901 318 cleanups\n\nThis cleans up the some debug code that was not working in the\nCOH 901 318 driver, adds some helpful comments and rearrange the\ncode a bit.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "0fb6f739bb612bc989d295056877374b749e721b", "tree": "a7105b3d73736535b3bdb0f15f8f8c0869b81279", "parents": [ "6c664a8915f5341c2e7f1df0bb4b9b4a88f6ad77" ], "author": { "name": "Piotr Ziecik", "email": "kosmo@semihalf.com", "time": "Fri Feb 05 03:42:52 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Mar 01 22:16:42 2010 -0700" }, "message": "dma: Add MPC512x DMA driver\n\nAdds initial version of MPC512x DMA driver.\nOnly memory to memory transfers are currenly supported.\n\nSigned-off-by: Piotr Ziecik \u003ckosmo@semihalf.com\u003e\nSigned-off-by: Wolfgang Denk \u003cwd@denx.de\u003e\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nCc: John Rigby \u003cjcrigby@gmail.com\u003e\nAcked-by: Grant Likely \u003cgrant.likely@secretlab.ca\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6c664a8915f5341c2e7f1df0bb4b9b4a88f6ad77", "tree": "031bab9e62b2948ef3fc8a0a3223e8074bc201bb", "parents": [ "f1acb878b6070941e844dfc4ca1b3b9e5a70426c" ], "author": { "name": "Linus Walleij", "email": "linus.walleij@stericsson.com", "time": "Tue Feb 09 22:34:54 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Mar 01 22:13:20 2010 -0700" }, "message": "Debugging options for the DMA engine subsystem\n\nThis adds Kconfig options for DEBUG and VERBOSE_DEBUG to the DMA\nengine subsystem, I got tired of editing the Makefile manually\neach time I want to debug things in here, modelled this on the\ndebug switches for other subsystems and works like a charm when\nworking on our DMA engines.\n\nSigned-off-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c014906a870ce70e009def0c9d170ccabeb0be63", "tree": "b1cfb6520ed0bcdfb0f1b32282b94658a989b04f", "parents": [ "c8e3149ba7de24dfd4c37bb0df23c878cdecd8d4" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu Feb 18 16:30:02 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 02 11:12:03 2010 +0900" }, "message": "dmaengine: shdma: extend .device_terminate_all() to record partial transfer\n\nThis patch extends the .device_terminate_all() method of the shdma driver\nto return number of bytes transfered in the current descriptor.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "20f2a3b5d57701c54bdd59b89dd37fe775926bae", "tree": "28a69ee7db15840fa886c51524c52a1a787487e4", "parents": [ "8b1935e6a36b0967efc593d67ed3aebbfbc1f5b1" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu Feb 11 16:50:18 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 02 11:09:07 2010 +0900" }, "message": "dmaengine: shdma: add runtime PM support.\n\nProvided platforms implement runtime PM, this disables the controller, when not\nin use.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "8b1935e6a36b0967efc593d67ed3aebbfbc1f5b1", "tree": "811ebd670e9704790625137b4a824e548bded00b", "parents": [ "027811b9b81a6b3ae5aa20c3302897bee9dcf09e" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu Feb 11 16:50:14 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 02 11:09:04 2010 +0900" }, "message": "dmaengine: shdma: separate DMA headers.\n\nSeparate SH DMA headers into ones, commonly used by both drivers, and ones,\nspecific to each of them. This will make the future development of the\ndmaengine driver easier.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nAcked-by: Mark Brown \u003cbroonie@opensource.wolfsonmicro.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "027811b9b81a6b3ae5aa20c3302897bee9dcf09e", "tree": "cde9b764d10d7ba9d0a41d9c780bf9032214dcae", "parents": [ "47a4dc26eeb89a3746f9b1e2092602b40469640a" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu Feb 11 16:50:10 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 02 11:09:02 2010 +0900" }, "message": "dmaengine: shdma: convert to platform device resources\n\nThe shdma dmaengine driver currently uses numerous macros to support various\nplatforms, selected by ifdef\u0027s. Convert it to use platform device resources and\nlists of channel descriptors to specify register locations, interrupt numbers\nand other system-specific configuration variants. Unavoidably, we have to\nsimultaneously convert all shdma users to provide those resources.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "47a4dc26eeb89a3746f9b1e2092602b40469640a", "tree": "69eb685635ca18f42ac8e245c9be7032a8dd41e7", "parents": [ "920925f90fa6455f7e8c9db0e215e706cd7dedeb" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Thu Feb 11 16:50:05 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Tue Mar 02 11:09:00 2010 +0900" }, "message": "dmaengine: shdma: fix DMA error handling.\n\nPresent DMA error ISR in shdma.c is bogus, it locks the system hard in multiple\nways. Fix it to abort all queued transactions on all channels on the affected\ncontroller and giving submitters a chance to get a DMA_ERROR status for aborted\ntransactions. Afterwards further functionality is again possible without the\nneed to re-load the driver.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "67b9124f734b22b30d9adf18c39fe795e2901070", "tree": "209e80992ca7722a1ddc82dde8dda1a5e119c666", "parents": [ "94de648d72c8bc833590523f22386d4babbea988" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Feb 28 22:20:18 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Feb 28 22:20:18 2010 -0700" }, "message": "dmatest: fix handling of an even number of xor_sources\n\nJust like commit ac5d73fc, we need to be careful to use \u0027src_cnt\u0027 as it\ncontains the fixed up number of xor sources (forced odd) to meet dmatest\u0027s\ndata verification scheme.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "94de648d72c8bc833590523f22386d4babbea988", "tree": "8507157200c687012e13da8a5ea5088528c0151f", "parents": [ "76bd061f5c7b7550cdaed68ad6219ea7cee288fc" ], "author": { "name": "Anatolij Gustschin", "email": "agust@denx.de", "time": "Mon Feb 15 22:35:23 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Feb 28 22:18:36 2010 -0700" }, "message": "dmatest: correct raid6 PQ test\n\nThe number of PQ sources specified by module parameter \"pq_sources\"\nis always forced odd to fit into dmatest\u0027s destination verificaton\nscheme. But number of PQ sources and coefficients as passed to the\ndriver\u0027s prep_dma_pq() is not adjusted accordingly.\n\nFix it now to get correct PQ testing results in the case passed\n\"pq_sources\" parameter is even.\n\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "76bd061f5c7b7550cdaed68ad6219ea7cee288fc", "tree": "5ae663b8bab6bd77cab2b8bc095c0743cc2da138", "parents": [ "6ca3a7a96e91b1aa8c704153c992b191d35b5747" ], "author": { "name": "Steven J. Magnani", "email": "steve@digidescorp.com", "time": "Sun Feb 28 22:18:16 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Feb 28 22:18:16 2010 -0700" }, "message": "fsldma: Fix cookie issues\n\nfsl_dma_update_completed_cookie() appears to calculate the last completed\ncookie incorrectly in the corner case where DMA on cookie 1 is in progress\njust following a cookie wrap.\n\nSigned-off-by: Steven J. Magnani \u003csteve@digidescorp.com\u003e\nAcked-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\n[dan.j.williams@intel.com: fix an integer overflow warning with INT_MAX]\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6ca3a7a96e91b1aa8c704153c992b191d35b5747", "tree": "4700e2eecbae9e33492df683d11e5366f16aeca2", "parents": [ "9ad7bd2944bd979ef4877cd439719be44c5f3b47" ], "author": { "name": "Steven J. Magnani", "email": "steve@digidescorp.com", "time": "Thu Feb 25 13:39:30 2010 -0600" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Feb 28 20:27:42 2010 -0700" }, "message": "fsldma: Fix cookie issues\n\nfsl_dma_tx_submit() only sets the cookie on the first descriptor of a\ntransaction. It should set the cookie on all.\n\nSigned-off-by: Steven J. Magnani \u003csteve@digidescorp.com\u003e\nAcked-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "a29d8b8e2d811a24bbe49215a0f0c536b72ebc18", "tree": "5a714679aeebd5f7af5d1fc521f0db8639324f6c", "parents": [ "003cb608a2533d0927a83bc4e07e46d7a622eda9" ], "author": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Tue Feb 02 14:39:15 2010 +0900" }, "committer": { "name": "Tejun Heo", "email": "tj@kernel.org", "time": "Wed Feb 17 11:17:38 2010 +0900" }, "message": "percpu: add __percpu sparse annotations to what\u0027s left\n\nAdd __percpu sparse annotations to places which didn\u0027t make it in one\nof the previous patches. All converions are trivial.\n\nThese annotations are to make sparse consider percpu variables to be\nin a different address space and warn if accessed without going\nthrough percpu accessors. This patch doesn\u0027t affect normal builds.\n\nSigned-off-by: Tejun Heo \u003ctj@kernel.org\u003e\nAcked-by: Borislav Petkov \u003cborislav.petkov@amd.com\u003e\nCc: Dan Williams \u003cdan.j.williams@intel.com\u003e\nCc: Huang Ying \u003cying.huang@intel.com\u003e\nCc: Len Brown \u003clenb@kernel.org\u003e\nCc: Neil Brown \u003cneilb@suse.de\u003e\n" }, { "commit": "028c5d5d596651bce13d06737eb3707a7e99a30c", "tree": "e4e429858a19635ad2b5aa563bf1b4e39396d4e2", "parents": [ "19f6b8b44e3f633d5d7d1ed68848b1eb89a1e800", "4b505db9c4c72dbd2a8e66b8d681640101325af6" ], "author": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Feb 15 14:49:37 2010 +0900" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Feb 15 14:49:37 2010 +0900" }, "message": "Merge branch \u0027sh/stable-updates\u0027\n" }, { "commit": "734c2992828c66cee3feb21ecd30a6ac44aecc51", "tree": "c732007f463393046dc83cc3d6b5953cb076aa32", "parents": [ "8f98781e0f15207b6ab33bee1fae05428be0475b" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Sat Feb 06 09:43:41 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Feb 10 12:07:28 2010 -0700" }, "message": "drivers/dma: Correct NULL test\n\ncohd_fin has already been verified not to be NULL, so the argument to\nBUG_ON cannot be true.\n\nA simplified version of the semantic match that finds this problem is as\nfollows: (http://coccinelle.lip6.fr/)\n\n// \u003csmpl\u003e\n@r@\nexpression *x;\nexpression e;\nidentifier l;\n@@\n\nif (x \u003d\u003d NULL || ...) {\n ... when forall\n return ...; }\n... when !\u003d goto l;\n when !\u003d x \u003d e\n when !\u003d \u0026x\n*x \u003d\u003d NULL\n// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nAcked-by: Linus Walleij \u003clinus.walleij@stericsson.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8f98781e0f15207b6ab33bee1fae05428be0475b", "tree": "31830720fd57bd11191e85bbdc98eaefe061f127", "parents": [ "b953df7c70740cd7593072ebec77a8f658505630" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed Feb 10 17:32:38 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Feb 10 12:01:06 2010 -0700" }, "message": "async-tx: fix buffer submission error handling in ipu_idma.c\n\nIf submitting new buffer failed, a wrong descriptor gets completed and it\ndoesn\u0027t check, if a callback is at all defined, which can lead to an Oops. Fix\nthese bugs and make ipu_update_channel_buffer() void, because it never fails.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "3ad2f3fbb961429d2aa627465ae4829758bc7e07", "tree": "f365c513e8f5b477a61336a600ff54f32b7ad6e1", "parents": [ "1537a3638cbf741d3826c1002026cce487a6bee0" ], "author": { "name": "Daniel Mack", "email": "daniel@caiaq.de", "time": "Wed Feb 03 08:01:28 2010 +0800" }, "committer": { "name": "Jiri Kosina", "email": "jkosina@suse.cz", "time": "Tue Feb 09 11:13:56 2010 +0100" }, "message": "tree-wide: Assorted spelling fixes\n\nIn particular, several occurances of funny versions of \u0027success\u0027,\n\u0027unknown\u0027, \u0027therefore\u0027, \u0027acknowledge\u0027, \u0027argument\u0027, \u0027achieve\u0027, \u0027address\u0027,\n\u0027beginning\u0027, \u0027desirable\u0027, \u0027separate\u0027 and \u0027necessary\u0027 are fixed.\n\nSigned-off-by: Daniel Mack \u003cdaniel@caiaq.de\u003e\nCc: Joe Perches \u003cjoe@perches.com\u003e\nCc: Junio C Hamano \u003cgitster@pobox.com\u003e\nSigned-off-by: Jiri Kosina \u003cjkosina@suse.cz\u003e\n" }, { "commit": "cfefe99795251d76d92e8457f4152f532a961ec5", "tree": "531a4677401afb0e9816441ac1366dfa46f5ca7b", "parents": [ "623b4ac4bf9e767991c66e29b47dd4b19458fb42" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed Feb 03 14:46:41 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Feb 08 09:40:26 2010 +0900" }, "message": "sh: implement DMA_SLAVE capability in SH dmaengine driver\n\nTested to work with a SIU ASoC driver on sh7722 (migor).\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "623b4ac4bf9e767991c66e29b47dd4b19458fb42", "tree": "9cf9c5ef8ac1ab714a35db1baf627fb701a98287", "parents": [ "fc4618575f79eea062cdc51715040e40cd35b71c" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Wed Feb 03 14:44:12 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Feb 08 09:40:24 2010 +0900" }, "message": "sh: fix Transfer Size calculation in both DMA drivers\n\nBoth the original arch/sh/drivers/dma/dma-sh.c and the new SH dmaengine drivers\ndo not take into account bits 3:2 of the Transfer Size field in the CHCR\nregister, besides, bit-field defines set bit 2, but the mask only passes bits\n1:0 through. TS_16BLK and TS_32BLK macros are bogus too. This patch fixes all\nthese issues for sh7722 and sh7724, other CPUs stay unchanged and might need to\nbe fixed too.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "fc4618575f79eea062cdc51715040e40cd35b71c", "tree": "86c3024f48db02b9f5e391d3f0a3aa787fa89375", "parents": [ "6339204ecc2aa2067a99595522de0403f0854bb8" ], "author": { "name": "Guennadi Liakhovetski", "email": "g.liakhovetski@gmx.de", "time": "Tue Jan 19 07:24:55 2010 +0000" }, "committer": { "name": "Paul Mundt", "email": "lethal@linux-sh.org", "time": "Mon Feb 08 09:38:35 2010 +0900" }, "message": "sh: prepare the DMA driver for slave functionality\n\nSlave DMA functionality uses scatter-gather arrays for data transfers,\nwhereas memcpy just uses a single data buffer. This patch converts the\ncurrent memcpy implementation in shdma.c to use scatter-gather, making it\njust a special case with one SG-element. This allows us to isolate\ndescriptor list manipulations and locking into one function, thus reducing\nerror chances.\n\nSigned-off-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Paul Mundt \u003clethal@linux-sh.org\u003e\n" }, { "commit": "b953df7c70740cd7593072ebec77a8f658505630", "tree": "3f831c33f2b1a0173e7142226869dababcd16422", "parents": [ "7e55a70c5b9a57c12f49c44b0847c9343d4f54e4" ], "author": { "name": "Yong Zhang", "email": "yong.zhang0@gmail.com", "time": "Fri Feb 05 21:52:37 2010 +0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Feb 05 15:35:53 2010 -0700" }, "message": "dmaengine: correct onstack wait_queue_head declaration\n\nUse DECLARE_WAIT_QUEUE_HEAD_ONSTACK to make lockdep happy\n\nSigned-off-by: Yong Zhang \u003cyong.zhang0@gmail.com\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9ad7bd2944bd979ef4877cd439719be44c5f3b47", "tree": "cf70d092016d677b68b4178b7f669939c3820b63", "parents": [ "4b1cf1facca31b7db2a61d8aa2ba40d5a93a0957" ], "author": { "name": "Roel Kluin", "email": "roel.kluin@gmail.com", "time": "Wed Jan 20 01:25:56 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 23:42:25 2010 -0700" }, "message": "dma: cases IPU_PIX_FMT_BGRA32, BGR32 and ABGR32 are the same in ipu_ch_param_set_size()\n\nIn these cases the same statements are executed.\n\nSigned-off-by: Roel Kluin \u003croel.kluin@gmail.com\u003e\nAcked-by: Guennadi Liakhovetski \u003cg.liakhovetski@gmx.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4b1cf1facca31b7db2a61d8aa2ba40d5a93a0957", "tree": "97fd86a2a15a6e482546b7f8b92e47c5a56a2aaa", "parents": [ "9c3a50b7d7ec45da34e73cac66cde12dd6092dd8" ], "author": { "name": "Márton Németh", "email": "nm127@freemail.hu", "time": "Tue Feb 02 23:41:06 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 23:41:06 2010 -0700" }, "message": "dma: make Open Firmware device id constant\n\nThe match_table field of the struct of_device_id is constant in \u003clinux/of_platform.h\u003e\nso it is worth to make the initialization data also constant.\n\nThe semantic match that finds this kind of pattern is as follows:\n(http://coccinelle.lip6.fr/)\n\n// \u003csmpl\u003e\n@r@\ndisable decl_init,const_decl_init;\nidentifier I1, I2, x;\n@@\n\tstruct I1 {\n\t ...\n\t const struct I2 *x;\n\t ...\n\t};\n@s@\nidentifier r.I1, y;\nidentifier r.x, E;\n@@\n\tstruct I1 y \u003d {\n\t .x \u003d E,\n\t};\n@c@\nidentifier r.I2;\nidentifier s.E;\n@@\n\tconst struct I2 E[] \u003d ... ;\n@depends on !c@\nidentifier r.I2;\nidentifier s.E;\n@@\n+\tconst\n\tstruct I2 E[] \u003d ...;\n// \u003c/smpl\u003e\n\nSigned-off-by: Márton Németh \u003cnm127@freemail.hu\u003e\nCc: Julia Lawall \u003cjulia@diku.dk\u003e\nCc: cocci@diku.dk\n[dan.j.williams@intel.com: resolved conflict with recent fsldma updates]\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7e55a70c5b9a57c12f49c44b0847c9343d4f54e4", "tree": "e9ba9f5896d8e97e76894f23641afd3abce5aac4", "parents": [ "adef477268ff5ddd0195611dc7e26d7a879fefe1" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Jan 13 13:33:12 2010 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 22:57:34 2010 -0700" }, "message": "ioat: fix infinite timeout checking in ioat2_quiesce\n\nFix typo in ioat2_quiesce. check \u0027tmo\u0027 is zero, not \u0027end\u0027. Also applies\nto 2.6.32.3\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "adef477268ff5ddd0195611dc7e26d7a879fefe1", "tree": "ad7b36a817f5f045719b28ade67914a2ce775d5c", "parents": [ "abe94c756c08d50566c09a65b9c7fe72f83071c5" ], "author": { "name": "Anatolij Gustschin", "email": "agust@denx.de", "time": "Tue Jan 26 10:26:06 2010 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:58:37 2010 -0700" }, "message": "dmaengine: fix memleak in dma_async_device_unregister\n\nWhile debugging a dma driver I noticed a memleak after\nunloading the driver module.\n\nCaught by kmemleak.\n\nSigned-off-by: Anatolij Gustschin \u003cagust@denx.de\u003e\nCc: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9c3a50b7d7ec45da34e73cac66cde12dd6092dd8", "tree": "a16b2dd972ba8ebdd9e6796ad8f0027513316f49", "parents": [ "a1c03319018061304be28d131073ac13a5cb86fb" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Wed Jan 06 13:34:06 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:51:42 2010 -0700" }, "message": "fsldma: major cleanups and fixes\n\nFix locking. Use two queues in the driver, one for pending transacions, and\none for transactions which are actually running on the hardware. Call\ndma_run_dependencies() on descriptor cleanup so that the async_tx API works\ncorrectly.\n\nThere are a number of places throughout the code where lists of descriptors\nare freed in a loop. Create functions to handle this, and use them instead\nof open-coding the loop each time.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "a1c03319018061304be28d131073ac13a5cb86fb", "tree": "9d5e2f1d0a66d001e94c8dc34681ac49cf1b66bb", "parents": [ "d3f620b2c4fecdc8e060b70e8d92d29fc01c6126" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Wed Jan 06 13:34:05 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:51:41 2010 -0700" }, "message": "fsldma: rename fsl_chan to chan\n\nThe name fsl_chan seems too long, so it has been shortened to chan. There\nare only a few places where the higher level \"struct dma_chan *chan\" name\nconflicts. These have been changed to \"struct dma_chan *dchan\" instead.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d3f620b2c4fecdc8e060b70e8d92d29fc01c6126", "tree": "652ddf41247241ef3f82419a80e36bb5ee5dd810", "parents": [ "e7a29151de1bd52081f27f149b68074fac0323be" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Wed Jan 06 13:34:04 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:51:41 2010 -0700" }, "message": "fsldma: simplify IRQ probing and handling\n\nThe IRQ probing is needlessly complex. All off the 83xx device trees in\narch/powerpc/boot/dts/ specify 5 interrupts per DMA controller: one for the\ncontroller, and one for each channel. These interrupts are all attached to\nthe same IRQ line.\n\nThis causes an interesting situation if two channels interrupt at the same\ntime. The per-controller handler will handle the first channel, and the\nper-channel handler will handle the remaining channels.\n\nInstead of this mess, we fix the bug in the per-controller handler, and\nmake it handle all channels that generated an interrupt. When a\nper-controller handler is specified in the device tree, we prefer to use\nthe shared handler instead of the per-channel handler.\n\nThe 85xx/86xx controllers do not have a per-controller interrupt, and\ninstead use a per-channel interrupt. This behavior has not been changed.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e7a29151de1bd52081f27f149b68074fac0323be", "tree": "72fa616e49d5ca99e0a1dc79f467e73d071d5dd9", "parents": [ "738f5f7e1ae876448cb7d9c82bea258b69386647" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Wed Jan 06 13:34:03 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:51:41 2010 -0700" }, "message": "fsldma: clean up the OF subsystem routines\n\nThis fixes some errors in the cleanup paths of the OF subsystem, including\nmissing checks for ioremap failing. Also, some variables were renamed for\nbrevity.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "738f5f7e1ae876448cb7d9c82bea258b69386647", "tree": "61616b4be922b7e3461f26d0d4dc2f9e5b0ac8cc", "parents": [ "a4f56d4b103d4e5d1a59a9118db0185a6bd1a83b" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Wed Jan 06 13:34:02 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:51:41 2010 -0700" }, "message": "fsldma: rename dest to dst for uniformity\n\nMost functions in the standard library use \"dst\" as a parameter, rather\nthan \"dest\". This renames all use of \"dest\" to \"dst\" to match the usual\nconvention.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "a4f56d4b103d4e5d1a59a9118db0185a6bd1a83b", "tree": "aa00d6faf06d168e57c090f1eb05b16596b9a299", "parents": [ "4ce0e953f6286777452bf07c83056342d6b9b257" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Wed Jan 06 13:34:01 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:51:41 2010 -0700" }, "message": "fsldma: rename struct fsl_dma_chan to struct fsldma_chan\n\nThis is the beginning of a cleanup which will change all instances of\n\"fsl_dma\" to \"fsldma\" to match the name of the driver itself.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4ce0e953f6286777452bf07c83056342d6b9b257", "tree": "69a182aaa86cad2e8680132464b122374d7a53b0", "parents": [ "272ca655090978bdaa2630fc44fb2c03da5576fd" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Wed Jan 06 13:34:00 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:51:40 2010 -0700" }, "message": "fsldma: remove unused structure members\n\nRemove some unused members from the fsldma data structures. A few trivial\nuses of struct resource were converted to use the stack rather than keeping\nthe memory allocated for the lifetime of the driver.\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "272ca655090978bdaa2630fc44fb2c03da5576fd", "tree": "3ad63195951405f4a51c44f1a57f125415d649e6", "parents": [ "abe94c756c08d50566c09a65b9c7fe72f83071c5" ], "author": { "name": "Ira Snyder", "email": "iws@ovro.caltech.edu", "time": "Wed Jan 06 13:33:59 2010 +0000" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Feb 02 14:51:40 2010 -0700" }, "message": "fsldma: reduce kernel text size\n\nSome of the functions are written in a way where they use multiple reads\nand writes where a single read/write pair could suffice. This shrinks the\nkernel text size measurably, while making the functions easier to\nunderstand.\n\nadd/remove: 0/0 grow/shrink: 1/4 up/down: 4/-196 (-192)\nfunction old new delta\nfsl_chan_set_request_count 120 124 +4\ndma_halt 300 272 -28\nfsl_chan_set_src_loop_size 208 156 -52\nfsl_chan_set_dest_loop_size 208 156 -52\nfsl_chan_xfer_ld_queue 500 436 -64\n\nSigned-off-by: Ira W. Snyder \u003ciws@ovro.caltech.edu\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "05a625486efc3209ae4d98e253dafa6ce0124385", "tree": "b78b4a854639fecc91598ecb05900c929a6ab85e", "parents": [ "1f11abc966b82b9fd0c834707486ef301b2f398d", "f80ca163d65903276bec7045a484a79c0897eb2d" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 30 13:46:29 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 30 13:46:29 2009 -0800" }, "message": "Merge branch \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx\n\n* \u0027fixes\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:\n drivers/dma: Correct use after free\n drivers/dma: drop unnecesary memset\n ioat2,3: put channel hardware in known state at init\n async_tx: expand async raid6 test to cover ioatdma corner case\n ioat3: fix p-disabled q-continuation\n sh: fix DMA driver\u0027s descriptor chaining and cookie assignment\n dma: at_hdmac: correct incompatible type for argument 1 of \u0027spin_lock_bh\u0027\n" }, { "commit": "f80ca163d65903276bec7045a484a79c0897eb2d", "tree": "97c7d61d43248b9db0757a76af80ff58b98b5599", "parents": [ "0794ec8ce327ec74416b569b8fb1951274693700", "a6d52d70677e99bdb89b6921c265d0a58c22e597" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 22 17:21:47 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 22 17:21:47 2009 -0700" }, "message": "Merge branch \u0027ioat\u0027 into fixes\n" }, { "commit": "0794ec8ce327ec74416b569b8fb1951274693700", "tree": "4e6a59cdf0c13005d22165932b82acf1213bc937", "parents": [ "1e9d1b13efae7e0a2705611d47ae5f07e27015f0" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Tue Dec 22 21:30:59 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 22 15:30:08 2009 -0700" }, "message": "drivers/dma: Correct use after free\n\nMove the kfree after the iounmap that refers to the same structure.\n\nA simplified version of the semantic match that finds this problem is as\nfollows: (http://coccinelle.lip6.fr/)\n\n// \u003csmpl\u003e\n@@\nexpression x,e;\nidentifier f;\niterator I;\nstatement S;\n@@\n\n*kfree(x);\n... when !\u003d \u0026x\n when !\u003d x \u003d e\n when !\u003d I(x,...) S\n*x-\u003ef\n// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1e9d1b13efae7e0a2705611d47ae5f07e27015f0", "tree": "bb5f9eed3636080b2dc8a4791d03b812e65a6786", "parents": [ "3542a113ab2f5880f1b62e5909d754250fb57d6b" ], "author": { "name": "Julia Lawall", "email": "julia@diku.dk", "time": "Sat Dec 19 08:30:30 2009 +0100" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Dec 22 15:29:05 2009 -0700" }, "message": "drivers/dma: drop unnecesary memset\n\nmemset of 0 is not needed after kzalloc\n\nThe semantic patch that makes this change is as follows:\n(http://coccinelle.lip6.fr/)\n\n// \u003csmpl\u003e\n@@\nexpression x;\nstatement S;\n@@\n\nx \u003d kzalloc(...);\nif (x \u003d\u003d NULL) S\n... when !\u003d x\n-memset(x,0,...);// \u003c/smpl\u003e\n\nSigned-off-by: Julia Lawall \u003cjulia@diku.dk\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "a6d52d70677e99bdb89b6921c265d0a58c22e597", "tree": "9310005efbfa5d3141c1bf9d9ed5464377419f1e", "parents": [ "e02a0e47a3f061c1a53fc4376332a988ec047e8a" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Dec 19 15:36:02 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Dec 19 15:36:02 2009 -0700" }, "message": "ioat2,3: put channel hardware in known state at init\n\nPut the ioat2 and ioat3 state machines in the halted state with all\nerrors cleared.\n\nThe ioat1 init path is not disturbed for stability, there are no\nreported ioat1 initiaization issues.\n\nCc: \u003cstable@kernel.org\u003e\nReported-by: Roland Dreier \u003crdreier@cisco.com\u003e\nTested-by: Roland Dreier \u003crdreier@cisco.com\u003e\nAcked-by: Simon Horman \u003chorms@verge.net.au\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "cd78809f6191485a90ea6c92c2b58900ab5c156f", "tree": "d17a0e30178ec8ae78e04df69ca3d7b280054361", "parents": [ "22763c5cf3690a681551162c15d34d935308c8d7" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Dec 17 13:52:39 2009 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Dec 17 13:52:39 2009 -0700" }, "message": "ioat3: fix p-disabled q-continuation\n\nWhen continuing a pq calculation the driver needs 3 extra sources. The\ndriver can perform a 3 source calculation with a single descriptor, but\nneeds an extended descriptor to process up to 8 sources in one\noperation. However, in the p-disabled case only one extra source is\nneeded. When continuing a p-disabled operation there are occasions\n(i.e. 0 \u003c src_cnt % 8 \u003c 3) where the tail operation does not need an\nextended descriptor. Properly account for this fact otherwise invalid\n\u0027dmacount\u0027 values will be written to hardware usually causing the\nchannel to halt with \u0027invalid descriptor\u0027 errors.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" } ], "next": "3542a113ab2f5880f1b62e5909d754250fb57d6b" }