)]}'
{
  "log": [
    {
      "commit": "848c536a37b8db4e461f14ca15fe29850151c822",
      "tree": "f4a88e92e31de28511e3a3de99200a77d2613dae",
      "parents": [
        "4a776f0aa922a552460192c07b56f4fe9cd82632"
      ],
      "author": {
        "name": "Haavard Skinnemoen",
        "email": "haavard.skinnemoen@atmel.com",
        "time": "Tue Jul 08 11:58:58 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jul 08 11:58:58 2008 -0700"
      },
      "message": "dmaengine: Add dma_client parameter to device_alloc_chan_resources\n\nA DMA controller capable of doing slave transfers may need to know a\nfew things about the slave when preparing the channel. We don\u0027t want\nto add this information to struct dma_channel since the channel hasn\u0027t\nyet been bound to a client at this point.\n\nInstead, pass a reference to the client requesting the channel to the\ndriver\u0027s device_alloc_chan_resources hook so that it can pick the\nnecessary information from the dma_client struct by itself.\n\n[dan.j.williams@intel.com: fixed up fsldma and mv_xor]\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "51ee87f27a1d2c0e08492924f2fb0223c4c704d9",
      "tree": "4c2ede7b480144a1b20441c164761881c3df9f47",
      "parents": [
        "0a2ce2ffc358da96792d514c1024b72c52be9cc1"
      ],
      "author": {
        "name": "Li Yang",
        "email": "leoli@freescale.com",
        "time": "Thu May 29 23:25:45 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Jul 08 11:57:45 2008 -0700"
      },
      "message": "fsldma: fix incorrect exit path for initialization\n\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nAcked-by: Zhang Wei \u003czw@zh-kernel.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "636bdeaa1243327501edfd2a597ed7443eb4239a",
      "tree": "59b894f124e3664ea4a537d7c07c527abdb9c8da",
      "parents": [
        "c4fe15541d0ef5cc8cc1ce43057663851f8fc387"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Apr 17 20:17:26 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Apr 17 13:25:54 2008 -0700"
      },
      "message": "dmaengine: ack to flags: make use of the unused bits in the \u0027ack\u0027 field\n\n\u0027ack\u0027 is currently a simple integer that flags whether or not a client is done\ntouching fields in the given descriptor.  It is effectively just a single bit\nof information.  Converting this to a flags parameter allows the other bits to\nbe put to use to control completion actions, like dma-unmap, and capture\nresults, like xor-zero-sum \u003d\u003d 0.\n\nChanges are one of:\n1/ convert all open-coded -\u003eack manipulations to use async_tx_ack\n   and async_tx_test_ack.\n2/ set the ack bit at prep time where possible\n3/ make drivers store the flags at prep time\n4/ add flags to the device_prep_dma_interrupt prototype\n\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "ce4d65a5db77e1568c82d5151a746f627c4f6ed5",
      "tree": "1f3936d2984fc03125bde025796465f9cada9075",
      "parents": [
        "19242d7233df7d658405d4b7ee1758d21414cfaa"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Apr 17 20:17:26 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Apr 17 13:25:54 2008 -0700"
      },
      "message": "async_tx: kill -\u003edevice_dependency_added\n\nDMA drivers no longer need to be notified of dependency submission\nevents as async_tx_run_dependencies and async_tx_channel_switch will\nhandle the scheduling and execution of dependent operations.\n\n[sfr@canb.auug.org.au: extend this for fsldma]\nAcked-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "1c62979ed29a8e2bf9fbe1db101c81a0089676f8",
      "tree": "c652c60d180ec4c5f6fbe17eabeed7b1ac5b601b",
      "parents": [
        "411e23dbe9c5867045f34ba83ee84b31b5b9950c"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Thu Apr 17 20:17:25 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Apr 17 13:22:16 2008 -0700"
      },
      "message": "fsldma: Split the MPC83xx event from MPC85xx and refine irq codes.\n\nSplit MPC83xx EOCDI event from MPC85xx EOLNI event, which is\nalso need to update cookie and start the next transfer.\nThe DMA channel irq handler function code is refined.\nThe patch is tested on MPC8377MDS board.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by; Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "411e23dbe9c5867045f34ba83ee84b31b5b9950c",
      "tree": "bbdf0ce4244c52e1256082711da17c8775a2f48f",
      "parents": [
        "4b119e21d0c66c22e8ca03df05d9de623d0eb50f"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Thu Apr 17 20:17:25 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Apr 17 13:22:15 2008 -0700"
      },
      "message": "fsldma: Remove CONFIG_FSL_DMA_SELFTEST, keep fsl_dma_self_test() running always.\n\nAlways enabling the fsl_dma_self_test() to ensure the DMA controller\nshould works well after the driver probed.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "049c9d45531d9825bf737891163a794fca1421c5",
      "tree": "7f3f782cdbc2b467ff7c5714328734b94e27b087",
      "parents": [
        "96ce1b6dc5824cc6027c954b9a2e4717c70e01b5"
      ],
      "author": {
        "name": "Kumar Gala",
        "email": "galak@kernel.crashing.org",
        "time": "Mon Mar 31 11:13:21 2008 -0500"
      },
      "committer": {
        "name": "Kumar Gala",
        "email": "galak@kernel.crashing.org",
        "time": "Mon Mar 31 11:45:41 2008 -0500"
      },
      "message": "[POWERPC] fsldma: Use compatiable binding as spec\n\nDocumentation/powerpc/booting-without-of.txt specifies the\ncompatiables we should bind to for this driver (elo, eloplus).\nUse these instead of the extremely specific \u0027mpc8540\u0027 and \u0027mpc8349\u0027\ncompatiables.\n\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n"
    },
    {
      "commit": "f79abb627f033c85a6088231f20c85bc4a9bd757",
      "tree": "151538a3a33026ae516606240a13404d1f1e7037",
      "parents": [
        "f920bb6f5fe21047e669381fe4dd346f6a9d3562"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Tue Mar 18 18:45:00 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Mar 18 17:00:59 2008 -0700"
      },
      "message": "fsldma: Fix the DMA halt when using DMA_INTERRUPT async_tx transfer.\n\nThe DMA_INTERRUPT async_tx is a NULL transfer, thus the BCR(count register)\nis 0. When the transfer started with a byte count of zero, the DMA\ncontroller will triger a PE(programming error) event and halt, not a normal\ninterrupt. I add special codes for PE event and DMA_INTERRUPT\nasync_tx testing.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "9c98718e7371fa781043d5a2e70cecebec048091",
      "tree": "5b89ca3b3a1fc61e12371859f2318d3ec6ed013d",
      "parents": [
        "2187c269ad29510f1d65ec684133d1d3426d0eed"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Thu Mar 13 17:45:28 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Mar 13 10:57:09 2008 -0700"
      },
      "message": "fsldma: Add a completed cookie updated action in DMA finish interrupt.\n\nThe patch \u0027fsldma: do not cleanup descriptors in hardirq context\u0027\n(commit 222ccf9ab838a1ca7163969fabd2cddc10403fb5) removed descriptors\ncleanup function to tasklet but the completed cookie do not updated.\nThus, the DMA controller will get lots of duplicated transfer\ninterrupts. Just make a completed cookie update in interrupt handler.\nAnd keep other cleanup jobs in tasklet function.\n\nTested-by: Sebastian Siewior \u003cbigeasy@linutronix.de\u003e\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "2187c269ad29510f1d65ec684133d1d3426d0eed",
      "tree": "491d854f31d0080cf74842561a5df9a3f71bcf98",
      "parents": [
        "9b941c6660bae673e27c207f1d20d98ef8ecd450"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Thu Mar 13 17:45:28 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Mar 13 10:57:08 2008 -0700"
      },
      "message": "fsldma: Add device_prep_dma_interrupt support to fsldma.c\n\nThis is a bug that I assigned DMA_INTERRUPT capability to fsldma\nbut missing device_prep_dma_interrupt function. For a bug in\ndmaengine.c the driver passed BUG_ON() checking. The patch fixes it.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "56822843ff99c88c778a614851328fcbb1503d10",
      "tree": "6b747f0a942451be80e69bac0fcf066530cef15a",
      "parents": [
        "93d74463d018ddf05c169ad399e62e90e0f82fc0"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Thu Mar 13 10:45:27 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Thu Mar 13 10:57:07 2008 -0700"
      },
      "message": "fsldma: Fix fsldma.c warning messages when it\u0027s compiled under PPC64.\n\nThere are warning messages reported by Stephen Rothwell with\nARCH\u003dpowerpc allmodconfig build:\n\ndrivers/dma/fsldma.c: In function \u0027fsl_dma_prep_memcpy\u0027:\ndrivers/dma/fsldma.c:439: warning: comparison of distinct pointer types\nlacks a cast\ndrivers/dma/fsldma.c: In function \u0027fsl_chan_xfer_ld_queue\u0027:\ndrivers/dma/fsldma.c:584: warning: format \u0027%016llx\u0027 expects type \u0027long long\nunsigned int\u0027, but argument 4 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c: In function \u0027fsl_dma_chan_do_interrupt\u0027:\ndrivers/dma/fsldma.c:668: warning: format \u0027%x\u0027 expects type \u0027unsigned int\u0027,\nbut argument 5 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c:684: warning: format \u0027%016llx\u0027 expects type \u0027long long\nunsigned int\u0027, but argument 4 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c:684: warning: format \u0027%016llx\u0027 expects type \u0027long long\nunsigned int\u0027, but argument 5 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c:701: warning: format \u0027%02x\u0027 expects type \u0027unsigned\nint\u0027, but argument 4 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c: In function \u0027fsl_dma_self_test\u0027:\ndrivers/dma/fsldma.c:840: warning: format \u0027%d\u0027 expects type \u0027int\u0027, but\nargument 5 has type \u0027size_t\u0027\ndrivers/dma/fsldma.c: In function \u0027of_fsl_dma_probe\u0027:\ndrivers/dma/fsldma.c:1010: warning: format \u0027%08x\u0027 expects type \u0027unsigned\nint\u0027, but argument 5 has type \u0027resource_size_t\u0027\n\nThis patch fixed the above warning messages.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "222ccf9ab838a1ca7163969fabd2cddc10403fb5",
      "tree": "7d0c6102be13a4de0d6e22254625dc505923bcb7",
      "parents": [
        "173acc7ce8538f1f3040791dc622a92aadc12cf4"
      ],
      "author": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Sat Mar 01 07:51:17 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Mar 04 10:16:46 2008 -0700"
      },
      "message": "fsldma: do not cleanup descriptors in hardirq context\n\n\"Cleaning\" descriptors involves calling pending callbacks and clients\nassume that their callback will only ever happen in softirq context.\nDelay cleanup to the tasklet.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\n"
    },
    {
      "commit": "173acc7ce8538f1f3040791dc622a92aadc12cf4",
      "tree": "f408e415851cf3343af6077287984169958951ad",
      "parents": [
        "976dde010e513a9c7c3117a32b7b015f84b37430"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Sat Mar 01 07:42:48 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Mar 04 10:16:46 2008 -0700"
      },
      "message": "dmaengine: add driver for Freescale MPC85xx DMA controller\n\nThe driver implements DMA engine API for Freescale MPC85xx DMA controller,\nwhich could be used by devices in the silicon.  The driver supports the\nBasic mode of Freescale MPC85xx DMA controller.  The MPC85xx processors\nsupported include MPC8540/60, MPC8555, MPC8548, MPC8641 and so on.\n\nThe MPC83xx(MPC8349, MPC8360) are also supported.\n\n[kamalesh@linux.vnet.ibm.com: build fix]\n[dan.j.williams@intel.com: merge mm fixes, rebase on async_tx-2.6.25]\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Ebony Zhu \u003cebony.zhu@freescale.com\u003e\nAcked-by: Kumar Gala \u003cgalak@gate.crashing.org\u003e\nCc: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    }
  ]
}