)]}'
{
  "log": [
    {
      "commit": "a4e6d5d3817ebae167e78e5957cd9e624be200c7",
      "tree": "5d69f988bc7bdb5d4c5f9c31210fc1d98848c76a",
      "parents": [
        "f0bb3cfde03ae6d492447883f786c6ee9a4db2ca"
      ],
      "author": {
        "name": "Al Viro",
        "email": "viro@ftp.linux.org.uk",
        "time": "Sat Mar 29 03:10:18 2008 +0000"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@linux-foundation.org",
        "time": "Sun Mar 30 14:20:24 2008 -0700"
      },
      "message": "fix the broken annotations in fsldma\n\n a) every bitwise declaration will give a unique type; use typedefs.\n\n b) no need to bother with the stuff pointed to by iomem pointers,\n    unless it\u0027s accessed directly.  noderef will force us to use helpers\n    anyway.\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "f79abb627f033c85a6088231f20c85bc4a9bd757",
      "tree": "151538a3a33026ae516606240a13404d1f1e7037",
      "parents": [
        "f920bb6f5fe21047e669381fe4dd346f6a9d3562"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Tue Mar 18 18:45:00 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Mar 18 17:00:59 2008 -0700"
      },
      "message": "fsldma: Fix the DMA halt when using DMA_INTERRUPT async_tx transfer.\n\nThe DMA_INTERRUPT async_tx is a NULL transfer, thus the BCR(count register)\nis 0. When the transfer started with a byte count of zero, the DMA\ncontroller will triger a PE(programming error) event and halt, not a normal\ninterrupt. I add special codes for PE event and DMA_INTERRUPT\nasync_tx testing.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    },
    {
      "commit": "173acc7ce8538f1f3040791dc622a92aadc12cf4",
      "tree": "f408e415851cf3343af6077287984169958951ad",
      "parents": [
        "976dde010e513a9c7c3117a32b7b015f84b37430"
      ],
      "author": {
        "name": "Zhang Wei",
        "email": "wei.zhang@freescale.com",
        "time": "Sat Mar 01 07:42:48 2008 -0700"
      },
      "committer": {
        "name": "Dan Williams",
        "email": "dan.j.williams@intel.com",
        "time": "Tue Mar 04 10:16:46 2008 -0700"
      },
      "message": "dmaengine: add driver for Freescale MPC85xx DMA controller\n\nThe driver implements DMA engine API for Freescale MPC85xx DMA controller,\nwhich could be used by devices in the silicon.  The driver supports the\nBasic mode of Freescale MPC85xx DMA controller.  The MPC85xx processors\nsupported include MPC8540/60, MPC8555, MPC8548, MPC8641 and so on.\n\nThe MPC83xx(MPC8349, MPC8360) are also supported.\n\n[kamalesh@linux.vnet.ibm.com: build fix]\n[dan.j.williams@intel.com: merge mm fixes, rebase on async_tx-2.6.25]\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Ebony Zhu \u003cebony.zhu@freescale.com\u003e\nAcked-by: Kumar Gala \u003cgalak@gate.crashing.org\u003e\nCc: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n"
    }
  ]
}