)]}' { "log": [ { "commit": "7fe7b2f4ec14d6517078c5bc32b04301b468041c", "tree": "ded474f209ad27a57bef37c7064985b5a422c1f9", "parents": [ "09b05f5ee04cd2e2af3384d50646f53c76712f10" ], "author": { "name": "Haavard Skinnemoen", "email": "haavard.skinnemoen@atmel.com", "time": "Fri Oct 03 15:23:46 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Oct 03 18:22:18 2008 -0700" }, "message": "dw_dmac: fix copy/paste bug in tasklet\n\nThe tasklet checks RAW.BLOCK twice, and does not check RAW.XFER. This is\nobviously wrong, and could theoretically cause the driver to hang.\n\nReported-by: Nicolas Ferre \u003cnicolas.ferre@atmel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "492c71dd545a54dc62df8780bd8d233d771748df", "tree": "73960c90dd47938000478b9b3b1228a8c860e65b", "parents": [ "f0af7245f1725fdc39b32b59c20500448437ddbe", "18365d181fe7fee8b52cd12482200d3a4c48d05e" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Sat Aug 09 18:03:13 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Sat Aug 09 18:03:13 2008 +0100" }, "message": "Merge branch \u0027for-rmk\u0027 of git://git.marvell.com/orion\n" }, { "commit": "6f088f1d215be5250582b974f83f0e3aa6ad3a28", "tree": "f79585741cad29fa9fe9202bf830104815335758", "parents": [ "a09e64fbc0094e3073dbb09c3b4bfe4ab669244b" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Sat Aug 09 13:44:58 2008 +0200" }, "committer": { "name": "Lennert Buytenhek", "email": "buytenh@marvell.com", "time": "Sat Aug 09 13:44:58 2008 +0200" }, "message": "[ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/plat\n\nThis patch performs the equivalent include directory shuffle for\nplat-orion, and fixes up all users.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\n" }, { "commit": "49b75b87ce2dfbd99e59a50c3681b154d07e3a22", "tree": "f14e1da19a13d87a512f9043c2f37fd75dd122b3", "parents": [ "f1c7f79b6ab4f7ada002a0fae47f462ede6b6857", "097d9eb537ff4d88b74c3fe67392e27c478ca3c5" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Aug 08 11:38:42 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Aug 08 11:38:42 2008 -0700" }, "message": "Merge branch \u0027for-linus-merged\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm\n\n* \u0027for-linus-merged\u0027 of master.kernel.org:/home/rmk/linux-2.6-arm:\n [ARM] 5177/1: arm/mach-sa1100/Makefile: remove CONFIG_SA1100_USB\n [ARM] 5166/1: magician: add MAINTAINERS entry\n [ARM] fix pnx4008 build errors\n [ARM] Fix SMP booting with non-zero PHYS_OFFSET\n [ARM] 5185/1: Fix spi num_chipselect for lubbock\n [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach\n [ARM] Add support for arch/arm/mach-*/include and arch/arm/plat-*/include\n [ARM] Remove asm/hardware.h, use asm/arch/hardware.h instead\n [ARM] Eliminate useless includes of asm/mach-types.h\n [ARM] Fix circular include dependency with IRQ headers\n avr32: Use \u003cmach/foo.h\u003e instead of \u003casm/arch/foo.h\u003e\n avr32: Introduce arch/avr32/mach-*/include/mach\n avr32: Move include/asm-avr32 to arch/avr32/include/asm\n [ARM] sa1100_wdt: use reset_status to remember watchdog reset status\n [ARM] pxa: introduce reset_status and clear_reset_status for driver\u0027s usage\n [ARM] pxa: introduce reset.h for reset specific header information\n" }, { "commit": "7d283aee50351ec19eaf654a8690d77c4e1dff50", "tree": "8b0079f19db09ecd264cc2e8c428033fe725015f", "parents": [ "e6fce5b916cd7f7f79b2b3e53ba74bbfc1d7cf8b" ], "author": { "name": "Luis R. Rodriguez", "email": "lrodriguez@atheros.com", "time": "Wed Aug 06 15:21:26 2008 -0700" }, "committer": { "name": "John W. Linville", "email": "linville@tuxdriver.com", "time": "Thu Aug 07 09:49:42 2008 -0400" }, "message": "list.h: Add list_splice_tail() and list_splice_tail_init()\n\nIf you are using linked lists for queues list_splice() will not do what\nyou would expect even if you use the elements passed reversed. We need\nto handle these differently. We add list_splice_tail() and\nlist_splice_tail_init().\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nSigned-off-by: Luis R. Rodriguez \u003clrodriguez@atheros.com\u003e\nSigned-off-by: John W. Linville \u003clinville@tuxdriver.com\u003e\n" }, { "commit": "a09e64fbc0094e3073dbb09c3b4bfe4ab669244b", "tree": "69689f467179891b498bd7423fcf61925173db31", "parents": [ "a1b81a84fff05dbfef45b7012c26e1fee9973e5d" ], "author": { "name": "Russell King", "email": "rmk@dyn-67.arm.linux.org.uk", "time": "Tue Aug 05 16:14:15 2008 +0100" }, "committer": { "name": "Russell King", "email": "rmk+kernel@arm.linux.org.uk", "time": "Thu Aug 07 09:55:48 2008 +0100" }, "message": "[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach\n\nThis just leaves include/asm-arm/plat-* to deal with.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n" }, { "commit": "7f1b358a236ee9c19657a619ac6f2dcabcaa0924", "tree": "04eade38d4f8da94d7051f51875ed500b49b4756", "parents": [ "16a37acaaf4aaa631ba3f83710ed6cdb1a597520" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Tue Jul 22 17:30:57 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 22 17:30:57 2008 -0700" }, "message": "I/OAT: I/OAT version 3.0 support\n\nThis patch adds to ioatdma and dca modules\nsupport for Intel I/OAT DMA engine ver.3 (aka CB3 device).\nThe main features of I/OAT ver.3 are:\n * 8 single channel DMA devices (8 channels total)\n * 8 DCA providers, each can accept 2 requesters\n * 8-bit TAG values and 32-bit extended APIC IDs\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "16a37acaaf4aaa631ba3f83710ed6cdb1a597520", "tree": "5826c763c70dc6b798c0d12216a80f4596dec284", "parents": [ "09177e85d6a0bffac8b55afd28ed8b82bd873f0b" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Tue Jul 22 17:30:57 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 22 17:30:57 2008 -0700" }, "message": "I/OAT: tcp_dma_copybreak default value dependent on I/OAT version\n\nI/OAT DMA performance tuning showed different optimal values of\ntcp_dma_copybreak for different I/OAT versions (4096 for 1.2 and 2048\nfor 2.0). This patch lets ioatdma driver set tcp_dma_copybreak value\naccording to these results.\n\n[dan.j.williams@intel.com: remove some ifdefs]\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "09177e85d6a0bffac8b55afd28ed8b82bd873f0b", "tree": "ce3cb72509cc6c03bfc5d70a3ca0901a44b87fc0", "parents": [ "2a46fa13d788364c093c4296fe01cae837aa8919" ], "author": { "name": "Maciej Sosnowski", "email": "maciej.sosnowski@intel.com", "time": "Tue Jul 22 10:07:33 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 22 10:07:33 2008 -0700" }, "message": "I/OAT: Add watchdog/reset functionality to ioatdma\n\nDue to occasional DMA channel hangs observed for I/OAT versions 1.2 and 2.0\na watchdog has been introduced to check every 2 seconds\nif all channels progress normally.\nIf stuck channel is detected, driver resets it.\nThe reset is done in two parts. The second part is scheduled\nby the first one to reinitialize the channel after the restart.\n\nSigned-off-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "5eb907aaaf7a316a0097ff9f8c21bf9fc468a1f1", "tree": "33238b492dc0f823e59586ca2a2ec981c3ba9f74", "parents": [ "c7141d005a19d2a0a316b3bf9c170d3bedf07bfd" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Jul 17 17:59:56 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Jul 17 17:59:56 2008 -0700" }, "message": "iop_adma: document how to calculate the minimum descriptor pool size\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c7141d005a19d2a0a316b3bf9c170d3bedf07bfd", "tree": "cac1072c6230a3c8f33213802f399a70fdc7e882", "parents": [ "0839875e0c197ded56bbae820e699f26d6fa2697" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Jul 17 17:59:56 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Jul 17 17:59:56 2008 -0700" }, "message": "iop_adma: directly reclaim descriptors on allocation failure\n\nForce callers that trigger an \"out of descriptors\" condition to run the\ncleanup loop directly. Alleviates the requirement to have soft-irqs\nenabled when polling for a descriptor in async_xor.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "3bfb1d20b547a5071d01344581eac5846ea84491", "tree": "3cdbd3b5d59c93f257573cc894db2a000698f02b", "parents": [ "dc0ee6435cb92ccc81b14ff28d163fecc5a7f120" ], "author": { "name": "Haavard Skinnemoen", "email": "haavard.skinnemoen@atmel.com", "time": "Tue Jul 08 11:59:42 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:59:42 2008 -0700" }, "message": "dmaengine: Driver for the Synopsys DesignWare DMA controller\n\nThis adds a driver for the Synopsys DesignWare DMA controller (aka\nDMACA on AVR32 systems.) This DMA controller can be found integrated\non the AT32AP7000 chip and is primarily meant for peripheral DMA\ntransfer, but can also be used for memory-to-memory transfers.\n\nThis patch is based on a driver from David Brownell which was based on\nan older version of the DMA Engine framework. It also implements the\nproposed extensions to the DMA Engine API for slave DMA operations.\n\nThe dmatest client shows no problems, but there may still be room for\nimprovement performance-wise. DMA slave transfer performance is\ndefinitely \"good enough\"; reading 100 MiB from an SD card running at ~20\nMHz yields ~7.2 MiB/s average transfer rate.\n\nFull documentation for this controller can be found in the Synopsys\nDW AHB DMAC Databook:\n\nhttp://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf\n\nThe controller has lots of implementation options, so it\u0027s usually a\ngood idea to check the data sheet of the chip it\u0027s intergrated on as\nwell. The AT32AP7000 data sheet can be found here:\n\nhttp://www.atmel.com/dyn/products/datasheets.asp?family_id\u003d682\n\n\nChanges since v4:\n * Use client_count instead of dma_chan_is_in_use()\n * Add missing include\n * Unmap buffers unless client told us not to\n\nChanges since v3:\n * Update to latest DMA engine and DMA slave APIs\n * Embed the hw descriptor into the sw descriptor\n * Clean up and update MODULE_DESCRIPTION, copyright date, etc.\n\nChanges since v2:\n * Dequeue all pending transfers in terminate_all()\n * Rename dw_dmac.h -\u003e dw_dmac_regs.h\n * Define and use controller-specific dma_slave data\n * Fix up a few outdated comments\n * Define hardware registers as structs (doesn\u0027t generate better\n code, unfortunately, but it looks nicer.)\n * Get number of channels from platform_data instead of hardcoding it\n based on CONFIG_WHATEVER_CPU.\n * Give slave clients exclusive access to the channel\n\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e,\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "dc0ee6435cb92ccc81b14ff28d163fecc5a7f120", "tree": "0a494946593f36516a997f64cb299d898cdf463f", "parents": [ "e1d181efb14a93cf263d6c588a5395518edf3294" ], "author": { "name": "Haavard Skinnemoen", "email": "haavard.skinnemoen@atmel.com", "time": "Tue Jul 08 11:59:35 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:59:35 2008 -0700" }, "message": "dmaengine: Add slave DMA interface\n\nThis patch adds the necessary interfaces to the DMA Engine framework\nto use functionality found on most embedded DMA controllers: DMA from\nand to I/O registers with hardware handshaking.\n\nIn this context, hardware hanshaking means that the peripheral that\nowns the I/O registers in question is able to tell the DMA controller\nwhen more data is available for reading, or when there is room for\nmore data to be written. This usually happens internally on the chip,\nbut these signals may also be exported outside the chip for things\nlike IDE DMA, etc.\n\nA new struct dma_slave is introduced. This contains information that\nthe DMA engine driver needs to set up slave transfers to and from a\nslave device. Most engines supporting DMA slave transfers will want to\nextend this structure with controller-specific parameters. This\nadditional information is usually passed from the platform/board code\nthrough the client driver.\n\nA \"slave\" pointer is added to the dma_client struct. This must point\nto a valid dma_slave structure iff the DMA_SLAVE capability is\nrequested. The DMA engine driver may use this information in its\ndevice_alloc_chan_resources hook to configure the DMA controller for\nslave transfers from and to the given slave device.\n\nA new operation for preparing slave DMA transfers is added to struct\ndma_device. This takes a scatterlist and returns a single descriptor\nrepresenting the whole transfer.\n\nAnother new operation for terminating all pending transfers is added as\nwell. The latter is needed because there may be errors outside the scope\nof the DMA Engine framework that may require DMA operations to be\nterminated prematurely.\n\nDMA Engine drivers may extend the dma_device, dma_chan and/or\ndma_slave_descriptor structures to allow controller-specific\noperations. The client driver can detect such extensions by looking at\nthe DMA Engine\u0027s struct device, or it can request a specific DMA\nEngine device by setting the dma_dev field in struct dma_slave.\n\ndmaslave interface changes since v4:\n * Fix checkpatch errors\n * Fix changelog (there are no slave descriptors anymore)\n\ndmaslave interface changes since v3:\n * Use dma_data_direction instead of a new enum\n * Submit slave transfers as scatterlists\n * Remove the DMA slave descriptor struct\n\ndmaslave interface changes since v2:\n * Add a dma_dev field to struct dma_slave. If set, the client can\n only be bound to the DMA controller that corresponds to this\n device. This allows controller-specific extensions of the\n dma_slave structure; if the device matches, the controller may\n safely assume its extensions are present.\n * Move reg_width into struct dma_slave as there are currently no\n users that need to be able to set the width on a per-transfer\n basis.\n\ndmaslave interface changes since v1:\n * Drop the set_direction and set_width descriptor hooks. Pass the\n direction and width to the prep function instead.\n * Declare a dma_slave struct with fixed information about a slave,\n i.e. register addresses, handshake interfaces and such.\n * Add pointer to a dma_slave struct to dma_client. Can be NULL if\n the DMA_SLAVE capability isn\u0027t requested.\n * Drop the set_slave device hook since the alloc_chan_resources hook\n now has enough information to set up the channel for slave\n transfers.\n\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "e1d181efb14a93cf263d6c588a5395518edf3294", "tree": "1792d1faa7e344401789bbcfad8102d0d93036e2", "parents": [ "848c536a37b8db4e461f14ca15fe29850151c822" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 04 00:13:40 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:59:12 2008 -0700" }, "message": "dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap\n\nIn some cases client code may need the dma-driver to skip the unmap of source\nand/or destination buffers. Setting these flags indicates to the driver to\nskip the unmap step. In this regard async_xor is currently broken in that it\nallows the destination buffer to be unmapped while an operation is still in\nprogress, i.e. when the number of sources exceeds the hardware channel\u0027s\nmaximum (fixed in a subsequent patch).\n\nAcked-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "848c536a37b8db4e461f14ca15fe29850151c822", "tree": "f4a88e92e31de28511e3a3de99200a77d2613dae", "parents": [ "4a776f0aa922a552460192c07b56f4fe9cd82632" ], "author": { "name": "Haavard Skinnemoen", "email": "haavard.skinnemoen@atmel.com", "time": "Tue Jul 08 11:58:58 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:58:58 2008 -0700" }, "message": "dmaengine: Add dma_client parameter to device_alloc_chan_resources\n\nA DMA controller capable of doing slave transfers may need to know a\nfew things about the slave when preparing the channel. We don\u0027t want\nto add this information to struct dma_channel since the channel hasn\u0027t\nyet been bound to a client at this point.\n\nInstead, pass a reference to the client requesting the channel to the\ndriver\u0027s device_alloc_chan_resources hook so that it can pick the\nnecessary information from the dma_client struct by itself.\n\n[dan.j.williams@intel.com: fixed up fsldma and mv_xor]\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "4a776f0aa922a552460192c07b56f4fe9cd82632", "tree": "ae6c2fef63e40fcdcac22483f3aa35eab95e64de", "parents": [ "ff7b04796d9866327ea76e1393f1e902ef032f84" ], "author": { "name": "Haavard Skinnemoen", "email": "hskinnemoen@atmel.com", "time": "Tue Jul 08 11:58:45 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:58:45 2008 -0700" }, "message": "dmatest: Simple DMA memcpy test client\n\nThis client tests DMA memcpy using various lengths and various offsets\ninto the source and destination buffers. It will initialize both\nbuffers with a repeatable pattern and verify that the DMA engine copies\nthe requested region and nothing more. It will also verify that the\nbytes aren\u0027t swapped around, and that the source buffer isn\u0027t modified.\n\nThe dmatest module can be configured to test a specific device, a\nspecific channel. It can also test multiple channels at the same time,\nand it can start multiple threads competing for the same channel.\n\nChanges since v2:\n * Support testing multiple channels at the same time\n * Support testing with multiple threads competing for the same channel\n * Use counting test patterns in order to catch byte ordering issues\n\nChanges since v1:\n * Remove extra dashes around \"help\"\n * Remove \"default n\" from Kconfig\n * Turn TEST_BUF_SIZE into a module parameter\n * Return DMA_NAK instead of DMA_DUP\n * Print unhandled events\n * Support testing specific channels and devices\n * Move to the end of the Makefile\n\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ff7b04796d9866327ea76e1393f1e902ef032f84", "tree": "42fd30c8e2051e7c6acc15da363960647030d3d3", "parents": [ "ebabe2762607147d28aa395ea6df2a0ee7f795a1" ], "author": { "name": "Saeed Bishara", "email": "saeed@marvell.com", "time": "Tue Jul 08 11:58:36 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:58:36 2008 -0700" }, "message": "dmaengine: DMA engine driver for Marvell XOR engine\n\nThe XOR engine found in Marvell\u0027s SoCs and system controllers\nprovides XOR and DMA operation, iSCSI CRC32C calculation, memory\ninitialization, and memory ECC error cleanup operation support.\n\nThis driver implements the DMA engine API and supports the following\ncapabilities:\n- memcpy\n- xor\n- memset\n\nThe XOR engine can be used by DMA engine clients implemented in the\nkernel, one of those clients is the RAID module. In that case, I\nobserved 20% improvement in the raid5 write throughput, and 40%\ndecrease in the CPU utilization when doing array construction, those\nresults obtained on an 5182 running at 500Mhz.\n\nWhen enabling the NET DMA client, the performance decreased, so\nmeanwhile it is recommended to keep this client off.\n\nSigned-off-by: Saeed Bishara \u003csaeed@marvell.com\u003e\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nSigned-off-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ebabe2762607147d28aa395ea6df2a0ee7f795a1", "tree": "35b0292bb723a855846b0b1f7a20a6e14c77f1b4", "parents": [ "7cc5bf9a3a84e5a02e23e5739fb894790b37c101" ], "author": { "name": "Kay Sievers", "email": "kay.sievers@vrfy.org", "time": "Tue Jul 08 11:58:28 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:58:28 2008 -0700" }, "message": "iop-adma: fix platform driver hotplug/coldplug\n\nSince 43cc71eed1250755986da4c0f9898f9a635cb3bf, the platform\nmodalias is prefixed with \"platform:\". Add MODULE_ALIAS() to most\nof the hotpluggable platform drivers, to re-enable auto loading.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nSigned-off-by: David Brownell \u003cdbrownell@users.sourceforge.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "7cc5bf9a3a84e5a02e23e5739fb894790b37c101", "tree": "b526b348ed1b64884bf672924540bb5dc29cb211", "parents": [ "9c402f4e196290692d998b188f9094deb1619e57" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:58:21 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:58:21 2008 -0700" }, "message": "dmaengine: track the number of clients using a channel\n\nHaavard\u0027s dma-slave interface would like to test for exclusive access to a\nchannel. The standard channel refcounting is not sufficient in that it\ntracks more than just client references, it is also inaccurate as reference\ncounts are percpu until the channel is removed.\n\nThis change also enables a future fix to deallocate resources when a client\ndeclines to use a capable channel.\n\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9c402f4e196290692d998b188f9094deb1619e57", "tree": "d61209d265890e20d8d2933e88fb58c8075454ac", "parents": [ "1099dc79245719c046e632212ec09d6ec1154ef5" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jun 27 01:21:11 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:58:12 2008 -0700" }, "message": "dmaengine: remove arch dependency from DMADEVICES\n\nThe dependency is redundant since all drivers set their specific arch\ndependencies. The NET_DMA option is modified to be enabled only on platforms\nwhere it is known to have a positive effect. HAS_DMA is added as an explicit\ndependency for the DMADEVICES menu.\n\nAcked-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nAcked-by: Haavard Skinnemoen \u003chaavard.skinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1099dc79245719c046e632212ec09d6ec1154ef5", "tree": "e80912e5d819d131d51b6845d8aff03bd7f2b9f6", "parents": [ "65bc3ffe8c067e387fe5557bc3ea5071071f6af9" ], "author": { "name": "Haavard Skinnemoen", "email": "hskinnemoen@atmel.com", "time": "Tue Jul 08 11:58:05 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:58:05 2008 -0700" }, "message": "dmaengine: Couple DMA channels to their physical DMA device\n\nSet the \u0027parent\u0027 field of channel class devices to point to the\nphysical DMA device initialized by the DMA engine driver.\n\nThis allows drivers to use chan-\u003edev.parent for syncing DMA buffers\nand adds a \u0027device\u0027 symlink to the real device in\n/sys/class/dma/dmaXchanY.\n\nSigned-off-by: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "51ee87f27a1d2c0e08492924f2fb0223c4c704d9", "tree": "4c2ede7b480144a1b20441c164761881c3df9f47", "parents": [ "0a2ce2ffc358da96792d514c1024b72c52be9cc1" ], "author": { "name": "Li Yang", "email": "leoli@freescale.com", "time": "Thu May 29 23:25:45 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jul 08 11:57:45 2008 -0700" }, "message": "fsldma: fix incorrect exit path for initialization\n\nSigned-off-by: Li Yang \u003cleoli@freescale.com\u003e\nAcked-by: Zhang Wei \u003czw@zh-kernel.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "eccf2144e1232c33a8235033ffa079b6ebf92faf", "tree": "870dece32d3a26405f335884ffee0276d23f4a65", "parents": [ "76b0c788e6033c514f2a75171b04c73c68d28e8d" ], "author": { "name": "Christophe Jaillet", "email": "christophe.jaillet@wanadoo.fr", "time": "Tue May 20 16:33:06 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue May 20 13:51:20 2008 -0700" }, "message": "iop-adma: fixup some kzalloc/memset confusions\n\n1) Remove an explicit memset(.., 0, ...) to a variable allocated with\nkzalloc (i.e. \u0027dest\u0027).\n\n2) Allocate \u0027src\u0027 with kmalloc instead of kzalloc as all elements of the\n\u0027src\u0027 buffer are initialized in a \u0027for(...)\u0027 loop just after.\n\n3) remove useless \u0027sizeof(u8)\u0027, which always returns 1, when computing the\nsize of the memory to be allocated.\n\nSigned-off-by: Christophe Jaillet \u003cchristophe.jaillet@wanadoo.fr\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "8a5703f846e2363fc466aff3f53608340a1ae33f", "tree": "b229bba81473078275ff811254bf23f640f85e09", "parents": [ "218ff137bc67252694420563d23d051ab9227f17" ], "author": { "name": "Sebastian Siewior", "email": "bigeasy@tglx.de", "time": "Mon Apr 21 22:38:45 2008 +0000" }, "committer": { "name": "Jesper Juhl", "email": "juhl@hera.kernel.org", "time": "Mon Apr 21 22:38:45 2008 +0000" }, "message": "DMA engine: typo fixes\n\nSpelling fixes for dmaengine.[ch]\n\nSigned-off-by: Sebastian Siewior \u003cbigeasy@linutronix.de\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Jesper Juhl \u003cjesper.juhl@gmail.com\u003e\n" }, { "commit": "636bdeaa1243327501edfd2a597ed7443eb4239a", "tree": "59b894f124e3664ea4a537d7c07c527abdb9c8da", "parents": [ "c4fe15541d0ef5cc8cc1ce43057663851f8fc387" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 20:17:26 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 13:25:54 2008 -0700" }, "message": "dmaengine: ack to flags: make use of the unused bits in the \u0027ack\u0027 field\n\n\u0027ack\u0027 is currently a simple integer that flags whether or not a client is done\ntouching fields in the given descriptor. It is effectively just a single bit\nof information. Converting this to a flags parameter allows the other bits to\nbe put to use to control completion actions, like dma-unmap, and capture\nresults, like xor-zero-sum \u003d\u003d 0.\n\nChanges are one of:\n1/ convert all open-coded -\u003eack manipulations to use async_tx_ack\n and async_tx_test_ack.\n2/ set the ack bit at prep time where possible\n3/ make drivers store the flags at prep time\n4/ add flags to the device_prep_dma_interrupt prototype\n\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c4fe15541d0ef5cc8cc1ce43057663851f8fc387", "tree": "f54ffc254e1264ab7d33fe43e30078e6ecd36bd8", "parents": [ "ce4d65a5db77e1568c82d5151a746f627c4f6ed5" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 20:17:26 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 13:25:54 2008 -0700" }, "message": "iop-adma: remove the workaround for missed interrupts on iop3xx\n\nThis workaround was covering the dependency submission bug in async_tx.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "ce4d65a5db77e1568c82d5151a746f627c4f6ed5", "tree": "1f3936d2984fc03125bde025796465f9cada9075", "parents": [ "19242d7233df7d658405d4b7ee1758d21414cfaa" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 20:17:26 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 13:25:54 2008 -0700" }, "message": "async_tx: kill -\u003edevice_dependency_added\n\nDMA drivers no longer need to be notified of dependency submission\nevents as async_tx_run_dependencies and async_tx_channel_switch will\nhandle the scheduling and execution of dependent operations.\n\n[sfr@canb.auug.org.au: extend this for fsldma]\nAcked-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "19242d7233df7d658405d4b7ee1758d21414cfaa", "tree": "4bffa2700c30fdb454dfa150115a0607c6cf3d2a", "parents": [ "1c62979ed29a8e2bf9fbe1db101c81a0089676f8" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 20:17:25 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 13:25:05 2008 -0700" }, "message": "async_tx: fix multiple dependency submission\n\nShrink struct dma_async_tx_descriptor and introduce\nasync_tx_channel_switch to properly inject a channel switch interrupt in\nthe descriptor stream. This simplifies the locking model as drivers no\nlonger need to handle dma_async_tx_descriptor.lock.\n\nAcked-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "1c62979ed29a8e2bf9fbe1db101c81a0089676f8", "tree": "c652c60d180ec4c5f6fbe17eabeed7b1ac5b601b", "parents": [ "411e23dbe9c5867045f34ba83ee84b31b5b9950c" ], "author": { "name": "Zhang Wei", "email": "wei.zhang@freescale.com", "time": "Thu Apr 17 20:17:25 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 13:22:16 2008 -0700" }, "message": "fsldma: Split the MPC83xx event from MPC85xx and refine irq codes.\n\nSplit MPC83xx EOCDI event from MPC85xx EOLNI event, which is\nalso need to update cookie and start the next transfer.\nThe DMA channel irq handler function code is refined.\nThe patch is tested on MPC8377MDS board.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by; Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "411e23dbe9c5867045f34ba83ee84b31b5b9950c", "tree": "bbdf0ce4244c52e1256082711da17c8775a2f48f", "parents": [ "4b119e21d0c66c22e8ca03df05d9de623d0eb50f" ], "author": { "name": "Zhang Wei", "email": "wei.zhang@freescale.com", "time": "Thu Apr 17 20:17:25 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 17 13:22:15 2008 -0700" }, "message": "fsldma: Remove CONFIG_FSL_DMA_SELFTEST, keep fsl_dma_self_test() running always.\n\nAlways enabling the fsl_dma_self_test() to ensure the DMA controller\nshould works well after the driver probed.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "049c9d45531d9825bf737891163a794fca1421c5", "tree": "7f3f782cdbc2b467ff7c5714328734b94e27b087", "parents": [ "96ce1b6dc5824cc6027c954b9a2e4717c70e01b5" ], "author": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Mar 31 11:13:21 2008 -0500" }, "committer": { "name": "Kumar Gala", "email": "galak@kernel.crashing.org", "time": "Mon Mar 31 11:45:41 2008 -0500" }, "message": "[POWERPC] fsldma: Use compatiable binding as spec\n\nDocumentation/powerpc/booting-without-of.txt specifies the\ncompatiables we should bind to for this driver (elo, eloplus).\nUse these instead of the extremely specific \u0027mpc8540\u0027 and \u0027mpc8349\u0027\ncompatiables.\n\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Kumar Gala \u003cgalak@kernel.crashing.org\u003e\n" }, { "commit": "a4e6d5d3817ebae167e78e5957cd9e624be200c7", "tree": "5d69f988bc7bdb5d4c5f9c31210fc1d98848c76a", "parents": [ "f0bb3cfde03ae6d492447883f786c6ee9a4db2ca" ], "author": { "name": "Al Viro", "email": "viro@ftp.linux.org.uk", "time": "Sat Mar 29 03:10:18 2008 +0000" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 30 14:20:24 2008 -0700" }, "message": "fix the broken annotations in fsldma\n\n a) every bitwise declaration will give a unique type; use typedefs.\n\n b) no need to bother with the stuff pointed to by iomem pointers,\n unless it\u0027s accessed directly. noderef will force us to use helpers\n anyway.\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "53a0c98e117272125183138aefc6b13b4a5f38a1", "tree": "36f5a77537f0d6eb4b3d58635899f1ecdf645ea9", "parents": [ "5cf83b9b1279dbcdbcf91522bf766c998270ec44" ], "author": { "name": "Al Viro", "email": "viro@ftp.linux.org.uk", "time": "Sat Mar 29 03:08:08 2008 +0000" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 30 14:18:41 2008 -0700" }, "message": "ioat_dca __iomem annotations\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "f79abb627f033c85a6088231f20c85bc4a9bd757", "tree": "151538a3a33026ae516606240a13404d1f1e7037", "parents": [ "f920bb6f5fe21047e669381fe4dd346f6a9d3562" ], "author": { "name": "Zhang Wei", "email": "wei.zhang@freescale.com", "time": "Tue Mar 18 18:45:00 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 18 17:00:59 2008 -0700" }, "message": "fsldma: Fix the DMA halt when using DMA_INTERRUPT async_tx transfer.\n\nThe DMA_INTERRUPT async_tx is a NULL transfer, thus the BCR(count register)\nis 0. When the transfer started with a byte count of zero, the DMA\ncontroller will triger a PE(programming error) event and halt, not a normal\ninterrupt. I add special codes for PE event and DMA_INTERRUPT\nasync_tx testing.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "3d9b525b69bc3302d8355e5f5cf081a856c211e0", "tree": "d0f8b4c9be02e4e48bc4bd0e099a6907eacf40ce", "parents": [ "9c98718e7371fa781043d5a2e70cecebec048091" ], "author": { "name": "Harvey Harrison", "email": "harvey.harrison@gmail.com", "time": "Thu Mar 13 17:45:28 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Mar 13 10:57:09 2008 -0700" }, "message": "iop-adma.c: replace remaining __FUNCTION__ occurrences\n\n__FUNCTION__ is gcc-specific, use __func__\n\nSigned-off-by: Harvey Harrison \u003charvey.harrison@gmail.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9c98718e7371fa781043d5a2e70cecebec048091", "tree": "5b89ca3b3a1fc61e12371859f2318d3ec6ed013d", "parents": [ "2187c269ad29510f1d65ec684133d1d3426d0eed" ], "author": { "name": "Zhang Wei", "email": "wei.zhang@freescale.com", "time": "Thu Mar 13 17:45:28 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Mar 13 10:57:09 2008 -0700" }, "message": "fsldma: Add a completed cookie updated action in DMA finish interrupt.\n\nThe patch \u0027fsldma: do not cleanup descriptors in hardirq context\u0027\n(commit 222ccf9ab838a1ca7163969fabd2cddc10403fb5) removed descriptors\ncleanup function to tasklet but the completed cookie do not updated.\nThus, the DMA controller will get lots of duplicated transfer\ninterrupts. Just make a completed cookie update in interrupt handler.\nAnd keep other cleanup jobs in tasklet function.\n\nTested-by: Sebastian Siewior \u003cbigeasy@linutronix.de\u003e\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "2187c269ad29510f1d65ec684133d1d3426d0eed", "tree": "491d854f31d0080cf74842561a5df9a3f71bcf98", "parents": [ "9b941c6660bae673e27c207f1d20d98ef8ecd450" ], "author": { "name": "Zhang Wei", "email": "wei.zhang@freescale.com", "time": "Thu Mar 13 17:45:28 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Mar 13 10:57:08 2008 -0700" }, "message": "fsldma: Add device_prep_dma_interrupt support to fsldma.c\n\nThis is a bug that I assigned DMA_INTERRUPT capability to fsldma\nbut missing device_prep_dma_interrupt function. For a bug in\ndmaengine.c the driver passed BUG_ON() checking. The patch fixes it.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9b941c6660bae673e27c207f1d20d98ef8ecd450", "tree": "e34aa803ae33e745e0c013dc35ebafb8d9bcca55", "parents": [ "56822843ff99c88c778a614851328fcbb1503d10" ], "author": { "name": "Zhang Wei", "email": "wei.zhang@freescale.com", "time": "Thu Mar 13 17:45:28 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Mar 13 10:57:07 2008 -0700" }, "message": "dmaengine: Fix a bug about BUG_ON() on DMA engine capability DMA_INTERRUPT.\n\nThe device-\u003edevice_prep_dma_interrupt function is used by\nDMA_INTERRUPT capability, not DMA_ZERO_SUM.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "56822843ff99c88c778a614851328fcbb1503d10", "tree": "6b747f0a942451be80e69bac0fcf066530cef15a", "parents": [ "93d74463d018ddf05c169ad399e62e90e0f82fc0" ], "author": { "name": "Zhang Wei", "email": "wei.zhang@freescale.com", "time": "Thu Mar 13 10:45:27 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Mar 13 10:57:07 2008 -0700" }, "message": "fsldma: Fix fsldma.c warning messages when it\u0027s compiled under PPC64.\n\nThere are warning messages reported by Stephen Rothwell with\nARCH\u003dpowerpc allmodconfig build:\n\ndrivers/dma/fsldma.c: In function \u0027fsl_dma_prep_memcpy\u0027:\ndrivers/dma/fsldma.c:439: warning: comparison of distinct pointer types\nlacks a cast\ndrivers/dma/fsldma.c: In function \u0027fsl_chan_xfer_ld_queue\u0027:\ndrivers/dma/fsldma.c:584: warning: format \u0027%016llx\u0027 expects type \u0027long long\nunsigned int\u0027, but argument 4 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c: In function \u0027fsl_dma_chan_do_interrupt\u0027:\ndrivers/dma/fsldma.c:668: warning: format \u0027%x\u0027 expects type \u0027unsigned int\u0027,\nbut argument 5 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c:684: warning: format \u0027%016llx\u0027 expects type \u0027long long\nunsigned int\u0027, but argument 4 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c:684: warning: format \u0027%016llx\u0027 expects type \u0027long long\nunsigned int\u0027, but argument 5 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c:701: warning: format \u0027%02x\u0027 expects type \u0027unsigned\nint\u0027, but argument 4 has type \u0027dma_addr_t\u0027\ndrivers/dma/fsldma.c: In function \u0027fsl_dma_self_test\u0027:\ndrivers/dma/fsldma.c:840: warning: format \u0027%d\u0027 expects type \u0027int\u0027, but\nargument 5 has type \u0027size_t\u0027\ndrivers/dma/fsldma.c: In function \u0027of_fsl_dma_probe\u0027:\ndrivers/dma/fsldma.c:1010: warning: format \u0027%08x\u0027 expects type \u0027unsigned\nint\u0027, but argument 5 has type \u0027resource_size_t\u0027\n\nThis patch fixed the above warning messages.\n\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "6497dcffe07b7c3d863f9899280c4f6eae999161", "tree": "2b57ca65f6be0bee163363d694a19052b6491bc7", "parents": [ "ec8670f1f795badedaa056a3a3245b9b82201747" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Mar 01 07:52:14 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 04 10:16:46 2008 -0700" }, "message": "ioat: fix \u0027ack\u0027 handling, driver must ensure that \u0027ack\u0027 is zero\n\nInitialize \u0027ack\u0027 to zero in case the descriptor has been recycled.\n\nPrevents \"kernel BUG at crypto/async_tx/async_xor.c:185!\"\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: stable@kernel.org\n" }, { "commit": "222ccf9ab838a1ca7163969fabd2cddc10403fb5", "tree": "7d0c6102be13a4de0d6e22254625dc505923bcb7", "parents": [ "173acc7ce8538f1f3040791dc622a92aadc12cf4" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Mar 01 07:51:17 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 04 10:16:46 2008 -0700" }, "message": "fsldma: do not cleanup descriptors in hardirq context\n\n\"Cleaning\" descriptors involves calling pending callbacks and clients\nassume that their callback will only ever happen in softirq context.\nDelay cleanup to the tasklet.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\n" }, { "commit": "173acc7ce8538f1f3040791dc622a92aadc12cf4", "tree": "f408e415851cf3343af6077287984169958951ad", "parents": [ "976dde010e513a9c7c3117a32b7b015f84b37430" ], "author": { "name": "Zhang Wei", "email": "wei.zhang@freescale.com", "time": "Sat Mar 01 07:42:48 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Mar 04 10:16:46 2008 -0700" }, "message": "dmaengine: add driver for Freescale MPC85xx DMA controller\n\nThe driver implements DMA engine API for Freescale MPC85xx DMA controller,\nwhich could be used by devices in the silicon. The driver supports the\nBasic mode of Freescale MPC85xx DMA controller. The MPC85xx processors\nsupported include MPC8540/60, MPC8555, MPC8548, MPC8641 and so on.\n\nThe MPC83xx(MPC8349, MPC8360) are also supported.\n\n[kamalesh@linux.vnet.ibm.com: build fix]\n[dan.j.williams@intel.com: merge mm fixes, rebase on async_tx-2.6.25]\nSigned-off-by: Zhang Wei \u003cwei.zhang@freescale.com\u003e\nSigned-off-by: Ebony Zhu \u003cebony.zhu@freescale.com\u003e\nAcked-by: Kumar Gala \u003cgalak@gate.crashing.org\u003e\nCc: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "d4c56f97ff21df405d0cebe11f49e3c3c79662b5", "tree": "e6b0de433d7c985982ac12815998242a786d87b2", "parents": [ "0036731c88fdb5bf4f04a796a30b5e445fc57f54" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Feb 02 19:49:58 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Feb 06 10:12:18 2008 -0700" }, "message": "async_tx: replace \u0027int_en\u0027 with operation preparation flags\n\nPass a full set of flags to drivers\u0027 per-operation \u0027prep\u0027 routines.\nCurrently the only flag passed is DMA_PREP_INTERRUPT. The expectation is\nthat arch-specific async_tx_find_channel() implementations can exploit this\ncapability to find the best channel for an operation.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nReviewed-by: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\n" }, { "commit": "0036731c88fdb5bf4f04a796a30b5e445fc57f54", "tree": "66982e4a9fdb92fedadca35c0ccaa0b9a75e9d2e", "parents": [ "d909b347591a23c5a2c324fbccd4c9c966f31c67" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sat Feb 02 19:49:57 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Feb 06 10:12:17 2008 -0700" }, "message": "async_tx: kill tx_set_src and tx_set_dest methods\n\nThe tx_set_src and tx_set_dest methods were originally implemented to allow\nan array of addresses to be passed down from async_xor to the dmaengine\ndriver while minimizing stack overhead. Removing these methods allows\ndrivers to have all transaction parameters available at \u0027prep\u0027 time, saves\ntwo function pointers in struct dma_async_tx_descriptor, and reduces the\nnumber of indirect branches..\n\nA consequence of moving this data to the \u0027prep\u0027 routine is that\nmulti-source routines like async_xor need temporary storage to convert an\narray of linear addresses into an array of dma addresses. In order to keep\nthe same stack footprint of the previous implementation the input array is\nreused as storage for the dma addresses. This requires that\nsizeof(dma_addr_t) be less than or equal to sizeof(void *). As a\nconsequence CONFIG_DMADEVICES now depends on !CONFIG_HIGHMEM64G. It also\nrequires that drivers be able to make descriptor resources available when\nthe \u0027prep\u0027 routine is polled.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\n" }, { "commit": "e73ef9acfd30f36bf7c60237ecffe7bbca8068d6", "tree": "bf949d319cb87ebc23ee26f650dcf1b39aa794e0", "parents": [ "cf8f68aa76e8e12f9dcbba3ffe61fb9f2a3a0c2b" ], "author": { "name": "Denis Cheng", "email": "crquan@gmail.com", "time": "Sat Feb 02 19:30:01 2008 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Feb 06 10:12:17 2008 -0700" }, "message": "iop-adma: use LIST_HEAD instead of LIST_HEAD_INIT\n\nthese three list_head are all local variables, but can also use LIST_HEAD.\n\nSigned-off-by: Denis Cheng \u003ccrquan@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "891f78ea833edd4a1e524e15bfe297a7a84d81a0", "tree": "533f12df743c4adc6d2b40d048ffb7d16c93e591", "parents": [ "62ca8792560e5bd7dc09f54ed3523a7864f416c7" ], "author": { "name": "Tony Jones", "email": "tonyj@suse.de", "time": "Tue Sep 25 02:03:03 2007 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Jan 24 20:40:05 2008 -0800" }, "message": "DMA: Convert from class_device to device for DMA engine\n\nSigned-off-by: Tony Jones \u003ctonyj@suse.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nCc: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "bb8e8bcce7eceacb52eb0a3ebb64202ad6bcc438", "tree": "be4aec4e38ff481f4e65f3af077ef49e7a7a9eac", "parents": [ "711924b1052a280bd2452c3babb9816e4a77c723" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Mon Dec 17 16:20:08 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Dec 17 19:28:17 2007 -0800" }, "message": "I/OAT: fix null device in call to dev_err()\n\nWe can\u0027t use the device in a dev_err() after a kzalloc failure or after the\nkfree, so simplify it to the pdev that was originally passed in.\n\nCc: Eric Sesterhenn \u003csnakebyte@gmx.de\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "711924b1052a280bd2452c3babb9816e4a77c723", "tree": "7eea7de34b1f6bdd37989cee9916ee5f5f4e3093", "parents": [ "7c9e70efbfc3186674d93451e0fbf18365347b4d" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Mon Dec 17 16:20:08 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Dec 17 19:28:17 2007 -0800" }, "message": "I/OAT: fixups from code comments\n\nA few fixups from Andrew\u0027s code comments.\n - removed \"static inline\" forward-declares\n - changed use of min() to min_t()\n - removed some unnecessary NULL initializations\n - removed a couple of BUG() calls\n\nFixes this:\n\ndrivers/dma/ioat_dma.c: In function `ioat1_tx_submit\u0027:\ndrivers/dma/ioat_dma.c:177: sorry, unimplemented: inlining failed in call to \u0027__ioat1_dma_memcpy_issue_pending\u0027: function body not available\ndrivers/dma/ioat_dma.c:268: sorry, unimplemented: called from here\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: \"Williams, Dan J\" \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "6d4f5879b6f4da50bde94e1cae73755978ed048f", "tree": "149340866e3a7d65fca49763ce7caa56ada370c4", "parents": [ "e593f070b40887dc0415646a4c0720eb8630c722" ], "author": { "name": "Haavard Skinnemoen", "email": "hskinnemoen@atmel.com", "time": "Wed Nov 28 16:21:43 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Nov 29 09:24:53 2007 -0800" }, "message": "dmaengine: correct invalid assumptions in the Kconfig text\n\nThis patch corrects recently changed (and now invalid) Kconfig descriptions\nfor the DMA engine framework:\n\n - Non-Intel(R) hardware also has DMA engines;\n - DMA is used for more than memcpy and RAID offloading.\n\nIn fact, on most platforms memcpy and RAID aren\u0027t factors, and DMA\nexists so that peripherals can transfer data to/from memory while\nthe CPU does other work.\n\nSigned-off-by: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nSigned-off-by: David Brownell \u003cdbrownell@users.sourceforge.net\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "7bb67c14fd3778504fb77da30ce11582336dfced", "tree": "24b65f267a98716824c7955be02af8879cfda688", "parents": [ "cc9f2f8f68efcc73d8793a4df2c4c50196e90080" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Wed Nov 14 16:59:51 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Wed Nov 14 18:45:41 2007 -0800" }, "message": "I/OAT: Add support for version 2 of ioatdma device\n\nAdd support for version 2 of the ioatdma device. This device handles\nthe descriptor chain and DCA services slightly differently:\n - Instead of moving the dma descriptors between a busy and an idle chain,\n this new version uses a single circular chain so that we don\u0027t have\n rewrite the next_descriptor pointers as we add new requests, and the\n device doesn\u0027t need to re-read the last descriptor.\n - The new device has the DCA tags defined internally instead of needing\n them defined statically.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: \"Williams, Dan J\" \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "348badf1e825323c419dd118f65783db0f7d2ec8", "tree": "126cddb26c14233eaff8ddd6a240fe4ac69204ee", "parents": [ "90d8dabf74179e6615bd4688a118e12ec29ab7aa" ], "author": { "name": "Haavard Skinnemoen", "email": "hskinnemoen@atmel.com", "time": "Wed Nov 14 16:59:27 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Wed Nov 14 18:45:39 2007 -0800" }, "message": "dmaengine: fix broken device refcounting\n\nWhen a DMA device is unregistered, its reference count is decremented twice\nfor each channel: Once dma_class_dev_release() and once in\ndma_chan_cleanup(). This may result in the DMA device driver\u0027s remove()\nfunction completing before all channels have been cleaned up, causing lots\nof use-after-free fun.\n\nFix it by incrementing the device\u0027s reference count twice for each\nchannel during registration.\n\n[dan.j.williams@intel.com: kill unnecessary client refcounting]\nSigned-off-by: Haavard Skinnemoen \u003chskinnemoen@atmel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "4138f08d1c2783a28df2af6ed81aa180462ec374", "tree": "11b9d3b4cbafe4c9d1dd7c9b7ef934dee2bafdb4", "parents": [ "bc2a3f86f46569fb091792867ce67c9ab24dfd0f" ], "author": { "name": "Andi Kleen", "email": "ak@suse.de", "time": "Mon Oct 29 14:37:18 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 30 08:06:55 2007 -0700" }, "message": "Remove bogus default y for DMAR and NET_DMA\n\nNo reason I can think of of making them default y Most people don\u0027t have\nthe hardware and with default y they just pollute lots of configs during\nmake oldconfig.\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nAcked-by: Jeff Garzik \u003cjeff@garzik.org\u003e\nAcked-by: \"Nelson, Shannon\" \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "952184304fbf030f0133d8b66a91b2847dce729e", "tree": "07a6ca0121cfa94bda58c0f49ac509f4b62fcf64", "parents": [ "7f2b291f56d08e001454d16d3c92e175434898b3" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Thu Oct 18 03:07:15 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Oct 18 14:37:32 2007 -0700" }, "message": "I/OAT: Add completion callback for async_tx interface use\n\nThe async_tx interface includes a completion callback. This adds support\nfor using that callback, including using interrupts on completion.\n\n[akpm@linux-foundation.org: various fixes]\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "7f2b291f56d08e001454d16d3c92e175434898b3", "tree": "41b0c324e93db47fd5114fed2fddbba963492383", "parents": [ "5149fd010f404889b7d8f79159057791fbb817b1" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Thu Oct 18 03:07:14 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Oct 18 14:37:32 2007 -0700" }, "message": "I/OAT: Tighten descriptor setup performance\n\nThe change to the async_tx interface cost this driver some performance by\nspreading the descriptor setup across several functions, including multiple\npasses over the new descriptor chain. Here we bring the work back into one\nprimary function and only do one pass.\n\n[akpm@linux-foundation.org: cleanups, uninline]\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "5149fd010f404889b7d8f79159057791fbb817b1", "tree": "0ec09c009f35d59be64e3b952b6deba39b61f6e1", "parents": [ "dfe2299e7b35a0adfc87f04d3e725ccc508d7626" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Thu Oct 18 03:07:13 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Oct 18 14:37:32 2007 -0700" }, "message": "I/OAT: clean up error handling and some print messages\n\nMake better use of dev_err(), and catch an error where the transaction\ncreation might fail.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "dfe2299e7b35a0adfc87f04d3e725ccc508d7626", "tree": "5dbcd9290ebf4f4830d736df5b3324f0146bb6b0", "parents": [ "7df7cf0676060d778486359676734447347e1caf" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Thu Oct 18 03:07:13 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Oct 18 14:37:32 2007 -0700" }, "message": "I/OAT: clean up of dca provider start and stop\n\nDon\u0027t start ioat_dca if ioat_dma didn\u0027t start, and then stop ioat_dca\nbefore stopping ioat_dma. Since the ioat_dma side does the pci device\nwork, This takes care of ioat_dca trying to use a bad device reference.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "7df7cf0676060d778486359676734447347e1caf", "tree": "1a452993706602ea26b2ec4040fae4818c8e22bb", "parents": [ "d8c98618f4bb8161cc0c14e110b07ba37249332b" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Thu Oct 18 03:07:12 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Oct 18 14:37:32 2007 -0700" }, "message": "I/OAT: cleanup pci issues\n\nReorder the pci release actions\n Letting go of the resources in the right order helps get rid of\n occasional kernel complaints.\n\nFix the pci_driver object name [Randy Dunlap]\n Rename the struct pci_driver data so that false section mismatch\n warnings won\u0027t be produced.\n\nCc: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nCc: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "af49d9248fca6f26cbdb01918334f71d9040df80", "tree": "5d6a7f4d5ca55ff17fbfc98cacac37be62c7a4a3", "parents": [ "d9c9bef1345e5d9258febce2a37e4d40319fa728" ], "author": { "name": "Rusty Russell", "email": "rusty@rustcorp.com.au", "time": "Tue Oct 16 23:26:27 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Wed Oct 17 08:42:49 2007 -0700" }, "message": "Remove \"unsafe\" from module struct\n\nAdrian Bunk points out that \"unsafe\" was used to mark modules touched by\nthe deprecated MOD_INC_USE_COUNT interface, which has long gone. It\u0027s time\nto remove the member from the module structure, as well.\n\nIf you want a module which can\u0027t unload, don\u0027t register an exit function.\n\n(Vlad Yasevich says SCTP is now safe to unload, so just remove the\n__unsafe there).\n\nSigned-off-by: Rusty Russell \u003crusty@rustcorp.com.au\u003e\nAcked-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Vlad Yasevich \u003cvladislav.yasevich@hp.com\u003e\nCc: Sridhar Samudrala \u003csri@us.ibm.com\u003e\nCc: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "2ed6dc34f9ed39bb8e4c81ea1056f0ba56315841", "tree": "e3f6ca7961f9c4e34453d06e584c0bc98ec630d7", "parents": [ "7589670f37736bcc119ebfbd69aafea6d585d1d4" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:42 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: Add DCA services\n\nAdd code to connect to the DCA driver and provide cpu tags for use by\ndrivers that would like to use Direct Cache Access hints.\n\n [Adrian Bunk] Several Kconfig cleanup items\n [Andrew Morten, Chris Leech] Fix for using cpu_physical_id() even when\n\t\t\t built for uni-processor\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "3e037454bcfa4b187e8293d2121bd8c0f5a5c31c", "tree": "751a2eace11b280cc1a19873788b778009188be9", "parents": [ "8ab89567da0cea9bae2c1b5dad47b51c424479e4" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:40 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: Add support for MSI and MSI-X\n\nAdd support for MSI and MSI-X interrupt handling, including the ability\nto choose the desired interrupt method.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\n[bunk@kernel.org: drivers/dma/ioat_dma.c: make 3 functions static]\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "8ab89567da0cea9bae2c1b5dad47b51c424479e4", "tree": "95ac8bc77b2e8d9f1dec97f6fd7128760e27561f", "parents": [ "43d6e369d43ff175e1e0e80caaedb1e53829247c" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:39 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: Split PCI startup from DMA handling code\n\nSplit the general PCI startup from the DMA handling code in order to\nprepare for adding support for DCA services and future versions of the\nioatdma device.\n\n [Rusty Russell] Removal of __unsafe() usage.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "43d6e369d43ff175e1e0e80caaedb1e53829247c", "tree": "f5eae87e5a3ac684c49b4f8c69aa5a4332137c01", "parents": [ "1fda5f4e96225c3ed0baded942704c0ae399da23" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:39 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: code cleanup from checkpatch output\n\nTake care of a bunch of little code nits in ioatdma files\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "1fda5f4e96225c3ed0baded942704c0ae399da23", "tree": "a16dbd8a674b8da8e5aed5cabcd497e63e3af754", "parents": [ "223758c77a67b1eb383a92b35d67de29502a9f55" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:37 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: Rename the source file\n\nRename the ioatdma.c file in preparation for splitting into multiple files,\nwhich will allow for easier adding new functionality.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "223758c77a67b1eb383a92b35d67de29502a9f55", "tree": "1c7ac6de4d105a84fb86ae53709a851301c5883b", "parents": [ "70af26b2d4bc55570ac30b5eced4ff0319e24455" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Oct 16 01:27:37 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Oct 16 09:43:09 2007 -0700" }, "message": "I/OAT: New device ids\n\nAdd device ids for new revs of the Intel I/OAT DMA engine\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "e4223976341ffb22fabe5b3a69873966808c83aa", "tree": "8375db74c6243e583eeaff91d5d50ca96632a55d", "parents": [ "97a1ad431b89765755d2b5aa8c0777ed637d5c4a" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Fri Aug 24 23:02:53 2007 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sun Aug 26 18:35:40 2007 -0700" }, "message": "[IOAT]: ioatdma needs to to play nice in a multi-dma-client world\n\nNow that the DMA engine has a multi-client interface, fix the ioatdma\ndriver to play along. At the same time, remove a couple of unnecessary\nreads and writes.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "54a09feb0ebb018dadaebeb51e860154198abc83", "tree": "3e85288f49ba8376e58db649250d60c2560e5204", "parents": [ "9c29a377f99b42c59721112cd2388cf27547fc84" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Tue Aug 14 17:36:31 2007 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Aug 14 17:36:31 2007 -0700" }, "message": "[IOAT]: Remove redundant struct member to avoid descriptor cache miss\n\nThe layout for struct ioat_desc_sw is non-optimal and causes an extra\ncache hit for every descriptor processed. By tightening up the struct\nlayout and removing one item, we pull in the fields that get used in\nthe speedpath and get a little better performance.\n\n\nBefore:\n-------\nstruct ioat_desc_sw {\n\tstruct ioat_dma_descriptor * hw; /* 0 8\n*/\n\tstruct list_head node; /* 8 16\n*/\n\tint tx_cnt; /* 24 4\n*/\n\n\t/* XXX 4 bytes hole, try to pack */\n\n\tdma_addr_t src; /* 32 8\n*/\n\t__u32 src_len; /* 40 4\n*/\n\n\t/* XXX 4 bytes hole, try to pack */\n\n\tdma_addr_t dst; /* 48 8\n*/\n\t__u32 dst_len; /* 56 4\n*/\n\n\t/* XXX 4 bytes hole, try to pack */\n\n\t/* --- cacheline 1 boundary (64 bytes) --- */\n\tstruct dma_async_tx_descriptor async_tx; /* 64 144\n*/\n\t/* --- cacheline 3 boundary (192 bytes) was 16 bytes ago --- */\n\n\t/* size: 208, cachelines: 4 */\n\t/* sum members: 196, holes: 3, sum holes: 12 */\n\t/* last cacheline: 16 bytes */\n};\t/* definitions: 1 */\n\n\nAfter:\n------\n\nstruct ioat_desc_sw {\n\tstruct ioat_dma_descriptor * hw; /* 0 8\n*/\n\tstruct list_head node; /* 8 16\n*/\n\tint tx_cnt; /* 24 4\n*/\n\t__u32 len; /* 28 4\n*/\n\tdma_addr_t src; /* 32 8\n*/\n\tdma_addr_t dst; /* 40 8\n*/\n\tstruct dma_async_tx_descriptor async_tx; /* 48 144\n*/\n\t/* --- cacheline 3 boundary (192 bytes) --- */\n\n\t/* size: 192, cachelines: 3 */\n};\t/* definitions: 1 */\n\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "342ff7b24f42d01b27d884c699855c713d720fcb", "tree": "6b24a7d1ff21dbb864948e4b1a29a05b62c29fa1", "parents": [ "94571065757a4f2619c48ab4e36cafdc635028ce" ], "author": { "name": "Shannon Nelson", "email": "shannon.nelson@intel.com", "time": "Thu Jul 26 00:05:53 2007 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Tue Jul 31 02:28:03 2007 -0700" }, "message": "[NET_DMA]: remove unused dma_memcpy_to_kernel_iovec\n\nAl Viro pointed out that dma_memcpy_to_kernel_iovec() really was\nunreachable and thus unused. The code originally was there to support\nin-kernel dma needs, but since it remains unused, we\u0027ll pull it out.\n\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "1b0fac45878bb88759eec347c273285195649ff7", "tree": "a9871a47ef98c90bac3f65a7f9309e87420c694c", "parents": [ "9e7bf24b1b979db256ddc84d0d4ac6040d706da6" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Sun Jul 15 23:40:26 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Jul 16 09:05:45 2007 -0700" }, "message": "dma-mapping: prevent dma dependent code from linking on !HAS_DMA archs\n\nContinuing the work started in 411f0f3edc141a582190d3605cadd1d993abb6df ...\n\nThis enables code with a dma path, that compiles away, to build without\nrequiring additional code factoring. It also prevents code that calls\ndma_alloc_coherent and dma_free_coherent from linking whereas previously\nthe code would hit a BUG() at run time. Finally, it allows archs that set\n!HAS_DMA to delete their asm/dma-mapping.h file.\n\nCc: Cornelia Huck \u003ccornelia.huck@de.ibm.com\u003e\nCc: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\nCc: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nCc: John W. Linville \u003clinville@tuxdriver.com\u003e\nCc: Kyle McMartin \u003ckyle@parisc-linux.org\u003e\nCc: James Bottomley \u003cJames.Bottomley@SteelEye.com\u003e\nCc: Tejun Heo \u003chtejun@gmail.com\u003e\nCc: Jeff Garzik \u003cjeff@garzik.org\u003e\nCc: \u003cgeert@linux-m68k.org\u003e\nCc: \u003czippel@linux-m68k.org\u003e\nCc: \u003cspyro@f2s.com\u003e\nCc: \u003cysato@users.sourceforge.jp\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "3039f0735a280b54c7364fbfe6a9287f7f0b510a", "tree": "1d64cdab174e681660d689d367f0bde4e2884fdd", "parents": [ "5816815f7850509ed51ab94eb4f644e405ccb865" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 13 08:06:19 2007 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 13 08:06:19 2007 -0700" }, "message": "ioatdma: add the unisys \"i/oat\" pci vendor/device id\n\nCc: John Magolan \u003cjohn.magolan@unisys.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "c211092313b90f898dec61f35207fc282d1eadc3", "tree": "30df0c81f207d0babb3fe56a17419f37e71e973a", "parents": [ "f6dff381af01006ffae3c23cd2e07e30584de0ec" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 02 13:52:26 2007 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 13 08:06:18 2007 -0700" }, "message": "dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines\n\nThe Intel(R) IOP series of i/o processors integrate an Xscale core with\nraid acceleration engines. The capabilities per platform are:\n\niop219:\n (2) copy engines\niop321:\n (2) copy engines\n (1) xor and block fill engine\niop33x:\n (2) copy and crc32c engines\n (1) xor, xor zero sum, pq, pq zero sum, and block fill engine\niop34x (iop13xx):\n (2) copy, crc32c, xor, xor zero sum, and block fill engines\n (1) copy, crc32c, xor, xor zero sum, pq, pq zero sum, and block fill engine\n\nThe driver supports the features of the async_tx api:\n* asynchronous notification of operation completion\n* implicit (interupt triggered) handling of inter-channel transaction\n dependencies\n\nThe driver adapts to the platform it is running by two methods.\n1/ #include \u003casm/arch/adma.h\u003e which defines the hardware specific\n iop_chan_* and iop_desc_* routines as a series of static inline\n functions\n2/ The private platform data attached to the platform_device defines the\n capabilities of the channels\n\n20070626: Callbacks are run in a tasklet. Given the recent discussion on\nLKML about killing tasklets in favor of workqueues I did a quick conversion\nof the driver. Raid5 resync performance dropped from 50MB/s to 30MB/s, so\nthe tasklet implementation remains until a generic softirq interface is\navailable.\n\nChangelog:\n* fixed a slot allocation bug in do_iop13xx_adma_xor that caused too few\nslots to be requested eventually leading to data corruption\n* enabled the slot allocation routine to attempt to free slots before\nreturning -ENOMEM\n* switched the cleanup routine to solely use the software chain and the\nstatus register to determine if a descriptor is complete. This is\nnecessary to support other IOP engines that do not have status writeback\ncapability\n* make the driver iop generic\n* modified the allocation routines to understand allocating a group of\nslots for a single operation\n* added a null xor initialization operation for the xor only channel on\niop3xx\n* support xor operations on buffers larger than the hardware maximum\n* split the do_* routines into separate prep, src/dest set, submit stages\n* added async_tx support (dependent operations initiation at cleanup time)\n* simplified group handling\n* added interrupt support (callbacks via tasklets)\n* brought the pending depth inline with ioat (i.e. 4 descriptors)\n* drop dma mapping methods, suggested by Chris Leech\n* don\u0027t use inline in C files, Adrian Bunk\n* remove static tasklet declarations\n* make iop_adma_alloc_slots easier to read and remove chances for a\n corrupted descriptor chain\n* fix locking bug in iop_adma_alloc_chan_resources, Benjamin Herrenschmidt\n* convert capabilities over to dma_cap_mask_t\n* fixup sparse warnings\n* add descriptor flush before iop_chan_enable\n* checkpatch.pl fixes\n* gpl v2 only correction\n* move set_src, set_dest, submit to async_tx methods\n* move group_list and phys to async_tx\n\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n" }, { "commit": "9bc89cd82d6f88fb0ca39b30445c329a430fd66b", "tree": "7bd0e856abd359f84edea1bacfd1dd32edd93fbb", "parents": [ "685784aaf3cd0e3ff5e36c7ecf6f441cdbf57f73" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 02 11:10:44 2007 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 13 08:06:14 2007 -0700" }, "message": "async_tx: add the async_tx api\n\nThe async_tx api provides methods for describing a chain of asynchronous\nbulk memory transfers/transforms with support for inter-transactional\ndependencies. It is implemented as a dmaengine client that smooths over\nthe details of different hardware offload engine implementations. Code\nthat is written to the api can optimize for asynchronous operation and the\napi will fit the chain of operations to the available offload resources. \n \n\tI imagine that any piece of ADMA hardware would register with the\n\t\u0027async_*\u0027 subsystem, and a call to async_X would be routed as\n\tappropriate, or be run in-line. - Neil Brown\n\nasync_tx exploits the capabilities of struct dma_async_tx_descriptor to\nprovide an api of the following general format:\n\nstruct dma_async_tx_descriptor *\nasync_\u003coperation\u003e(..., struct dma_async_tx_descriptor *depend_tx,\n\t\t\tdma_async_tx_callback cb_fn, void *cb_param)\n{\n\tstruct dma_chan *chan \u003d async_tx_find_channel(depend_tx, \u003coperation\u003e);\n\tstruct dma_device *device \u003d chan ? chan-\u003edevice : NULL;\n\tint int_en \u003d cb_fn ? 1 : 0;\n\tstruct dma_async_tx_descriptor *tx \u003d device ?\n\t\tdevice-\u003edevice_prep_dma_\u003coperation\u003e(chan, len, int_en) : NULL;\n\n\tif (tx) { /* run \u003coperation\u003e asynchronously */\n\t\t...\n\t\ttx-\u003etx_set_dest(addr, tx, index);\n\t\t...\n\t\ttx-\u003etx_set_src(addr, tx, index);\n\t\t...\n\t\tasync_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);\n\t} else { /* run \u003coperation\u003e synchronously */\n\t\t...\n\t\t\u003coperation\u003e\n\t\t...\n\t\tasync_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param);\n\t}\n\n\treturn tx;\n}\n\nasync_tx_find_channel() returns a capable channel from its pool. The\nchannel pool is organized as a per-cpu array of channel pointers. The\nasync_tx_rebalance() routine is tasked with managing these arrays. In the\nuniprocessor case async_tx_rebalance() tries to spread responsibility\nevenly over channels of similar capabilities. For example if there are two\ncopy+xor channels, one will handle copy operations and the other will\nhandle xor. In the SMP case async_tx_rebalance() attempts to spread the\noperations evenly over the cpus, e.g. cpu0 gets copy channel0 and xor\nchannel0 while cpu1 gets copy channel 1 and xor channel 1. When a\ndependency is specified async_tx_find_channel defaults to keeping the\noperation on the same channel. A xor-\u003ecopy-\u003exor chain will stay on one\nchannel if it supports both operation types, otherwise the transaction will\ntransition between a copy and a xor resource.\n\nCurrently the raid5 implementation in the MD raid456 driver has been\nconverted to the async_tx api. A driver for the offload engines on the\nIntel Xscale series of I/O processors, iop-adma, is provided in a later\ncommit. With the iop-adma driver and async_tx, raid456 is able to offload\ncopy, xor, and xor-zero-sum operations to hardware engines.\n \nOn iop342 tiobench showed higher throughput for sequential writes (20 - 30%\nimprovement) and sequential reads to a degraded array (40 - 55%\nimprovement). For the other cases performance was roughly equal, +/- a few\npercentage points. On a x86-smp platform the performance of the async_tx\nimplementation (in synchronous mode) was also +/- a few percentage points\nof the original implementation. According to \u0027top\u0027 on iop342 CPU\nutilization drops from ~50% to ~15% during a \u0027resync\u0027 while the speed\naccording to /proc/mdstat doubles from ~25 MB/s to ~50 MB/s.\n \nThe tiobench command line used for testing was: tiobench --size 2048\n--block 4096 --block 131072 --dir /mnt/raid --numruns 5\n* iop342 had 1GB of memory available\n\nDetails:\n* if CONFIG_DMA_ENGINE\u003dn the asynchronous path is compiled away by making\n async_tx_find_channel a static inline routine that always returns NULL\n* when a callback is specified for a given transaction an interrupt will\n fire at operation completion time and the callback will occur in a\n tasklet. if the the channel does not support interrupts then a live\n polling wait will be performed\n* the api is written as a dmaengine client that requests all available\n channels\n* In support of dependencies the api implicitly schedules channel-switch\n interrupts. The interrupt triggers the cleanup tasklet which causes\n pending operations to be scheduled on the next channel\n* Xor engines treat an xor destination address differently than a software\n xor routine. To the software routine the destination address is an implied\n source, whereas engines treat it as a write-only destination. This patch\n modifies the xor_blocks routine to take a an explicit destination address\n to mirror the hardware.\n\nChangelog:\n* fixed a leftover debug print\n* don\u0027t allow callbacks in async_interrupt_cond\n* fixed xor_block changes\n* fixed usage of ASYNC_TX_XOR_DROP_DEST\n* drop dma mapping methods, suggested by Chris Leech\n* printk warning fixups from Andrew Morton\n* don\u0027t use inline in C files, Adrian Bunk\n* select the API when MD is enabled\n* BUG_ON xor source counts \u003c\u003d 1\n* implicitly handle hardware concerns like channel switching and\n interrupts, Neil Brown\n* remove the per operation type list, and distribute operation capabilities\n evenly amongst the available channels\n* simplify async_tx_find_channel to optimize the fast path\n* introduce the channel_table_initialized flag to prevent early calls to\n the api\n* reorganize the code to mimic crypto\n* include mm.h as not all archs include it in dma-mapping.h\n* make the Kconfig options non-user visible, Adrian Bunk\n* move async_tx under crypto since it is meant as \u0027core\u0027 functionality, and\n the two may share algorithms in the future\n* move large inline functions into c files\n* checkpatch.pl fixes\n* gpl v2 only correction\n\nCc: Herbert Xu \u003cherbert@gondor.apana.org.au\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-By: NeilBrown \u003cneilb@suse.de\u003e\n" }, { "commit": "d379b01e9087a582d58f4b678208a4f8d8376fe7", "tree": "155920bca93c18afba66b9d5acfecd359d5bec65", "parents": [ "7405f74badf46b5d023c5d2b670b4471525f6c91" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Mon Jul 09 11:56:42 2007 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 13 08:06:13 2007 -0700" }, "message": "dmaengine: make clients responsible for managing channels\n\nThe current implementation assumes that a channel will only be used by one\nclient at a time. In order to enable channel sharing the dmaengine core is\nchanged to a model where clients subscribe to channel-available-events.\nInstead of tracking how many channels a client wants and how many it has\nreceived the core just broadcasts the available channels and lets the\nclients optionally take a reference. The core learns about the clients\u0027\nneeds at dma_event_callback time.\n\nIn support of multiple operation types, clients can specify a capability\nmask to only be notified of channels that satisfy a certain set of\ncapabilities.\n\nChangelog:\n* removed DMA_TX_ARRAY_INIT, no longer needed\n* dma_client_chan_free -\u003e dma_chan_release: switch to global reference\n counting only at device unregistration time, before it was also happening\n at client unregistration time\n* clients now return dma_state_client to dmaengine (ack, dup, nak)\n* checkpatch.pl fixes\n* fixup merge with git-ioat\n\nCc: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "7405f74badf46b5d023c5d2b670b4471525f6c91", "tree": "20dd20571637dba1c2b04c7b13ac208c33b5706b", "parents": [ "428ed6024fa74a271142f3257966e9b5e1cb37a1" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Tue Jan 02 11:10:43 2007 -0700" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Fri Jul 13 08:06:11 2007 -0700" }, "message": "dmaengine: refactor dmaengine around dma_async_tx_descriptor\n\nThe current dmaengine interface defines mutliple routines per operation,\ni.e. dma_async_memcpy_buf_to_buf, dma_async_memcpy_buf_to_page etc. Adding\nmore operation types (xor, crc, etc) to this model would result in an\nunmanageable number of method permutations.\n\n\tAre we really going to add a set of hooks for each DMA engine\n\twhizbang feature?\n\t\t- Jeff Garzik\n\nThe descriptor creation process is refactored using the new common\ndma_async_tx_descriptor structure. Instead of per driver\ndo_\u003coperation\u003e_\u003cdest\u003e_to_\u003csrc\u003e methods, drivers integrate\ndma_async_tx_descriptor into their private software descriptor and then\ndefine a \u0027prep\u0027 routine per operation. The prep routine allocates a\ndescriptor and ensures that the tx_set_src, tx_set_dest, tx_submit routines\nare valid. Descriptor creation and submission becomes:\n\nstruct dma_device *dev;\nstruct dma_chan *chan;\nstruct dma_async_tx_descriptor *tx;\n\ntx \u003d dev-\u003edevice_prep_dma_\u003coperation\u003e(chan, len, int_flag)\ntx-\u003etx_set_src(dma_addr_t, tx, index /* for multi-source ops */)\ntx-\u003etx_set_dest(dma_addr_t, tx, index)\ntx-\u003etx_submit(tx)\n\nIn addition to the refactoring, dma_async_tx_descriptor also lays the\ngroundwork for definining cross-channel-operation dependencies, and a\ncallback facility for asynchronous notification of operation completion.\n\nChangelog:\n* drop dma mapping methods, suggested by Chris Leech\n* fix ioat_dma_dependency_added, also caught by Andrew Morton\n* fix dma_sync_wait, change from Andrew Morton\n* uninline large functions, change from Andrew Morton\n* add tx-\u003ecallback \u003d NULL to dmaengine calls to interoperate with async_tx\n calls\n* hookup ioat_tx_submit\n* convert channel capabilities to a \u0027cpumask_t like\u0027 bitmap\n* removed DMA_TX_ARRAY_INIT, no longer needed\n* checkpatch.pl fixes\n* make set_src, set_dest, and tx_submit descriptor specific methods\n* fixup git-ioat merge\n* move group_list and phys to dma_async_tx_descriptor\n\nCc: Jeff Garzik \u003cjeff@garzik.org\u003e\nCc: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: Shannon Nelson \u003cshannon.nelson@intel.com\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "428ed6024fa74a271142f3257966e9b5e1cb37a1", "tree": "b74af2d50f292ec377a567368e0dd41fe439d1b7", "parents": [ "e00c5d8b4d800b95b72b3f072e1d55d7c7034702" ], "author": { "name": "Dan Aloni", "email": "da\\\\-x@monatomic.org", "time": "Thu Mar 08 09:57:36 2007 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Jul 11 16:10:53 2007 -0700" }, "message": "I/OAT: fix I/OAT for kexec\n\nUnder kexec, I/OAT initialization breaks over busy resources because the\nprevious kernel did not release them.\n\nI\u0027m not sure this fix can be considered a complete one but it works for me.\n I guess something similar to the *_remove method should occur there..\n\nSigned-off-by: Dan Aloni \u003cda-x@monatomic.org\u003e\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\n" }, { "commit": "70774b47392171faae0e98f795aa1507f9246af1", "tree": "dc6e61846b7f140e2756e77bbf2adff4011c4ed6", "parents": [ "e38288117c50fe22ed1693c2d8397245bb7e1a53" ], "author": { "name": "Chris Leech", "email": "christopher.leech@intel.com", "time": "Thu Mar 08 09:57:35 2007 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Jul 11 15:39:04 2007 -0700" }, "message": "ioatdma: Remove the use of writeq from the ioatdma driver\nThere\u0027s only one now anyway, and it\u0027s not in a performance path,\nso make it behave the same on 32-bit and 64-bit CPUs.\n\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\n" }, { "commit": "e38288117c50fe22ed1693c2d8397245bb7e1a53", "tree": "a3189299b0056bb109fb7d306d5d0574c621a0a0", "parents": [ "ff487fb773749124550a5ad2b7fbfe0376af6f0d" ], "author": { "name": "Chris Leech", "email": "christopher.leech@intel.com", "time": "Thu Mar 08 09:57:35 2007 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Jul 11 15:39:04 2007 -0700" }, "message": "ioatdma: Remove the wrappers around read(bwl)/write(bwl) in ioatdma\n\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\n" }, { "commit": "ff487fb773749124550a5ad2b7fbfe0376af6f0d", "tree": "4162ef179d0496b8c5fa066a51cf97606e22c1be", "parents": [ "000725d56a196e72dc22328324c5ec5506265736" ], "author": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Thu Mar 08 09:57:34 2007 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Jul 11 15:39:03 2007 -0700" }, "message": "drivers/dma: handle sysfs errors\n\nFrom: Jeff Garzik \u003cjeff@garzik.org\u003e\n\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\n" }, { "commit": "000725d56a196e72dc22328324c5ec5506265736", "tree": "7189116b48efd57b2de74cc924d39fc885cf4d9e", "parents": [ "7dcca30a32aadb0520417521b0c44f42d09fe05c" ], "author": { "name": "Chris Leech", "email": "christopher.leech@intel.com", "time": "Thu Mar 08 09:57:33 2007 -0800" }, "committer": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Wed Jul 11 15:39:03 2007 -0700" }, "message": "ioatdma: Push pending transactions to hardware more frequently\nEvery 20 descriptors turns out to be to few append commands with\nnewer/faster CPUs. Pushing every 4 still cuts down on MMIO writes to an\nacceptable level without letting the DMA engine run out of work.\n\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\n" }, { "commit": "92504f79a7c57b853dfb59595fd2860282f6ba1e", "tree": "95b2a799759fd1366c834d47a50830627035dcb1", "parents": [ "59faba1b316a7798a33752b3889193333f8af1a0" ], "author": { "name": "Randy Dunlap", "email": "randy.dunlap@oracle.com", "time": "Wed Jun 27 14:09:56 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Jun 28 11:34:53 2007 -0700" }, "message": "IOATDMA: fix section mismatches\n\nRename struct pci_driver data so that false section mismatch warnings won\u0027t\nbe produced.\n\nSam, ISTM that depending on variable names is the weakest \u0026 worst part of\nmodpost section checking. Should __init_refok work here? I got build\nerrors when I tried to use it, probably because the struct pci_driver probe\nand remove methods are not marked \"__init_refok\".\n\nWARNING: drivers/dma/ioatdma.o(.data+0x10): Section mismatch: reference to .init.text: (between \u0027ioat_pci_drv\u0027 and \u0027ioat_pci_tbl\u0027)\nWARNING: drivers/dma/ioatdma.o(.data+0x14): Section mismatch: reference to .exit.text: (between \u0027ioat_pci_drv\u0027 and \u0027ioat_pci_tbl\u0027)\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nAcked-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nCc: Sam Ravnborg \u003csam@ravnborg.org\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "9556fb73edfc37410cab3b47ae5e94bcecd8edf2", "tree": "dbe5fed3ab9f58f8ab804cb3f243b9259867cf3f", "parents": [ "e25df1205f37c7bff3ab14fdfc8a5249f3c69c82" ], "author": { "name": "Martin Schwidefsky", "email": "schwidefsky@de.ibm.com", "time": "Thu May 10 15:45:58 2007 +0200" }, "committer": { "name": "Martin Schwidefsky", "email": "schwidefsky@de.ibm.com", "time": "Thu May 10 15:46:07 2007 +0200" }, "message": "[S390] Kconfig: unwanted menus for s390.\n\nDisable some more menus in the configuration files that are of no\ninterest to a s390 machine.\n\nSigned-off-by: Martin Schwidefsky \u003cschwidefsky@de.ibm.com\u003e\n" }, { "commit": "765e3d8a71bbc1f3400667d5cfcfd7b03382d587", "tree": "0cf7dd6f707b10510d0c7343b5d4c198f093f725", "parents": [ "bed31ed9e1cd71d98ff0bc9212100adee523a10a" ], "author": { "name": "David Brownell", "email": "david-b@pacbell.net", "time": "Fri Mar 16 13:38:05 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Fri Mar 16 19:25:03 2007 -0700" }, "message": "[PATCH] rm pointless dmaengine exports\n\nThis removes several pointless exports from drivers/dma/dmaengine.c; the\ndma_async_memcpy_*() functions are inlined by \u003clinux/dmaengine.h\u003e so those\nexports are inappropriate.\n\nIt also moves the existing EXPORT_SYMBOL declarations next to their functions,\nso it\u0027s now trivial to confirm one-to-one correspondence between exports and\nnonstatic symbols.\n\nSigned-off-by: David Brownell \u003cdbrownell@users.sourceforge.net\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "e94b1766097d53e6f3ccfb36c8baa562ffeda3fc", "tree": "93fa0a8ab84976d4e89c50768ca8b8878d642a0d", "parents": [ "54e6ecb23951b195d02433a741c7f7cb0b796c78" ], "author": { "name": "Christoph Lameter", "email": "clameter@sgi.com", "time": "Wed Dec 06 20:33:17 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:24 2006 -0800" }, "message": "[PATCH] slab: remove SLAB_KERNEL\n\nSLAB_KERNEL is an alias of GFP_KERNEL.\n\nSigned-off-by: Christoph Lameter \u003cclameter@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "47b16539e1072afd2c964b97be4a95b5cf2ff801", "tree": "6acd1d1a667f5b724cdc5c95f0bbed2639a24b55", "parents": [ "c714de5dcf41cee869c4a74e8783c6d9be459ef6" ], "author": { "name": "Al Viro", "email": "viro@ftp.linux.org.uk", "time": "Tue Oct 10 22:45:47 2006 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Oct 10 15:37:21 2006 -0700" }, "message": "[PATCH] drivers/dma trivial annotations\n\nSigned-off-by: Al Viro \u003cviro@zeniv.linux.org.uk\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "7d12e780e003f93433d49ce78cfedf4b4c52adc5", "tree": "6748550400445c11a306b132009f3001e3525df8", "parents": [ "da482792a6d1a3fbaaa25fae867b343fb4db3246" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Thu Oct 05 14:55:46 2006 +0100" }, "committer": { "name": "David Howells", "email": "dhowells@warthog.cambridge.redhat.com", "time": "Thu Oct 05 15:10:12 2006 +0100" }, "message": "IRQ: Maintain regs pointer globally rather than passing to IRQ handlers\n\nMaintain a per-CPU global \"struct pt_regs *\" variable which can be used instead\nof passing regs around manually through all ~1800 interrupt handlers in the\nLinux kernel.\n\nThe regs pointer is used in few places, but it potentially costs both stack\nspace and code to pass it around. On the FRV arch, removing the regs parameter\nfrom all the genirq function results in a 20% speed up of the IRQ exit path\n(ie: from leaving timer_interrupt() to leaving do_IRQ()).\n\nWhere appropriate, an arch may override the generic storage facility and do\nsomething different with the variable. On FRV, for instance, the address is\nmaintained in GR28 at all times inside the kernel as part of general exception\nhandling.\n\nHaving looked over the code, it appears that the parameter may be handed down\nthrough up to twenty or so layers of functions. Consider a USB character\ndevice attached to a USB hub, attached to a USB controller that posts its\ninterrupts through a cascaded auxiliary interrupt controller. A character\ndevice driver may want to pass regs to the sysrq handler through the input\nlayer which adds another few layers of parameter passing.\n\nI\u0027ve build this code with allyesconfig for x86_64 and i386. I\u0027ve runtested the\nmain part of the code on FRV and i386, though I can\u0027t test most of the drivers.\nI\u0027ve also done partial conversion for powerpc and MIPS - these at least compile\nwith minimal configurations.\n\nThis will affect all archs. Mostly the changes should be relatively easy.\nTake do_IRQ(), store the regs pointer at the beginning, saving the old one:\n\n\tstruct pt_regs *old_regs \u003d set_irq_regs(regs);\n\nAnd put the old one back at the end:\n\n\tset_irq_regs(old_regs);\n\nDon\u0027t pass regs through to generic_handle_irq() or __do_IRQ().\n\nIn timer_interrupt(), this sort of change will be necessary:\n\n\t-\tupdate_process_times(user_mode(regs));\n\t-\tprofile_tick(CPU_PROFILING, regs);\n\t+\tupdate_process_times(user_mode(get_irq_regs()));\n\t+\tprofile_tick(CPU_PROFILING);\n\nI\u0027d like to move update_process_times()\u0027s use of get_irq_regs() into itself,\nexcept that i386, alone of the archs, uses something other than user_mode().\n\nSome notes on the interrupt handling in the drivers:\n\n (*) input_dev() is now gone entirely. The regs pointer is no longer stored in\n the input_dev struct.\n\n (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does\n something different depending on whether it\u0027s been supplied with a regs\n pointer or not.\n\n (*) Various IRQ handler function pointers have been moved to type\n irq_handler_t.\n\nSigned-Off-By: David Howells \u003cdhowells@redhat.com\u003e\n(cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)\n" }, { "commit": "b82631581372dc00b3507cedc3ad47af29efe962", "tree": "b8bcf35b3c7e9efe755da4e2bad38b7a6384e082", "parents": [ "64d2f0855e50a7185546ee1fbc03c2badc31330f" ], "author": { "name": "Henrik Kretzschmar", "email": "henne@nachtwindheim.de", "time": "Fri Jul 21 14:50:13 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Jul 21 14:50:13 2006 -0700" }, "message": "[I/OAT]: Remove pci_module_init() from Intel I/OAT DMA engine\n\nChanges pci_module_init() to pci_register_driver().\n\nSigned-off-by: Henrik Kretzschmar \u003chenne@nachtwindheim.de\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6508871eddbbd3e62799f3b6182a6a4fd3ef31d5", "tree": "f8d5275b81e827326d8638b0286abd6bf19cd95c", "parents": [ "fe4ada2d6f0b746246e9b5bf0f4f2e4d3a07d26e" ], "author": { "name": "Randy Dunlap", "email": "rdunlap@xenotime.net", "time": "Mon Jul 03 19:45:31 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 03 19:45:31 2006 -0700" }, "message": "[IOAT]: fix kernel-doc in source files\n\nFix kernel-doc warnings in drivers/dma/:\n- use correct function \u0026 parameter names\n- add descriptions where omitted\n\nSigned-off-by: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "518d1c9679f644811adaa22d853f43a83fbdae84", "tree": "52705bc452ee453eb16127b1f9063e0f012481e6", "parents": [ "56e0873b7b146564a0c36e225624f5a9b2d63791" ], "author": { "name": "Benoit Boissinot", "email": "benoit.boissinot@ens-lyon.org", "time": "Mon Jul 03 19:28:13 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 03 19:28:13 2006 -0700" }, "message": "[IOAT]: Fix a warning in ioatdma\n\ndrivers/dma/ioatdma.c: In function \u0027ioat_init_module\u0027:\ndrivers/dma/ioatdma.c:830: warning: control reaches end of non-void function\n\nSigned-off-by: Benoit Boissinot \u003cbenoit.boissinot@ens-lyon.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "56e0873b7b146564a0c36e225624f5a9b2d63791", "tree": "6a7049712cf02a7e6e5b85277e4dd56e41aeea1e", "parents": [ "882d02d6fb040a246b005305ffeb790bb5ce80ad" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Mon Jul 03 19:27:20 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 03 19:27:20 2006 -0700" }, "message": "[IOAT]: drivers/dma/iovlock.c: make num_pages_spanned() static\n\nThis patch makes the needlessly global num_pages_spanned() static.\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c1b4df5d2a5b1a9c037fe3b2e42804cf1267c750", "tree": "2e21f21d25c4c5dc315b230d9dbe792799eca4be", "parents": [ "912b2539e1e062cec73e2e61448e507f7719bd08" ], "author": { "name": "Randy Dunlap", "email": "rdunlap@xenotime.net", "time": "Mon Jul 03 19:24:19 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 03 19:24:19 2006 -0700" }, "message": "[IOAT]: fix sparse ulong warning\n\nFix sparse warning:\ndrivers/dma/ioatdma.c:444:32: warning: constant 0xFFFFFFFFFFFFFFC0 is so big it is unsigned long\n\nAlso needs a MAINTAINERS entry.\n\nSigned-off-by: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "dace145374b8e39aeb920304c358ab5e220341ab", "tree": "e37c76578468f489ce2dbec4d04400380c14ee14", "parents": [ "8076fe32a7db9a6628589ffa372808e4ba25d222" ], "author": { "name": "Thomas Gleixner", "email": "tglx@linutronix.de", "time": "Sat Jul 01 19:29:38 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Jul 02 13:58:50 2006 -0700" }, "message": "[PATCH] irq-flags: misc drivers: Use the new IRQF_ constants\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "8070b2b1ecbeb5437c92c33b4dcea1d8d80399ee", "tree": "03e4cc4b1ed8c9905ed8742ea1f88c38b9638cfa", "parents": [ "52383678a8ac80e6679f94f60c897f9292e0e8b9" ], "author": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Jun 26 00:10:46 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Mon Jun 26 00:10:46 2006 -0700" }, "message": "[IOAT]: Do not dereference THIS_MODULE directly to set unsafe.\n\nUse the __unsafe() macro instead.\n\nNoticed by Miles Lane.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "17f3ae08b6e7fd778371f2cafbd1c988a67ee343", "tree": "9e33f603469628d9bbe679bede945d61e7417dbf", "parents": [ "1a2449a87bb7606113b1aa1a9d3c3e78ef189a1c" ], "author": { "name": "Andrew Morton", "email": "akpm@osdl.org", "time": "Thu May 25 13:26:53 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Jun 17 21:25:58 2006 -0700" }, "message": "[I/OAT]: Do not use for_each_cpu().\n\nfor_each_cpu() is going away (and is gone in -mm).\n\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "de5506e155276d385712c2aa1c2d9a27cd4ed947", "tree": "219c30dab27b9aef2597d8735dfc19db8454849e", "parents": [ "db21733488f84a596faaad0d05430b3f51804692" ], "author": { "name": "Chris Leech", "email": "christopher.leech@intel.com", "time": "Tue May 23 17:50:37 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Jun 17 21:25:46 2006 -0700" }, "message": "[I/OAT]: Utility functions for offloading sk_buff to iovec copies\n\nProvides for pinning user space pages in memory, copying to iovecs,\nand copying from sk_buffs including fragmented and chained sk_buffs.\n\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "db21733488f84a596faaad0d05430b3f51804692", "tree": "a2c1f6d39ce27d2e86b395f2bf536c1ab7396411", "parents": [ "57c651f74cd8383df10a648e677902849de1bc0b" ], "author": { "name": "Chris Leech", "email": "christopher.leech@intel.com", "time": "Sat Jun 17 21:24:58 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Jun 17 21:24:58 2006 -0700" }, "message": "[I/OAT]: Setup the networking subsystem as a DMA client\n\nAttempts to allocate per-CPU DMA channels\n\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "57c651f74cd8383df10a648e677902849de1bc0b", "tree": "caf432ce2828b25e17cea3cff523e481c740c65e", "parents": [ "6b00c92c4b26428cd80e966380c07103556f7b14" ], "author": { "name": "David S. Miller", "email": "davem@sunset.sfo1.dsl.speakeasy.net", "time": "Tue May 23 17:39:49 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Jun 17 21:18:50 2006 -0700" }, "message": "[I/OAT]: Move PCI_DEVICE_ID_INTEL_IOAT to linux/pci_ids.h\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "6b00c92c4b26428cd80e966380c07103556f7b14", "tree": "ffaa433a8a0f64285e2365084cf83b329f2070cb", "parents": [ "0bbd5f4e97ff9c057b385a1886b4aed1fb0300f1" ], "author": { "name": "David S. Miller", "email": "davem@sunset.sfo1.dsl.speakeasy.net", "time": "Tue May 23 17:37:58 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Jun 17 21:18:48 2006 -0700" }, "message": "[I/OAT]: ioatdma.c needs linux/dma-mapping.h\n\nFor DMA_*_MASK defines.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "0bbd5f4e97ff9c057b385a1886b4aed1fb0300f1", "tree": "0c3d8528c31e8291fb78c2e7a287910987ed2888", "parents": [ "c13c8260da3155f2cefb63b0d1b7dcdcb405c644" ], "author": { "name": "Chris Leech", "email": "christopher.leech@intel.com", "time": "Tue May 23 17:35:34 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Jun 17 21:18:46 2006 -0700" }, "message": "[I/OAT]: Driver for the Intel(R) I/OAT DMA engine\n\nAdds a new ioatdma driver\n\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c13c8260da3155f2cefb63b0d1b7dcdcb405c644", "tree": "ecfe02fa44a423a948f5fb5ad76497da2bb7a402", "parents": [ "427abfa28afedffadfca9dd8b067eb6d36bac53f" ], "author": { "name": "Chris Leech", "email": "christopher.leech@intel.com", "time": "Tue May 23 17:18:44 2006 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@sunset.davemloft.net", "time": "Sat Jun 17 21:18:43 2006 -0700" }, "message": "[I/OAT]: DMA memcpy subsystem\n\nProvides an API for offloading memory copies to DMA devices\n\nSigned-off-by: Chris Leech \u003cchristopher.leech@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" } ] }