)]}'
{
  "log": [
    {
      "commit": "1c7d1bcad218808a4f67a4492a5e1d920e85c239",
      "tree": "c38074ceba9a32fd42a815b459205cc0ed715923",
      "parents": [
        "04e2ea67069e285404192a35c24dfe7c53b9c61f"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Wed Sep 03 16:58:35 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 16 16:53:05 2008 +0200"
      },
      "message": "dmar: fix dmar_parse_dev() devices_cnt error condition check\n\nIt is possible that,\ninstead of PCI endpoint/sub-hierarchy structures, only IO-APIC/HPET\ndevices may be reported under device scope structures. Fix the devices_cnt\nerror check, which cares about only PCI structures and removes the\ndma-remapping unit structure (dmaru) when the devices_cnt is zero\nand include_all flag is not set.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nAcked-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "04e2ea67069e285404192a35c24dfe7c53b9c61f",
      "tree": "38386a8889d61b64d595172b52de96d9f501cc89",
      "parents": [
        "74d04bd7dcb4c6130fd8a314d28bfecc9ae7c360"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Wed Sep 03 16:58:34 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 16 16:53:05 2008 +0200"
      },
      "message": "dmar: use list_for_each_entry_safe() in dmar_dev_scope_init()\n\nIn dmar_dev_scope_init(), functions called under for_each_drhd_unit()/\nfor_each_rmrr_units() can delete the list entry under some error conditions.\n\nSo we should use list_for_each_entry_safe() for safe traversal.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nAcked-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "74d04bd7dcb4c6130fd8a314d28bfecc9ae7c360",
      "tree": "90efec3fc887afb79ec86ea7b7a190244579d1b6",
      "parents": [
        "f6dd5c3106fb283e37d915eeb33019ef40510f85"
      ],
      "author": {
        "name": "Yinghai Lu",
        "email": "yhlu.kernel@gmail.com",
        "time": "Wed Sep 03 16:58:33 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 16 16:53:05 2008 +0200"
      },
      "message": "dmar: initialize the return value in dmar_parse_dev()\n\ninitialize the return value in dmar_parse_dev()\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "f6dd5c3106fb283e37d915eeb33019ef40510f85",
      "tree": "61d95e10b63847c8dfdc13e40e7e3291427d3123",
      "parents": [
        "a11b5abef50722e42a7d13f6b799c4f606fcb797"
      ],
      "author": {
        "name": "Yinghai Lu",
        "email": "yhlu.kernel@gmail.com",
        "time": "Wed Sep 03 16:58:32 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Oct 16 16:53:04 2008 +0200"
      },
      "message": "dmar: fix using early fixmap mapping for DMAR table parsing\n\nVery early detection of the DMAR tables will setup fixmap mapping. For\nparsing these tables later (while enabling dma and/or interrupt remapping),\nearly fixmap mapping shouldn\u0027t be used. Fix it by calling table detection\nroutines again, which will call generic apci_get_table() for setting up\nthe correct mapping.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "1cb11583a6c4ceda7426eb36f7bf0419da8dfbc2",
      "tree": "ee13b5125001f49fc162719cf5412f87707df54a",
      "parents": [
        "32e1d0a0651004f5fe47f85a2a5c725ad579a90c"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:51 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:45:00 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: disable DMA-remapping if Interrupt-remapping is detected (temporary quirk)\n\nInterrupt-remapping enables queued invalidation. And once queued invalidation\nis enabled, IOTLB invalidation also needs to use the queued invalidation\nmechanism and the register based IOTLB invalidation doesn\u0027t work.\n\nFor now, Support for IOTLB invalidation using queued invalidation is\nmissing. Meanwhile, disable DMA-remapping, if Interrupt-remapping\nsupport is detected.\n\nFor the meanwhile, if someone wants to really enable DMA-remapping, they\ncan use nox2apic, which will disable interrupt-remapping and as such\ndoesn\u0027t enable queued invalidation.\n\nAnd given that none of the release platforms support intr-remapping yet,\nwe should be ok for this temporary hack.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "2ae21010694e56461a63bfc80e960090ce0a5ed9",
      "tree": "d4ecdb710c4361df473b063eda9e1426fcf5c309",
      "parents": [
        "fe962e90cb17a8426e144dee970e77ed789d98ee"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:43 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:53 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: Interrupt remapping infrastructure\n\nInterrupt remapping (part of Intel Virtualization Tech for directed I/O)\ninfrastructure.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "fe962e90cb17a8426e144dee970e77ed789d98ee",
      "tree": "c7b3343df9bf58e047333758a89c78f6615fb97b",
      "parents": [
        "cf1337f0447e5be8e66daa944f0ea3bcac2b6179"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:42 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:52 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: Queued invalidation infrastructure (part of VT-d)\n\nQueued invalidation (part of Intel Virtualization Technology for\nDirected I/O architecture) infrastructure.\n\nThis will be used for invalidating the interrupt entry cache in the\ncase of Interrupt-remapping and IOTLB invalidation in the case\nof DMA-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "ad3ad3f6a2caebf56869b83b69e23eb9fa5e0ab6",
      "tree": "7bc99dde6a6313eb43783086a33f6eebc1da1907",
      "parents": [
        "2d6b5f85bb4ca919d8ab0f30311309b53fb93bc3"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:40 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:50 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: parse ioapic scope under vt-d structures\n\nParse the vt-d device scope structures to find the mapping between IO-APICs\nand the interrupt remapping hardware units.\n\nThis will be used later for enabling Interrupt-remapping for IOAPIC devices.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "2d6b5f85bb4ca919d8ab0f30311309b53fb93bc3",
      "tree": "518ea92478e5d39a41db9dc89d78976fec7254f2",
      "parents": [
        "aaa9d1dd63bf89b62f4ea9f46de376ab1a3fbc6c"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:39 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:50 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: Fix the need for RMRR in the DMA-remapping detection\n\nPresence of RMRR structures is not compulsory for enabling DMA-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Yong Y Wang \u003cyong.y.wang@intel.com\u003e\nCc: Yong Y Wang \u003cyong.y.wang@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "aaa9d1dd63bf89b62f4ea9f46de376ab1a3fbc6c",
      "tree": "918c5fc937ea45f26660742a0a9a0d6c22df68f1",
      "parents": [
        "1886e8a90a580f3ad343f2065c84c1b9e1dac9ef"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:38 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:49 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: use CONFIG_DMAR for DMA-remapping specific code\n\nDMA remapping specific code covered with CONFIG_DMAR in\nthe generic code which will also be used later for enabling Interrupt-remapping.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "1886e8a90a580f3ad343f2065c84c1b9e1dac9ef",
      "tree": "1f0a6b536a1bb7b24585973e70ad8e1a9a076f09",
      "parents": [
        "c42d9f32443397aed2d37d37df161392e6a5862f"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:37 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:48 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: code re-structuring, to be used by both DMA and Interrupt remapping\n\nAllocate the iommu during the parse of DMA remapping hardware\ndefinition structures. And also, introduce routines for device\nscope initialization which will be explicitly called during\ndma-remapping initialization.\n\nThese will be used for enabling interrupt remapping separately from the\nexisting DMA-remapping enabling sequence.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "c42d9f32443397aed2d37d37df161392e6a5862f",
      "tree": "564126849bb2e31d2cfb719c3b03457a597733d2",
      "parents": [
        "e61d98d8dad0048619bb138b0ff996422ffae53b"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:36 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:47 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus\n\nClean up the intel-iommu code related to deferred iommu flush logic. There is\nno need to allocate all the iommu\u0027s as a sequential array.\n\nThis will be used later in the interrupt-remapping patch series to\nallocate iommu much early and individually for each device remapping\nhardware unit.\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "e61d98d8dad0048619bb138b0ff996422ffae53b",
      "tree": "f31fe1610a082e0e12605db879ff56546ad971e5",
      "parents": [
        "1ba89386db0a3f39590b90b5dd20d7149ae52de0"
      ],
      "author": {
        "name": "Suresh Siddha",
        "email": "suresh.b.siddha@intel.com",
        "time": "Thu Jul 10 11:16:35 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Sat Jul 12 08:44:46 2008 +0200"
      },
      "message": "x64, x2apic/intr-remap: Intel vt-d, IOMMU code reorganization\n\ncode reorganization of the generic Intel vt-d parsing related routines and linux\niommu routines specific to Intel vt-d.\n\ndrivers/pci/dmar.c\tnow contains the generic vt-d parsing related routines\ndrivers/pci/intel_iommu.c contains the iommu routines specific to vt-d\n\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: akpm@linux-foundation.org\nCc: arjan@linux.intel.com\nCc: andi@firstfloor.org\nCc: ebiederm@xmission.com\nCc: jbarnes@virtuousgeek.org\nCc: steiner@sgi.com\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "98bcef56cadb4da138e2c1a2a0790f372382b236",
      "tree": "a33c72c26d6075e3bab1c27791ccbabac7ebd0af",
      "parents": [
        "eaeb16883bd6aa2d6b6b61b825c0d2b0dc793f60"
      ],
      "author": {
        "name": "mark gross",
        "email": "mgross@linux.intel.com",
        "time": "Sat Feb 23 15:23:35 2008 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Sat Feb 23 17:12:14 2008 -0800"
      },
      "message": "copyright owner and author clean up for intel iommu and related files\n\nThe following is a clean up and correction of the copyright holding\nentities for the files associated with the intel iommu code.\n\nSigned-off-by: \u003cmgross@linux.intel.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "f661197e0a95ec7305e1e790d95b72a74a1c4a0f",
      "tree": "a6916d877a3d9db9bc658758bd347d4f436f6d59",
      "parents": [
        "b1ed88b47f5e18c6efb8041275c16eeead5377df"
      ],
      "author": {
        "name": "David Miller",
        "email": "davem@davemloft.net",
        "time": "Wed Feb 06 01:36:23 2008 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Wed Feb 06 10:41:01 2008 -0800"
      },
      "message": "Genericizing iova.[ch]\n\nI would like to potentially move the sparc64 IOMMU code over to using\nthe nice new drivers/pci/iova.[ch] code for free area management..\n\nIn order to do that we have to detach the IOMMU page size assumptions\nwhich only really need to exist in the intel-iommu.[ch] code.\n\nThis patch attempts to implement that.\n\n[akpm@linux-foundation.org: build fix]\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    },
    {
      "commit": "093f87d279669c74e84530e925e4735c9aae8898",
      "tree": "b388fed2eaedde4ad103d706666c84e5799dbe04",
      "parents": [
        "652c538eb5bc3fa04bc5f27db9014f0168aefe97"
      ],
      "author": {
        "name": "Fenghua Yu",
        "email": "fenghua.yu@intel.com",
        "time": "Wed Nov 21 15:07:14 2007 -0800"
      },
      "committer": {
        "name": "Greg Kroah-Hartman",
        "email": "gregkh@suse.de",
        "time": "Fri Feb 01 15:04:21 2008 -0800"
      },
      "message": "PCI: More Sanity checks for DMAR\n\nAdd and changes a few sanity checks in dmar.c.\n\n1.  The haw field in ACPI DMAR table in VT-d spec doesn\u0027t describe the\n   range of haw.  But since DMA page size is 4KB in DMA remapping, haw\n   should be at least 4KB.  The current VT-d code in dmar.c returns failure\n   when haw\u003d\u003d0.  This sanity check is not accurate and execution can pass\n   when haw is less than one page size 4KB.  This patch changes the haw\n   sanity check to validate if haw is less than 4KB.\n\n2. Add dmar_rmrr_units verification.\n\n3. Add parse_dmar_table() verification.\n\n[akpm@linux-foundation.org: coding-style fixes]\n\nSigned-off-by: Fenghua Yu \u003cfenghua.yu@intel.com\u003e\nAcked-by: mark gross \u003cmgross@linux.intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n"
    },
    {
      "commit": "10e5247f40f3bf7508a0ed2848c9cae37bddf4bc",
      "tree": "adca606f00ebcbdbdc5c474f012105d7e59152f6",
      "parents": [
        "89910cccb8fec0c1140d33a743e72a712efd4f05"
      ],
      "author": {
        "name": "Keshavamurthy, Anil S",
        "email": "anil.s.keshavamurthy@intel.com",
        "time": "Sun Oct 21 16:41:41 2007 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@woody.linux-foundation.org",
        "time": "Mon Oct 22 08:13:18 2007 -0700"
      },
      "message": "Intel IOMMU: DMAR detection and parsing logic\n\nThis patch supports the upcomming Intel IOMMU hardware a.k.a.  Intel(R)\nVirtualization Technology for Directed I/O Architecture and the hardware spec\nfor the same can be found here\nhttp://www.intel.com/technology/virtualization/index.htm\n\nFAQ! (questions from akpm, answers from ak)\n\n\u003e So...  what\u0027s all this code for?\n\u003e\n\u003e I assume that the intent here is to speed things up under Xen, etc?\n\nYes in some cases, but not this code.  That would be the Xen version of this\ncode that could potentially assign whole devices to guests.  I expect this to\nbe only useful in some special cases though because most hardware is not\nvirtualizable and you typically want an own instance for each guest.\n\nOk at some point KVM might implement this too; i likely would use this code\nfor this.\n\n\u003e Do we\n\u003e have any benchmark results to help us to decide whether a merge would be\n\u003e justified?\n\nThe main advantage for doing it in the normal kernel is not performance, but\nmore safety.  Broken devices won\u0027t be able to corrupt memory by doing random\nDMA.\n\nUnfortunately that doesn\u0027t work for graphics yet, for that need user space\ninterfaces for the X server are needed.\n\nThere are some potential performance benefits too:\n\n- When you have a device that cannot address the complete address range an\n  IOMMU can remap its memory instead of bounce buffering.  Remapping is likely\n  cheaper than copying.\n\n- The IOMMU can merge sg lists into a single virtual block.  This could\n  potentially speed up SG IO when the device is slow walking SG lists.  [I\n  long ago benchmarked 5% on some block benchmark with an old MPT Fusion; but\n  it probably depends a lot on the HBA]\n\nAnd you get better driver debugging because unexpected memory accesses from\nthe devices will cause a trappable event.\n\n\u003e\n\u003e Does it slow anything down?\n\nIt adds more overhead to each IO so yes.\n\nThis patch:\n\nAdd support for early detection and parsing of DMAR\u0027s (DMA Remapping) reported\nto OS via ACPI tables.\n\nDMA remapping(DMAR) devices support enables independent address translations\nfor Direct Memory Access(DMA) from Devices.  These DMA remapping devices are\nreported via ACPI tables and includes pci device scope covered by these DMA\nremapping device.\n\nFor detailed info on the specification of \"Intel(R) Virtualization Technology\nfor Directed I/O Architecture\" please see\nhttp://www.intel.com/technology/virtualization/index.htm\n\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nCc: \"Siddha, Suresh B\" \u003csuresh.b.siddha@intel.com\u003e\nCc: Arjan van de Ven \u003carjan@infradead.org\u003e\nCc: Ashok Raj \u003cashok.raj@intel.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Christoph Lameter \u003cclameter@sgi.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Len Brown \u003clenb@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n"
    }
  ]
}