)]}' { "log": [ { "commit": "abad2ec98f2ef357d62026cbc3989dabf33f2435", "tree": "a2ffd7c8dd29d67dac2e78f23e26125dc413cb06", "parents": [ "cb3952bf7853667a1cb3515e67f27e67f0fce9e8" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Aug 07 08:52:37 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Aug 07 08:52:37 2008 -0700" }, "message": "PCI: fully restore MSI state at resume time\n\nWith the recent change to avoid masking MSIs using the MSI enable bit, devices\nwithout an MSI mask bit will have their MSI capability always enabled when MSI\nis in use, so we need to restore it regardless of the mask bit state.\n\nFixes kernel bz 11178.\n\nAcked-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Alan Jenkins \u003calan-jenkins@tuffmail.co.uk\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "ce6fce4295ba727b36fdc73040e444bd1aae64cd", "tree": "7c8e4134b799d3d0ed56888bb8936e0071a05caf", "parents": [ "29111f579f4f3f2a07385f931854ab0527ae7ea5" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Fri Jul 25 15:42:58 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 28 14:43:22 2008 -0700" }, "message": "PCI MSI: Don\u0027t disable MSIs if the mask bit isn\u0027t supported\n\nDavid Vrabel has a device which generates an interrupt storm on the INTx\npin if we disable MSI interrupts altogether. Masking interrupts is only\na performance optimisation, so we can ignore the request to mask the\ninterrupt.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "80ccba1186d48fa728dc4b1456cc07ffb07da501", "tree": "b58826b8d0e42e2a41e5f5632bf95e52f9dfc676", "parents": [ "b86ec7ed2877f560ff069e8ed1b433a9005619c6" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri Jun 13 10:52:11 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jun 25 16:05:13 2008 -0700" }, "message": "PCI: use dev_printk when possible\n\nConvert printks to use dev_printk().\n\nI converted pr_debug() to dev_dbg(). Both use KERN_DEBUG and are enabled\nonly when DEBUG is defined.\n\nI converted printk(KERN_DEBUG) to dev_printk(KERN_DEBUG), not to dev_dbg(),\nbecause dev_dbg() is only enabled when DEBUG is defined.\n\nI converted DBG(KERN_INFO) (only in setup-bus.c) to dev_info(). The DBG()\nname makes it sound like debug, but it\u0027s been enabled forever, so dev_info()\npreserves the previous behavior.\n\nI tried to make the resource assignment formats more consistent, e.g.,\n \"BAR %d: got res [%#llx-%#llx] bus [%#llx-%#llx] flags %#lx\\n\"\ninstead of sometimes using \"start-end\" and sometimes using \"size@start\".\nI\u0027m not attached to one or the other; I\u0027d just like them consistent.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5ca5c02f0e81c094c19d30dc0d13be4e929a994a", "tree": "b014b51148dc378ce15c0daf81c19f03139dc01c", "parents": [ "cf35e4ad57b4c39a4c74921e20e48ec0dbeb14f4" ], "author": { "name": "Hidetoshi Seto", "email": "seto.hidetoshi@jp.fujitsu.com", "time": "Mon May 19 13:48:17 2008 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 10 10:59:49 2008 -0700" }, "message": "PCI/MSI: skip calling pci_find_capability from msi_set_mask_bits\n\nThe position of MSI capability is already cached in the msi_desc when\nwe enter the msi_set_mask_bits(). Use it instead.\n\nSigned-off-by: Hidetoshi Seto \u003cseto.hidetoshi@jp.fujitsu.com\u003e\nAcked-by: Arnaldo Carvalho de Melo \u003cacme@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "d52877c7b1afb8c37ebe17e2005040b79cb618b0", "tree": "b5cc4252cad0d7f22a6b63e50d1ec46a9a495773", "parents": [ "8e149e09f91098fd72bf9ac5b4a77a693abf721e" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel.send@gmail.com", "time": "Wed Apr 23 14:58:09 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Tue Apr 29 09:12:51 2008 -0700" }, "message": "pci/irq: let pci_device_shutdown to call pci_msi_shutdown v2\n\n[PATCH 2/2] pci/irq: let pci_device_shutdown to call pci_msi_shutdown v2\n\nthis change\n\n| commit 23a274c8a5adafc74a66f16988776fc7dd6f6e51\n| Author: Prakash, Sathya \u003csathya.prakash@lsi.com\u003e\n| Date: Fri Mar 7 15:53:21 2008 +0530\n|\n| [SCSI] mpt fusion: Enable MSI by default for SAS controllers\n|\n| This patch modifies the driver to enable MSI by default for all SAS chips.\n|\n| Signed-off-by: Sathya Prakash \u003csathya.prakash@lsi.com\u003e\n| Signed-off-by: James Bottomley \u003cJames.Bottomley@HansenPartnership.com\u003e\n|\nCauses the kexec of a RHEL 5.1 kernel to fail.\n\nroot casue: the rhel 5.1 kernel still uses INTx emulation. and\nmptscsih_shutdown doesn\u0027t call pci_disable_msi to reenable INTx on kexec path\n\nSo call pci_msi_shutdown in the shutdown path to do the same thing to msix\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@hobbes.lan\u003e\n" }, { "commit": "8e149e09f91098fd72bf9ac5b4a77a693abf721e", "tree": "e0aae800a75a478820494ddce42291f896014012", "parents": [ "2768f92c06a59c3ebf17a6b86002c3f33ab61a28" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel.send@gmail.com", "time": "Wed Apr 23 14:56:30 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@hobbes.lan", "time": "Tue Apr 29 09:11:12 2008 -0700" }, "message": "pci/irq: restore mask_bits in msi shutdown -v3\n\n[PATCH 1/2] pci/irq: restore mask_bits in msi shutdown -v3\n\nYinghai found that kexec\u0027ing a RHEL 5.1 kernel with 2.6.25-rc3+ kernels\nprevents his NIC from working. He bisected to\n\n| commit 89d694b9dbe769ca1004e01db0ca43964806a611\n| Author: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n| Date: Mon Feb 18 18:25:17 2008 +0100\n|\n| genirq: do not leave interupts enabled on free_irq\n|\n| The default_disable() function was changed in commit:\n|\n| 76d2160147f43f982dfe881404cfde9fd0a9da21\n| genirq: do not mask interrupts by default\n|\n\nFor MSI, default_shutdown will call mask_bit for msi device. All mask bits\nwill left disabled after free_irq. Then in the kexec case, the next kernel\ncan only use msi_enable bit, so all device\u0027s MSI can not be used.\n\nSo lets to restore the mask bit to its pci reset defined value (enabled) when\nwe disable the kernels use of msi to be a little friendlier to kexec\u0027d kernels.\n\nExtend msi_set_mask_bit to msi_set_mask_bits to take mask, so we can fully\nrestore that to 0x00 instead of 0xfe.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@hobbes.lan\u003e\n" }, { "commit": "6a9e7f203187e22e96588fa0156b2652841196bf", "tree": "2120eb0ffca8e425fec61b99a85dfd2c76c764e3", "parents": [ "6bae1d96c6d7dde078994f6cb98235fd46f8736b" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Tue Dec 11 23:19:41 2007 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:25 2008 -0800" }, "message": "PCI: drivers/pci/msi.c: move arch hooks to the top\n\nThis patch fixes the following problem present with older gcc versions:\n\n\u003c-- snip --\u003e\n\n...\n CC drivers/pci/msi.o\n/home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:692: warning: weak declaration of `arch_msi_check_device\u0027 after first use results in unspecified behavior\n/home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:704: warning: weak declaration of `arch_setup_msi_irqs\u0027 after first use results in unspecified behavior\n/home/bunk/linux/kernel-2.6/git/linux-2.6/drivers/pci/msi.c:724: warning: weak declaration of `arch_teardown_msi_irqs\u0027 after first use results in unspecified behavior\n...\n\n\u003c-- snip --\u003e\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "94688cf2454986309fbcd495233ba2423786a14a", "tree": "ac170991ef1db1127d59a0d7231a8cbb53b5474c", "parents": [ "1b7c9fcaa147662628078c83ecaf1ef2c5c9c9d0" ], "author": { "name": "Linas Vepstas", "email": "linas@austin.ibm.com", "time": "Wed Nov 07 15:43:59 2007 -0600" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:22 2008 -0800" }, "message": "PCI: export pci_restore_msi_state()\n\nPCI error recovery usually involves the PCI adapter being reset.\nIf the device is using MSI, the reset will cause the MSI state\nto be lost; the device driver needs to restore the MSI state.\n\nThe pci_restore_msi_state() routine is currently protected\nby CONFIG_PM; remove this, and also export the symbol, so\nthat it can be used in a modle.\n\nSigned-off-by: Linas Vepstas \u003clinas@austin.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "ba698ad4b7e466cbb4a8bde6b9da8080ab06808d", "tree": "31e0ebfbb91633da5f62e455d708328a0f9875ee", "parents": [ "1d84b5424efbcce69a1c955ba181147d23d43a14" ], "author": { "name": "David Miller", "email": "davem@davemloft.net", "time": "Thu Oct 25 01:16:30 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Nov 05 13:35:16 2007 -0800" }, "message": "PCI: Add quirk for devices which disable MSI when INTX_DISABLE is set.\n\nA reasonably common problem with some devices is that they will\ndisable MSI generation when the INTX_DISABLE bit is set in the\nPCI_COMMAND register.\n\nQuirk this explicitly, guarding the pci_intx() calls in msi.c with\nthis quirk indication.\n\nThe first entries for this quirk are for 5714 and 5780 Tigon3 chips,\nand thus we can remove the workaround code from the tg3.c driver.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nAcked-by: Michael Chan \u003cmchan@broadcom.com\u003e\nAcked-by: Jeff Garzik \u003cjgarzik@redhat.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "cbf5d9e6b9bcf03291cbb51db144b3e2773a8a2d", "tree": "494d61012a0d5f23f2af9be72a2e17a1c7f344fc", "parents": [ "a56bc69a182f501582557af7fad5bc882b1c856c" ], "author": { "name": "Roland Dreier", "email": "roland@digitalvampire.org", "time": "Wed Oct 03 11:15:11 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Oct 12 15:03:17 2007 -0700" }, "message": "MSI: Use correct data offset for 32-bit MSI in read_msi_msg()\n\nWhile reading the MSI code trying to find a reason why MSI wouldn\u0027t\nwork for devices that have a 32-bit MSI address capability, I noticed\nthat read_msi_msg() seems to read the message data from the wrong\noffset in this case.\n\nSigned-off-by: Roland Dreier \u003croland@digitalvampire.org\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: stable \u003cstable@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "78b7611c4a1e3ff008abc4751b566cb533d68f3d", "tree": "569b5ae011f3c6a38406a95d3f8b8f61d358ab16", "parents": [ "0dd11f9be47188ce08543ef65e9ece9beb2027dc" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Fri Jun 01 00:46:33 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Fri Jun 01 08:18:27 2007 -0700" }, "message": "msi: mask the msix vector before we unmap it\n\nWith these two lines in the reverse order the drives/block/ccis.c was\noopsing in msi_free_irqs. Silly us calling writel on an area after\nwe unmap it.\n\nBUG: unable to handle kernel paging request at virtual address f8b2200c\n printing eip:\nc01e9cc7\n*pdpt \u003d 0000000000003001\n*pde \u003d 0000000037e48067\n*pte \u003d 0000000000000000\nOops: 0002 [#1]\nSMP\nModules linked in: cciss ipv6 parport_pc lp parport autofs4 i2c_dev i2c_core\nsunrpc loop dm_multipath button battery asus_acpi ac tg3 floppy sg dm_snapshot\ndm_zero dm_mirror ext3 jbd dm_mod ata_piix libata mptsas scsi_transport_sas\nmptspi scsi_transport_spi mptscsih mptbase sd_mod scsi_mod\nCPU: 1\nEIP: 0060:[\u003cc01e9cc7\u003e] Not tainted VLI\nEFLAGS: 00010286 (2.6.22-rc2-gd2579053 #1)\nEIP is at msi_free_irqs+0x81/0xbe\neax: f8b22000 ebx: f71f3180 ecx: f7fff280 edx: c1886eb8\nesi: f7c4e800 edi: f7c4ec48 ebp: 00000002 esp: f5a0dec8\nds: 007b es: 007b fs: 00d8 gs: 0033 ss: 0068\nProcess rmmod (pid: 5286, ti\u003df5a0d000 task\u003dc47d2550 task.ti\u003df5a0d000)\nStack: 00000002 f8b72294 00000400 f8b69ca7 f8b6bc6c 00000002 00000000 00000000\n 00000000 00000000 00000000 f5a997f4 f8b69d61 f7c5a4b0 f7c4e848 f7c4e848\n f7c4e800 f7c4e800 f8b72294 f7c4e848 f8b72294 c01e3cdf f7c4e848 c024c469\nCall Trace:\n [\u003cf8b69ca7\u003e] cciss_shutdown+0xae/0xc3 [cciss]\n [\u003cf8b69d61\u003e] cciss_remove_one+0xa5/0x178 [cciss]\n [\u003cc01e3cdf\u003e] pci_device_remove+0x16/0x35\n [\u003cc024c469\u003e] __device_release_driver+0x71/0x8e\n [\u003cc024c56e\u003e] driver_detach+0xa0/0xde\n [\u003cc024bc5c\u003e] bus_remove_driver+0x27/0x41\n [\u003cc01e3ef3\u003e] pci_unregister_driver+0xb/0x13\n [\u003cf8b6a343\u003e] cciss_cleanup+0xf/0x51 [cciss]\n [\u003cc0139ced\u003e] sys_delete_module+0x110/0x135\n [\u003cc0104c7a\u003e] sysenter_past_esp+0x5f/0x85\n\nHere\u0027s a patch that just reverses the 2 lines of code as Eric suggests. Please\nconsider this for inclusion.\n\nSigned-off-by: Mike Miller \u003cmike.miller@hp.com\u003e\nSigned-off-by: Chase Maupin \u003cchase.maupin@hp.com\u003e\nSigned-off-by: \"Eric W. Biederman\" \u003cebiederm@xmission.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "0dd11f9be47188ce08543ef65e9ece9beb2027dc", "tree": "28a76160faedd4a506e19c2debd1d0a022bf3dfe", "parents": [ "4eb527a0ca83de28e773371f42abad2ab1ed7fdf" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Fri Jun 01 00:46:32 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Fri Jun 01 08:18:27 2007 -0700" }, "message": "msi: fix the ordering of msix irqs\n\n\"Mike Miller (OS Dev)\" \u003cmikem@beardog.cca.cpqcorp.net\u003e writes:\n\nFound what seems the problem with our vectors being listed backward. In\ndrivers/pci/msi.c we should be using list_add_tail rather than list_add to\npreserve the ordering across various kernels. Please consider this for\ninclusion.\n\nSigned-off-by: \"Eric W. Biederman\" \u003cebiederm@xmission.com\u003e\nScrewed-up-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nCc: \"Mike Miller (OS Dev)\" \u003cmikem@beardog.cca.cpqcorp.net\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "4fdadebc313f46a750e9ffca9c68c35c587ced9f", "tree": "8765dca261f32041e081f9b1d543ad9f80e13d67", "parents": [ "54ca4123363f388ab724fc66da92b87dc05395c3" ], "author": { "name": "Dan Williams", "email": "dan.j.williams@intel.com", "time": "Thu Apr 26 18:21:38 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu May 31 16:56:36 2007 -0700" }, "message": "msi: fix ARM compile\n\nIn file included from drivers/pci/msi.c:22:\ninclude/asm/smp.h:17:26: asm/arch/smp.h: No such file or directory\ninclude/asm/smp.h:20:3: #error \"\u003casm-arm/smp.h\u003e included in non-SMP build\"\ninclude/asm/smp.h:23:1: warning: \"raw_smp_processor_id\" redefined\nIn file included from include/linux/sched.h:65,\n from include/linux/mm.h:4,\n from drivers/pci/msi.c:10:\ninclude/linux/smp.h:85:1: warning: this is the location of the previous\ndefinition\n\nTested on powerpc, i386, and x86_64.\n\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "b3b7cc7b4138f4171da5813b5ec2a14835e02482", "tree": "bbace1c3424507cc1e6008e7f21dc2eba1332b47", "parents": [ "0a3fd051c7036ef71b58863f8e5da7c3dabd9d3f" ], "author": { "name": "David Miller", "email": "davem@davemloft.net", "time": "Fri May 11 13:26:44 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Fri May 11 16:01:18 2007 -0700" }, "message": "Fix assertion failure with MSI on sparc64\n\nToday\u0027s find is a triggered assertion in msi_free_irqs() when the system\ndoesn\u0027t support MSI, in which case arch_setup_msi_irqs() always returns\nan error.\n\nThe problem is that when this happens we branch into msi_free_irqs(), to\nwhich you added the following assertion loop:\n\n\tlist_for_each_entry(entry, \u0026dev-\u003emsi_list, list)\n\t\tBUG_ON(irq_has_action(entry-\u003eirq));\n\nWell, if arch_setup_msi_irqs() fails, entry-\u003eirq will be zero and\nalthough that\u0027s never assigned to any normal devices we use that IRQ\nnumber for the timer interrupt on sparc64 so this assertion triggers.\n\nBetter to test for zero before doing the irq_has_action() assertion\nthing.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "e63340ae6b6205fef26b40a75673d1c9c0c8bb90", "tree": "8d3212705515edec73c3936bb9e23c71d34a7b41", "parents": [ "04c9167f91e309c9c4ea982992aa08e83b2eb42e" ], "author": { "name": "Randy Dunlap", "email": "randy.dunlap@oracle.com", "time": "Tue May 08 00:28:08 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue May 08 11:15:07 2007 -0700" }, "message": "header cleaning: don\u0027t include smp_lock.h when not used\n\nRemove includes of \u003clinux/smp_lock.h\u003e where it is not used/needed.\nSuggested by Al Viro.\n\nBuilds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc,\nsparc64, and arm (all 59 defconfigs).\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "032de8e2fe3c0eec5fb0ffe4d38aa602dad397dc", "tree": "b9ad28ab3642c2dfba8e059fc72bd8e86c667449", "parents": [ "9c8313343c83c0ca731ceb8d2a4ab1e022ed9c94" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Wed Apr 18 19:39:22 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:38 2007 -0700" }, "message": "MSI: Give archs the option to free all MSI/Xs at once.\n\nThis patch introduces an optional function, arch_teardown_msi_irqs(),\nwhich gives an arch the opportunity to do per-device teardown for\nMSI/X. If that\u0027s not required, the default version simply calls\narch_teardown_msi_irq() for each msi irq required.\n\narch_teardown_msi_irqs() is simply passed a pdev, attached to the pdev\nis a list of msi_descs, it is up to the arch to free the irq associated\nwith each of these as appropriate.\n\nFor archs that _don\u0027t_ implement arch_teardown_msi_irqs(), all msi_descs\nwith irq \u003d\u003d 0 are considered unallocated, and the arch teardown routine\nis not called on them.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "9c8313343c83c0ca731ceb8d2a4ab1e022ed9c94", "tree": "1e37ef3ebcdcb344adb74c1667ad04cf87010f5e", "parents": [ "7fe3730de729b758e9f69b862b9255d998671b5f" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Wed Apr 18 19:39:21 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:38 2007 -0700" }, "message": "MSI: Give archs the option to allocate all MSI/Xs at once.\n\nThis patch introduces an optional function, arch_setup_msi_irqs(),\n(note the plural) which gives an arch the opportunity to do per-device\nsetup for MSI/X and then allocate all the requested MSI/Xs at once.\n\nIf that\u0027s not required by the arch, the default version simply calls\narch_setup_msi_irq() for each MSI irq required.\n\narch_setup_msi_irqs() is passed a pdev, attached to the pdev is a list\nof msi_descs with irq \u003d\u003d 0, it is up to the arch to connect these up to\nan irq (via set_irq_msi()) or return an error. For convenience the number\nof vectors and the type are passed also.\n\nAll msi_descs with irq !\u003d 0 are considered allocated, and the arch\nteardown routine will be called on them when necessary.\n\nThe existing semantics of pci_enable_msix() are that if the requested\nnumber of irqs can not be allocated, the maximum number that _could_ be\nallocated is returned. To support that, we define that in case of an\nerror from arch_setup_msi_irqs(), the number of msi_descs with irq !\u003d 0\nare considered allocated, and are counted toward the \"max that could be\nallocated\".\n\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "7fe3730de729b758e9f69b862b9255d998671b5f", "tree": "2fc0cf3a003aaf6e8c257a32b748941e3eec93b2", "parents": [ "f282b97021ddc95c6092b9016f667c0963858fb1" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Wed Apr 18 19:39:21 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:38 2007 -0700" }, "message": "MSI: arch must connect the irq and the msi_desc\n\nset_irq_msi() currently connects an irq_desc to an msi_desc. The archs call\nit at some point in their setup routine, and then the generic code sets up the\nreverse mapping from the msi_desc back to the irq.\n\nset_irq_msi() should do both connections, making it the one and only call\nrequired to connect an irq with it\u0027s MSI desc and vice versa.\n\nThe arch code MUST call set_irq_msi(), and it must do so only once it\u0027s sure\nit\u0027s not going to fail the irq allocation.\n\nGiven that there\u0027s no need for the arch to return the irq anymore, the return\nvalue from the arch setup routine just becomes 0 for success and anything else\nfor failure.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "314e77b3eec57001eaff82b82920150175b74e09", "tree": "7446d5c9faaf4bf5dcde576961c68fbe1813c998", "parents": [ "4aa9bc955d61fdf03b5f9cee67db188fe1ffa8b7" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Apr 05 17:19:12 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:37 2007 -0700" }, "message": "MSI: Remove dev-\u003efirst_msi_irq\n\nNow that we keep a list of msi descriptors, we don\u0027t need first_msi_irq\nin the pci dev.\n\nIf we somehow have zero MSIs configured list_entry() will give us weird\noopes or nice memory corruption bugs. So be paranoid. Add BUG_ONs and also\na check in pci_msi_check_device() to make sure nvec \u003e 0.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "4aa9bc955d61fdf03b5f9cee67db188fe1ffa8b7", "tree": "bd0604f5d7308d63cafbb1e3134580e284d86a50", "parents": [ "bab41e9be75121c473b00df2ffa33af3c44066a7" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Apr 05 17:19:10 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:37 2007 -0700" }, "message": "MSI: Use a list instead of the custom link structure\n\nThe msi descriptors are linked together with what looks a lot like\na linked list, but isn\u0027t a struct list_head list. Make it one.\n\nThe only complication is that previously we walked a list of irqs, and\ngot the descriptor for each with get_irq_msi(). Now we have a list of\ndescriptors and need to get the irq out of it, so it needs to be in the\nactual struct msi_desc. We use 0 to indicate no irq is setup.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "c9953a73e92df11edd812d863ff741877ea9e58c", "tree": "27262efa28f6c05e26bfd87ef03af4a81fda3d22", "parents": [ "17bbc12acdb23ffb9613e12ca974fafd31bfcb56" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Apr 05 17:19:08 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:37 2007 -0700" }, "message": "MSI: Add an arch_msi_check_device()\n\nAdd an arch_check_device(), which gives archs a chance to check the input\nto pci_enable_msi/x. The arch might be interested in the value of nvec so\npass it in. Propagate the error value returned from the arch routine out\nto the caller.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "17bbc12acdb23ffb9613e12ca974fafd31bfcb56", "tree": "bbeb34a927703ba140ca7c7a10c8fc4e85f243bd", "parents": [ "128bc5fced238752d01b5169077f2ec624b3d59b" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Apr 05 17:19:07 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Rename pci_msi_supported() to pci_msi_check_device()\n\nAs pointed out by Eric, the name pci_msi_supported() suggests it should\nreturn a boolean value, however it doesn\u0027t. So update the name to be\na bit less confusing and update the doco too.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "128bc5fced238752d01b5169077f2ec624b3d59b", "tree": "fe3317718054dcfdd77139be80a24cb3b5c09833", "parents": [ "b1e2303dba021ee417c65a89e467a2b145ff9217" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:39 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Consolidate precondition checks\n\nConsolidate precondition checks into a single if statement.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "b1e2303dba021ee417c65a89e467a2b145ff9217", "tree": "2d13c436766be71a31c3209be46c9cade28028df", "parents": [ "3e916c0503a34ba32202a69df1cfeb82f2c5749d" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:39 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Expand pci_msi_supported()\n\npci_enable_msi() and pci_enable_msix() both search for the MSI/MSI-X\ncapability, we can fold this into pci_msi_supported() by passing the\ntype in.\n\nUpdate the code to match the comment for pci_msi_supported(). That is\nit returns 0 on success, and anything else indicates an error.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "3e916c0503a34ba32202a69df1cfeb82f2c5749d", "tree": "fdd52252ad06c4ae036ed19920908f003edcd4a7", "parents": [ "4cc086fa5b648dc3dcd56c963e42a212f2d9df29" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:36 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Remove msi_cache\n\nWe don\u0027t need a special cache just for msi descriptors. They\u0027re not\nparticularly large, under 100 bytes for sure, and don\u0027t seem to require any\nspecial alignment etc. On most systems there will be relatively few MSIs,\nand hence we waste most of a page on the cache. Better to just kzalloc the\nspace for the few we do need.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "4cc086fa5b648dc3dcd56c963e42a212f2d9df29", "tree": "5b4563f58981e236cbe6565a50d7260dbd818ea9", "parents": [ "7ede9c1fa50e01a8222217d4606bcbc44cd68f1a" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:34 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Move EXPORT_SYMBOL()s near their definition\n\nMove EXPORT_SYMBOL()s near their definition.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "7ede9c1fa50e01a8222217d4606bcbc44cd68f1a", "tree": "0884562e9952ebcdad81a27539a3a0046f716a7c", "parents": [ "fc4afc7b2bdd81e2dbded5a8222676d3161758d3" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:34 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Consolidate BUG_ON()s.\n\nWhen freeing MSIs and MSI-Xs, we BUG_ON() if the irq has not been\nfreed, ie. if it still has an action. We can consolidate all of these\nBUG_ON()s into msi_free_irqs() as all the code paths lead there almost\nimmediately anyway.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "fc4afc7b2bdd81e2dbded5a8222676d3161758d3", "tree": "f746cc18be366058a764e6cc3c3625efbfbb5765", "parents": [ "00ba16ab2658afe11d4fdcaf16a331292c44bee6" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:33 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Consolidate MSI-X irq freeing code\n\nFor the MSI-X case we do exactly the same logic in pci_disable_msix() and\nmsi_remove_pci_irq_vectors(), so consolidate them.\n\nmsi_remove_pci_irq_vectors() wasn\u0027t setting dev-\u003efirst_msi_irq to 0, but\nI think it should have been, so the consolidated version does.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "00ba16ab2658afe11d4fdcaf16a331292c44bee6", "tree": "763d31188d443026071ccce1a83918efc4bf830d", "parents": [ "c31af3987020eeb1facf64d702dcf39e6c7382e6" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:31 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Simplify BUG() handling in msi_remove_pci_irq_vectors() part 2\n\nAlthough it might be nice to do a printk before BUG\u0027ing, it\u0027s really not\nnecessary, and it complicates the code.\n\nThe behaviour has changed slightly, in that before we set a flag if the irq\nhad an action, and continued freeing the other irqs. But as I see it that\u0027s\nall irrelevant because we end up BUG\u0027ing anyway.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "c31af3987020eeb1facf64d702dcf39e6c7382e6", "tree": "46c23a5050a62f6cce517e6b2cb76bce258854cf", "parents": [ "54bc6c0b0edd164fc2ea85b3964736c182f6bd5d" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:31 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Simplify BUG() handling in msi_remove_pci_irq_vectors() part 1\n\nAlthough it might be nice to do a printk before BUG\u0027ing, it\u0027s really not\nnecessary, and it complicates the code.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "54bc6c0b0edd164fc2ea85b3964736c182f6bd5d", "tree": "958b49ca0af3c6616916bd99fa591e36fb3b7c8c", "parents": [ "e387b9eefe89a23245f2446f947529cce5d6db35" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:27 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:36 2007 -0700" }, "message": "MSI: Simplify BUG() handling in pci_disable_msix()\n\nAlthough it might be nice to do a printk before BUG\u0027ing, it\u0027s really not\nnecessary, and it complicates the code.\n\nThe behaviour has changed slightly, in that before we set a flag if the irq\nhad an action, and continued freeing the other irqs. But as I see it that\u0027s\nall irrelevant because we end up BUG\u0027ing anyway.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "e387b9eefe89a23245f2446f947529cce5d6db35", "tree": "cfa287874b4295f41b2d72aff2f0c227794723ef", "parents": [ "54eee4c5bf553ad54ba200d00487b61eb6b155f6" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Mar 22 21:51:27 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:35 2007 -0700" }, "message": "MSI: Simplify BUG() handling in pci_disable_msi()\n\nAlthough it might be nice to do a printk before BUG\u0027ing, it\u0027s really not\nnecessary, and it complicates the code.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nAcked-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "988cbb15e00e6f924d052874b40c6a5447f9fdd7", "tree": "a4bea1a5cdbfd8321463cc50b5539bebd4b01155", "parents": [ "dc87c3985e9b442c60994308a96f887579addc39" ], "author": { "name": "Mitch Williams", "email": "mitch.a.williams@intel.com", "time": "Fri Mar 30 11:54:08 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:34 2007 -0700" }, "message": "PCI: Flush MSI-X table writes\n\nThis patch fixes a kernel bug which is triggered when using the\nirqbalance daemon with MSI-X hardware.\n\nBecause both MSI-X interrupt messages and MSI-X table writes are posted,\nit\u0027s possible for them to cross while in-flight. This results in\ninterrupts being received long after the kernel thinks they\u0027re disabled,\nand in interrupts being sent to stale vectors after rebalancing.\n\nThis patch performs a read flush after writes to the MSI-X table for\nmask and unmask operations. Since the SMP affinity is set while\nthe interrupt is masked, and since it\u0027s unmasked immediately after,\nno additional flushes are required in the various affinity setting\nroutines.\n\nThis patch has been validated with (unreleased) network hardware which\nuses MSI-X.\n\nRevised with input from Eric Biederman.\n\nSigned-off-by: Mitch Williams \u003cmitch.a.williams@intel.com\u003e\nAcked-by: \"Eric W. Biederman\" \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "348e3fd19487534d9d4dd70c3ad0b751afd35792", "tree": "0f5bf833203f18873595d19e53d6466e1878c66c", "parents": [ "59117d3f4e3f5a7980353d2f476e516c758ce921" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Tue Apr 03 01:41:49 2007 -0600" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Apr 03 14:02:49 2007 -0700" }, "message": "[PATCH] msi: synchronously mask and unmask msi-x irqs.\n\nThis is a simplified and actually more comprehensive form of a bug\nfix from Mitch Williams \u003cmitch.a.williams@intel.com\u003e.\n\nWhen we mask or unmask a msi-x irqs the writes may be posted because\nwe are writing to memory mapped region. This means the mask and\nunmask don\u0027t happen immediately but at some unspecified time in the\nfuture. Which is out of sync with how the mask/unmask logic work\nfor ioapic irqs.\n\nThe practical result is that we get very subtle and hard to track down\nirq migration bugs.\n\nThis patch performs a read flush after writes to the MSI-X table for mask\nand unmask operations. Since the SMP affinity is set while the interrupt\nis masked, and since it\u0027s unmasked immediately after, no additional flushes\nare required in the various affinity setting routines.\n\nThe testing by Mitch Williams on his especially problematic system should\nstill be valid as I have only simplified the code, not changed the\nfunctionality.\n\nWe currently have 7 drivers: cciss, mthca, cxgb3, forceth, s2io,\npcie/portdrv_core, and qla2xxx in 2.6.21 that are affected by this\nproblem when the hardware they driver is plugged into the right slot.\n\nGiven the difficulty of reproducing this bug and tracing it down to\nanything that even remotely resembles a cause, even if people are\nbeing affected we aren\u0027t likely to see many meaningful bug reports, and\nthe people who see this bug aren\u0027t likely to be able to reproduce this\nbug in a timely fashion. So it is best to get this problem fixed\nas soon as we can so people don\u0027t have problems.\n\nThen if people do have a kernel message stating \"No irq for vector\" we\nwill know it is yet another novel cause that needs a complete new\ninvestigation.\n\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: \"Eric W. Biederman\" \u003cebiederm@xmission.com\u003e\nAcked-by: Mitch Williams \u003cmitch.a.williams@intel.com\u003e\nAcked-by: \"Siddha, Suresh B\" \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "392ee1e6dd901db6c4504617476f6442ed91f72d", "tree": "591658a0197244782973674f240cf61895ef498e", "parents": [ "529284a0b649499351495949d05fa3359121cbae" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Thu Mar 08 13:04:57 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Mar 12 16:31:50 2007 -0700" }, "message": "[PATCH] msi: Safer state caching.\n\nThere are two ways pci_save_state and pci_restore_state are used. As\nhelper functions during suspend/resume, and as helper functions around\na hardware reset event. When used as helper functions around a hardware\nreset event there is no reason to believe the calls will be paired, nor\nis there a good reason to believe that if we restore the msi state from\nbefore the reset that it will match the current msi state. Since arch\ncode may change the msi message without going through the driver, drivers\ncurrently do not have enough information to even know when to call\npci_save_state to ensure they will have msi state in sync with the other\nkernel irq reception data structures.\n\nIt turns out the solution is straight forward, cache the state in the\nexisting msi data structures (not the magic pci saved things) and\nhave the msi code update the cached state each time we write to the hardware.\nThis means we never need to read the hardware to figure out what the hardware\nstate should be.\n\nBy modifying the caching in this manner we get to remove our save_state\nroutines and only need to provide restore_state routines.\n\nThe only fields that were at all tricky to regenerate were the msi and msi-x\ncontrol registers and the way we regenerate them currently is a bit dependent\nupon assumptions on how we use the allow msi registers to be configured and used\nmaking the code a little bit brittle. If we ever change what cases we allow\nor how we configure the msi bits we can address the fragility then.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nAcked-by: Auke Kok \u003cauke-jan.h.kok@intel.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "58e0543e8f355b32f0778a18858b255adb7402ae", "tree": "4533c928f846e737f218573bbd326e63280c179d", "parents": [ "b1cbf4e4dddd708ba268c3a2bf38383a269d490a" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Mon Mar 05 00:30:11 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Mar 05 07:57:50 2007 -0800" }, "message": "[PATCH] msi: support masking msi irqs without a mask bit\n\nFor devices that do not support msi-x we only support 1 interrupt. Therefore\nwe can disable that one interrupt by disabling the msi capability itself. If\nwe leave the intx interrupts disabled while we have the msi capability\ndisabled no interrupts should be delivered from that device.\n\nDevices with just the minimal msi support (and thus hitting this code path)\ninclude things like the intel e1000 nic, so it looks like is going to be a\nfairly common case and thus important to get right.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "b1cbf4e4dddd708ba268c3a2bf38383a269d490a", "tree": "a04eaf9e80e3ad30d9d062bab3ea94fca2d29376", "parents": [ "f5f2b13129a6541debf8851bae843cbbf48298b7" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Mon Mar 05 00:30:10 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Mar 05 07:57:50 2007 -0800" }, "message": "[PATCH] msi: fix up the msi enable/disable logic\n\nenable/disable_msi_mode have several side effects which keeps them from being\ngenerally useful. So this patch replaces them with with two much more\ntargeted functions: msi_set_enable and msix_set_enable.\n\nThis patch makes pci_dev-\u003emsi_enabled and pci_dev-\u003emsix_enabled the definitive\nway to test if linux has enabled the msi capability, and has the appropriate\nmsi data structures set up.\n\nThis patch ensures that while writing the msi messages in save/restore and\nduring device initialization we have the msi capability disabled so we don\u0027t\nget into races. The pci spec requires that we do not have the msi capability\nenabled and the msi messages unmasked while we write the messages. Completely\ndisabling the capability is overkill but it is easy :)\n\nCare has been taken so we never have both a msi capability and intx enabled\nsimultaneously. We haven\u0027t run into a problem yet but better safe then sorry.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "f5f2b13129a6541debf8851bae843cbbf48298b7", "tree": "274dc998519074e56259a7dc4bd611652b8d930e", "parents": [ "58a53b246b4aed95f3f93b45828c8d9f26b1cfcb" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Mon Mar 05 00:30:07 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Mar 05 07:57:50 2007 -0800" }, "message": "[PATCH] msi: sanely support hardware level msi disabling\n\nIn some cases when we are not using msi we need a way to ensure that the\nhardware does not have an msi capability enabled. Currently the code has been\ncalling disable_msi_mode to try and achieve that. However disable_msi_mode\nhas several other side effects and is only available when msi support is\ncompiled in so it isn\u0027t really appropriate.\n\nInstead this patch implements pci_msi_off which disables all msi and msix\ncapabilities unconditionally with no additional side effects.\n\npci_disable_device was redundantly clearing the bus master enable flag and\nclearing the msi enable bit. A device that is not allowed to perform bus\nmastering operations cannot generate intx or msi interrupt messages as those\nare essentially a special case of dma, and require bus mastering. So the call\nin pci_disable_device to disable msi capabilities was redundant.\n\nquirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "f7feaca77d6ad6bcfcc88ac54e3188970448d6fe", "tree": "3002076ed2b6ab497b3b90232ff11b08de2eca5d", "parents": [ "5b912c108c8b1fcecbfe13d6d9a183db97b682d3" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Sun Jan 28 12:56:37 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:08 2007 -0800" }, "message": "msi: Make MSI useable more architectures\n\nThe arch hooks arch_setup_msi_irq and arch_teardown_msi_irq are now\nresponsible for allocating and freeing the linux irq in addition to\nsetting up the the linux irq to work with the interrupt.\n\narch_setup_msi_irq now takes a pci_device and a msi_desc and returns\nan irq.\n\nWith this change in place this code should be useable by all platforms\nexcept those that won\u0027t let the OS touch the hardware like ppc RTAS.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "5b912c108c8b1fcecbfe13d6d9a183db97b682d3", "tree": "0267f65fd9237a41207e4359e09d09e60f6cd754", "parents": [ "1c659d61cfbd8dc3926688c1bbf12d80f4cfb5c2" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Sun Jan 28 12:52:03 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:08 2007 -0800" }, "message": "msi: Kill the msi_desc array.\n\nWe need to be able to get from an irq number to a struct msi_desc.\nThe msi_desc array in msi.c had several short comings the big one was\nthat it could not be used outside of msi.c. Using irq_data in struct\nirq_desc almost worked except on some architectures irq_data needs to\nbe used for something else.\n\nSo this patch adds a msi_desc pointer to irq_desc, adds the appropriate\nwrappers and changes all of the msi code to use them.\n\nThe dynamic_irq_init/cleanup code was tweaked to ensure the new\nfield is left in a well defined state.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "1c659d61cfbd8dc3926688c1bbf12d80f4cfb5c2", "tree": "a6ebfbd4a52bcf3e63a84e1ef04e5356c55e9e93", "parents": [ "866a8c87c4e51046602387953bbef76992107bcb" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Sun Jan 28 12:47:52 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:08 2007 -0800" }, "message": "msi: Remove attach_msi_entry.\n\nThe attach_msi_entry has been reduced to a single simple assignment,\nso for simplicity remove the abstraction and directory perform the\nassignment.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "866a8c87c4e51046602387953bbef76992107bcb", "tree": "f04eb2c39b7d3b44f2d10dc3b8dc0181be2954fc", "parents": [ "d40f540ce6d992d4123827dbd62f68c4a39c53d0" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Sun Jan 28 12:45:54 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:07 2007 -0800" }, "message": "msi: Fix msi_remove_pci_irq_vectors.\n\nSince msi_remove_pci_irq_vectors is designed to be called during\nhotplug remove it is actively wrong to query the hardware and expect\nmeaningful results back.\n\nTo that end remove the pci_find_capability calls. Testing\ndev-\u003emsi_enabled and dev-\u003emsix_enabled gives us all of the information\nwe need.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "d40f540ce6d992d4123827dbd62f68c4a39c53d0", "tree": "10c379bd4a0612b4d5f2ebceac376eebed4d84f3", "parents": [ "ded86d8d37736df67ddeec4ae00e2ec1a5a90b3c" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Sun Jan 28 12:44:21 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:07 2007 -0800" }, "message": "msi: Remove msi_lock.\n\nWith the removal of msi_lookup_irq all of the functions using msi_lock\noperated on a single device and none of them could reasonably be\ncalled on that device at the same time. \n\nSince what little synchronization that needs to happen needs to happen\noutside of the msi functions, msi_lock could never be contended and as\nsuch is useless and just complicates the code.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "ded86d8d37736df67ddeec4ae00e2ec1a5a90b3c", "tree": "6a1c175992692ca2db80b34b0df3cb44b1541253", "parents": [ "8fed4b65236c44d090bd62f2d14938ae791e0260" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Sun Jan 28 12:42:52 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:07 2007 -0800" }, "message": "msi: Kill msi_lookup_irq\n\nThe function msi_lookup_irq was horrible. As a side effect of running\nit changed dev-\u003eirq, and then the callers would need to change it\nback. In addition it does a global scan through all of the irqs,\nwhich seems to be the sole justification of the msi_lock.\n\nTo remove the neede for msi_lookup_irq I added first_msi_irq to struct\npci_dev. Then depending on the context I replaced msi_lookup_irq with\ndev-\u003efirst_msi_irq, dev-\u003emsi_enabled, or dev-\u003emsix_enabled.\n\nmsi_enabled and msix_enabled were already present in pci_dev for other\nreasons.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nAcked-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "8fed4b65236c44d090bd62f2d14938ae791e0260", "tree": "53b0609ff8e53d9b1410f707f59cd14a555f8c04", "parents": [ "0fcfdabbdbedb3bdc63f29209aeeac805df78a92" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Jan 25 19:34:08 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:07 2007 -0800" }, "message": "MSI: Combine pci_(save|restore)_msi/msix_state\n\nThe PCI save/restore code doesn\u0027t need to care about MSI vs MSI-X, all\nit really wants is to say \"save/restore all MSI(-X) info for this device\".\n\nThis is borne out in the code, we call the MSI and MSI-X save routines\nside by side, and similarly with the restore routines.\n\nSo combine the MSI/MSI-X routines into pci_save_msi_state() and\npci_restore_msi_state(). It is up to those routines to decide what state\nneeds to be saved.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "0fcfdabbdbedb3bdc63f29209aeeac805df78a92", "tree": "49b924287acdf067d470c1d07c0fa02c099e0c0e", "parents": [ "88187dfa4d8bb565df762f272511d2c91e427e0d" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Jan 25 19:34:08 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:07 2007 -0800" }, "message": "MSI: Remove pci_scan_msi_device()\n\npci_scan_msi_device() doesn\u0027t do anything anymore, so remove it.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "88187dfa4d8bb565df762f272511d2c91e427e0d", "tree": "451f53265c52ea50bcb43bb4e5854fe9c3359182", "parents": [ "89298c7a41e71ecb1e0c3f793655e9ce09662ce0" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Jan 25 19:34:07 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:06 2007 -0800" }, "message": "MSI: Replace pci_msi_quirk with calls to pci_no_msi()\n\nI don\u0027t see any reason why we need pci_msi_quirk, quirk code can just\ncall pci_no_msi() instead.\n\nRemove the check of pci_msi_quirk in msi_init(). This is safe as all\ncalls to msi_init() are protected by calls to pci_msi_supported(),\nwhich checks pci_msi_enable, which is disabled by pci_no_msi().\n\nThe pci_disable_msi routines didn\u0027t check pci_msi_quirk, only\npci_msi_enable, but as far as I can see that was a bug not a feature.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "c54c18790700b8b2a503945d729aa425c25691fe", "tree": "90061bba5831aa5112afb08fc2fc89f32582078b", "parents": [ "8255cf35d503db7c1b26ae53b6b7f23ada82316f" ], "author": { "name": "Satoru Takeuchi", "email": "takeuchi_satoru@jp.fujitsu.com", "time": "Thu Jan 18 13:50:05 2007 +0900" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:06 2007 -0800" }, "message": "PCI: cleanup MSI code\n\nCleanup MSI code as follows:\n\n - fix some types\n - fix strange local variable definition\n - delete unnecessary blank line\n - add comment to #endif which is far from corresponding #ifdef\n\nSigned-off-by: Satoru Takeuchi \u003ctakeuchi_satoru@jp.fujitsu.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "7f3af60e5a444b287d740a84998a8f480645dadf", "tree": "1ab3e5aff5139233d743dcf5e369b75544aa5dd2", "parents": [ "21b4e736922f546e0f1aa7b9d6c442f309a2444a", "1769b46a3ed9ce68c835f84493be46e606e58ef1" ], "author": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 15:04:20 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 15:04:20 2006 -0800" }, "message": "Merge branch \u0027intx\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/misc-2.6\n\n* \u0027intx\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/misc-2.6:\n PCI MSI: always toggle legacy-INTx-enable bit upon MSI entry/exit\n" }, { "commit": "1769b46a3ed9ce68c835f84493be46e606e58ef1", "tree": "28188bdf8ac4a7562ef896b7013c29f6a3b9bf30", "parents": [ "ff51a98799931256b555446b2f5675db08de6229" ], "author": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Thu Dec 07 17:56:06 2006 -0500" }, "committer": { "name": "Jeff Garzik", "email": "jeff@garzik.org", "time": "Thu Dec 07 17:56:06 2006 -0500" }, "message": "PCI MSI: always toggle legacy-INTx-enable bit upon MSI entry/exit\n\nThe current code (prior to this change) would disable the PCI INTx\nlegacy interrupt when enabling MSI... but only on PCI Express. We\nshould do this for all MSI devices, for safety\u0027s sake.\n\nSigned-off-by: Jeff Garzik \u003cjeff@garzik.org\u003e\n" }, { "commit": "e18b890bb0881bbab6f4f1a6cd20d9c60d66b003", "tree": "4828be07e1c24781c264b42c5a75bcd968223c3f", "parents": [ "441e143e95f5aa1e04026cb0aa71c801ba53982f" ], "author": { "name": "Christoph Lameter", "email": "clameter@sgi.com", "time": "Wed Dec 06 20:33:20 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:25 2006 -0800" }, "message": "[PATCH] slab: remove kmem_cache_t\n\nReplace all uses of kmem_cache_t with struct kmem_cache.\n\nThe patch was generated using the following script:\n\n\t#!/bin/sh\n\t#\n\t# Replace one string by another in all the kernel sources.\n\t#\n\n\tset -e\n\n\tfor file in `find * -name \"*.c\" -o -name \"*.h\"|xargs grep -l $1`; do\n\t\tquilt add $file\n\t\tsed -e \"1,\\$s/$1/$2/g\" $file \u003e/tmp/$$\n\t\tmv /tmp/$$ $file\n\t\tquilt refresh\n\tdone\n\nThe script was run like this\n\n\tsh replace kmem_cache_t \"struct kmem_cache\"\n\nSigned-off-by: Christoph Lameter \u003cclameter@sgi.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "0306ebfa3b45386401f80aa87cb4f7570bf3aadb", "tree": "fe2ce5b3fd08835a3006cb339ff26d4eb60ef7ae", "parents": [ "662a98fb8de5af4adb56e58f78753cdaa27b6459" ], "author": { "name": "Brice Goglin", "email": "brice@myri.com", "time": "Thu Oct 05 10:24:31 2006 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Oct 18 11:36:11 2006 -0700" }, "message": "PCI: Improve pci_msi_supported() comments\n\nImprove pci_msi_supported() comments.\n\nSigned-off-by: Brice Goglin \u003cbrice@myri.com\u003e\nSigned-off-by: Grant Grundler \u003cgrundler@parisc-linux.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "3b7d1921f4cdd6d6ddb7899ae7a8d413991c5cf4", "tree": "5f809e0c4310f60dfa6f65d54fbaf9f01e2ebff9", "parents": [ "277bc33bc2479707e88b0b2ae6fe56e8e4aabe81" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:59 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:29 2006 -0700" }, "message": "[PATCH] msi: refactor and move the msi irq_chip into the arch code\n\nIt turns out msi_ops was simply not enough to abstract the architecture\nspecific details of msi. So I have moved the resposibility of constructing\nthe struct irq_chip to the architectures, and have two architecture specific\nfunctions arch_setup_msi_irq, and arch_teardown_msi_irq.\n\nFor simple architectures those functions can do all of the work. For\narchitectures with platform dependencies they can call into the appropriate\nplatform code.\n\nWith this msi.c is finally free of assuming you have an apic, and this\nactually takes less code.\n\nThe helpers for the architecture specific code are declared in the linux/msi.h\nto keep them separate from the msi functions used by drivers in linux/pci.h\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "277bc33bc2479707e88b0b2ae6fe56e8e4aabe81", "tree": "2b7ca3715612d656ed6eab51d7a9504a80cfec4f", "parents": [ "1f80025e624bb14fefadfef7e80fbfb9740d4714" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:57 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:29 2006 -0700" }, "message": "[PATCH] msi: only use a single irq_chip for msi interrupts\n\nThe logic works like this.\n\nSince we no longer track the state logic by hand in msi.c startup and shutdown\nare no longer needed.\n\nBy updating msi_set_mask_bit to work on msi devices that do not implement a\nmask bit we can always call the mask/unmask functions.\n\nWhat we really have are mask and unmask so we use them to implement the .mask\nand .unmask functions instead of .enable and .disable.\n\nBy switching to the handle_edge_irq handler we only need an ack function that\nmoves the irq if necessary. Which removes the old end and ack functions and\ntheir peculiar logic of sometimes disabling an irq.\n\nThis removes the reliance on pre genirq irq handling methods.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "1f80025e624bb14fefadfef7e80fbfb9740d4714", "tree": "1d6f18ebd2855e882213922036d8df8cd7e88db4", "parents": [ "8b955b0dddb35e398b07e217a81f8bd49400796f" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:56 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:29 2006 -0700" }, "message": "[PATCH] msi: simplify msi sanity checks by adding with generic irq code\n\nCurrently msi.c is doing sanity checks that make certain before an irq is\ndestroyed it has no more users.\n\nBy adding irq_has_action I can perform the test is a generic way, instead of\nrelying on a msi specific data structure.\n\nBy performing the core check in dynamic_irq_cleanup I ensure every user of\ndynamic irqs has a test present and we don\u0027t free resources that are in use.\n\nIn msi.c this allows me to kill the attrib.state member of msi_desc and all of\nthe assciated code to maintain it.\n\nTo keep from freeing data structures when irq cleanup code is called to soon\nchanging dyanamic_irq_cleanup is insufficient because there are msi specific\ndata structures that are also not safe to free.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Tony Luck \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "1ce03373a7f4b5fa8ca5be02ff35229800a6e12b", "tree": "918fd844d371ec0fd9d19ac16a7798e361cb5583", "parents": [ "c4fa0bbf384496ae4acc0a150719d9d8fa8d11b3" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:41 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:28 2006 -0700" }, "message": "[PATCH] genirq: msi: make the msi code irq based and not vector based\n\nThe msi currently allocates irqs backwards. First it allocates a platform\ndependent routing value for an interrupt the ``vector\u0027\u0027 and then it figures\nout from the vector which irq you are on.\n\nFor ia64 this is fine. For x86 and x86_64 this is complete nonsense and makes\nan enourmous mess of the irq handling code and prevents some pretty\nsignificant cleanups in the code for handling large numbers of irqs.\n\nThis patch refactors msi.c to work in terms of irqs and create_irq/destroy_irq\nfor dynamically managing irqs.\n\nHopefully this is finally a version of msi.c that is useful on more than just\nx86 derivatives.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "92db6d10bc1bc43330a4c540fa5b64c83d9d865f", "tree": "d889ea4ba6d2e55a33d89f05d2b2222bed7788e7", "parents": [ "38bc0361303535c86f6b67b151a541728d7bdae6" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:35 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:27 2006 -0700" }, "message": "[PATCH] genirq: msi: simplify the msi irq limit policy\n\nCurrently we attempt to predict how many irqs we will be able to allocate with\nmsi using pci_vector_resources and some complicated accounting, and then we\nonly allow each device as many irqs as we think are available on average.\n\nOnly the s2io driver even takes advantage of this feature all other drivers\nhave a fixed number of irqs they need and bail if they can\u0027t get them.\n\npci_vector_resources is inaccurate if anyone ever frees an irq. The whole\nimplmentation is racy. The current irq limit policy does not appear to make\nsense with current drivers. So I have simplified things. We can revisit this\nwe we need a more sophisticated policy.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "38bc0361303535c86f6b67b151a541728d7bdae6", "tree": "6a3939b1f7aea3b00fc4ecd72646fd8442c95766", "parents": [ "0366f8f7137deb072991e4c50769c6da31f8940c" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:34 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:27 2006 -0700" }, "message": "[PATCH] genirq: msi: refactor the msi_ops\n\nThe current msi_ops are short sighted in a number of ways, this patch attempts\nto fix the glaring deficiences.\n\n- Report in msi_ops if a 64bit address is needed in the msi message, so we\n can fail 32bit only msi structures.\n\n- Send and receive a full struct msi_msg in both setup and target. This is\n a little cleaner and allows for architectures that need to modify the data\n to retarget the msi interrupt to a different cpu.\n\n- In target pass in the full cpu mask instead of just the first cpu in case\n we can make use of the full cpu mask.\n\n- Operate in terms of irqs and not vectors, currently there is still a 1-1\n relationship but on architectures other than ia64 I expect this will change.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "0366f8f7137deb072991e4c50769c6da31f8940c", "tree": "11cb801b0fe9bc1742f1c47716a7d815b9d98dee", "parents": [ "dd159eeca971d594fa30176733b66d37acda82a3" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:33 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:27 2006 -0700" }, "message": "[PATCH] genirq: msi: implement helper functions read_msi_msg and write_msi_msg\n\nIn support of this I also add a struct msi_msg that captures the the two\naddress and one data field ina typical msi message, and I remember the pos and\nif the address is 64bit in struct msi_desc.\n\nThis makes the code a little more readable and easier to maintain, and paves\nthe way to further simplfications.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "7bd007e480672c99d8656c7b7b12ef0549432c37", "tree": "bd8ab1fa9914532b075c7f026e209d2a03a6b050", "parents": [ "0be6652f1e61b647f738eb25af057bf9551a9841" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Oct 04 02:16:31 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Oct 04 07:55:26 2006 -0700" }, "message": "[PATCH] genirq: msi: simplify msi enable and disable\n\nThe problem. Because the disable routines leave the msi interrupts in all\nsorts of half enabled states the enable routines become impossible to\nimplement correctly, and almost impossible to understand.\n\nSimplifing this allows me to simply kill the buggy reroute_msix_table, and\ngenerally makes the code more maintainable.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nCc: \"Protasevich, Natalie\" \u003cNatalie.Protasevich@UNISYS.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "571817849c76aabf34d534c905b5e604f2e824c5", "tree": "5541946f87861b66e2612e623edccf81b8f42c70", "parents": [ "7583ddfd3aae1007bc4fc67ea4c07d573d376e9e" ], "author": { "name": "Pekka J Enberg", "email": "penberg@cs.Helsinki.FI", "time": "Wed Sep 27 01:51:03 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Sep 27 08:26:19 2006 -0700" }, "message": "[PATCH] msi: use kmem_cache_zalloc()\n\nSimpler, cleaner.\n\nSigned-off-by: Pekka Enberg \u003cpenberg@cs.helsinki.fi\u003e\nCc: \"Eric W. Biederman\" \u003cebiederm@xmission.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "24334a12533e9ac70dcb467ccd629f190afc5361", "tree": "bf771331e8b657fd4f4e7170a4ad3dc437b8d514", "parents": [ "3f79e107f72e8efa86cd2f21356692b712713b5c" ], "author": { "name": "Brice Goglin", "email": "brice@myri.com", "time": "Thu Aug 31 01:55:07 2006 -0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Sep 26 17:43:52 2006 -0700" }, "message": "MSI: Factorize common code in pci_msi_supported()\n\npci_enable_msi() and pci_enable_msix() use the same code to detect\nwhether MSI might be enabled on this device. Factorize this code in\npci_msi_supported(). And improve the documentation about the fact\nthat only the root chipset must support MSI, but it is hard to\nfind the root bus so we check all parent busses MSI flags.\n\nSigned-off-by: Brice Goglin \u003cbrice@myri.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "ec572e3f87c02a6dd5be25841dc482a52356947f", "tree": "831afef04688012c865dd1cabd21f0436f28c627", "parents": [ "0635170b544b01b46a81b4ac5cff5020ab59d1fc" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Wed Jul 12 09:03:08 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Jul 12 12:52:55 2006 -0700" }, "message": "[PATCH] msi: Only keep one msi_desc in each slab entry.\n\nIt looks like someone confused kmem_cache_create with a different allocator\nand was attempting to give it knowledge of how many cache entries there\nwere.\n\nWith the unfortunate result that each slab entry was big enough to hold\nevery irq.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "6ab3d5624e172c553004ecc862bfeac16d9d68b7", "tree": "6d98881fe91fd9583c109208d5c27131b93fa248", "parents": [ "e02169b682bc448ccdc819dc8639ed34a23cedd8" ], "author": { "name": "Jörn Engel", "email": "joern@wohnheim.fh-wedel.de", "time": "Fri Jun 30 19:25:36 2006 +0200" }, "committer": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Fri Jun 30 19:25:36 2006 +0200" }, "message": "Remove obsolete #include \u003clinux/config.h\u003e\n\nSigned-off-by: Jörn Engel \u003cjoern@wohnheim.fh-wedel.de\u003e\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\n" }, { "commit": "d1bef4ed5faf7d9872337b33c4269e45ae1bf960", "tree": "a88c58e3102396382e9137a25a884af14421f6a6", "parents": [ "cfb9e32f2ff32ef5265c1c80fe68dd1a7f03a604" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Jun 29 02:24:36 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Jun 29 10:26:21 2006 -0700" }, "message": "[PATCH] genirq: rename desc-\u003ehandler to desc-\u003echip\n\nThis patch-queue improves the generic IRQ layer to be truly generic, by adding\nvarious abstractions and features to it, without impacting existing\nfunctionality.\n\nWhile the queue can be best described as \"fix and improve everything in the\ngeneric IRQ layer that we could think of\", and thus it consists of many\nsmaller features and lots of cleanups, the one feature that stands out most is\nthe new \u0027irq chip\u0027 abstraction.\n\nThe irq-chip abstraction is about describing and coding and IRQ controller\ndriver by mapping its raw hardware capabilities [and quirks, if needed] in a\nstraightforward way, without having to think about \"IRQ flow\"\n(level/edge/etc.) type of details.\n\nThis stands in contrast with the current \u0027irq-type\u0027 model of genirq\narchitectures, which \u0027mixes\u0027 raw hardware capabilities with \u0027flow\u0027 details.\nThe patchset supports both types of irq controller designs at once, and\nconverts i386 and x86_64 to the new irq-chip design.\n\nAs a bonus side-effect of the irq-chip approach, chained interrupt controllers\n(master/slave PIC constructs, etc.) are now supported by design as well.\n\nThe end result of this patchset intends to be simpler architecture-level code\nand more consolidation between architectures.\n\nWe reused many bits of code and many concepts from Russell King\u0027s ARM IRQ\nlayer, the merging of which was one of the motivations for this patchset.\n\nThis patch:\n\nrename desc-\u003ehandler to desc-\u003echip.\n\nOriginally i did not want to do this, because it\u0027s a big patch. But having\nboth \"desc-\u003ehandler\", \"desc-\u003ehandle_irq\" and \"action-\u003ehandler\" caused a\nlarge degree of confusion and made the code appear alot less clean than it\ntruly is.\n\nI have also attempted a dual approach as well by introducing a\ndesc-\u003echip alias - but that just wasnt robust enough and broke\nfrequently.\n\nSo lets get over with this quickly. The conversion was done automatically\nvia scripts and converts all the code in the kernel.\n\nThis renaming patch is the first one amongst the patches, so that the\nremaining patches can stay flexible and can be merged and split up\nwithout having some big monolithic patch act as a merge barrier.\n\n[akpm@osdl.org: build fix]\n[akpm@osdl.org: another build fix]\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "f7e6600d762bf7c04b48c8d9bd0ab26d04a8d11f", "tree": "8e72e80936bf30be991fa8e023f7dd47837085fe", "parents": [ "c0da3ba0a29d70c95ed39366a1c9b849f3439fbe" ], "author": { "name": "Grant Grundler", "email": "iod00d@hp.com", "time": "Wed May 31 23:35:47 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 12:00:00 2006 -0700" }, "message": "[PATCH] PCI: remove unneeded msi code\n\nThe code is really not needed.\nRoland Dreier/Greg KH removed the release_mem_region() calls that\nwere the only consumers of phys_addr:\n\thttp://www.ussg.iu.edu/hypermail/linux/kernel/0503.0/1540.html\n\npatch below deletes the \"dead\" code.\n\nSigned-off-by: Grant Grundler \u003ciod00d@hp.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "b209a6ee49099b7500abf024f7b6b9648b5a3eac", "tree": "6e6c614ae010aa92e9ded5e55c3a913f3c6c9dd3", "parents": [ "99dc804d9bcc2c53f4c20c291bf4e185312a1a0c" ], "author": { "name": "bibo,mao", "email": "bibo.mao@intel.com", "time": "Wed May 31 18:17:33 2006 +0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 12:00:00 2006 -0700" }, "message": "[PATCH] PCI: cleanup unused variable about msi driver\n\nIn IA64 platform, msi driver does not use irq_vector variable, and in\nx86 platform LAST_DEVICE_VECTOR should one before FIRST_SYSTEM_VECTOR,\nthis patch modify this.\n\nSigned-off-by: bibo, mao \u003cbibo.mao@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "99dc804d9bcc2c53f4c20c291bf4e185312a1a0c", "tree": "4798f39176d0f8fe06de446d74cf94ba48423aa9", "parents": [ "020d502488bebdbc1b2c2828d996f04e563f082a" ], "author": { "name": "Shaohua Li", "email": "shaohua.li@intel.com", "time": "Fri May 26 10:58:27 2006 +0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 12:00:00 2006 -0700" }, "message": "[PATCH] PCI: disable msi mode in pci_disable_device\n\nBrice said the pci_save_msi_state breaks his driver in his special usage\n(not in suspend/resume), as pci_save_msi_state will disable msi mode. In\nhis usage, pci_save_state will be called at runtime, and later (after\nthe device operates for some time and has an error) pci_restore_state\nwill be called.\nIn another hand, suspend/resume needs disable msi mode, as device should\nstop working completely. This patch try to workaround this issue.\nDrivers are expected call pci_disable_device in suspend time after\npci_save_state.\n\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "020d502488bebdbc1b2c2828d996f04e563f082a", "tree": "101cf0138612137dc08844dff137f927ed0a3b8b", "parents": [ "1edab4a164b229807853682f7ff7858c11dd3481" ], "author": { "name": "Rajesh Shah", "email": "rajesh.shah@intel.com", "time": "Tue May 23 10:14:36 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 12:00:00 2006 -0700" }, "message": "[PATCH] PCI: Allow MSI to work on kexec kernel\n\nWe recently ran into a problem where the e1000 device failed to\nwork properly on the kexec kernel. MSI was enabled for the\ndevice in the main kernel when it crashed. The e1000 driver\ntried to enable MSI on the kexec kernel, but the code bailed\nearly when it found that MSI was already enabled in the hardware,\neven though the software state was not properly set up in the\nkexec\u0027d kernel. This patch fixes the problem by moving the\nearly return to after making sure that the software state\nis properly initialized.\n\nSigned-off-by: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "1edab4a164b229807853682f7ff7858c11dd3481", "tree": "b2b65bb914850270f5e22f9b4c49ef371c0f20b6", "parents": [ "74d0a988d3aa359b6b8a8536c8cb92cce02ca5d5" ], "author": { "name": "Brice Goglin", "email": "brice@myri.com", "time": "Tue May 23 03:05:27 2006 -0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 12:00:00 2006 -0700" }, "message": "[PATCH] PCI: AMD 8131 MSI quirk called too late, bus_flags not inherited ?\n\nThe PCI_BUS_FLAGS_NO_MSI bus flags does not appear do be inherited\ncorrectly from the amd8131 MSI quirk to its parent busses. It makes\ndevices behind a bridge behind amd8131 try to enable MSI while the\namd8131 does not support it.\nWe fix this by looking at flags of all parent busses in\npci_enable_msi() and pci_enable_msix().\n\nBy the way, also add the missing dev-\u003eno_msi check in pci_enable_msix()\n\nSigned-off-by: Brice Goglin \u003cbrice@myri.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "10083072bfabc40bc47306e512c158c57cf55c2e", "tree": "2c7c3f08ae779594026e67a7a36915c2f97d73b9", "parents": [ "fd58e55fcf5568e51da2ed54d7acd049c3fdb184" ], "author": { "name": "Mark Maule", "email": "maule@sgi.com", "time": "Fri Apr 14 16:03:49 2006 -0500" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 11:59:59 2006 -0700" }, "message": "[PATCH] PCI: per-platform IA64_{FIRST,LAST}_DEVICE_VECTOR definitions\n\nAbstract IA64_FIRST_DEVICE_VECTOR/IA64_LAST_DEVICE_VECTOR since SN platforms\nuse a subset of the IA64 range. Implement this by making the above macros\nglobal variables which the platform can override in it setup code.\n\nAlso add a reserve_irq_vector() routine used by SN to mark a vector\u0027s as\nin-use when that weren\u0027t allocated through assign_irq_vector().\n\nSigned-off-by: Mark Maule \u003cmaule@sgi.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "fd58e55fcf5568e51da2ed54d7acd049c3fdb184", "tree": "2cf41864d66b8db39f637549d4652c7664256155", "parents": [ "c34b4c734482dda750deb6089521f7c891b48736" ], "author": { "name": "Mark Maule", "email": "maule@sgi.com", "time": "Mon Apr 10 21:17:48 2006 -0500" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 11:59:58 2006 -0700" }, "message": "[PATCH] PCI: msi abstractions and support for altix\n\nAbstract portions of the MSI core for platforms that do not use standard\nAPIC interrupt controllers. This is implemented through a new arch-specific\nmsi setup routine, and a set of msi ops which can be set on a per platform\nbasis.\n\nSigned-off-by: Mark Maule \u003cmaule@sgi.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "f01f4182597a3bb4b6fbf92e041faf7a1016f4b6", "tree": "794a37798a20dd57737020fe5a550a2398fb1d9c", "parents": [ "9b860b8c4bde5949b272968597d1426d53080532" ], "author": { "name": "Jesper Juhl", "email": "jesper.juhl@gmail.com", "time": "Mon Apr 17 04:02:54 2006 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Apr 27 13:00:51 2006 -0700" }, "message": "[PATCH] PCI: fix potential resource leak in drivers/pci/msi.c\n\nThe coverity checker spotted (as entry #599) that we might leak `entry\u0027 in\ndrivers/pci/msi.c::msix_capability_init()\nThis patch should take care of that.\n\nSigned-off-by: Jesper Juhl \u003cjesper.juhl@gmail.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "41017f0cac925e4a6bcf3359b75e5538112d4216", "tree": "5c8f4590707450820ffb286f681bcaeb300cde84", "parents": [ "f043ca43c1ae354346f72dc5826d820d5619f0b2" ], "author": { "name": "Shaohua Li", "email": "shaohua.li@intel.com", "time": "Wed Feb 08 17:11:38 2006 +0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Apr 14 12:25:25 2006 -0700" }, "message": "[PATCH] PCI: MSI(X) save/restore for suspend/resume\n\nAdd MSI(X) configure sapce save/restore in generic PCI helper.\n\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "309e57df7b766172ba137a8cbd909f88dd76e8e9", "tree": "74cc85977654925c76c687e597c7586b9e75629b", "parents": [ "5eeca8e688b6affba4cd85262152fdd1b274ad33" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Sun Mar 05 22:33:34 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:16 2006 -0800" }, "message": "[PATCH] PCI: Provide a boot parameter to disable MSI\n\nSeveral drivers are starting to grow options to disable MSI. However,\nit\u0027s often a host chipset issue, not something which individual drivers\nshould handle. So we add the pci\u003dnomsi kernel parameter to allow the user\nto disable MSI modes for systems we haven\u0027t added to the quirk list yet.\n\nSigned-off-by: Matthew Wilcox \u003cmatthew@wil.cx\u003e\nSigned-off-by: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nAcked-by: Jeff Garzik \u003cjeff@garzik.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "a0454b40ee8fac03194bb71f01730266506e75e1", "tree": "a746423eeeeb968bd271de17f4f8e80acac56999", "parents": [ "b408cbc704352eccee301e1103b23203ba1c3a0e" ], "author": { "name": "Grant Grundler", "email": "iod00d@hp.com", "time": "Thu Feb 16 23:58:29 2006 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:14 2006 -0800" }, "message": "[PATCH] PCI: fix problems with MSI-X on ia64\n\nUse \"unsigned long\" when dealing with PCI resources.\nThe BAR Indicator Register (BIR) can be a 64-bit value\nor the resource could be a 64-bit host physical address.\n\nEnables ib_mthca and cciss drivers to use MSI-X on ia64 HW.\nProblem showed up now because of new system firmware on one platform.\nSymptom will either be memory corruption or MCA.\n\nSecond part of this patch deals with \"useless\" code.\nWe walk through the steps to find the phys_addr and then\ndon\u0027t use the result. I suspect the intent was to zero\nout the respective MSI-X entry but I\u0027m not sure at the moment.\nDelete the code inside the #if 0/#endif if it\u0027s really\nnot needed.\n\nSigned-off-by: Grant Grundler \u003ciod00d@hp.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "6e325a62a0a228cd0222783802b53cce04551776", "tree": "5609f9e841024ca57ba8ee7a919955c7589444c7", "parents": [ "e5548e960f38557825e50806b52cb24c9e730aa2" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@mellanox.co.il", "time": "Tue Feb 14 18:52:22 2006 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:14 2006 -0800" }, "message": "[PATCH] PCI: make MSI quirk inheritable from the pci bus\n\nIt turns out AMD 8131 quirk only affects MSI for devices behind the 8131 bridge.\nHandle this by adding a flags field in pci_bus, inherited from parent to child.\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@mellanox.co.il\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "b64c05e7de6071694dd6840eac9724a006ee19f8", "tree": "b611e32ceeaa0de2782334fe88a204dfe97e6017", "parents": [ "b0e6e962992b76580f4900b166a337bad7c1e81b" ], "author": { "name": "Grant Grundler", "email": "grundler@parisc-linux.org", "time": "Sat Jan 14 00:34:53 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:10 2006 -0800" }, "message": "[PATCH] PCI: clean up msi.c a bit\n\nClean up: move assignments outside of if() statements.\nAFAICT, no functional change. Easier to read/understand.\n\nDepends on \"[PATCH 1/3] msi vector targeting abstractions\"\nby Mark Maule \u003cmaule@sgi.com\u003e.\nI expect one hunk to fail if applied against 2.6.15.\n\nThis is essentially Joe Perches\u0027 patch.\nI\u0027ve cleaned up the one instance added by Mark\u0027s patch.\n\nSigned-off-by: Grant Grundler \u003cgrundler@parisc-linux.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "8169b5d2384a0acd9ea3bb86bf5988cd7d62d03a", "tree": "89a2d459bb2f0d9cc854c0708db1b11d81d313d2", "parents": [ "f8d65713332cf6306889a3036142a17e01e3447e" ], "author": { "name": "Grant Grundler", "email": "iod00d@hp.com", "time": "Tue Jan 03 18:51:46 2006 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Jan 31 18:00:11 2006 -0800" }, "message": "[PATCH] PCI: make it easier to see that set_msi_affinity() is used\n\nI missed this usage in drivers/pci/msi.h:\n\n#ifdef CONFIG_SMP\n#define set_msi_irq_affinity set_msi_affinity\n#else\n#define set_msi_irq_affinity NULL\n#endif\n\nset_msi_affinity() is declared and exclusively used in msi.c.\nHere\u0027s a better way so (hopefully) history doesn\u0027t repeat itself.\n\nSigned-off-by: Grant Grundler \u003ciod00d@hp.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "f6bc2666ed6696c40ef055e88ffef0b7657437a4", "tree": "30377687ad0cb9c9ef0141bf142511062e1980b5", "parents": [ "4021cb279a532728c3208a16b9b09b0ca8016850" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Thu Jan 26 01:42:11 2006 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Jan 31 11:30:18 2006 -0800" }, "message": "[PATCH] fix deadlock in drivers/pci/msi.c\n\nThe lock validator caught another one: drivers/pci/msi.c is accessing\n\u0026irq_desc[i].lock with interrupts enabled (!).\n\nThe fix is to disable interrupts properly.\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "b4033c1715cb5aa1dcb1a25bdaf71fea908bb3f1", "tree": "cf9ba9ae7999573a507df301faf34170ab08e2c3", "parents": [ "48b19148733b4826eeedfd8be9f19b61c8d010b1" ], "author": { "name": "Ashok Raj", "email": "ashok.raj@intel.com", "time": "Tue Nov 08 21:42:33 2005 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Nov 10 16:09:18 2005 -0800" }, "message": "[PATCH] PCI: Change MSI to use physical delivery mode always\n\nMSI hardcoded delivery mode to use logical delivery mode. Recently\nx86_64 moved to use physical mode addressing to support physflat mode.\nWith this mode enabled noticed that my eth with MSI werent working.\n\nmsi_address_init() was hardcoded to use logical mode for i386 and x86_64.\nSo when we switch to use physical mode, things stopped working.\n\nSince anyway we dont use lowest priority delivery with MSI, its always\ndirected to just a single CPU. Its safe and simpler to use\nphysical mode always, even when we use logical delivery mode for IPI\u0027s\nor other ioapic RTE\u0027s.\n\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "8f7020d36374dda9366fee1343f8eacfe8f5e641", "tree": "fb9531fed55030c6334957ff38235421c83377b9", "parents": [ "f05aab8ef653abcbd454739264a9f5cf63f6f9f8" ], "author": { "name": "Randy Dunlap", "email": "rdunlap@xenotime.net", "time": "Sun Oct 23 11:57:38 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Oct 28 15:37:01 2005 -0700" }, "message": "[PATCH] kernel-doc: PCI fixes\n\nPCI: add descriptions for missing function parameters.\nEliminate all kernel-doc warnings here.\n\nSigned-off-by: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "a04ce0ffcaf561994ecf382cd3caad75556dc499", "tree": "e891a767810333fe2bf29ddb35f57b0a3ec6e18e", "parents": [ "3fe9d19f9e86a55679f5f2b38ec0a43a1a510cee" ], "author": { "name": "Brett M Russ", "email": "russb@emc.com", "time": "Mon Aug 15 15:23:41 2005 -0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Sep 08 15:07:08 2005 -0700" }, "message": "[PATCH] PCI/libata INTx cleanup\n\nSimple cleanup to eliminate X copies of the pci_enable_intx() function\nin libata. Moved ahci.c\u0027s pci_intx() to pci.c and use it throughout\nlibata and msi.c.\n\nSigned-off-by: Brett Russ \u003crussb@emc.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "54d5d42404e7705cf3804593189e963350d470e5", "tree": "7cf8a7fce163b19672193d8cf4ef6a7f6c131d9e", "parents": [ "f63ed39c578a2a2d067356a85ce7c28a7c795d8a" ], "author": { "name": "Ashok Raj", "email": "ashok.raj@intel.com", "time": "Tue Sep 06 15:16:15 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Wed Sep 07 16:57:15 2005 -0700" }, "message": "[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity\n\nWhen handling writes to /proc/irq, current code is re-programming rte\nentries directly. This is not recommended and could potentially cause\nchipset\u0027s to lockup, or cause missing interrupts.\n\nCONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the\ninterrupt is pending. The same needs to be done for /proc/irq handling as well.\nOtherwise user space irq balancers are really not doing the right thing.\n\n- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for\n lack of a generic name.\n- added move_irq out of IRQ_BALANCE, and added this same to X86_64\n- Added new proc handler for write, so we can do deferred write at irq\n handling time.\n- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead\n it now shows only active cpu masks, or exactly what was set.\n- Provided a common move_irq implementation, instead of duplicating\n when using generic irq framework.\n\nTested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.\nTested UP builds as well.\n\nMSI testing: tbd: I have cards, need to look for a x-over cable, although I\ndid test an earlier version of this patch. Will test in a couple days.\n\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nAcked-by: Zwane Mwaikambo \u003czwane@holomorphy.com\u003e\nGrudgingly-acked-by: Andi Kleen \u003cak@muc.de\u003e\nSigned-off-by: Coywolf Qi Hunt \u003ccoywolf@lovecn.org\u003e\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "4602b88d9743b5f20655de8078fb42e9fd25581f", "tree": "46fa501c25d46ef0691ee6891d928bb8def2e25e", "parents": [ "208f3d6175cb17772c5af202fe12373f90894ff4" ], "author": { "name": "Kristen Accardi", "email": "kristen.c.accardi@intel.com", "time": "Tue Aug 16 15:15:58 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Tue Aug 16 21:06:24 2005 -0700" }, "message": "[PATCH] PCI: 6700/6702PXH quirk\n\nOn the 6700/6702 PXH part, a MSI may get corrupted if an ACPI hotplug\ndriver and SHPC driver in MSI mode are used together.\n\nThis patch will prevent MSI from being enabled for the SHPC as part of\nan early pci quirk, as well as on any pci device which sets the no_msi\nbit.\n\nSigned-off-by: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "70549ad9cf074e12f12cdc931b29b2616dfb873a", "tree": "dde5cdc320df87f1eee4b6ef94146dd741a31d14", "parents": [ "bb4a61b6eaee01707f24deeefc5d7136f25f75c5" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jun 06 23:07:46 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jun 27 21:52:46 2005 -0700" }, "message": "[PATCH] PCI: clean up the MSI code a bit.\n\nMostly just cleans up the irq handling logic to be smaller and a bit more\ndescriptive as to what it really does.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "eaae4b3a84a3781543a32bcaf0a33306ae915574", "tree": "2d3db5e9713dd0baeba0be2577731233780f072f", "parents": [ "3aa8c4febf74b1f23bd9fc329321af6d531fe4dd" ], "author": { "name": "Steven Cole", "email": "elenstev@mesatop.com", "time": "Tue May 03 18:38:30 2005 -0600" }, "committer": { "name": "Greg KH", "email": "gregkh@suse.de", "time": "Tue May 03 23:45:16 2005 -0700" }, "message": "[PATCH] PCI: Spelling fixes for drivers/pci.\n\nHere are some spelling corrections for drivers/pci.\n\nCONTROLER -\u003e CONTROLLER\nRegisetr -\u003e Register\nharware -\u003e hardware\ninital -\u003e initial\nInitilize -\u003e Initialize\nfuntion -\u003e function\nfunciton -\u003e function\noccured -\u003e occurred\n\nSigned-off-by: Steven Cole \u003celenstev@mesatop.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2", "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d", "parents": [], "author": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n" } ] }