)]}' { "log": [ { "commit": "395a125c6237802b19bf22b41017c99ff57f1024", "tree": "9a2ca5bf2508fa865ab1ed973a997f15eb2be419", "parents": [ "a5827f40afafc864f57a1c44915f0bfaf3d94f53" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel@gmail.com", "time": "Tue Sep 09 12:27:52 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Sep 12 16:34:46 2008 -0700" }, "message": "PCI: re-add debug prints for unmodified BARs\n\nPrint out for device BAR values before the kernel tries to update them.\nAlso make related output use KERN_DEBUG.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "4ca8a7726fb0e8094fdb56f2ae2d69fcf9254eae", "tree": "17d2a4de82ee1ec9024a15b006ff9edf87a94673", "parents": [ "cbda1ba898647aeb4ee770b803c922f595e97731" ], "author": { "name": "Johann Felix Soden", "email": "johfel@users.sourceforge.net", "time": "Fri Aug 22 20:46:59 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Sep 09 11:43:32 2008 -0700" }, "message": "PCI: Fix printk warnings in probe.c\n\nThe cleaned up resource code in probe.c introduced some warnings:\ndrivers/pci/probe.c: In function \u0027pci_read_bridge_bases\u0027:\ndrivers/pci/probe.c:386: warning: format \u0027%llx\u0027 expects type \u0027long long unsigned int\u0027, but argument 3 has type \u0027resource_size_t\u0027\ndrivers/pci/probe.c:386: warning: format \u0027%llx\u0027 expects type \u0027long long unsigned int\u0027, but argument 4 has type \u0027resource_size_t\u0027\ndrivers/pci/probe.c:398: warning: format \u0027%llx\u0027 expects type \u0027long long unsigned int\u0027, but argument 3 has type \u0027resource_size_t\u0027\ndrivers/pci/probe.c:398: warning: format \u0027%llx\u0027 expects type \u0027long long unsigned int\u0027, but argument 4 has type \u0027resource_size_t\u0027\ndrivers/pci/probe.c:434: warning: format \u0027%llx\u0027 expects type \u0027long long unsigned int\u0027, but argument 4 has type \u0027resource_size_t\u0027\ndrivers/pci/probe.c:434: warning: format \u0027%llx\u0027 expects type \u0027long long unsigned int\u0027, but argument 5 has type \u0027resource_size_t\u0027\n\nSo fix them up.\n\nSigned-off-by: Johann Felix Soden \u003cjohfel@users.sourceforge.net\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "ce6754235b423610e91f5300e1555c2e4ee1c03a", "tree": "75233676c8145a4974dee0ec71a9bba2df33a704", "parents": [ "89499759dc0dd300528510f465b0bf532fc79a2a", "a83fe32fa668c0a17b3f99a1480b006f7d649924" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Aug 18 09:54:13 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Aug 18 09:54:13 2008 -0700" }, "message": "Merge branch \u0027pci-for-jesse\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip into x86-merge\n\nConflicts:\n\n\tdrivers/pci/probe.c\n" }, { "commit": "a844158a642ffe8b3b29964a88ee802c2834ed0a", "tree": "05ab9fe0a7b31af7f2885fd07ef1bfda50b977ba", "parents": [ "abad2ec98f2ef357d62026cbc3989dabf33f2435" ], "author": { "name": "Simon Horman", "email": "horms@verge.net.au", "time": "Thu Aug 07 14:56:34 2008 +1000" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Aug 07 09:49:07 2008 -0700" }, "message": "PCI: check the return value of device_create_bin_file() in pci_create_bus()\n\nCheck the return value of device_create_bin_file in pci_create_bus and\nunwind if necessary. Don\u0027t propagate error to caller, as failure to create\nthese files shouldn\u0027t prevent PCI from being initialised. Instead, just\nlog a warning.\n\nCc: Sven Wegener \u003csven.wegener@stealer.net\u003e\nCc: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nCc: Matthew Wilcox \u003cmatthew@wil.cx\u003e\nSigned-off-by: Simon Horman \u003chorms@verge.net.au\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "149e16372a2066c5474d8a8db9b252afd57eb427", "tree": "075a46f0672739fdab18d2f1e5f06080160de8b0", "parents": [ "5fde244d39b88625ac578d83e6625138714de031" ], "author": { "name": "Shaohua Li", "email": "shaohua.li@intel.com", "time": "Wed Jul 23 10:32:31 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 28 14:56:57 2008 -0700" }, "message": "PCI: disable ASPM on pre-1.1 PCIe devices\n\nDisable ASPM on pre-1.1 PCIe devices, as many of them don\u0027t implement it\ncorrectly.\n\nTested-by: Jack Howarth \u003chowarth@bromo.msbb.uc.edu\u003e\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "cc5499c3a607a392e8a7adb934aaf14b2c6a3519", "tree": "d7ab414b929fed34d9b15bf0c636e9591c4673dd", "parents": [ "6ac665c63dcac8fcec534a1d224ecbb8b867ad59" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Mon Jul 28 13:39:00 2008 -0400" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 28 14:29:04 2008 -0700" }, "message": "PCI: handle 64-bit resources better on 32-bit machines\n\nIf the kernel is configured to support 64-bit resources on a 32-bit\nmachine, we can support 64-bit BARs properly. Just change the condition\nto check sizeof(resource_size_t) instead of BITS_PER_LONG.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6ac665c63dcac8fcec534a1d224ecbb8b867ad59", "tree": "c331b97a2a7a5dfc6353f2538e5fd66a0d9a854d", "parents": [ "37139074233a5bbec54ae01ab580e5788a248cc3" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Mon Jul 28 13:38:59 2008 -0400" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 28 14:28:53 2008 -0700" }, "message": "PCI: rewrite PCI BAR reading code\n\nFactor out the code to read one BAR from the loop in pci_read_bases into\na new function, __pci_read_base. The new code is slightly more\nreadable, better commented and removes the ifdef.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "0679c2f47d50651018dd5e0bf35330f6e6ae35ec", "tree": "2df65ebb958f930abf0b7ad35fd6e528398b1679", "parents": [ "76fbc263ff7e42ce8b21b8aee176e3c74b45f81a", "5b664cb235e97afbf34db9c4d77f08ebd725335e" ], "author": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Jul 18 22:39:59 2008 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Fri Jul 18 22:39:59 2008 +0200" }, "message": "Merge branch \u0027linus\u0027 into pci-for-jesse\n" }, { "commit": "eb9d0fe40e313c0a74115ef456a2e43a6c8da72f", "tree": "7a90a68b8dc152d49a38469fd6a6a7840954bac2", "parents": [ "0af4b8c4fb31193dc666f4893107a18fef82baab" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Jul 07 03:34:48 2008 +0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jul 07 16:26:28 2008 -0700" }, "message": "PCI ACPI: Rework PCI handling of wake-up\n\n* Introduce function acpi_pm_device_sleep_wake() for enabling and\n disabling the system wake-up capability of devices that are power\n manageable by ACPI.\n\n* Introduce function acpi_bus_can_wakeup() allowing other (dependent)\n subsystems to check if ACPI is able to enable the system wake-up\n capability of given device.\n\n* Introduce callback .sleep_wake() in struct pci_platform_pm_ops and\n for the ACPI PCI \u0027driver\u0027 make it use acpi_pm_device_sleep_wake().\n\n* Introduce callback .can_wakeup() in struct pci_platform_pm_ops and\n for the ACPI \u0027driver\u0027 make it use acpi_bus_can_wakeup().\n\n* Move the PME# handlig code out of pci_enable_wake() and split it\n into two functions, pci_pme_capable() and pci_pme_active(),\n allowing the caller to check if given device is capable of\n generating PME# from given power state and to enable/disable the\n device\u0027s PME# functionality, respectively.\n\n* Modify pci_enable_wake() to use the new ACPI callbacks and the new\n PME#-related functions.\n\n* Drop the generic .platform_enable_wakeup() callback that is not\n used any more.\n\n* Introduce device_set_wakeup_capable() that will set the\n power.can_wakeup flag of given device.\n\n* Rework PCI device PM initialization so that, if given device is\n capable of generating wake-up events, either natively through the\n PME# mechanism, or with the help of the platform, its\n power.can_wakeup flag is set and its power.should_wakeup flag is\n unset as appropriate.\n\n* Make ACPI set the power.can_wakeup flag for devices found to be\n wake-up capable by it.\n\n* Make the ACPI wake-up code enable/disable GPEs for devices that\n have the wakeup.flags.prepared flag set (which means that their\n wake-up power has been enabled).\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "eebfcfb52ce753eaaa8525078bda6b539586066c", "tree": "8c1c841c5365fe12051a3c1f043bb3c528d50a90", "parents": [ "80be038593dba7aa46fb24a14f0ba83e5ade0edb" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jul 02 13:24:49 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Thu Jul 03 12:30:59 2008 -0700" }, "message": "PCI: handle pci_name() being const\n\nThis changes pci_setup_device to handle pci_name() now returning a\nconstant string.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "8b285ce84bbc719e363a796f466404576b840d36", "tree": "05fb0faca73afc594f9dca60f4b2be742b0d60ae", "parents": [ "9433f6dd3a4677e9b92c6e1cd7f98b11598b7c2c" ], "author": { "name": "David Howells", "email": "dhowells@redhat.com", "time": "Fri Jun 27 13:23:20 2008 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Jun 27 13:09:02 2008 -0700" }, "message": "PCI: fix pci_setup_device()\u0027s sprinting into a const buffer\n\nMake pci_setup_device() write the bus ID directly into the allotted storage,\nrather than using pci_name() as the address as that now returns a const\npointer.\n\nSigned-off-by: David Howells \u003cdhowells@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "80ccba1186d48fa728dc4b1456cc07ffb07da501", "tree": "b58826b8d0e42e2a41e5f5632bf95e52f9dfc676", "parents": [ "b86ec7ed2877f560ff069e8ed1b433a9005619c6" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri Jun 13 10:52:11 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jun 25 16:05:13 2008 -0700" }, "message": "PCI: use dev_printk when possible\n\nConvert printks to use dev_printk().\n\nI converted pr_debug() to dev_dbg(). Both use KERN_DEBUG and are enabled\nonly when DEBUG is defined.\n\nI converted printk(KERN_DEBUG) to dev_printk(KERN_DEBUG), not to dev_dbg(),\nbecause dev_dbg() is only enabled when DEBUG is defined.\n\nI converted DBG(KERN_INFO) (only in setup-bus.c) to dev_info(). The DBG()\nname makes it sound like debug, but it\u0027s been enabled forever, so dev_info()\npreserves the previous behavior.\n\nI tried to make the resource assignment formats more consistent, e.g.,\n \"BAR %d: got res [%#llx-%#llx] bus [%#llx-%#llx] flags %#lx\\n\"\ninstead of sometimes using \"start-end\" and sometimes using \"size@start\".\nI\u0027m not attached to one or the other; I\u0027d just like them consistent.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9bf8a1a79d549a0cf3b26c88d1ac8cdf07deafee", "tree": "a4916a9e8e6be55be0893d9b45dc6147fd161509", "parents": [ "066519068ad2fbe98c7f45552b1f592903a9c8c8" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel@gmail.com", "time": "Mon Jun 23 20:33:06 2008 +0200" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Mon Jun 23 21:57:19 2008 +0200" }, "message": "pci: debug extra pci resources range\n\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "f46753c5e354b857b20ab8e0fe7b2579831dc369", "tree": "efffdb4dfec5e1f6fd624f17aa36d7d350bb1e6c", "parents": [ "fe99740cac117f208707488c03f3789cf4904957" ], "author": { "name": "Alex Chiang", "email": "achiang@hp.com", "time": "Tue Jun 10 15:28:50 2008 -0600" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 10 14:37:03 2008 -0700" }, "message": "PCI: introduce pci_slot\n\nCurrently, /sys/bus/pci/slots/ only exposes hotplug attributes when a\nhotplug driver is loaded, but PCI slots have attributes such as address,\nspeed, width, etc. that are not related to hotplug at all.\n\nIntroduce pci_slot as the primary data structure and kobject model.\nHotplug attributes described in hotplug_slot become a secondary\nstructure associated with the pci_slot.\n\nThis patch only creates the infrastructure that allows the separation of\nPCI slot attributes and hotplug attributes. In this patch, the PCI\nhotplug core remains the only user of this infrastructure, and thus,\n/sys/bus/pci/slots/ will still only become populated when a hotplug\ndriver is loaded.\n\nA later patch in this series will add a second user of this new\ninfrastructure and demonstrate splitting the task of exposing pci_slot\nattributes from hotplug_slot attributes.\n\n - Make pci_slot the primary sysfs entity. hotplug_slot becomes a\n subsidiary structure.\n o pci_create_slot() creates and registers a slot with the PCI core\n o pci_slot_add_hotplug() gives it hotplug capability\n\n - Change the prototype of pci_hp_register() to take the bus and\n slot number (on parent bus) as parameters.\n\n - Remove all the -\u003eget_address methods since this functionality is\n now handled by pci_slot directly.\n\n[achiang@hp.com: rpaphp-correctly-pci_hp_register-for-empty-pci-slots]\nTested-by: Badari Pulavarty \u003cpbadari@us.ibm.com\u003e\nAcked-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\n[akpm@linux-foundation.org: build fix]\n[akpm@linux-foundation.org: make headers_check happy]\n[akpm@linux-foundation.org: nuther build fix]\n[akpm@linux-foundation.org: fix typo in #include]\nSigned-off-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Matthew Wilcox \u003cmatthew@wil.cx\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nCc: Len Brown \u003clenb@kernel.org\u003e\nAcked-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "49db139955d3392c6c4facf987905d0a9afed581", "tree": "a6add566bb0fefbddd09d53e26b680be3ccd3a9b", "parents": [ "e1a2a51e684bfe9d6165992d4a065439617a3107" ], "author": { "name": "Zhao Yakui", "email": "yakui.zhao@intel.com", "time": "Tue May 13 11:15:05 2008 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Jun 10 10:59:47 2008 -0700" }, "message": "PCI: Disable PME during PCI scan\n\nIf a device supports #PME and can generate PME events from D0, we may see\nsuperfluous events before a driver is loaded (drivers should only enable PME as\nneeded), preventing suspend from working if the corresponding GPE was enabled.\n\nLikewise, if the ACPI device has the _PRW object, the _PSW/_DSW object will be\ncalled in order to disable the wakeup functionality. But when it is allowed to\nwake up the sleeping state, OSPM will enable it again.\n\nSo we should disable PME in the course of scanning PCI devices and enable it\nagain only when PME events are actually required to be generated from the\nrequested PCI state (for example, D3_hot or D3_cold). It is also safe to\ndisable PME again when the PME is disabled for the PCI devices.\n\nSigned-off-by: Zhao Yakui \u003cyakui.zhao@intel.com\u003e\nSigned-off-by: Li Shaohua \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "70b9f7dc1435412ca2b89b13a8353bd9915a7189", "tree": "1ba8594fd9a26386654f800b9db5ce0183a0e33b", "parents": [ "98db6f193c93e9b4729215af2c9101210e11d26c" ], "author": { "name": "Yinghai Lu", "email": "yhlu.kernel.send@gmail.com", "time": "Mon Apr 28 16:27:23 2008 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Apr 29 15:34:05 2008 -0700" }, "message": "x86/pci: remove flag in pci_cfg_space_size_ext\n\nso let pci_cfg_space_size call it directly without flag.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "30a18d6c3f1e774de656ebd8ff219d53e2ba4029", "tree": "22aad98a32fc182736f78193938a24175a168b81", "parents": [ "35ddd068fb94b187e94a3fc497ccecf27bdda9ae" ], "author": { "name": "Yinghai Lu", "email": "Yinghai.Lu@Sun.COM", "time": "Tue Feb 19 03:21:20 2008 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 26 23:41:04 2008 +0200" }, "message": "x86: multi pci root bus with different io resource range, on 64-bit\n\nscan AMD opteron io/mmio routing to make sure every pci root bus get correct\nresource range. Thus later pci scan could assign correct resource to device\nwith unassigned resource.\n\nthis can fix a system without _CRS for multi pci root bus.\n\nSigned-off-by: Yinghai Lu \u003cyinghai.lu@sun.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "0d358f22f6c8f03ab215eee8d52b74f78cc3c7db", "tree": "a60a05c5b5a2727ef6e82b273aafe2121373d93d", "parents": [ "d39398a333ddc490f842ccdd4b76c9674682aa5d" ], "author": { "name": "Yinghai Lu", "email": "Yinghai.Lu@Sun.COM", "time": "Tue Feb 19 03:20:41 2008 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 26 23:41:04 2008 +0200" }, "message": "driver core: try parent numa_node at first before using default\n\nin the device_add, we try to use use parent numa_node.\nneed to make sure pci root bus\u0027s bridge device numa_node is set.\nthen we could use device-\u003enuma_node direclty for all device.\nand don\u0027t need to call pcibus_to_node().\n\nSigned-off-by: Yinghai Lu \u003cyinghai.lu@sun.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "57741a779070e0b141b6148136b420c8d35ccbce", "tree": "779acceb9fbb746346385be6d5402d1834974f54", "parents": [ "05c58b8ac77639c17205f0b2a2d9eb1971dc47ad" ], "author": { "name": "Yinghai Lu", "email": "Yinghai.Lu@Sun.COM", "time": "Fri Feb 15 01:32:50 2008 -0800" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 26 23:41:03 2008 +0200" }, "message": "x86_64: set cfg_size for AMD Family 10h in case MMCONFIG\n\nreuse pci_cfg_space_size but skip check pci express and pci-x CAP ID.\n\nSigned-off-by: Yinghai Lu \u003cyinghai.lu@sun.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nAcked-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\n" }, { "commit": "bda0c0afa7a694bb1459fd023515aca681e4d79a", "tree": "cd8b9d9811463de2065cbe79d59689082d6c53cf", "parents": [ "904e0ab54b7591b9cb01cfc0dbbedcc8bc0d949b", "af40b485ea2d957ae2f237ab0e33539ae8f29562" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Apr 21 15:58:35 2008 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Apr 21 15:58:35 2008 -0700" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/pci-2.6: (42 commits)\n PCI: Change PCI subsystem MAINTAINER\n PCI: pci-iommu-iotlb-flushing-speedup\n PCI: pci_setup_bridge() mustn\u0027t be __devinit\n PCI: pci_bus_size_cardbus() mustn\u0027t be __devinit\n PCI: pci_scan_device() mustn\u0027t be __devinit\n PCI: pci_alloc_child_bus() mustn\u0027t be __devinit\n PCI: replace remaining __FUNCTION__ occurrences\n PCI: Hotplug: fakephp: Return success, not ENODEV, when bus rescan is triggered\n PCI: Hotplug: Fix leaks in IBM Hot Plug Controller Driver - ibmphp_init_devno()\n PCI: clean up resource alignment management\n PCI: aerdrv_acpi.c: remove unneeded NULL check\n PCI: Update VIA CX700 quirk\n PCI: Expose PCI VPD through sysfs\n PCI: iommu: iotlb flushing\n PCI: simplify quirk debug output\n PCI: iova RB tree setup tweak\n PCI: parisc: use generic pci_enable_resources()\n PCI: ppc: use generic pci_enable_resources()\n PCI: powerpc: use generic pci_enable_resources()\n PCI: ia64: use generic pci_enable_resources()\n ...\n" }, { "commit": "7f7b5de2c0e10aa35ad9909edb1af9f2aed2f5d0", "tree": "fc73e811e2abe970970e216eeef4e61e3ba9bacc", "parents": [ "cbd4e055fc8f09db82d31a5ff6cec3c083cc97a8" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Fri Apr 18 13:53:55 2008 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:12 2008 -0700" }, "message": "PCI: pci_scan_device() mustn\u0027t be __devinit\n\nWARNING: drivers/pci/built-in.o(.text+0x150f): Section mismatch in reference from the function pci_scan_single_device() to the function .devinit.text:pci_scan_device()\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "cbd4e055fc8f09db82d31a5ff6cec3c083cc97a8", "tree": "ed245f6575243928865df0acdf0a7302418e2139", "parents": [ "66bef8c059015ba2b36bb5759080336feb01e680" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Fri Apr 18 13:53:55 2008 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:11 2008 -0700" }, "message": "PCI: pci_alloc_child_bus() mustn\u0027t be __devinit\n\nWARNING: drivers/pci/built-in.o(.text+0xc4c): Section mismatch in reference from the function pci_add_new_bus() to the function .devinit.text:pci_alloc_child_bus()\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "884525655d07fdee9245716b998ecdc45cdd8007", "tree": "975cbf2b5079430240d3496323df1a266be95d27", "parents": [ "d75b305295c38ba9610ff3b2200f7d1989dc55fd" ], "author": { "name": "Ivan Kokshaysky", "email": "ink@jurassic.park.msu.ru", "time": "Sun Mar 30 19:50:14 2008 +0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:08 2008 -0700" }, "message": "PCI: clean up resource alignment management\n\nDone per Linus\u0027 request and suggestions. Linus has explained that\nbetter than I\u0027ll be able to explain:\n\nOn Thu, Mar 27, 2008 at 10:12:10AM -0700, Linus Torvalds wrote:\n\u003e Actually, before we go any further, there might be a less intrusive\n\u003e alternative: add just a couple of flags to the resource flags field (we\n\u003e still have something like 8 unused bits on 32-bit), and use those to\n\u003e implement a generic \"resource_alignment()\" routine.\n\u003e\n\u003e Two flags would do it:\n\u003e\n\u003e - IORESOURCE_SIZEALIGN: size indicates alignment (regular PCI device\n\u003e resources)\n\u003e\n\u003e - IORESOURCE_STARTALIGN: start field is alignment (PCI bus resources\n\u003e during probing)\n\u003e\n\u003e and then the case of both flags zero (or both bits set) would actually be\n\u003e \"invalid\", and we would also clear the IORESOURCE_STARTALIGN flag when we\n\u003e actually allocate the resource (so that we don\u0027t use the \"start\" field as\n\u003e alignment incorrectly when it no longer indicates alignment).\n\u003e\n\u003e That wouldn\u0027t be totally generic, but it would have the nice property of\n\u003e automatically at least add sanity checking for that whole \"res-\u003estart has\n\u003e the odd meaning of \u0027alignment\u0027 during probing\" and remove the need for a\n\u003e new field, and it would allow us to have a generic \"resource_alignment()\"\n\u003e routine that just gets a resource pointer.\n\nBesides, I removed IORESOURCE_BUS_HAS_VGA flag which was unused for ages.\n\nSigned-off-by: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nCc: Gary Hade \u003cgaryhade@us.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "94e6108803469a37ee1e3c92dafdd1d59298602f", "tree": "7f3ee30721411cca238f8eea5971d5bebbb70a55", "parents": [ "5e0d2a6fc094a9b5047998deefeb1254c66856ee" ], "author": { "name": "Ben Hutchings", "email": "bhutchings@solarflare.com", "time": "Wed Mar 05 16:52:39 2008 +0000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:07 2008 -0700" }, "message": "PCI: Expose PCI VPD through sysfs\n\nVital Product Data (VPD) may be exposed by PCI devices in several\nways. It is generally unsafe to read this information through the\nexisting interfaces to user-land because of stateful interfaces.\n\nThis adds:\n- abstract operations for VPD access (struct pci_vpd_ops)\n- VPD state information in struct pci_dev (struct pci_vpd)\n- an implementation of the VPD access method specified in PCI 2.2\n (in access.c)\n- a \u0027vpd\u0027 binary file in sysfs directories for PCI devices with VPD\n operations defined\n\nIt adds a probe for PCI 2.2 VPD in pci_scan_device() and release of\nVPD state in pci_release_dev().\n\nSigned-off-by: Ben Hutchings \u003cbhutchings@solarflare.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "7d715a6c1ae5785d00fb9a876b5abdfc43abc44b", "tree": "58ec6d1969739a590e0c6c976bfebf04c8e9f31e", "parents": [ "657472e9ccd9fccb82b775eb691c4b25b27451da" ], "author": { "name": "Shaohua Li", "email": "shaohua.li@intel.com", "time": "Mon Feb 25 09:46:41 2008 +0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:03 2008 -0700" }, "message": "PCI: add PCI Express ASPM support\n\nPCI Express ASPM defines a protocol for PCI Express components in the D0\nstate to reduce Link power by placing their Links into a low power state\nand instructing the other end of the Link to do likewise. This\ncapability allows hardware-autonomous, dynamic Link power reduction\nbeyond what is achievable by software-only controlled power management.\nHowever, The device should be configured by software appropriately.\nEnabling ASPM will save power, but will introduce device latency.\n\nThis patch adds ASPM support in Linux. It introduces a global policy for\nASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control\nit. The interface can be used as a boot option too. Currently we have\nbelow setting:\n -default, BIOS default setting\n -powersave, highest power saving mode, enable all available ASPM\nstate and clock power management\n -performance, highest performance, disable ASPM and clock power\nmanagement\nBy default, the \u0027default\u0027 policy is used currently.\n\nIn my test, power difference between powersave mode and performance mode\nis about 1.3w in a system with 3 PCIE links.\n\nNote: some devices might not work well with aspm, either because chipset\nissue or device issue. The patch provide API (pci_disable_link_state),\ndriver can disable ASPM for specific device.\n\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "cb3576fa34e36907e292f408cb6c258f4fd112ad", "tree": "39756b6a25ba477e0f58e3a4efd125d0953d4296", "parents": [ "21c6847406784fde73ad5ea47c2c3434714d58d1" ], "author": { "name": "Gary Hade", "email": "garyhade@us.ibm.com", "time": "Fri Feb 08 14:00:52 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:03 2008 -0700" }, "message": "PCI: Include PCI domain in PCI bus names on x86/x86_64\n\nThe PCI bus names included in /proc/iomem and /proc/ioports are\nof the form \u0027PCI Bus #XX\u0027 where XX is the bus number. This patch\nchanges the naming to \u0027PCI Bus XXXX:YY\u0027 where XXXX is the domain\nnumber and YY is the bus number. For example, PCI bus 14 in\ndomain 0 will show as \u0027PCI Bus 0000:14\u0027 instead of \u0027PCI Bus #14\u0027.\nThis change makes the naming consistent with other architectures\nsuch as ia64 where multiple PCI domain support has been around\nlonger.\n\nSigned-off-by: Gary Hade \u003cgaryhade@us.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "5ff580c10ec06fd296bd23d4570c1a95194094a0", "tree": "fc00b4a107824519ae452c264674e5b8c2768d8e", "parents": [ "c71c68a04ba7672b9373ef04173114c211bb9f88" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Feb 14 14:56:56 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:02 2008 -0700" }, "message": "PCI: remove global list of PCI devices\n\nThis patch finally removes the global list of PCI devices. We are\nrelying entirely on the list held in the driver core now, and do not\nneed a separate \"shadow\" list as no one uses it.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "8a1bc9013a03d41a0e36ee413bb6f97281b30bd1", "tree": "83c01850e1779e37be1d9db0f87436b09b89f3fe", "parents": [ "70308923d317f2ad4973c30d90bb48ae38761317" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Feb 14 14:56:56 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:47:00 2008 -0700" }, "message": "PCI: add is_added flag to struct pci_dev\n\nThis lets us check if the device is really added to the driver core or\nnot, which is what we need when walking some of the bus lists. The flag\nis there in anticipation of getting rid of the other PCI device list,\nwhich is what we used to check in this situation.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "70308923d317f2ad4973c30d90bb48ae38761317", "tree": "b49daa7440e68c952e88617b3a36577d5c85a87b", "parents": [ "1ba6ab11d8fbd8d29afec4e39236e1255ae0339a" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 13 22:30:39 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Apr 20 21:46:59 2008 -0700" }, "message": "PCI: make no_pci_devices() use the pci_bus_type list\n\nno_pci_devices() should use the driver core list of PCI devices, not our\n\"separate\" one.\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "39106dcf85285e78f3b290022122c76f851379b8", "tree": "7fe93aaf6a433920b1c31725f42db30799deaa55", "parents": [ "fb0f330e62d71f7c535251438068199af320cf73" ], "author": { "name": "Mike Travis", "email": "travis@sgi.com", "time": "Tue Apr 08 11:43:03 2008 -0700" }, "committer": { "name": "Ingo Molnar", "email": "mingo@elte.hu", "time": "Sat Apr 19 19:44:59 2008 +0200" }, "message": "cpumask: use new cpus_scnprintf function\n\n * Cleaned up references to cpumask_scnprintf() and added new\n cpulist_scnprintf() interfaces where appropriate.\n\n * Fix some small bugs (or code efficiency improvments) for various uses\n of cpumask_scnprintf.\n\n * Clean up some checkpatch errors.\n\nSigned-off-by: Mike Travis \u003ctravis@sgi.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n" }, { "commit": "0ab2b57f8db8a1bcdf24089074f5d2856a3ffb42", "tree": "8760e4422044976a965e3afced826fe9c4c02eff", "parents": [ "415b6d0e894333d8e5e5a384a483a01b9b782fc7" ], "author": { "name": "Sam Ravnborg", "email": "sam@ravnborg.org", "time": "Sun Feb 17 10:45:28 2008 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Mar 04 15:07:03 2008 -0800" }, "message": "PCI: fix section mismatch warning in pci_scan_child_bus\n\nFix following warning:\nWARNING: vmlinux.o(.text+0x47bdb1): Section mismatch in reference from the function pci_scan_child_bus() to the function .devinit.text:pcibios_fixup_bus()\n\nWe had plenty of functions that could be annotated __devinit but due to\nthe former restriction that exported symbols could not be annotated\nthey were not so. So annotate these function and fix the references\nfrom the pci/hotplug/* code to silence the resuting warnings.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "59fc67dedb46c29442989e52af39da67aea52512", "tree": "d75eb8ce840e1f9d2a2e2dd939e28396750186fb", "parents": [ "d22a6966b8029913fac37d078ab2403898d94c63" ], "author": { "name": "FUJITA Tomonori", "email": "tomof@acm.org", "time": "Mon Feb 04 22:28:14 2008 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Feb 05 09:44:12 2008 -0800" }, "message": "iommu sg merging: PCI: add dma segment boundary support\n\nThis adds PCI\u0027s accessor for segment_boundary_mask in device_dma_parameters.\n\nThe default segment_boundary is set to 0xffffffff, same to the block layer\u0027s\ndefault value (and the scsi mid layer uses the same value).\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nCc: James Bottomley \u003cJames.Bottomley@steeleye.com\u003e\nCc: Jens Axboe \u003cjens.axboe@oracle.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Jeff Garzik \u003cjeff@garzik.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "4d57cdfacaa1c207bf4c071f89835e0368766a50", "tree": "b0b617efcd2e228573e42e7efbea4a95955ddf70", "parents": [ "6b7b651055221127304a4e373ee9b762398d54d7" ], "author": { "name": "FUJITA Tomonori", "email": "tomof@acm.org", "time": "Mon Feb 04 22:27:55 2008 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Tue Feb 05 09:44:10 2008 -0800" }, "message": "iommu sg merging: PCI: add device_dma_parameters support\n\nThis adds struct device_dma_parameters in struct pci_dev and properly\nsets up a pointer in struct device.\n\nThe default max_segment_size is set to 64K, same to the block layer\u0027s\ndefault value.\n\nSigned-off-by: FUJITA Tomonori \u003cfujita.tomonori@lab.ntt.co.jp\u003e\nMostly-acked-by: Jeff Garzik \u003cjeff@garzik.org\u003e\nCc: James Bottomley \u003cJames.Bottomley@steeleye.com\u003e\nAcked-by: Jens Axboe \u003cjens.axboe@oracle.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "451124a7cc6c89fcb83d48082c7290f16f652f1c", "tree": "e81340f0d9e83f5447d60418972a064c888463c9", "parents": [ "4105717bc98ba01663ff28f8a16d8716ba9d07fe" ], "author": { "name": "Sam Ravnborg", "email": "sam@ravnborg.org", "time": "Sat Feb 02 22:33:43 2008 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sat Feb 02 15:08:04 2008 -0800" }, "message": "PCI: fix 4x section mismatch warnings\n\nThe following warnings were issued during build of\ndrivers/pci with an allyesconfig build:\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0xdaf): Section mismatch in reference from the function pci_add_new_bus() to the function .devinit.text:pci_alloc_child_bus()\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0x15e2): Section mismatch in reference from the function pci_scan_single_device() to the function .devinit.text:pci_scan_device()\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0x1b0c5): Section mismatch in reference from the function pci_bus_assign_resources() to the function .devinit.text:pci_setup_bridge()\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0x1b32d): Section mismatch in reference from the function pci_bus_size_bridges() to the function .devinit.text:pci_bus_size_cardbus()\n\nInvestigating each case closer it looked like all\nreferred functions are only used in the init phase\nor during hotplug.\nSo to avoid wasting too much memory in the non-hotplug\ncase the simpler fix was to allow the fuctions to\nuse code/data from the __devinit sections.\nThis was done in all four case by adding the __ref\nannotation.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nCc: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "4105717bc98ba01663ff28f8a16d8716ba9d07fe", "tree": "adfb3486587a21894035e31ceab84c1c44b8529f", "parents": [ "d5f78fb0c8ab7f929f94fa4087a2397ac8d29a30" ], "author": { "name": "Sam Ravnborg", "email": "sam@ravnborg.org", "time": "Sat Feb 02 22:32:23 2008 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sat Feb 02 15:04:30 2008 -0800" }, "message": "PCI: fix section mismatch warnings referring to pci_do_scan_bus\n\nFix following warnings:\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0xb054): Section mismatch in reference from the function cpci_configure_slot() to the function .devinit.text:pci_do_scan_bus()\nWARNING: o-x86_64/drivers/pci/built-in.o(.text+0x153ab): Section mismatch in reference from the function shpchp_configure_device() to the function .devinit.text:pci_do_scan_bus()\nWARNING: o-x86_64/drivers/pci/built-in.o(__ksymtab+0xc0): Section mismatch in reference from the variable __ksymtab_pci_do_scan_bus to the function .devinit.text:pci_do_scan_bus()\n\nPCI hotplug were the only user of pci_do_scan_bus()\nso moving this function to a separate file that is build\nonly when we enable CONFIG_HOTPLUG_PCI.\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nCc: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "cc3a1378b4dd45d3e78dd4aeb10641b06a87d614", "tree": "4eb9dc8f7cefc44926f886c467992e769b873c69", "parents": [ "ae9458d6a0956aa21cb49e1251e35a8d4dacbe6e" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sat Feb 02 11:32:01 2008 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sat Feb 02 11:32:01 2008 -0800" }, "message": "Revert \"PCI: PCIE ASPM support\"\n\nThis reverts commit 6c723d5bd89f03fc3ef627d50f89ade054d2ee3b.\n\nIt caused build errors on non-x86 platforms, config file confusion, and\neven some boot errors on some x86-64 boxes. All around, not quite ready\nfor prime-time :(\n\nCc: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "fd7d1ced29e5beb88c9068801da7a362606d8273", "tree": "40bfac045b8f7e6b94da04f76ed402395edc45cf", "parents": [ "05cca6e52a5a75ffd491fb50a9f636075b2d77ba" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue May 22 22:47:54 2007 -0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:31 2008 -0800" }, "message": "PCI: make pci_bus a struct device\n\nThis moves the pci_bus class device to be a real struct device and at\nthe same time, place it in the device tree in the correct location.\n\nNote, the old \"bridge\" symlink is now gone, but this was a non-standard\nlink and no userspace program used it. If you need to determine the\ndevice that the bus is on, follow the standard device symlink, or walk\nup the device tree.\n\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "6c723d5bd89f03fc3ef627d50f89ade054d2ee3b", "tree": "45fcf8a380b48ddf686456ff65a2234c23c05504", "parents": [ "5c796ae7a7ebe56967ed9b9963d7c16d733635ff" ], "author": { "name": "Shaohua Li", "email": "shaohua.li@intel.com", "time": "Thu Jan 24 10:21:57 2008 +0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:30 2008 -0800" }, "message": "PCI: PCIE ASPM support\n\nPCI Express ASPM defines a protocol for PCI Express components in the D0\nstate to reduce Link power by placing their Links into a low power state\nand instructing the other end of the Link to do likewise. This\ncapability allows hardware-autonomous, dynamic Link power reduction\nbeyond what is achievable by software-only controlled power management.\nHowever, The device should be configured by software appropriately.\nEnabling ASPM will save power, but will introduce device latency.\n\nThis patch adds ASPM support in Linux. It introduces a global policy for\nASPM, a sysfs file /sys/module/pcie_aspm/parameters/policy can control\nit. The interface can be used as a boot option too. Currently we have\nbelow setting:\n -default, BIOS default setting\n -powersave, highest power saving mode, enable all available ASPM\nstate\nand clock power management\n -performance, highest performance, disable ASPM and clock power\nmanagement\nBy default, the \u0027default\u0027 policy is used currently.\n\nIn my test, power difference between powersave mode and performance mode\nis about 1.3w in a system with 3 PCIE links.\n\nSigned-off-by: Shaohua Li \u003cshaohua.li@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "a6f29a98af278a8d784a870ae9f08e530de73ffe", "tree": "61886853d2ac0223bc61be64879b5703458f2760", "parents": [ "94688cf2454986309fbcd495233ba2423786a14a" ], "author": { "name": "Joe Perches", "email": "joe@perches.com", "time": "Mon Nov 19 17:48:29 2007 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:22 2008 -0800" }, "message": "PCI: Add missing \"space\" in printk messages\n\nSigned-off-by: Joe Perches \u003cjoe@perches.com\u003e\nCc: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "943e6c0d5cb88453210747d9042d4a8f92ee2974", "tree": "3356d994243ffec899f46903fec0d2f50cca98a0", "parents": [ "b73e96878d5d57605aeea89068c8dacd568f5e7e" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Wed Nov 21 15:07:12 2007 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:21 2008 -0800" }, "message": "PCI: remove additional pci_scan_child_bus() prototype\n\nThere\u0027s already a prototype for pci_scan_child_bus() at the correct place in\npci.h, so there\u0027s no reason for an additional one.\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "b73e96878d5d57605aeea89068c8dacd568f5e7e", "tree": "b1d7bab4cbd24f927c9f54bb9b63bbdb9cd4fac3", "parents": [ "0741a951e8489ef2889d9e3eecf33bb29b779dd0" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Wed Nov 21 15:07:11 2007 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:21 2008 -0800" }, "message": "PCI: always export pci_scan_single_device\n\nThis patch fixes the following build error with CONFIG_HOTPLUG\u003dn:\n\n MODPOST 2137 modules\nERROR: \"pci_scan_single_device\" [drivers/edac/i82875p_edac.ko] undefined!\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nAcked-by: Doug Thompson \u003cnorsk5@yahoo.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "eb003ec26556057e5f27d4b989bbb432d0bdc0f4", "tree": "25f8d27c46f3d289590eef153e8412caba2ddd8b", "parents": [ "b09549ef9b66b9547520572bedd7af3c1f0747d7" ], "author": { "name": "Adrian Bunk", "email": "bunk@kernel.org", "time": "Sat Oct 27 03:06:33 2007 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Feb 01 15:04:18 2008 -0800" }, "message": "PCI: drivers/pci/: remove unused exports\n\nThis patch removes the following unused exports:\n- remove the following unused EXPORT_SYMBOL\u0027s:\n - pci-acpi.c: pci_osc_support_set\n - proc.c: pci_proc_detach_bus\n- remove the following unused EXPORT_SYMBOL_GPL\u0027s:\n - bus.c: pci_walk_bus\n - probe.c: pci_create_bus\n - setup-res.c: pci_claim_resource\n\nSigned-off-by: Adrian Bunk \u003cbunk@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "b249072ee6897fe4f8d461c7bb4b926223263c28", "tree": "a6dde5703458677302516145c47f308e52cda189", "parents": [ "0fed80f7a63abd7168907267af69ee31f6bcf301" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Nov 01 19:41:16 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Jan 24 20:40:33 2008 -0800" }, "message": "driver core: add way to get to bus device klist\n\nThis allows an easier way to get to the device klist associated with a\nstruct bus_type (you have three to choose from...) This will make it\neasier to move these fields to be dynamic in a future patch.\n\nThe only user of this is the PCI core which horribly abuses this\ninterface to rearrange the order of the pci devices. This should be\ndone using the existing bus device walking functions, but that\u0027s left\nfor future patches.\n\nCc: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "ad7edfe0490877864dc0312e5f3315ea37fc4b3a", "tree": "5d73689cca22b683866d8c77406aefc26dbf7f40", "parents": [ "c68cb23dde29fb107575656effa46f7b9440ac04" ], "author": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Dec 27 21:21:36 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Dec 27 21:21:36 2007 -0800" }, "message": "[PCI] Do not enable CRS Software Visibility by default\n\nIt appears that some PCI-E bridges do the wrong thing in the presense of\nCRS Software Visibility and MMCONFIG. In particular, it looks like an\nATI bridge (device ID 7936) will return 0001 in the vendor ID field of\nany bridged devices indefinitely.\n\nNot enabling CRS SV avoids the problem, and as we currently do not\nreally make good use of the feature anyway (we just time out rather than\ndo any threaded discovery as suggested by the CRS specs), we\u0027re better\noff just not enabling it.\n\nThis should fix a slew of problem reports with random devices (generally\ngraphics adapters or fairly high-performance networking cards, since it\nonly affected PCI-E) not getting properly recognized on these AMD systems.\n\nIf we really want to use CRS-SV, we may end up eventually needing a\nwhitelist of systems where this should be enabled, along with some kind\nof \"pcibios_enable_crs()\" query to call the system-specific code.\n\nSuggested-by: Loic Prylli \u003cloic@myri.com\u003e\nTested-by: Kai Ruhnau \u003ckai@tragetaschen.dyndns.org\u003e\nCc: Matthew Wilcox \u003cmatthew@wil.cx\u003e\nCc: Greg Kroah-Hartman \u003cgreg@kroah.com\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "bb44609361fe87c5e136c2b8dfde59bcbdbabf61", "tree": "39022585117940b349df31d7f092c91663d076d0", "parents": [ "da8cadb31b82c9d41fc593c8deab6aa20b162d6b" ], "author": { "name": "Gary Hade", "email": "garyhade@us.ibm.com", "time": "Tue Dec 11 17:09:13 2007 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Dec 17 10:41:19 2007 -0800" }, "message": "PCI: Restore PCI expansion ROM P2P prefetch window creation\n\nRestore PCI expansion ROM P2P prefetch window creation.\n\nThis patch reverts previous \"Avoid creating P2P prefetch\nwindow for expansion ROMs\" change due to regressions that\nwere spotted on some systems.\n\nSigned-off-by: Gary Hade \u003cgaryhade@us.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "af1bff4f1d117f99ad8a88e6532baff475fb44a5", "tree": "8ef0d23ec3c42e5ad190f1dc7ef1acb832040362", "parents": [ "6d98bda79bea0e1be26c0767d0e9923ad3b72f2e" ], "author": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Dec 10 07:40:54 2007 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Dec 10 07:40:54 2007 -0800" }, "message": "Revert \"PCI: fix IDE legacy mode resources\"\n\nThis reverts commit fd6e732186ab522c812ab19c2c5e5befb8ec8115, which\nhelped up things on MIPS, but was wrong for everything else. As Ralf\nBaechle puts it:\n\n \"It seems the whole MIPS resource managment is complicated enough (out\n of necessity) that only a few people actually grok it. Ioports being\n actually memory mapped on MIPS only makes the confusion worse, sigh.\"\n\nRequested-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Alan Cox \u003calan@redhat.com\u003e\nAcked-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "994a65e25df85abc465cfee495557200e8205f9e", "tree": "2b6676898cccc03a356a67a3173fdb50bb25abb6", "parents": [ "10e5247f40f3bf7508a0ed2848c9cae37bddf4bc" ], "author": { "name": "Keshavamurthy, Anil S", "email": "anil.s.keshavamurthy@intel.com", "time": "Sun Oct 21 16:41:46 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Oct 22 08:13:18 2007 -0700" }, "message": "Intel IOMMU: PCI generic helper function\n\nWhen devices are under a p2p bridge, upstream transactions get replaced by the\ndevice id of the bridge as it owns the PCIE transaction. Hence its necessary\nto setup translations on behalf of the bridge as well. Due to this limitation\nall devices under a p2p share the same domain in a DMAR.\n\nWe just cache the type of device, if its a native PCIe device\nor not for later use.\n\n[akpm@linux-foundation.org: BUG_ON -\u003e WARN_ON+recover]\nSigned-off-by: Anil S Keshavamurthy \u003canil.s.keshavamurthy@intel.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Muli Ben-Yehuda \u003cmuli@il.ibm.com\u003e\nCc: \"Siddha, Suresh B\" \u003csuresh.b.siddha@intel.com\u003e\nCc: Arjan van de Ven \u003carjan@infradead.org\u003e\nCc: Ashok Raj \u003cashok.raj@intel.com\u003e\nCc: \"David S. Miller\" \u003cdavem@davemloft.net\u003e\nCc: Christoph Lameter \u003cclameter@sgi.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "11949255d9433ea6c0908b7390ec4faecd1d4cf0", "tree": "bfbec17f06906f9fbbc65263af010b4cb170c80a", "parents": [ "62f420f828249f686aaae949ac3439d1304a759a" ], "author": { "name": "Gary Hade", "email": "garyhade@us.ibm.com", "time": "Mon Oct 08 16:24:16 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Oct 12 15:03:18 2007 -0700" }, "message": "PCI: modify PCI bridge control ISA flag for clarity\n\nModify PCI Bridge Control ISA flag for clarity\n\nThis patch changes PCI_BRIDGE_CTL_NO_ISA to PCI_BRIDGE_CTL_ISA\nand modifies it\u0027s clarifying comment and locations where used.\nThe change reduces the chance of future confusion since it makes\nthe set/unset meaning of the bit the same in both the bridge\ncontrol register and bridge_ctl field of the pci_bus struct.\n\nSigned-off-by: Gary Hade \u003cgaryhade@us.ibm.com\u003e\nAcked-by: Linas Vepstas \u003clinas@austin.ibm.com\u003e\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "fd64cb4606cbdd592b7119e82341d4ae5b56f2cc", "tree": "7e7a6d9a3a2bbc29c2259351ccd315c7e666998b", "parents": [ "036fff4cf732c4d69f99a2915924935705744b00" ], "author": { "name": "Gary Hade", "email": "garyhade@us.ibm.com", "time": "Wed Oct 03 15:56:30 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Oct 12 15:03:18 2007 -0700" }, "message": "PCI: avoid P2P prefetch window for expansion ROMs\n\nAvoid creating P2P prefetch window for expansion ROMs\n\nBecause of the future possibility that P2P prefetch windows will contain\naddress ranges above 4GB some BIOSes are providing space in the P2P\nnon-prefetch windows for expansion ROMs. This is due to expansion ROM\nBAR 32-bit limitation. When expansion ROM BARs without BIOS assigned\naddress(es) are currently found behind a P2P bridge, the kernel attempts\nto create a P2P prefetch window for them even though space for them has\nalready been provided in the non-prefetch window. _CRS on some systems\nwith certain resource conservation conscious BIOSes may not provide the\nextra 1MB or more memory resource needed for the expansion ROM motivated\nprefetch window causing resource allocation errors.\n\nThis change corrects the problem by removing IORESOURCE_PREFETCH from\nthe expansion ROM flags initialization. It also removes\nIORESOURCE_CACHEABLE which seems inappropriate if only non-cacheable\nmemory is available.\n\nSigned-off-by: Gary Hade \u003cgary.hade@us.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "036fff4cf732c4d69f99a2915924935705744b00", "tree": "87f6f02e40e8f5c28e6d629e009e6e64a45eec58", "parents": [ "8fa5913d54f3b1e09948e6a0db34da887e05ff1f" ], "author": { "name": "Gary Hade", "email": "garyhade@us.ibm.com", "time": "Wed Oct 03 15:56:14 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Oct 12 15:03:18 2007 -0700" }, "message": "PCI: skip ISA ioresource alignment on some systems\n\nSkip ISA ioresource alignment on some systems\n\nTo conserve limited PCI i/o resource on some IBM multi-node systems, the\nBIOS allocates (via _CRS) and expects the kernel to use addresses in\nranges currently excluded by pcibios_align_resource() [i386/pci/i386.c].\nThis change allows the kernel to use the currently excluded address\nranges on the IBM x3800, x3850, and x3950.\n\nSigned-off-by: Gary Hade \u003cgary.hade@us.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "fd6e732186ab522c812ab19c2c5e5befb8ec8115", "tree": "dd65db780133a32476c5d68f21aa8350221d62e4", "parents": [ "cbf5d9e6b9bcf03291cbb51db144b3e2773a8a2d" ], "author": { "name": "Yoichi Yuasa", "email": "yoichi_yuasa@tripeaks.co.jp", "time": "Tue Oct 02 14:19:23 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Oct 12 15:03:17 2007 -0700" }, "message": "PCI: fix IDE legacy mode resources\n\nI got the following error on MIPS Cobalt.\n\nPCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1\npata_via 0000:00:09.1: failed to request/iomap BARs for port 0 (errno\u003d-16)\nPCI: Unable to reserve I/O region #3:8@f0000170 for device 0000:00:09.1\npata_via 0000:00:09.1: failed to request/iomap BARs for port 1 (errno\u003d-16)\npata_via 0000:00:09.1: no available native port\n\nThe legacy mode IDE resources set the following order.\n\npci_setup_device()\n Legacy mode ATA controllers have fixed addresses.\n IDE resources: 0x1F0-0x1F7, 0x3F6, 0x170-0x177, 0x376\n |\n V\npcibios_fixup_bus()\n MIPS Cobalt PCI bus regions have the -0x10000000 offset from PCI resources.\n pcibios_fixup_bus() fix PCI bus regions.\n 0x1F0 - 0x10000000 \u003d 0xF00001F0\n |\n V\nata_pci_init_one()\n PCI: Unable to reserve I/O region #1:8@f00001f0 for device 0000:00:09.1\n\nIn some architectures, PCI bus regions have the offset from PCI resources. \nFor this reason, pci_setup_device() should set PCI bus regions to\ndev-\u003eresource[].\n\n[akpm@linux-foundation.org: use struct initialiser]\nSigned-off-by: Yoichi Yuasa \u003cyoichi_yuasa@tripeaks.co.jp\u003e\nCc: Alan Cox \u003calan@lxorguk.ukuu.org.uk\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Bartlomiej Zolnierkiewicz \u003cbzolnier@gmail.com\u003e\nCc: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "e365c3e75ef00a78bd38757a9da12e84039c2828", "tree": "085da9e9066e6ffed5867182abddb5676917e89f", "parents": [ "5547bbeed37f7ab64942ffcce9293681101577ef" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Thu Aug 23 18:49:17 2007 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Sep 11 04:22:16 2007 -0700" }, "message": "PCI: remove devinit from pci_read_bridge_bases\n\nOn MIPS with PCI \u0026\u0026 !HOTPLUG, I\u0027m currently getting the following modpost\nwarning:\n\n MODPOST vmlinux.o\nWARNING: vmlinux.o(.text+0x1ce128): Section mismatch: reference to .init.text:pci_read_bridge_bases (between \u0027pcibios_fixup_bus\u0027 and \u0027pcibios_enable_device\u0027)\n\nOn MIPS I have the call chains pci_scan_child_bus -\u003e pcibios_fixup_bus -\u003e\npci_read_bridge_bases. pci_scan_child_bus can\u0027t be __devinit because it\nit is an exported symbol, thus pcibios_fixup_bus and pci_read_bridge_bases\ncan\u0027t be either.\n\nFor some reason I don\u0027t see this issue on x86; I blame compiler differences.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "d55bef515a01c85aa65c03c285ea8d285fcbab3b", "tree": "24851b5f4bd1e8cd5473f214de1c738b7df2e3bc", "parents": [ "60ac8f20feb0bba8caee63be3e7ca5801fe16d4c" ], "author": { "name": "Bernhard Kaindl", "email": "bk@suse.de", "time": "Mon Jul 30 20:35:13 2007 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Aug 22 14:48:40 2007 -0700" }, "message": "PCI: lets kill the \u0027PCI hidden behind bridge\u0027 message\n\nAdrian Bunk wrote:\n\u003e Alois Nešpor wrote\n\u003e\u003e PCI: Bus #0b (-#0e) is hidden behind transparent bridge #0a (-#0b) (try \u0027pci\u003dassign-busses\u0027)\n\u003e\u003e Please report the result to linux-kernel to fix this permanently\"\n\u003e\u003e\n\u003e\u003e dmesg:\n\u003e\u003e \"Yenta: Raising subordinate bus# of parent bus (#0a) from #0b to #0e\"\n\u003e\u003e without pci\u003dassign-busses and nothing with pci\u003dassign-busses.\n\u003e \n\u003e Bernhard?\n\nOk, lets kill the message. As Alois Nešpor also saw, that\u0027s fixed up by Yenta,\nso PCI does not have to warn about it. PCI could still warn about it if\nis_cardbus is 0 in that instance of pci_scan_bridge(), but so far I have\nnot seen a report where this would have been the case so I think we can\nspare the kernel of that check (removes ~300 lines of asm) unless debugging\nis done.\n\nHistory: The whole check was added in the days before we had the fixup\nfor this in Yenta and pci\u003dassign-busses was the only way to get CardBus\ncards detected on many (not all) of the machines which give this warning.\n\nIn theory, there could be cases when this warning would be triggered and\nit\u0027s not cardbus, then the warning should still apply, but I think this\nshould only be the case when working on a completely broken PCI setup,\nbut one may have already enabled the debug code in drivers/pci and the\npatched check would then trigger.\n\nI do not sign this off yet because it\u0027s completely untested so far, but\neveryone is free to test it (with the #ifdef DEBUG replaced by #if 1 and\npr_debug( changed to printk(.\n\nWe may also dump the whole check (remove everything within the #ifdef from\nthe source) if that\u0027s perferred.\n\nOn Alois Nešpor\u0027s machine this would then (only when debugging) this message:\n\n\"PCI: Bus #0b (-#0e) is partially hidden behind transparent bridge #0a (-#0b)\"\n\n\"partially\" should be in the message on his machine because #0b of #0b-#0e \nis reachable behind #0a-#0b, but not #0c-#0e.\n\nBut that differentiation is now moot anyway because the fixup in Yenta takes\ncare of it as far as I could see so far, which means that unless somebody\nis debugging a totally broken PCI setup, this message is not needed anymore,\nnot even for debugging PCI.\n\n\nOk, here the patch with the following changes:\n\n* Refined to say that the bus is only partially hidden when the parent\n bus numbers are not totally way off (outside of) the child bus range\n* remove the reference to pci\u003dassign-busses and the plea to report it\n\nWe could add a pure source code-only comment to keep a reference to\npci\u003dassign-busses the in case when this is triggered by someone who\nis debugging the cause of this message and looking the way to solve it.\n\nFrom: Bernhard Kaindl \u003cbk@suse.de\u003e\nCc: stable \u003cstable@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "ed4aaadb1a7913f509f05d3e67840541a180713f", "tree": "7089fd2fe0f56d552ea153e2925363d0febaa952", "parents": [ "012bfdf00ce2f36a1add75a0d18303656c6294ef" ], "author": { "name": "Zhang, Yanmin", "email": "yanmin_zhang@linux.intel.com", "time": "Sun Jul 15 23:39:39 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Mon Jul 16 09:05:40 2007 -0700" }, "message": "fix jvc cdrom drive lockup\n\nBefore calling init_hwif_default, ide_unregister gets lock ide_lock and\ndisables irq. init_hwif_default calls ide_default_io_base which calls\npci_get_device and later pci_get_subsys tries to apply for semaphore\npci_bus_sem and goes to sleep.\n\nMostly, pci_get_device should be called when irq is turned on.\n\nide_default_io_base just needs find if list pci_devices is empty.\n\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nCc: Bartlomiej Zolnierkiewicz \u003cbzolnier@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "21ba0f88ae56da82a3a15fe54d729208b64c4f4b", "tree": "17ce67f276fe3ea7284c3dc730bdd6a2ec7dfe2f", "parents": [ "dc690d8ef842b464f1c429a376ca16cb8dbee6ae", "36e235901f90fb83215be43cbd8f1ca14661ea40" ], "author": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Jul 12 13:40:57 2007 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.linux-foundation.org", "time": "Thu Jul 12 13:40:57 2007 -0700" }, "message": "Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6\n\n* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (34 commits)\n PCI: Only build PCI syscalls on architectures that want them\n PCI: limit pci_get_bus_and_slot to domain 0\n PCI: hotplug: acpiphp: avoid acpiphp \"cannot get bridge info\" PCI hotplug failure\n PCI: hotplug: acpiphp: remove hot plug parameter write to PCI host bridge\n PCI: hotplug: acpiphp: fix slot poweroff problem on systems without _PS3\n PCI: hotplug: pciehp: wait for 1 second after power off slot\n PCI: pci_set_power_state(): check for PM capabilities earlier\n PCI: cpci_hotplug: Convert to use the kthread API\n PCI: add pci_try_set_mwi\n PCI: pcie: remove SPIN_LOCK_UNLOCKED\n PCI: ROUND_UP macro cleanup in drivers/pci\n PCI: remove pci_dac_dma_... APIs\n PCI: pci-x-pci-express-read-control-interfaces cleanups\n PCI: Fix typo in include/linux/pci.h\n PCI: pci_ids, remove double or more empty lines\n PCI: pci_ids, add atheros and 3com_2 vendors\n PCI: pci_ids, reorder some entries\n PCI: i386: traps, change VENDOR to DEVICE\n PCI: ATM: lanai, change VENDOR to DEVICE\n PCI: Change all drivers to use pci_device-\u003erevision\n ...\n" }, { "commit": "7b595756ec1f49e0049a9e01a1298d53a7faaa15", "tree": "cd06687ab3e5c7a5a4ef91903dff207a18c4db76", "parents": [ "dbde0fcf9f8f6d477af3c32d9979e789ee680cde" ], "author": { "name": "Tejun Heo", "email": "htejun@gmail.com", "time": "Thu Jun 14 03:45:17 2007 +0900" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jul 11 16:09:06 2007 -0700" }, "message": "sysfs: kill unnecessary attribute-\u003eowner\n\nsysfs is now completely out of driver/module lifetime game. After\ndeletion, a sysfs node doesn\u0027t access anything outside sysfs proper,\nso there\u0027s no reason to hold onto the attribute owners. Note that\noften the wrong modules were accounted for as owners leading to\naccessing removed modules.\n\nThis patch kills now unnecessary attribute-\u003eowner. Note that with\nthis change, userland holding a sysfs node does not prevent the\nbacking module from being unloaded.\n\nFor more info regarding lifetime rule cleanup, please read the\nfollowing message.\n\n http://article.gmane.org/gmane.linux.kernel/510293\n\n(tweaked by Greg to not delete the field just yet, to make it easier to\nmerge things properly.)\n\nSigned-off-by: Tejun Heo \u003chtejun@gmail.com\u003e\nCc: Cornelia Huck \u003ccornelia.huck@de.ibm.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "b8a3a5214d7cc115f1ca3a3967b7229d97c46f4a", "tree": "221d50091530cb442496e09591b3bf7ac06e57b4", "parents": [ "56906c612e10b5e32a48ccbe8a3c08ab6acf5a28" ], "author": { "name": "Auke Kok", "email": "auke-jan.h.kok@intel.com", "time": "Fri Jun 08 15:46:30 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jul 11 16:02:09 2007 -0700" }, "message": "PCI: read revision ID by default\n\nCurrently there are 97 occurrences where drivers need the pci\nrevision ID. We can do this once for all devices. Even the pci\nsubsystem needs the revision several times for quirks. The extra\nu8 member pads out nicely in the pci_dev struct.\n\nSigned-off-by: Auke Kok \u003cauke-jan.h.kok@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "a23adb5b2db7f2a0758abfa20b0220dbcbfd7aa9", "tree": "6f4ffa1821b6713922b9b908df7d438f20cfebff", "parents": [ "46ae3571526e4fc3a004053b5fb57984ca5b3eb6" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Jun 07 13:27:09 2007 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jul 11 16:02:06 2007 -0700" }, "message": "PCI: point people to Bernhard instead of the linux-kernel list\n\nBack in commit 8c4b2cf9af9b4ecc29d4f0ec4ecc8e94dc4432d7, Bernhard said\nthat he would fix up all instances of when this message happens. So\npoint people at him instead of the linux-kernel list which can not fix\nthings up.\n\nCc: Bernhard Kaindl \u003cbk@suse.de\u003e\nCc: Dave Jones \u003cdavej@redhat.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Miles Lane \u003cmiles.lane@gmail.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "4aa9bc955d61fdf03b5f9cee67db188fe1ffa8b7", "tree": "bd0604f5d7308d63cafbb1e3134580e284d86a50", "parents": [ "bab41e9be75121c473b00df2ffa33af3c44066a7" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Apr 05 17:19:10 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:37 2007 -0700" }, "message": "MSI: Use a list instead of the custom link structure\n\nThe msi descriptors are linked together with what looks a lot like\na linked list, but isn\u0027t a struct list_head list. Make it one.\n\nThe only complication is that previously we walked a list of irqs, and\ngot the descriptor for each with get_irq_msi(). Now we have a list of\ndescriptors and need to get the irq out of it, so it needs to be in the\nactual struct msi_desc. We use 0 to indicate no irq is setup.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "bab41e9be75121c473b00df2ffa33af3c44066a7", "tree": "cd519c2a32c951914ec7e7f909ae3822313f594c", "parents": [ "65891215e6b822c368fb3f36abf129ed48af8be0" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Apr 05 17:19:09 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:37 2007 -0700" }, "message": "PCI: Convert to alloc_pci_dev()\n\nConvert code that allocs a struct pci_dev to use alloc_pci_dev().\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "65891215e6b822c368fb3f36abf129ed48af8be0", "tree": "6cc1de94ca66a8f627775d1ddff3600ee8236ed3", "parents": [ "c9953a73e92df11edd812d863ff741877ea9e58c" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Apr 05 17:19:08 2007 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:37 2007 -0700" }, "message": "PCI: Create alloc_pci_dev(), the one true way to create a struct pci_dev\n\nThere are currently several places in the kernel where we kmalloc()\na struct pci_dev and start initialising it. It\u0027d be preferable to\nhave an allocator so we can ensure the pci_dev is correctly initialised\nin one place.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "96bde06a2df1b363206d3cdef53134b84ff37813", "tree": "4d3cc2c8c73a0534bc65e56ff1dec39eaa823b4c", "parents": [ "6ba186361ed2cda7e174856a3ab8a8e3237b3c3d" ], "author": { "name": "Sam Ravnborg", "email": "sam@ravnborg.org", "time": "Mon Mar 26 21:53:30 2007 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed May 02 19:02:35 2007 -0700" }, "message": "pci: do not mark exported functions as __devinit\n\nFunctions marked __devinit will be removed after kernel init. But being\nexported they are potentially called by a module much later.\n\nSo the safer choice seems to be to keep the function even in the non\nCONFIG_HOTPLUG case.\n\nThis silence the follwoing section mismatch warnings:\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_add_device from __ksymtab_gpl between \u0027__ksymtab_pci_bus_add_device\u0027 (at offset 0x20) and \u0027__ksymtab_pci_walk_bus\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_create_bus from __ksymtab_gpl between \u0027__ksymtab_pci_create_bus\u0027 (at offset 0x40) and \u0027__ksymtab_pci_stop_bus_device\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_max_busnr from __ksymtab_gpl between \u0027__ksymtab_pci_bus_max_busnr\u0027 (at offset 0xc0) and \u0027__ksymtab_pci_assign_resource_fixed\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_claim_resource from __ksymtab_gpl between \u0027__ksymtab_pci_claim_resource\u0027 (at offset 0xe0) and \u0027__ksymtab_pcie_port_bus_type\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_add_devices from __ksymtab between \u0027__ksymtab_pci_bus_add_devices\u0027 (at offset 0x70) and \u0027__ksymtab_pci_bus_alloc_resource\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_scan_bus_parented from __ksymtab between \u0027__ksymtab_pci_scan_bus_parented\u0027 (at offset 0x90) and \u0027__ksymtab_pci_root_buses\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_assign_resources from __ksymtab between \u0027__ksymtab_pci_bus_assign_resources\u0027 (at offset 0x4d0) and \u0027__ksymtab_pci_bus_size_bridges\u0027\nWARNING: drivers/built-in.o - Section mismatch: reference to .init.text:pci_bus_size_bridges from __ksymtab between \u0027__ksymtab_pci_bus_size_bridges\u0027 (at offset 0x4e0) and \u0027__ksymtab_pci_setup_cardbus\u0027\n\nSigned-off-by: Sam Ravnborg \u003csam@ravnborg.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "01abc2aa0f447bce2f6beb06dd0607ba0f01c5bb", "tree": "b96d0ee538ea3a47ca443db2a221ba95b04a022b", "parents": [ "c445a31cd7f469d77acc37538ab43a99530968b8" ], "author": { "name": "Bartlomiej Zolnierkiewicz", "email": "bzolnier@gmail.com", "time": "Mon Apr 23 23:19:36 2007 +0200" }, "committer": { "name": "Bartlomiej Zolnierkiewicz", "email": "bzolnier@gmail.com", "time": "Mon Apr 23 23:19:36 2007 +0200" }, "message": "Revert \"adjust legacy IDE resource setting (v2)\"\n\nThis reverts commit ed8ccee0918ad063a4741c0656fda783e02df627.\n\nIt causes hang on boot for some users and we don\u0027t yet know why:\n\nhttp://bugzilla.kernel.org/show_bug.cgi?id\u003d7562\n\nhttp://lkml.org/lkml/2007/4/20/404\nhttp://lkml.org/lkml/2007/3/25/113\n\nJust reverse it for 2.6.21-final, having broken X server is somehow\nbetter than unbootable system.\n\nSigned-off-by: Bartlomiej Zolnierkiewicz \u003cbzolnier@gmail.com\u003e\n" }, { "commit": "ed8ccee0918ad063a4741c0656fda783e02df627", "tree": "c624b62b93f594511e8802232c0c00a2cdfcd99f", "parents": [ "9e5755bce00bb563739aeb0f09932a1907521167" ], "author": { "name": "Jan Beulich", "email": "jbeulich@novell.com", "time": "Sat Mar 03 17:48:54 2007 +0100" }, "committer": { "name": "Bartlomiej Zolnierkiewicz", "email": "bzolnier@gmail.com", "time": "Sat Mar 03 17:48:54 2007 +0100" }, "message": "adjust legacy IDE resource setting (v2)\n\nThe change to force legacy mode IDE channels\u0027 resources to fixed non-zero\nvalues confuses (at least some versions of) X, because the values reported\nby the kernel and those readable from PCI config space aren\u0027t consistent\nanymore. Therefore, this patch arranges for the respective BARs to also\nget updated if possible.\n\nSigned-off-by: Jan Beulich \u003cjbeulich@novell.com\u003e\nAcked-by: Alan Cox \u003calan@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Bartlomiej Zolnierkiewicz \u003cbzolnier@gmail.com\u003e\n" }, { "commit": "0fcfdabbdbedb3bdc63f29209aeeac805df78a92", "tree": "49b924287acdf067d470c1d07c0fa02c099e0c0e", "parents": [ "88187dfa4d8bb565df762f272511d2c91e427e0d" ], "author": { "name": "Michael Ellerman", "email": "michael@ellerman.id.au", "time": "Thu Jan 25 19:34:08 2007 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:07 2007 -0800" }, "message": "MSI: Remove pci_scan_msi_device()\n\npci_scan_msi_device() doesn\u0027t do anything anymore, so remove it.\n\nSigned-off-by: Michael Ellerman \u003cmichael@ellerman.id.au\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "07eddf3d597f2d009a37a4e8c7c32a1ffe992f3e", "tree": "6ed35aff253bdf7aa01572687fcff5f0b7241606", "parents": [ "5331be090567d9335476f876b2d85427cd7c4426" ], "author": { "name": "Yinghai Lu", "email": "yinghai.lu@amd.com", "time": "Wed Nov 29 13:53:10 2006 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 07 15:50:03 2007 -0800" }, "message": "PCI: check szhi when sz is 0 when 64 bit iomem bigger than 4G\n\nFor pci mem resource that size is bigger than 4G, the sz returned by\npc_size will be 0.\nSo that resource is skipped, and register contained hi address will be\ntreated as another 32bit resource. We need to use sz64 and pci_sz64 for\n64 bit resource for clear logical. Typical usages for this: Opteron\nsystem with co-processor and the co-processor could take more than 4G\nRAM as pre-fetchable mem resource.\n\n\nSigned-off-by: Yinghai Lu \u003cyinghai.lu@amd.com\u003e\nCc: Andi Kleen \u003cak@suse.de\u003e\nCc: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "76e6a1d6607e5b58003bb87e3b3220d5fdb7568d", "tree": "164331d166fabe44f3e25bed11ff802a7d25d624", "parents": [ "29263fbf9ecfcf294efdd8a51aa9191f423515ed" ], "author": { "name": "Randy Dunlap", "email": "randy.dunlap@oracle.com", "time": "Fri Dec 29 16:47:29 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Sat Dec 30 10:55:55 2006 -0800" }, "message": "[PATCH] pci/probe: fix macro that confuses kernel-doc\n\nDon\u0027t have macros between a function\u0027s kernel-doc block and the function\ndefinition. This is not valid for kernel-doc.\n\nWarning(/var/linsrc/linux-2.6.20-rc1-git8//drivers/pci/probe.c:653): No description found for parameter \u0027IORESOURCE_PCI_FIXED\u0027\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "fb0f2b40faff41f03acaa2ee6e6231fc96ca497c", "tree": "10f2f69cb43d6440313bb3efdc53ca69334830c0", "parents": [ "7e7a43c32a8970ea2bfc3d1af353dcb1a9237769" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Dec 19 13:12:08 2006 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Dec 20 10:54:43 2006 -0800" }, "message": "PCI legacy resource fix\n\nSince commit 368c73d4f689dae0807d0a2aa74c61fd2b9b075f the kernel will try\nto update the non-writeable BAR registers 0..3 of PIIX4 IDE adapters if\npci_assign_unassigned_resources() is used to do full resource assignment of\nthe bus. This fails because in the PIIX4 these BAR registers have\nimplicitly assumed values and read back as zero; it used to work because\nthe kernel used to just write zero to that register the read back value did\nmatch what was written.\n\nThe fix is a new resource flag IORESOURCE_PCI_FIXED used to mark a resource\nas non-movable. This will also be useful to keep other import system\nresources from being moved around - for example system consoles on PCI\nbusses.\n\n[akpm@osdl.org: cleanup]\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nAcked-by: Alan Cox \u003calan@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "873481367edb18a7d0d7e5a285e6728c16bb44a9", "tree": "dd97507a3c061addac715bb07bfd5c4991e08f80", "parents": [ "8b98c1699eba23cfd2e8b366625c50ff5fd1415b" ], "author": { "name": "Christoph Hellwig", "email": "hch@lst.de", "time": "Wed Dec 06 20:32:33 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@woody.osdl.org", "time": "Thu Dec 07 08:39:22 2006 -0800" }, "message": "[PATCH] add numa node information to struct device\n\nFor node-aware skb allocations we need information about the node in struct\nnet_device or struct device. Davem suggested to put it into struct device\nwhich this patch does.\n\nIn particular:\n\n - struct device gets a new int numa_node member if CONFIG_NUMA is set\n - there are two new helpers, dev_to_node and set_dev_node to\n transparently deal with the non-numa case\n - for pci devices the node-info is set to the value we get from\n pcibus_to_node.\n\nNote that for some architectures pcibus_to_node doesn\u0027t work yet at the time\nwe call it currently. This is harmless and will just mean skb allocations\naren\u0027t node-local on this architectures until the implementation of\npcibus_to_node on these architectures have been updated (There are patches for\nx86 and x86_64 floating around)\n\n[akpm@osdl.org: cleanup]\nSigned-off-by: Christoph Hellwig \u003chch@lst.de\u003e\nCc: Christoph Lameter \u003cclameter@engr.sgi.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "368c73d4f689dae0807d0a2aa74c61fd2b9b075f", "tree": "4887ca05d1c02521d6194f88970f7c23d8aeb4ba", "parents": [ "cc692a5f1e9816671b77da77c6d6c463156ba1c7" ], "author": { "name": "Alan Cox", "email": "alan@lxorguk.ukuu.org.uk", "time": "Wed Oct 04 00:41:26 2006 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Dec 01 14:36:56 2006 -0800" }, "message": "PCI: quirks: fix the festering mess that claims to handle IDE quirks\n\nThe number of permutations of crap we do is amazing and almost all of it\nhas the wrong effect in 2.6.\n\nAt the heart of this is the PCI SFF magic which says that compatibility\nmode PCI IDE controllers use ISA IRQ routing and hard coded addresses\nnot the BAR values. The old quirks variously clears them, sets them,\nadjusts them and then IDE ignores the result.\n\nIn order to drive all this garbage out and to do it portably we need to\nhandle the SFF rules directly and properly. Because we know the device\nBAR 0-3 are not used in compatibility mode we load them with the values\nthat are implied (and indeed which many controllers actually\nthoughtfully put there in this mode anyway).\n\nThis removes special cases in the IDE layer and libata which now knows\nthat bar 0/1/2/3 always contain the correct address. It means our\nresource allocation map is accurate from boot, not \"mostly accurate\"\nafter ide is loaded, and it shoots lots of code. There is also lots more\ncode and magic constant knowledge to shoot once this is in and settled.\n\nBeen in my test tree for a while both with drivers/ide and with libata.\nWants some -mm shakedown in case I\u0027ve missed something dumb or there are\ncorner cases lurking.\n\nSigned-off-by: Alan Cox \u003calan@redhat.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "6b4b78fed47e7380dfe9280b154e8b9bfcd4c86c", "tree": "9fbf5135f4ba87fc68681bcd8996d509cac6f9e9", "parents": [ "49c61cca2b6591a28ffa4abb73c718091f569746" ], "author": { "name": "Matt Domsch", "email": "Matt_Domsch@dell.com", "time": "Fri Sep 29 15:23:23 2006 -0500" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Oct 18 11:36:12 2006 -0700" }, "message": "PCI: optionally sort device lists breadth-first\n\nProblem:\nNew Dell PowerEdge servers have 2 embedded ethernet ports, which are\nlabeled NIC1 and NIC2 on the chassis, in the BIOS setup screens, and\nin the printed documentation. Assuming no other add-in ethernet ports\nin the system, Linux 2.4 kernels name these eth0 and eth1\nrespectively. Many people have come to expect this naming. Linux 2.6\nkernels name these eth1 and eth0 respectively (backwards from\nexpectations). I also have reports that various Sun and HP servers\nhave similar behavior.\n\n\nRoot cause:\nLinux 2.4 kernels walk the pci_devices list, which happens to be\nsorted in breadth-first order (or pcbios_find_device order on i386,\nwhich most often is breadth-first also). 2.6 kernels have both the\npci_devices list and the pci_bus_type.klist_devices list, the latter\nis what is walked at driver load time to match the pci_id tables; this\nklist happens to be in depth-first order.\n\nOn systems where, for physical routing reasons, NIC1 appears on a\nlower bus number than NIC2, but NIC2\u0027s bridge is discovered first in\nthe depth-first ordering, NIC2 will be discovered before NIC1. If the\nlist were sorted breadth-first, NIC1 would be discovered before NIC2.\n\nA PowerEdge 1955 system has the following topology which easily\nexhibits the difference between depth-first and breadth-first device\nlists.\n\n-[0000:00]-+-00.0 Intel Corporation 5000P Chipset Memory Controller Hub\n +-02.0-[0000:03-08]--+-00.0-[0000:04-07]--+-00.0-[0000:05-06]----00.0-[0000:06]----00.0 Broadcom Corporation NetXtreme II BCM5708S Gigabit Ethernet (labeled NIC2, 2.4 kernel name eth1, 2.6 kernel name eth0)\n +-1c.0-[0000:01-02]----00.0-[0000:02]----00.0 Broadcom Corporation NetXtreme II BCM5708S Gigabit Ethernet (labeled NIC1, 2.4 kernel name eth0, 2.6 kernel name eth1)\n\n\nOther factors, such as device driver load order and the presence of\nPCI slots at various points in the bus hierarchy further complicate\nthis problem; I\u0027m not trying to solve those here, just restore the\ndevice order, and thus basic behavior, that 2.4 kernels had.\n\n\nSolution:\n\nThe solution can come in multiple steps.\n\nSuggested fix #1: kernel\nPatch below optionally sorts the two device lists into breadth-first\nordering to maintain compatibility with 2.4 kernels. It adds two new\ncommand line options:\n pci\u003dbfsort\n pci\u003dnobfsort\nto force the sort order, or not, as you wish. It also adds DMI checks\nfor the specific Dell systems which exhibit \"backwards\" ordering, to\nmake them \"right\".\n\n\nSuggested fix #2: udev rules from userland\nMany people also have the expectation that embedded NICs are always\ndiscovered before add-in NICs (which this patch does not try to do).\nUsing the PCI IRQ Routing Table provided by system BIOS, it\u0027s easy to\ndetermine which PCI devices are embedded, or if add-in, which PCI slot\nthey\u0027re in. I\u0027m working on a tool that would allow udev to name\nethernet devices in ascending embedded, slot 1 .. slot N order,\nsubsort by PCI bus/dev/fn breadth-first. It\u0027ll be possible to use it\nindependent of udev as well for those distributions that don\u0027t use\nudev in their installers.\n\nSuggested fix #3: system board routing rules\nOne can constrain the system board layout to put NIC1 ahead of NIC2\nregardless of breadth-first or depth-first discovery order. This adds\na significant level of complexity to board routing, and may not be\npossible in all instances (witness the above systems from several\nmajor manufacturers). I don\u0027t want to encourage this particular train\nof thought too far, at the expense of not doing #1 or #2 above.\n\n\nFeedback appreciated. Patch tested on a Dell PowerEdge 1955 blade\nwith 2.6.18.\n\nYou\u0027ll also note I took some liberty and temporarily break the klist\nabstraction to simplify and speed up the sort algorithm. I think\nthat\u0027s both safe and appropriate in this instance.\n\n\nSigned-off-by: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "b19441af185559118e8247382ea4f2f76ebffc6d", "tree": "5b687d2a0052b38fa5d32abeec75374b4aa8830e", "parents": [ "660a0e8fdf85f30b1e5f6905a78361476094eb7c" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Aug 28 11:43:25 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Tue Sep 26 17:43:53 2006 -0700" }, "message": "PCI: fix __must_check warnings\n\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "82081797b7d72108a47c82997349d1ea6a3eb3d5", "tree": "9066f303de9ad1f92d65800171eb61f05dab15d4", "parents": [ "e01af0384f54023b4548b7742952da2ffcafd4cd" ], "author": { "name": "Linas Vepstas", "email": "linas@austin.ibm.com", "time": "Mon Jul 10 04:44:46 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Jul 10 13:24:21 2006 -0700" }, "message": "[PATCH] pci: initialize struct pci_dev.error_state\n\nThe pci channel state is currently uninitialized, thus there are two ways\nof indicating that \"everything\u0027s OK\": 0 and 1. This is a bit of a burden.\n\nIf a devce driver wants to check if the pci channel is in a working or a\ndisconnected state, the driver writer must perform checks similar to\n\n if((pdev-\u003eerror_state !\u003d 0) \u0026\u0026\n (pdev-\u003eerror_state !\u003d pci_channel_io_normal)) {\n whatever();\n }\n\nwhich is rather akward. The first check is needed because stuct pci_dev is\ninited to all-zeros. The scond is needed because the error recovery will\nset the state to pci_channel_io_normal (which is not zero).\n\nThis patch fixes this awkwardness.\n\nSigned-off-by: Linas Vepstas \u003clinas@austin.ibm.com\u003e\nCc: Greg KH \u003cgreg@kroah.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "d71374dafbba7ec3f67371d3b7e9f6310a588808", "tree": "116dcd65fde3701d10fea954cdbd5bb063182b2c", "parents": [ "733a7fe12248072e1bca729c88a26298666f1956" ], "author": { "name": "Zhang Yanmin", "email": "yanmin.zhang@intel.com", "time": "Fri Jun 02 12:35:43 2006 +0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 12:00:01 2006 -0700" }, "message": "[PATCH] PCI: fix race with pci_walk_bus and pci_destroy_dev\n\npci_walk_bus has a race with pci_destroy_dev. When cb is called\nin pci_walk_bus, pci_destroy_dev might unlink the dev pointed by next.\nLater on in the next loop, pointer next becomes NULL and cause\nkernel panic.\n\nBelow patch against 2.6.17-rc4 fixes it by changing pci_bus_lock (spin_lock)\nto pci_bus_sem (rw_semaphore).\n\nSigned-off-by: Zhang Yanmin \u003cyanmin.zhang@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "ea28502d5d0fc624777a8a6b4d6865d282055b05", "tree": "561045b0bca2e2493bf41628dd965a8cb958f900", "parents": [ "17d6dc8ff098cc8c57941c82f7702804302b1ea1" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri Jun 09 11:28:29 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 11:59:59 2006 -0700" }, "message": "[PATCH] PCI: fix to pci ignore pre-set 64-bit bars on 32-bit platforms\n\nWhen we detect a 64-bit pre-set address in a BAR on a 32-bit platform,\nwe disable it and treat it as if it had been unset, thus allowing the\ngeneral address assignment code to assign a new address to it when the\ndevice is enabled. This can happen either if the firmware assigns\n64-bit addresses; additionally, some cards have been found \"in the\nwild\" which do not come out of reset with all the BAR registers set to\nzero.\n\nUnfortunately, the patch that implemented this tested the low part of\nthe address instead of the high part of the address. This patch fixes\nthat.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "17d6dc8ff098cc8c57941c82f7702804302b1ea1", "tree": "866b2243517d1dae26f1fff0986ed08f96e63baa", "parents": [ "83821d3f558dc651e555d62182ed0c95651f41a6" ], "author": { "name": "H. Peter Anvin", "email": "hpa@c2micro.com", "time": "Tue Apr 18 17:19:52 2006 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Jun 21 11:59:59 2006 -0700" }, "message": "[PATCH] PCI: Ignore pre-set 64-bit BARs on 32-bit platforms\n\n[pci] Ignore pre-set 64-bit BARs on 32-bit platforms\n\nCurrently, Linux always rejects a device which has a pre-set 64-bit\naddress on a 32-bit platform. On systems which do not do PCI\ninitialization in firmware, this causes some devices which don\u0027t\ncorrectly power up with all BARs zero to fail.\n\nThis patch makes the kernel automatically zero out such an address\n(thus treating it as if it had not been set at all, meaning it will\nassign an address if necessary).\n\nI have done this only for devices, not bridges. It seems potentially\nhazardous to do for bridges.\n\nSigned-off-by: H. Peter Anvin \u003chpa@c2micro.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "f5afe8064f3087bead8fea7e32547c2a3ada5fd0", "tree": "de6a9d60aad6ee262c04290d73e414cd92b4ad5d", "parents": [ "7c8f25da12a3dda46fb730699582895d5fc51287" ], "author": { "name": "Eric Sesterhenn", "email": "snakebyte@gmx.de", "time": "Tue Feb 28 15:34:49 2006 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:17 2006 -0800" }, "message": "[PATCH] PCI: kzalloc() conversion in drivers/pci\n\nthis patch converts drivers/pci to kzalloc usage.\nCompile tested with allyes config.\n\nSigned-off-by: Eric Sesterhenn \u003csnakebyte@gmx.de\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "8c4b2cf9af9b4ecc29d4f0ec4ecc8e94dc4432d7", "tree": "4f8e56e9012847aa4dfe4ec2c59f4d8b2714f2b2", "parents": [ "a0454b40ee8fac03194bb71f01730266506e75e1" ], "author": { "name": "Bernhard Kaindl", "email": "bk@suse.de", "time": "Sat Feb 18 01:36:55 2006 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:14 2006 -0800" }, "message": "[PATCH] PCI: PCI/Cardbus cards hidden, needs pci\u003dassign-busses to fix\n\n\"In some cases, especially on modern laptops with a lot of PCI and cardbus\nbridges, we\u0027re unable to assign correct secondary/subordinate bus numbers\nto all cardbus bridges due to BIOS limitations unless we are using\n\"pci\u003dassign-busses\" boot option.\" -- Ivan Kokshaysky (from a patch comment)\n\nWithout it, Cardbus cards inserted are never seen by PCI because the parent\nPCI-PCI Bridge of the Cardbus bridge will not pass and translate Type 1 PCI\nconfiguration cycles correctly and the system will fail to find and\ninitialise the PCI devices in the system.\n\nReference: PCI-PCI Bridges: PCI Configuration Cycles and PCI Bus Numbering:\nhttp://www.science.unitn.it/~fiorella/guidelinux/tlk/node72.html\n\nThe reason for this is that:\n ``All PCI busses located behind a PCI-PCI bridge must reside between the\nsecondary bus number and the subordinate bus number (inclusive).\u0027\u0027\n\n\"pci\u003dassign-busses\" makes pcibios_assign_all_busses return 1 and this\nturns on PCI renumbering during PCI probing.\n\nAlan suggested to use DMI automatically set assign-busses on problem systems.\n\nThe only question for me was where to put it. I put it directly before\nscanning PCI bus into pcibios_scan_root() because it\u0027s called from legacy,\nacpi and numa and so it can be one place for all systems and configurations\nwhich may need it.\n\nAMD64 Laptops are also affected and fixed by assign-busses, and the code is\nalso incuded from arch/x86_64/pci/ that place will also work for x86_64\nkernels, I only ifdef\u0027-ed the x86-only Laptop in this example.\n\nAffected and known or assumed to be fixed with it are (found by googling):\n\n* ASUS Z71V and L3s\n* Samsung X20\n* Compaq R3140us and all Compaq R3000 series laptops with TI1620 Controller,\n also Compaq R4000 series (from a kernel.org bugreport)\n* HP zv5000z (AMD64 3700+, known that fixup_parent_subordinate_busnr fixes it)\n* HP zv5200z\n* IBM ThinkPad 240\n* An IBM ThinkPad (1.8 GHz Pentium M) debugged by Pavel Machek\n gives the correspondig message which detects the possible problem.\n* MSI S260 / Medion SIM 2100 MD 95600\n\nThe patch also expands the \"try pci\u003dassign-busses\" warning so testers will\nhelp us to update the DMI table.\n\nCc: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nCc: Alan Cox \u003calan@lxorguk.ukuu.org.uk\u003e\nCc: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "6e325a62a0a228cd0222783802b53cce04551776", "tree": "5609f9e841024ca57ba8ee7a919955c7589444c7", "parents": [ "e5548e960f38557825e50806b52cb24c9e730aa2" ], "author": { "name": "Michael S. Tsirkin", "email": "mst@mellanox.co.il", "time": "Tue Feb 14 18:52:22 2006 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:14 2006 -0800" }, "message": "[PATCH] PCI: make MSI quirk inheritable from the pci bus\n\nIt turns out AMD 8131 quirk only affects MSI for devices behind the 8131 bridge.\nHandle this by adding a flags field in pci_bus, inherited from parent to child.\n\nSigned-off-by: Michael S. Tsirkin \u003cmst@mellanox.co.il\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "bbe8f9a3e76c551973ee739de10b26581d78b45f", "tree": "757788e67781a3eaee3453af79abf6bb50b3a681", "parents": [ "92c05fc1a32e5ccef5e0e8201f32dcdab041524c" ], "author": { "name": "Ralf Baechle", "email": "ralf@linux-mips.org", "time": "Tue Feb 14 16:23:57 2006 +0000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:12 2006 -0800" }, "message": "[PATCH] PCI: Avoid leaving MASTER_ABORT disabled permanently when returning from pci_scan_bridge.\n\n\u003e On Mon, Feb 13, 2006 at 05:13:21PM -0800, David S. Miller wrote:\n\u003e \u003e\n\u003e \u003e In drivers/pci/probe.c:pci_scan_bridge(), if this is not the first\n\u003e \u003e pass (pass !\u003d 0) we don\u0027t restore the PCI_BRIDGE_CONTROL_REGISTER and\n\u003e \u003e thus leave PCI_BRIDGE_CTL_MASTER_ABORT off:\n\u003e \u003e\n\u003e \u003e int __devinit pci_scan_bridge(struct pci_bus *bus, struct pci_dev * dev, int max, int pass)\n\u003e \u003e {\n\u003e \u003e ...\n\u003e \u003e \t/* Disable MasterAbortMode during probing to avoid reporting\n\u003e \u003e \t of bus errors (in some architectures) */\n\u003e \u003e \tpci_read_config_word(dev, PCI_BRIDGE_CONTROL, \u0026bctl);\n\u003e \u003e \tpci_write_config_word(dev, PCI_BRIDGE_CONTROL,\n\u003e \u003e \t\t\t bctl \u0026 ~PCI_BRIDGE_CTL_MASTER_ABORT);\n\u003e \u003e ...\n\u003e \u003e \tif ((buses \u0026 0xffff00) \u0026\u0026 !pcibios_assign_all_busses() \u0026\u0026 !is_cardbus) {\n\u003e \u003e \t\tunsigned int cmax, busnr;\n\u003e \u003e \t\t/*\n\u003e \u003e \t\t * Bus already configured by firmware, process it in the first\n\u003e \u003e \t\t * pass and just note the configuration.\n\u003e \u003e \t\t */\n\u003e \u003e \t\tif (pass)\n\u003e \u003e \t\t\treturn max;\n\u003e \u003e ...\n\u003e \u003e \t}\n\u003e \u003e\n\u003e \u003e \tpci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl);\n\u003e \u003e ...\n\u003e \u003e\n\u003e \u003e This doesn\u0027t seem intentional.\n\nAgreed, looks like an accident. The patch [1] originally came from Kip\nWalker (Broadcom back then) between 2.6.0-test3 and 2.6.0-test4. As I\nrecall it was supposed to fix an issue with with PCI aborts being\nsignalled by the PCI bridge of the Broadcom BCM1250 family of SOCs when\nprobing behind pci_scan_bridge. It is undeseriable to disable\nPCI_BRIDGE_CTL_MASTER_ABORT in pci_{read,write)_config_* and the\nbehaviour wasn\u0027t considered a bug in need of a workaround, so this was\nput in probe.c.\n\nI don\u0027t have an affected system at hand, so can\u0027t really test but I\npropose something like the below patch.\n\n[1] http://www.linux-mips.org/git?p\u003dlinux.git;a\u003dcommit;h\u003d599457e0cb702a31a3247ea6a5d9c6c99c4cf195\n\n[PCI] Avoid leaving MASTER_ABORT disabled permanently when returning from pci_scan_bridge.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "e3ac86d8b3f5cee1afaa3e9e6984d0321149b948", "tree": "6bb42129178c2bcaf2afb56484c7d3940b6be924", "parents": [ "b82db5cedf78bfeb4a1c8a28ae284dc671d26eb3" ], "author": { "name": "Kristen Accardi", "email": "kristen.c.accardi@intel.com", "time": "Tue Jan 17 16:57:01 2006 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Mar 23 14:35:10 2006 -0800" }, "message": "[PATCH] PCI: really fix parent\u0027s subordinate busnr\n\nAfter you find the maximum value of the subordinate buses below the child\nbus, you must fix the parent\u0027s subordinate bus number again, otherwise\nit may be too small.\n\nSigned-off-by: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "ac7dc65ac0b945270548414491efa9c4357417d9", "tree": "62fb38b349d00d5f3956ab312d175fe33807ff70", "parents": [ "498879417756effe6dc385ee04645a83d724fdef" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Dec 13 18:09:16 2005 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jan 09 12:13:19 2006 -0800" }, "message": "[PATCH] PCI: Export pci_cfg_space_size\n\nThe powerpc PCI code sets up the PCI tree without doing config space\naccesses in most cases, from the firmware tree. However, it still wants\nto call pci_cfg_space_size() under some conditions, thus it needs to\nbe made non-static (though I don\u0027t see a point to export it to modules).\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "498879417756effe6dc385ee04645a83d724fdef", "tree": "086bca4dd313d5fce46dccfd945f1b211ff5f141", "parents": [ "0eb3bcfd088e3234f7af29e189a7900ccfdd278a" ], "author": { "name": "Dominik Brodowski", "email": "linux@dominikbrodowski.net", "time": "Thu Dec 08 16:53:12 2005 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jan 09 12:13:19 2006 -0800" }, "message": "[PATCH] PCI: use bus numbers sparsely, if necessary\n\nAdd a warning if a child bus may be inaccessible because the\nparent bridge has wrong secondary or subordinate bus numbers.\nNote that this may or may not happen on \"transparent\" bridges,\nas can be seen in bug #5557.\n\nAlso, if we do not fix up the assignment of bus numbers, try to\nmake use of the bus number space available.\n\nSigned-off-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "9d265124d051c2cf6716639239609d83f736dcdb", "tree": "24f84b02d4a4506606af4f6d17c3a90fd914e825", "parents": [ "81f154427c0c50b6492d454abf98e15c1c2e354e" ], "author": { "name": "Daniel Yeisley", "email": "dan.yeisley@unisys.com", "time": "Mon Dec 05 07:06:43 2005 -0500" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jan 09 12:13:18 2006 -0800" }, "message": "[PATCH] PCI Quirk: 1K I/O space granularity on Intel P64H2\n\nI\u0027ve implemented a quirk to take advantage of the 1KB I/O space\ngranularity option on the Intel P64H2 PCI Bridge. I had to change\nprobe.c because it sets the resource start and end to be aligned on 4k\nboundaries (after the quirk sets them to 1k boundaries). I\u0027ve tested\nthis patch on a Unisys ES7000-600 both with and without the 1KB option\nenabled. I also tested this on a 2 processor Dell box that doesn\u0027t have\na P64H2 to make sure there were no negative affects there.\n\nSigned-off-by: Dan Yeisley \u003cdan.yeisley@unisys.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "3efd273b4d52f0d3ae5ce61b2161cb3752f360a0", "tree": "4cd04e90ffd5b86b9dd24b4e9d4195f1218bb471", "parents": [ "514d207db1fa3c3d2bd7990ebed8d81cebc7875b" ], "author": { "name": "Kristen Accardi", "email": "kristen.c.accardi@intel.com", "time": "Wed Nov 02 16:55:49 2005 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jan 09 12:13:14 2006 -0800" }, "message": "[PATCH] pci: call pci_read_irq for bridges\n\nCall pci_read_irq() for bridges too, so that the pin value\nis stored for bridges that require interrupts.\n\nSigned-off-by: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "ffeff788d6b10e342b4a887f28d339dfec1737f6", "tree": "9882b7f8215269cc30f422f135b785f6addefb7e", "parents": [ "6150c32589d1976ca8a5c987df951088c05a7542" ], "author": { "name": "Kristen Accardi", "email": "kristen.c.accardi@intel.com", "time": "Wed Nov 02 16:24:32 2005 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jan 09 12:13:13 2006 -0800" }, "message": "[PATCH] pci: store PCI_INTERRUPT_PIN in pci_dev\n\nStore the value of the INTERRUPT_PIN in the pci_dev structure\nso that it can be retrieved later.\n\nSigned-off-by: Kristen Carlson Accardi \u003ckristen.c.accardi@intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "8f7020d36374dda9366fee1343f8eacfe8f5e641", "tree": "fb9531fed55030c6334957ff38235421c83377b9", "parents": [ "f05aab8ef653abcbd454739264a9f5cf63f6f9f8" ], "author": { "name": "Randy Dunlap", "email": "rdunlap@xenotime.net", "time": "Sun Oct 23 11:57:38 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Oct 28 15:37:01 2005 -0700" }, "message": "[PATCH] kernel-doc: PCI fixes\n\nPCI: add descriptions for missing function parameters.\nEliminate all kernel-doc warnings here.\n\nSigned-off-by: Randy Dunlap \u003crdunlap@xenotime.net\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "12f44f46bc9c6dc79255e661b085797af395d8da", "tree": "cec3ab7b0bfd7f90fba01b6fb6ecb896eed00079", "parents": [ "bfab08c097df5f6a60dd07f0f8c78c54e725780b" ], "author": { "name": "Ivan Kokshaysky", "email": "ink@jurassic.park.msu.ru", "time": "Thu Sep 22 21:06:31 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Sep 23 08:05:16 2005 -0700" }, "message": "[PATCH] pci: fixup parent subordinate busnr\n\nI believe the change that broke things is introduction of\npci_fixup_parent_subordinate_busnr().\n\nThe patch here does two things:\n- hunk #1 should fix the problems you\u0027ve seen when you boot without\n additional \"pci\" kernel options;\n- hunk #2 supposedly fixes boot with \"pci\u003dassign-busses\" option which\n otherwise hangs Acer TM81xx machines as reported.\n\nPlease try this with and without \"pci\u003dassign-busses\". If it boots,\nI\u0027d like to see \u0027lspci -vvx\u0027 for both cases.\n\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "3c6de9295d28a4fc868b2c09f23e318e3e7b9b6b", "tree": "bc328ba9645a9d19c3b132f71e74ef3f7ed76f7a", "parents": [ "656da9da3745abcbbbdca598745d04c6de2c8843" ], "author": { "name": "Amos Waterland", "email": "apw@us.ibm.com", "time": "Thu Sep 22 00:48:19 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Thu Sep 22 07:58:25 2005 -0700" }, "message": "[PATCH] fix drivers/pci/probe.c warning\n\nThis function expects an unsigned 32-bit type as its third argument:\n\n static u32 pci_size(u32 base, u32 maxbase, u32 mask)\n\nHowever, given these definitions:\n\n #define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)\n #define PCI_ROM_ADDRESS_MASK (~0x7ffUL)\n\nthese two calls in drivers/pci/probe.c are problematic for architectures\nfor which a UL is not equivalent to a u32:\n\n sz \u003d pci_size(l, sz, PCI_BASE_ADDRESS_MEM_MASK);\n sz \u003d pci_size(l, sz, PCI_ROM_ADDRESS_MASK);\n\nHence the below compile warning when building for ARCH\u003dppc64:\n\n drivers/pci/probe.c: In function `pci_read_bases\u0027:\n /.../probe.c:168: warning: large integer implicitly truncated to unsigned type\n /.../probe.c:218: warning: large integer implicitly truncated to unsigned type\n\nHere is a simple fix.\n\nSigned-off-by: Amos Waterland \u003capw@us.ibm.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "4327edf6b8a7ac7dce144313947995538842d8fd", "tree": "e814f19d6f2ec8887ad590bfd67cd89d3d9f1002", "parents": [ "b4012a9895b3e28e3bff3aa534d58c7827af6d4f" ], "author": { "name": "Alan Cox", "email": "alan@lxorguk.ukuu.org.uk", "time": "Sat Sep 10 00:25:49 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sat Sep 10 10:06:21 2005 -0700" }, "message": "[PATCH] Subject: PATCH: fix numa caused compile warnings\n\npcibus_to_cpumask expands into more than just an initialiser so gcc\nmoans about code before variable declarations.\n\nSigned-off-by: Alan Cox \u003calan@redhat.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "cdb9b9f730eac4f947a2c552806a3a550bf019ef", "tree": "3d27b74d3421a261ebe6934e278bf725ebc7a3e4", "parents": [ "c87f883edbe969ca68c21dfa8a29674c828c22a3" ], "author": { "name": "Paul Mackerras", "email": "paulus@samba.org", "time": "Tue Sep 06 09:31:03 2005 +1000" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Sep 09 13:58:45 2005 -0700" }, "message": "[PATCH] PCI: Small rearrangement of PCI probing code\n\nThis patch makes some small rearrangements of the PCI probing code in\norder to make it possible for arch code to set up the PCI tree\nwithout needing to duplicate code from the PCI layer unnecessarily.\nPPC64 will use this to set up the PCI tree from the Open Firmware\ndevice tree, which we need to do on logically-partitioned pSeries\nsystems.\n\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "3fe9d19f9e86a55679f5f2b38ec0a43a1a510cee", "tree": "96a3e57f3b61c137bb8904a08779aa8ab41c2559", "parents": [ "cecf4864cf52a4a243a62b2856a6a155edbb55e8" ], "author": { "name": "Daniel Ritz", "email": "daniel.ritz@gmx.ch", "time": "Wed Aug 17 15:32:19 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Sep 08 15:04:30 2005 -0700" }, "message": "[PATCH] PCI: Support PCM PM CAP version 3\n\n- support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)\n\n- pci/probe.c sets the PM state initially to 4 which is D3cold. add a\n PCI_UNKNOWN\n\n- minor cleanups\n\nSigned-off-by: Daniel Ritz \u003cdaniel.ritz@gmx.ch\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "982245f01734e9d5a3ab98b2b2e9761ae7719094", "tree": "96ff56ff327f9a50f91a46886967f349d9a0a5e7", "parents": [ "74d863ee8a9da2b0f31e0f977daf127807b2e9d2" ], "author": { "name": "Adrian Bunk", "email": "bunk@stusta.de", "time": "Sun Jul 17 04:22:20 2005 +0200" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Sep 08 14:57:23 2005 -0700" }, "message": "[PATCH] PCI: remove CONFIG_PCI_NAMES\n\nThis patch removes CONFIG_PCI_NAMES.\n\nSigned-off-by: Adrian Bunk \u003cbunk@stusta.de\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "10f4338ca8534823bc6c843edbbe42fd4e73d258", "tree": "e0e94513f07166de7f45cfdc2b8c2199e5be7a3d", "parents": [ "761a3ac08c63718dacde12aaf0ec6d6760e8c2b7" ], "author": { "name": "Ivan Kokshaysky", "email": "ink@jurassic.park.msu.ru", "time": "Fri Jul 29 12:16:22 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Fri Jul 29 13:12:51 2005 -0700" }, "message": "[PATCH] PCI: remove PCI_BRIDGE_CTL_VGA handling from setup-bus.c\n\nThe setup-bus code doesn\u0027t work correctly for configurations\nwith more than one display adapter in the same PCI domain.\nThis stuff actually is a leftover of an early 2.4 PCI setup code\nand apparently it stopped working after some \"bridge_ctl\" changes.\nSo the best thing we can do is just to remove it and rely on the fact\nthat any firmware *has* to configure VGA port forwarding for the boot\ndisplay device properly.\n\nBut then we need to ensure that the bus-\u003ebridge_ctl will always\ncontain valid information collected at the probe time, therefore\nthe following change in pci_scan_bridge() is needed.\n\nSigned-off-by: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "90b54929b626c80056262d9d99b3f48522e404d0", "tree": "d5cb91ff7bd0ac9ffeab5f7bf68235e8b35d050c", "parents": [ "a03fa955576af50df80bec9127b46ef57e0877c0" ], "author": { "name": "Ivan Kokshaysky", "email": "ink@jurassic.park.msu.ru", "time": "Tue Jun 07 04:07:02 2005 +0400" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Jul 01 13:35:50 2005 -0700" }, "message": "[PATCH] PCI: handle subtractive decode pci-pci bridge better\n\nWith the number of PCI bus resources increased to 8, we can\nhandle the subtractive decode PCI-PCI bridge like a normal\nbridge, taking into account standard PCI-PCI bridge windows\n(resources 0-2). This helps to avoid problems with peer-to-peer DMA\nbehind such bridges, poor performance for MMIO ranges outside bridge\nwindows and prefetchable vs. non-prefetchable memory issues.\n\nTo reflect the fact that such bridges do forward all addresses to\nthe secondary bus (transparency), remaining bus resources 3-7 are\nlinked to resources 0-4 of the primary bus. These resources will be\nused as fallback by resource management code if allocation from\nstandard bridge windows fails for some reason.\n\nSigned-off-by: Ivan Kokshaysky \u003cink@jurassic.park.msu.ru\u003e\nAcked-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "26f674ae0e37190bf61c988e52911e4372fdb5f5", "tree": "625b05e5edd627a5cce0289e78057ca5ccf2290c", "parents": [ "ef6689eff4b58273fed9e54293a3da983b321e9a" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Thu Jun 02 15:41:48 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Jul 01 13:35:49 2005 -0700" }, "message": "[PATCH] PCI: Fix up PCI routing in parent bridge\n\nWhen the cardbus bridge is behind another bridge change the routing\nin the parent bridge for new cards. This fixes Cardbus on various AMD64\nlaptops.\n\nSigned-off-by: Andi Kleen \u003cak@suse.de\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "6ef6f0e33c4645fc8d23201ad5a6a289b4303cbb", "tree": "ff7861a550b5eea24788ccc07ca0df5294f9067b", "parents": [ "e4ea9bb7e9f177e03a917b1f1213de0315f819ee" ], "author": { "name": "Rajesh Shah", "email": "rajesh.shah@intel.com", "time": "Thu Apr 28 00:25:49 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jun 27 21:52:40 2005 -0700" }, "message": "[PATCH] acpi bridge hotadd: Link newly created pci child bus to its parent on creation\n\nWhen a pci child bus is created, add it to the parent\u0027s children list\nimmediately rather than waiting till pci_bus_add_devices(). For hot-plug\nbridges/devices, pci_bus_add_devices() may be called much later, after they\nhave been properly configured. In the meantime, this allows us to use the\nnormal pci bus search functions for the hot-plug bridges/buses.\n\nSigned-off-by: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "e4ea9bb7e9f177e03a917b1f1213de0315f819ee", "tree": "482599b5f367e997dfe30590860091bb06219882", "parents": [ "cc57450f5c044270d2cf1dd437c1850422262109" ], "author": { "name": "Rajesh Shah", "email": "rajesh.shah@intel.com", "time": "Thu Apr 28 00:25:48 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jun 27 21:52:40 2005 -0700" }, "message": "[PATCH] acpi bridge hotadd: Take the PCI lock when modifying pci bus or device lists\n\nWith root bridge and pci bridge hot-plug, new buses and devices can be added\nor removed at run time. Protect the pci bus and device lists with the pci\nlock when doing so.\n\nSigned-off-by: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "cc57450f5c044270d2cf1dd437c1850422262109", "tree": "418c7546c443cfc80601da045731f6b5a9f23442", "parents": [ "71c3511c22e8e0648094672abec898b3bf84c18b" ], "author": { "name": "Rajesh Shah", "email": "rajesh.shah@intel.com", "time": "Thu Apr 28 00:25:47 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jun 27 21:52:40 2005 -0700" }, "message": "[PATCH] acpi bridge hotadd: Prevent duplicate bus numbers when scanning PCI bridge\n\nWhen hot-plugging a root bridge, as we try to assign bus numbers we may find\nthat the hotplugged hieratchy has more PCI to PCI bridges (i.e. bus\nrequirements) than available. Make sure we don\u0027t step over an existing bus\nwhen that happens.\n\nSigned-off-by: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" }, { "commit": "c431ada45d65b305a6aab4557067e564b23ce5a5", "tree": "3fefb8a354860d9c39781dbbf042c992da5a9cd5", "parents": [ "efe1ec27837d6639eae82e1f5876910ba6433c3f" ], "author": { "name": "Rajesh Shah", "email": "rajesh.shah@intel.com", "time": "Thu Apr 28 00:25:45 2005 -0700" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Mon Jun 27 21:52:39 2005 -0700" }, "message": "[PATCH] acpi bridge hotadd: ACPI based root bridge hot-add\n\nWhen you hot-plug a (root) bridge hierarchy, it may have p2p bridges and\ndevices attached to it that have not been configured by firmware. In this\ncase, we need to configure the devices before starting them. This patch\nseparates device start from device scan so that we can introduce the\nconfiguration step in the middle.\n\nI kept the existing semantics for pci_scan_bus() since there are a huge number\nof callers to that function.\n\nAlso, I have no way of testing the changes I made to the parisc files, so this\nneeds review by those folks. Sorry for the massive cross-post, this touches\nfiles in many different places.\n\nSigned-off-by: Rajesh Shah \u003crajesh.shah@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n" } ], "next": "f797f9cc5485b50c35c106b462e1bc432ec37f90" }