)]}'
{
  "log": [
    {
      "commit": "77ef50a522717fa040636ee1017179ceba12ff62",
      "tree": "57b082ad5b314605d5d9dab50068737f324cae60",
      "parents": [
        "a656c8efb40a8700046df20da2195f8aa39ce38a"
      ],
      "author": {
        "name": "Vegard Nossum",
        "email": "vegard.nossum@gmail.com",
        "time": "Wed Jun 18 17:08:48 2008 +0200"
      },
      "committer": {
        "name": "Vegard Nossum",
        "email": "vegard.nossum@gmail.com",
        "time": "Tue Jul 22 21:31:34 2008 +0200"
      },
      "message": "x86: consolidate header guards\n\nThis patch is the result of an automatic script that consolidates the\nformat of all the headers in include/asm-x86/.\n\nThe format:\n\n1. No leading underscore. Names with leading underscores are reserved.\n2. Pathname components are separated by two underscores. So we can\n   distinguish between mm_types.h and mm/types.h.\n3. Everything except letters and numbers are turned into single\n   underscores.\n\nSigned-off-by: Vegard Nossum \u003cvegard.nossum@gmail.com\u003e\n"
    },
    {
      "commit": "499f8f84b8324ba27d756e03f373fa16eeed9ccc",
      "tree": "1a3ca5d9c9ff040978d7aa76183242aa97b2d878",
      "parents": [
        "cd7a4e936d345ab4cb49d68192d90bd4e4c58458"
      ],
      "author": {
        "name": "Andreas Herrmann",
        "email": "andreas.herrmann3@amd.com",
        "time": "Tue Jun 10 16:06:21 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Jun 12 10:14:27 2008 +0200"
      },
      "message": "x86: rename pat_wc_enabled to pat_enabled\n\nBTW, what does pat_wc_enabled stand for? Does it mean\n\"write-combining\"?\n\nCurrently it is used to globally switch on or off PAT support.\nThus I renamed it to pat_enabled.\nI think this increases readability (and hope that I didn\u0027t miss\nsomething).\n\nSigned-off-by: Andreas Herrmann \u003candreas.herrmann3@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "cd7a4e936d345ab4cb49d68192d90bd4e4c58458",
      "tree": "d6f3157fef2cb268fee2bfbaa729d932fefaf470",
      "parents": [
        "97cfab6ac4ddfda0d722393bbf46cc40bc332107"
      ],
      "author": {
        "name": "Andreas Herrmann",
        "email": "andreas.herrmann3@amd.com",
        "time": "Tue Jun 10 16:05:39 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Jun 12 10:14:24 2008 +0200"
      },
      "message": "x86: PAT: fixed checkpatch errors (and whitespaces)\n\nx86: PAT: fixed checkpatch errors (and whitespaces)\n\nSigned-off-by: Andreas Herrmann \u003candreas.herrmann3@amd.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "8d4a4300854f3971502e81dacd930704cb88f606",
      "tree": "d091b49851e60af1530dd3d7cd54057f98d48ffb",
      "parents": [
        "cb3f43b22bbb5ddbf6ce3e2bac40ce6eba30aba0"
      ],
      "author": {
        "name": "Thomas Gleixner",
        "email": "tglx@linutronix.de",
        "time": "Thu May 08 09:18:43 2008 +0200"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu May 08 15:43:51 2008 +0200"
      },
      "message": "x86: cleanup PAT cpu validation\n\nMove the scattered checks for PAT support to a single function. Its\nmoved to addon_cpuid_features.c as this file is shared between 32 and\n64 bit.\n\nRemove the manipulation of the PAT feature bit and just disable PAT in\nthe PAT layer, based on the PAT bit provided by the CPU and the\ncurrent CPU version/model white list.\n\nChange the boot CPU check so it works on Voyager somewhere in the\nfuture as well :) Also panic, when a secondary has PAT disabled but\nthe primary one has alrady switched to PAT. We have no way to undo\nthat.\n\nThe white list is kept for now to ensure that we can rely on known to\nwork CPU types and concentrate on the software induced problems\ninstead of fighthing CPU erratas and subtle wreckage caused by not yet\nverified CPUs. Once the PAT code has stabilized enough, we can remove\nthe white list and open the can of worms.\n\nSigned-off-by: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    },
    {
      "commit": "2e5d9c857d4e6c9e7b7d8c8c86a68a7842d213d6",
      "tree": "6c90c0f9f38ff85e2f42ddc0f4ef0291cdd47d38",
      "parents": [
        "d27554d874c7eeb14c8bfecdc39c3a8618cd8d32"
      ],
      "author": {
        "name": "venkatesh.pallipadi@intel.com",
        "email": "venkatesh.pallipadi@intel.com",
        "time": "Tue Mar 18 17:00:14 2008 -0700"
      },
      "committer": {
        "name": "Ingo Molnar",
        "email": "mingo@elte.hu",
        "time": "Thu Apr 17 17:41:19 2008 +0200"
      },
      "message": "x86: PAT infrastructure patch\n\nSets up pat_init() infrastructure.\n\nPAT MSR has following setting.\n\tPAT\n\t|PCD\n\t||PWT\n\t|||\n\t000 WB\t\t_PAGE_CACHE_WB\n\t001 WC\t\t_PAGE_CACHE_WC\n\t010 UC-\t\t_PAGE_CACHE_UC_MINUS\n\t011 UC\t\t_PAGE_CACHE_UC\n\nWe are effectively changing WT from boot time setting to WC.\nUC_MINUS is used to provide backward compatibility to existing /dev/mem\nusers(X).\n\nreserve_memtype and free_memtype are new interfaces for maintaining alias-free\nmapping. It is currently implemented in a simple way with a linked list and\nnot optimized. reserve and free tracks the effective memory type, as a result\nof PAT and MTRR setting rather than what is actually requested in PAT.\n\npat_init piggy backs on mtrr_init as the rules for setting both pat and mtrr\nare same.\n\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n"
    }
  ]
}