)]}'
{
  "log": [
    {
      "commit": "2e5f032095ff101274dfb03d5fd5e06d9aeb83cd",
      "tree": "eeb61cf6665452288a25434c54bc8d4ff8031cef",
      "parents": [
        "cf85d08fdf4548ee46657ccfb7f9949a85145db5"
      ],
      "author": {
        "name": "Lennert Buytenhek",
        "email": "buytenh@wantstofly.org",
        "time": "Tue Oct 07 13:45:18 2008 +0000"
      },
      "committer": {
        "name": "David S. Miller",
        "email": "davem@davemloft.net",
        "time": "Wed Oct 08 17:24:09 2008 -0700"
      },
      "message": "dsa: add support for the Marvell 88E6131 switch chip\n\nAdd support for the Marvell 88E6131 switch chip.  This chip only\nsupports the original (ethertype-less) DSA tagging format.\n\nOn the 88E6131, there is a PHY Polling Unit (PPU) which has exclusive\naccess to each of the PHYs\u0027s MII management registers.  If we want to\ntalk to the PHYs from software, we have to disable the PPU and wait\nfor it to complete its current transaction before we can do so, and we\nneed to re-enable the PPU afterwards to make sure that the switch will\nnotice changes in link state and speed on the individual ports as they\noccur.\n\nSince disabling the PPU is rather slow, and since MII management\naccesses are typically done in bursts, this patch keeps the PPU disabled\nfor 10ms after a software access completes.  This makes handling the\nPPU slightly more complex, but speeds up something like running ethtool\non one of the switch slave interfaces from ~300ms to ~30ms on typical\nhardware.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nTested-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nTested-by: Peter van Valderen \u003clinux@ddcrew.com\u003e\nTested-by: Dirk Teurlings \u003cdirk@upexia.nl\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n"
    }
  ]
}