)]}' { "log": [ { "commit": "cba86f2e20a33cd2e6f41bd5e5b23aa2d55c95b8", "tree": "c964a45832f2b9a88e8f9b46bf4979ca1e3bd6b8", "parents": [ "5b75c4973ce779520b9d1e392483207d6f842cde" ], "author": { "name": "Randy Dunlap", "email": "randy.dunlap@oracle.com", "time": "Wed Aug 11 13:26:57 2010 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Aug 11 23:03:50 2010 -0700" }, "message": "phylib: available for any speed ethernet\n\nSeveral gigabit network drivers (SB1250_MAC, TIGON3, FSL, GIANFAR,\nUCC_GETH, MV643XX_ETH, XILINX_LL_TEMAC, S6GMAC, STMMAC_ETH, PASEMI_MAC,\nand OCTEON_ETHERNET) select PHYLIB. These drivers are not under\nNET_ETHERNET (10/100 mbit), so this warning is generated (long, irrelevant\nparts are omitted):\n\nwarning: (NET_DSA \u0026\u0026 NET \u0026\u0026 EXPERIMENTAL \u0026\u0026 NET_ETHERNET \u0026\u0026 !S390 || ... || SB1250_MAC \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_1000 \u0026\u0026 SIBYTE_SB1xxx_SOC || TIGON3 \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_1000 \u0026\u0026 PCI || FSL_PQ_MDIO \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_1000 \u0026\u0026 FSL_SOC || GIANFAR \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_1000 \u0026\u0026 FSL_SOC || UCC_GETH \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_1000 \u0026\u0026 QUICC_ENGINE || MV643XX_ETH \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_1000 \u0026\u0026 (MV64X60 || PPC32 || PLAT_ORION) || XILINX_LL_TEMAC \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_1000 \u0026\u0026 (PPC || MICROBLAZE) || S6GMAC \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_1000 \u0026\u0026 XTENSA_VARIANT_S6000 || STMMAC_ETH \u0026\u0026 NETDEV_1000 \u0026\u0026 NETDEVICES \u0026\u0026 CPU_SUBTYPE_ST40 || PASEMI_MAC \u0026\u0026 NETDEVICES \u0026\u0026 NETDEV_10000 \u0026\u0026 PPC_PASEMI \u0026\u0026 PCI || OCTEON_ETHERNET \u0026\u0026 STAGING \u0026\u0026 !STAGING_EXCLUDE_BUILD \u0026\u0026 CPU_CAVIUM_OCTEON) selects PHYLIB which has unmet direct dependencies (!S390 \u0026\u0026 NET_ETHERNET)\n\nPHYLIB is used by non-10/100 mbit ethernet drivers, so change the dependencies\nto be NETDEVICES instead of NET_ETHERNET.\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "336a283b9cbe47748ccd68fd8c5158f67cee644b", "tree": "0cbba3d49342ecbae14a8acf24b6ed9ed19956fa", "parents": [ "70c2efa5a32a7d38e66224844032160317fa7887" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 12 20:03:42 2010 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Jul 12 20:03:42 2010 -0700" }, "message": "dsa: Fix Kconfig dependencies.\n\nBased upon a report by Randy Dunlap.\n\nDSA needs PHYLIB, but PHYLIB needs NET_ETHERNET. So, in order\nto select PHYLIB we have to make DSA depend upon NET_ETHERNET.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "076d3e10a54caa2c148de5732c126c7a31381d48", "tree": "8c9686248d46c803a994ab51ddee306ad4e4f4bc", "parents": [ "c084080151e1de92159f8437fde34b6e5bebe35e" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Fri Mar 20 09:50:39 2009 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sat Mar 21 19:06:54 2009 -0700" }, "message": "dsa: add support for the Marvell 88E6095/6095F switch chips\n\nAdd support for the Marvell 88E6095/6095F switch chips. These\nchips are similar to the 88e6131, so we can add the support to\nmv88e6131.c easily.\n\nThanks to Gary Thomas \u003cgary@mlbassoc.com\u003e and Jesper Dangaard\nBrouer \u003chawk@diku.dk\u003e for testing various patches.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nTested-by: Gary Thomas \u003cgary@mlbassoc.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "510149e31974fdbb2c00c9bee6c0e2a688e61c85", "tree": "76a22d3c3cf8d176d10f16a71ac09f74dcd31865", "parents": [ "e7dc849494608fca7a7493c07eb190219c00d064" ], "author": { "name": "Heiko Carstens", "email": "heiko.carstens@de.ibm.com", "time": "Mon Oct 13 18:58:48 2008 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Oct 13 18:58:48 2008 -0700" }, "message": "dsa: fix compile bug on s390\n\ngit commit 45cec1bac0719c904bb5f4405c2937f7e715888c\n\"dsa: Need to select PHYLIB.\" causes this build bug on s390:\n\ndrivers/built-in.o: In function `phy_stop_interrupts\u0027:\n/home/heicarst/linux-2.6/drivers/net/phy/phy.c:631: undefined reference to `free_irq\u0027\n/home/heicarst/linux-2.6/drivers/net/phy/phy.c:646: undefined reference to `enable_irq\u0027\ndrivers/built-in.o: In function `phy_start_interrupts\u0027:\n/home/heicarst/linux-2.6/drivers/net/phy/phy.c:601: undefined reference to `request_irq\u0027\ndrivers/built-in.o: In function `phy_interrupt\u0027:\n/home/heicarst/linux-2.6/drivers/net/phy/phy.c:528: undefined reference to `disable_irq_nosync\u0027\ndrivers/built-in.o: In function `phy_change\u0027:\n/home/heicarst/linux-2.6/drivers/net/phy/phy.c:674: undefined reference to `enable_irq\u0027\n/home/heicarst/linux-2.6/drivers/net/phy/phy.c:692: undefined reference to `disable_irq\u0027\n\nPHYLIB has alread a depend on !S390, however select PHYLIB at DSA overrides\nthat unfortunately. So add a depend on !S390 to DSA as well.\n\nSigned-off-by: Heiko Carstens \u003cheiko.carstens@de.ibm.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "45cec1bac0719c904bb5f4405c2937f7e715888c", "tree": "4af80e04ccdd5e43ebe27c3b1bbbe0c76dd888ea", "parents": [ "2e16a77e1e674644b4fe552daa1fb11e32398ae6" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Oct 08 17:33:01 2008 -0700" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Oct 08 17:33:01 2008 -0700" }, "message": "dsa: Need to select PHYLIB.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "2e16a77e1e674644b4fe552daa1fb11e32398ae6", "tree": "f8dc40dc1e12aeaff01f680c87835b608f65c1c7", "parents": [ "396138f03f4521c55ecc3a5dd75d4c56e6323244" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Tue Oct 07 13:46:22 2008 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Oct 08 17:24:22 2008 -0700" }, "message": "dsa: add support for the Marvell 88E6060 switch chip\n\nAdd support for the Marvell 88E6060 switch chip. This chip only\nsupports the Header and Trailer tagging formats, and we use it in\nTrailer mode since that mode is slightly easier to handle than\nHeader mode.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nTested-by: Byron Bradley \u003cbyron.bbradley@gmail.com\u003e\nTested-by: Tim Ellis \u003ctim.ellis@mac.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "396138f03f4521c55ecc3a5dd75d4c56e6323244", "tree": "61dc43e540c861a4b05753da56a9fe2a19bea206", "parents": [ "2e5f032095ff101274dfb03d5fd5e06d9aeb83cd" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Tue Oct 07 13:46:07 2008 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Oct 08 17:24:16 2008 -0700" }, "message": "dsa: add support for Trailer tagging format\n\nThis adds support for the Trailer switch tagging format. This is\nanother tagging that doesn\u0027t explicitly mark tagged packets with a\ndistinct ethertype, so that we need to add a similar hack in the\nreceive path as for the Original DSA tagging format.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nTested-by: Byron Bradley \u003cbyron.bbradley@gmail.com\u003e\nTested-by: Tim Ellis \u003ctim.ellis@mac.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "2e5f032095ff101274dfb03d5fd5e06d9aeb83cd", "tree": "eeb61cf6665452288a25434c54bc8d4ff8031cef", "parents": [ "cf85d08fdf4548ee46657ccfb7f9949a85145db5" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Tue Oct 07 13:45:18 2008 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Oct 08 17:24:09 2008 -0700" }, "message": "dsa: add support for the Marvell 88E6131 switch chip\n\nAdd support for the Marvell 88E6131 switch chip. This chip only\nsupports the original (ethertype-less) DSA tagging format.\n\nOn the 88E6131, there is a PHY Polling Unit (PPU) which has exclusive\naccess to each of the PHYs\u0027s MII management registers. If we want to\ntalk to the PHYs from software, we have to disable the PPU and wait\nfor it to complete its current transaction before we can do so, and we\nneed to re-enable the PPU afterwards to make sure that the switch will\nnotice changes in link state and speed on the individual ports as they\noccur.\n\nSince disabling the PPU is rather slow, and since MII management\naccesses are typically done in bursts, this patch keeps the PPU disabled\nfor 10ms after a software access completes. This makes handling the\nPPU slightly more complex, but speeds up something like running ethtool\non one of the switch slave interfaces from ~300ms to ~30ms on typical\nhardware.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nTested-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nTested-by: Peter van Valderen \u003clinux@ddcrew.com\u003e\nTested-by: Dirk Teurlings \u003cdirk@upexia.nl\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "cf85d08fdf4548ee46657ccfb7f9949a85145db5", "tree": "583e251b0d772c23ca931a207e9ac0995d679f44", "parents": [ "91da11f870f00a3322b81c73042291d7f0be5a17" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Tue Oct 07 13:45:02 2008 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Oct 08 17:19:56 2008 -0700" }, "message": "dsa: add support for original DSA tagging format\n\nMost of the DSA switches currently in the field do not support the\nEthertype DSA tagging format that one of the previous patches added\nsupport for, but only the original DSA tagging format.\n\nThe original DSA tagging format carries the same information as the\nEthertype DSA tagging format, but with the difference that it does not\nhave an ethertype field. In other words, when receiving a packet that\nis tagged with an original DSA tag, there is no way of telling in\neth_type_trans() that this packet is in fact a DSA-tagged packet.\n\nThis patch adds a hook into eth_type_trans() which is only compiled in\nif support for a switch chip that doesn\u0027t support Ethertype DSA is\nselected, and which checks whether there is a DSA switch driver\ninstance attached to this network device which uses the old tag format.\nIf so, it sets the protocol field to ETH_P_DSA without looking at the\npacket, so that the packet ends up in the right place.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nTested-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nTested-by: Peter van Valderen \u003clinux@ddcrew.com\u003e\nTested-by: Dirk Teurlings \u003cdirk@upexia.nl\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "91da11f870f00a3322b81c73042291d7f0be5a17", "tree": "670fedb54ee3c8fa403e9095f6d7e95ee560f346", "parents": [ "176eaa589b3d242f25f24e472883fcce5f196777" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Tue Oct 07 13:44:02 2008 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Wed Oct 08 17:15:19 2008 -0700" }, "message": "net: Distributed Switch Architecture protocol support\n\nDistributed Switch Architecture is a protocol for managing hardware\nswitch chips. It consists of a set of MII management registers and\ncommands to configure the switch, and an ethernet header format to\nsignal which of the ports of the switch a packet was received from\nor is intended to be sent to.\n\nThe switches that this driver supports are typically embedded in\naccess points and routers, and a typical setup with a DSA switch\nlooks something like this:\n\n\t+-----------+ +-----------+\n\t| | RGMII | |\n\t| +-------+ +------ 1000baseT MDI (\"WAN\")\n\t| | | 6-port +------ 1000baseT MDI (\"LAN1\")\n\t| CPU | | ethernet +------ 1000baseT MDI (\"LAN2\")\n\t| |MIImgmt| switch +------ 1000baseT MDI (\"LAN3\")\n\t| +-------+ w/5 PHYs +------ 1000baseT MDI (\"LAN4\")\n\t| | | |\n\t+-----------+ +-----------+\n\nThe switch driver presents each port on the switch as a separate\nnetwork interface to Linux, polls the switch to maintain software\nlink state of those ports, forwards MII management interface\naccesses to those network interfaces (e.g. as done by ethtool) to\nthe switch, and exposes the switch\u0027s hardware statistics counters\nvia the appropriate Linux kernel interfaces.\n\nThis initial patch supports the MII management interface register\nlayout of the Marvell 88E6123, 88E6161 and 88E6165 switch chips, and\nsupports the \"Ethertype DSA\" packet tagging format.\n\n(There is no officially registered ethertype for the Ethertype DSA\npacket format, so we just grab a random one. The ethertype to use\nis programmed into the switch, and the switch driver uses the value\nof ETH_P_EDSA for this, so this define can be changed at any time in\nthe future if the one we chose is allocated to another protocol or\nif Ethertype DSA gets its own officially registered ethertype, and\neverything will continue to work.)\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@marvell.com\u003e\nTested-by: Nicolas Pitre \u003cnico@marvell.com\u003e\nTested-by: Byron Bradley \u003cbyron.bbradley@gmail.com\u003e\nTested-by: Tim Ellis \u003ctim.ellis@mac.com\u003e\nTested-by: Peter van Valderen \u003clinux@ddcrew.com\u003e\nTested-by: Dirk Teurlings \u003cdirk@upexia.nl\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" } ] }