)]}' { "log": [ { "commit": "e833acaf2b5cfac0fb53692652a8c39667f1e559", "tree": "f530c2ea75a3d7e52045e1f543ced58757895b9d", "parents": [ "7dfc4b284ca395a035e7da058f86dfb4275dd509" ], "author": { "name": "Duy Truong", "email": "dtruong@codeaurora.org", "time": "Tue Feb 12 13:35:08 2013 -0800" }, "committer": { "name": "Duy Truong", "email": "dtruong@codeaurora.org", "time": "Tue Feb 12 13:35:08 2013 -0800" }, "message": "Update copyright to The Linux Foundation\n\nChange-Id: Ibead64ce2e901dede2ddd1b86088b88f2350ce92\nSigned-off-by: Duy Truong \u003cdtruong@codeaurora.org\u003e\n" }, { "commit": "bd01d26ba09700a6d7359151c361f7fdd6e0b9fb", "tree": "d66fb60034e02c4173106dff2baa28f0b7eb0e19", "parents": [ "d5bb05574ebbadfdea6c65e71cd3cb9afdbe1c6e" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue May 29 16:57:52 2012 -0700" }, "committer": { "name": "Sudhir Sharma", "email": "sudsha@codeaurora.org", "time": "Mon Nov 12 01:56:20 2012 -0800" }, "message": "spmi: qpnp-int: Support wake interrupts\n\nThe irq framework already supports wakeup interrupts. We just\nneed to provide a dummy irq_set_wake so the framework does not\nreturn an error. Also specify the MASK_ON_SUSPEND flag so that\nnon-wake interrupts are masked on suspend.\n\nChange-Id: I7fa5717d79467e22647606c3ee93373a2bffc547\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n(cherry picked from commit c86e2b7849eaf8d498cb2dabb59a33dab7e6dca5)\n\nSigned-off-by: Sudhir Sharma \u003csudsha@codeaurora.org\u003e\n(cherry picked from commit ed6e1f1345445c399f89245a2b576b1b16395890)\n" }, { "commit": "e0c3f70d873a68a6e292721240354c9c317437b5", "tree": "bcf7e61e849e80cd32f27c9c4e9f40b74d924b21", "parents": [ "776f239a19b53a56fec0f8937469ea6ccb99d9d0" ], "author": { "name": "Gilad Avidov", "email": "gavidov@codeaurora.org", "time": "Thu Jul 12 13:19:12 2012 -0600" }, "committer": { "name": "Gilad Avidov", "email": "gavidov@codeaurora.org", "time": "Wed Aug 01 10:40:49 2012 -0600" }, "message": "spmi: pmic-arb: Fix multibyte transfer bug and enforce buffer len\n\nBug fix for reading and writing multiple bytes. The bug causes holes\nin the first 4 bytes when the byte count \u003d 4, 5, or 6. Additionally,\non attempt to write more then the PMIC-arbiter supports, an error\nmessage is logged and error value is returned. The SPMI framework\nallows up to 16 byte per transfer, as supported by SPMI spec. However,\nthe PMIC arbiter supports up to 8 bytes per transfer.\n\nChange-Id: I5c192fc22af51b1c61ed8ce31b75261cb8ad49ce\nSigned-off-by: Gilad Avidov \u003cgavidov@codeaurora.org\u003e\n" }, { "commit": "90ced6e40066e6ed681b78d1689ef9b8e552f0ab", "tree": "05df89580057b67d3ffa6b340c12fb6a004cfde9", "parents": [ "1d22dfa0b050d09fc589af90b8d35f32a5dc3056" ], "author": { "name": "Abhimanyu Kapur", "email": "abhimany@codeaurora.org", "time": "Tue Jun 26 17:41:25 2012 -0700" }, "committer": { "name": "David Ng", "email": "dave@codeaurora.org", "time": "Fri Jun 29 12:43:08 2012 -0700" }, "message": "msm: 8974: rename copper to 8974\n\nThe official name for copper is MSM8974.\nSwitch to it.\n\nChange-Id: Ifb241232111139912477bf7b5f2e9cf5d38d0f9e\nSigned-off-by: Abhimanyu Kapur \u003cabhimany@codeaurora.org\u003e\n" }, { "commit": "978d335cee5541033ce66d6ec63a70535b523600", "tree": "c80940f3ce34edba5e00de19c0ea47e439fd9542", "parents": [ "a05f455aee64cc006c5c26c210c3620ed7f2d660" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Fri May 25 15:02:38 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:18 2012 -0700" }, "message": "spmi: Add spmi_resource for non spmi-dev-container cases\n\nThe devnode array is currently being used for non\nspmi-dev-container devices as a special case where the number of\ndevnodes is 1. This obfuscates the code and also removes the\nability to store the dev-container\u0027s device resource information,\nsince in that special case the devnode array is dedicated for the\nchild devices.\n\nAdd a new spmi_resource entry used for typical spmi_devices, and\ntreat the devnode array as the special case for\nspmi-dev-container.\n\nAlso add a new API spmi_get_primary_dev_name() to return the name\nof the device assigned with the \u0027label\u0027 binding if it exists.\n\nChange-Id: Ibe7b12285e37bb0529024558550a96d71393bc10\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "8d6aae33e4f6ebe7627acb7f589f56e02dc775bc", "tree": "b5af90e4a7c571f52a16ed2894112c807786b3be", "parents": [ "a6a354dd3d5bfbbefb9fc09295be5e31bc67b48b" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue May 22 15:41:06 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:17 2012 -0700" }, "message": "of: spmi: Add support for device naming and lookups\n\nSince we support multiple device_nodes per spmi_device when used\nwith the spmi-dev-container flag, it\u0027s often unclear how a driver\nshould make reference to a particular device. Therefore,\nintroduce the spmi specific binding spmi-dev-name that specifies\nthe device name for the device_node.\n\nAlso introduce an API that can be used from\nthe driver to lookup the specific device node associated with a\nparticular device name.\n\nNote that it may seem at first glance that the binding \u0027label\u0027 is\nredundant with device_node-\u003ename. However, per the ePAPR,\ndevice_node-\u003ename is intended to be as generic as possible,\nrepresenting the function of the device and not the precise\nprogramming model. \u0027label\u0027 is used to give a platform\nspecific name that can be queried from device drivers.\n\nChange-Id: I28eca35d0b625372c26a6d8ad81e7679f200d14b\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "a6a354dd3d5bfbbefb9fc09295be5e31bc67b48b", "tree": "399509d12fe0c6bc2c4574fcc8c354b0b99f9271", "parents": [ "0e5534d92f03c76de4c15736729101520c4f0c3a" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Mon May 21 17:47:11 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:16 2012 -0700" }, "message": "of: spmi: Support resource naming\n\nreg-names and interrupt-names are standard bindings to map device\ntree reg and interrupt indices to particular names. This way the\ndriver does not need to be concerned with hard coded assignments.\nTherefore, add spmi support for these bindings.\n\nExplicit support for reg-names is required since the\nimplementation does not make use of of_address_to_resource(),\nwhich happens to already support this.\nThis is because of_address_to_resource() mandates address\ntranslation, which is not relevant to spmi.\n\ninterrupt-names is already implicitly handled by\nof_irq_to_resource(), which is used in the spmi implementation.\nAdd additional documentation to state clearly that this binding\nis also supported.\n\nAlso add supporting routines to easily lookup a resource by name\nfor both registers and interrupts.\n\nChange-Id: I94faf950da5106ecd4ff36f47e5b46102d9bd426\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "0e5534d92f03c76de4c15736729101520c4f0c3a", "tree": "bc74e13f707040750e6dd8d77b365e9e1c394442", "parents": [ "08e1e909c7822559e2ca78b3953eb43d0b0c5dcb" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue May 22 17:33:45 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:16 2012 -0700" }, "message": "spmi: qpnp: Change APIs to take a spmi_resource pointer instead of index\n\nPointers are more flexible than index numbers, since index\nnumbers depend upon an additional reference to the array in\nquestion. In particular, we\u0027d like to add a new API to lookup a\ndevnode based on a predefined name in the Device Tree. This API\nwill return a spmi_resource, and so it\u0027s natural to want to use\nthis pointer directly with the other existing APIs.\n\nAlso introduce a new API spmi_for_each_devnode that can be used\nto iterate each spmi_resource in the dev_node array. This\nabstracts the traversal of the array, which was previously done\nwithin the existing APIs.\n\nChange-Id: I18f9397e5d78770e840a9f95dd8061201931df6e\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "08e1e909c7822559e2ca78b3953eb43d0b0c5dcb", "tree": "9eb7d3bb8a7badd403199c27145d243f78396d4b", "parents": [ "7c06410945495fc13caf69d9ad83da0195a7166e" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Wed May 23 10:55:22 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:15 2012 -0700" }, "message": "spmi: Rename qpnp library to be part of the spmi framework\n\nIt turns out that the only use cases for the qpnp library use\nthe existing spmi data structures. As such, there\u0027s really\nno justification for having the library not be called \u0027spmi\u0027.\nThere is nothing Qualcomm specific about this code.\n\nAlso cleanup some inconsistencies in the Kernel Doc comments\nwhile we\u0027re here.\n\nChange-Id: I1c73c88be740b6f5d38ba2de62de1737981b30fa\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "69701d37faf8991e01552843646551ea9cceb962", "tree": "837a18e8327eb39b7b5c0fe38216e7da33fda308", "parents": [ "519e42033c46bf9d9d1eec4658ea71c793c9c183" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Thu Jun 07 17:05:41 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:14 2012 -0700" }, "message": "spmi: qpnp-int: Fix bug in setting interrupt type\n\nFix a bug where the code neglects to set the INT_POLARITY_LOW\nregister to the correct value for the case IRQF_TRIGGER_LOW.\nIt should be set with a \u00271\u0027 for the corresponding interrupt bit.\n\nChange-Id: Ib05193633b0e7798f5e8ac4ddfb8744a67f8c546\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "bb6b30f77bd9f1fada77d38677f37082f8a3f165", "tree": "1626c740fe105a4ebbea1ee2180d14089f42e9f3", "parents": [ "63e6e20a39c7636d81cd1912ccb114ed9830eeaa" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Fri Jun 01 13:33:51 2012 -0700" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Tue Jun 26 10:35:13 2012 -0700" }, "message": "irqdomain: Port system to new API\n\nThe following merge commit chose the irq_domain implementation\nfrom AU_LINUX_ANDROID_ICS.04.00.04.00.126 instead of the version\nin v3.4.\n\ncommit f132c6cf77251e011e1dad0ec88c0b1fda16d5aa\nMerge: 23016de 3f6240f\nAuthor: Steve Muckle \u003csmuckle@codeaurora.org\u003e\nDate: Wed Jun 6 18:30:57 2012 -0700\n\n Merge commit \u0027AU_LINUX_ANDROID_ICS.04.00.04.00.126\u0027 into\n msm-3.4\n\nSince this version is inconsistent with the upstream,\nport the irq_domain framework to the version in v3.4 and\nmakes all necessary changes to clients that are out of spec.\n\nDetails of client ports are below.\n\n-Update the qpnp-int driver for revmap irq_domain API. The revmap\nirq_domain implementation introduces a reverse lookup scheme using\na radix tree. This scheme is useful for controllers like qpnp-int\nthat require a large range of hwirqs.\n\n-Bring the ARM GIC driver up to v3.4, being careful\nto port existing CAF changes.\n\n-Partially port the gpio-msm-common driver to the new irq_domain API.\nEnable the gpio-msm-common driver to work with the new irq_domain\nAPI using a linear revmap. It is not a full port since irq_domain\nis still only registered for Device Tree configurations. It should\nbe registered even for legacy configurations.\n\nIn addition, the irq_domains .map function should be setting all\nthe fields currently done in msm_gpio_probe(). That\u0027s not\ncurrently possible since msm_gpio_probe is invoked\nunconditionally - even from Device Tree configurations.\n\nFinally, gpio-msm-common should be converted into a real\nplatform_device so that probe() is invoked due to driver and\ndevice matching.\n\nChange-Id: I19fa50171bd244759fb6076e3cddc70896d8727b\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "75c34ca1b4e69e96921e4153dfa9d399e5b9d2e8", "tree": "c60ce27bf268851b5d22ae40dddd83462c532b83", "parents": [ "fef39d45c2c879b3104436573bef1eaa963adc08", "25dad72ab532f1ed4466b6684012f1c55acddb93" ], "author": { "name": "Steve Muckle", "email": "smuckle@codeaurora.org", "time": "Tue Jun 12 14:27:40 2012 -0700" }, "committer": { "name": "Steve Muckle", "email": "smuckle@codeaurora.org", "time": "Tue Jun 12 14:28:21 2012 -0700" }, "message": "Merge remote branch \u0027origin/msm-3.0\u0027 into msm-3.4\n\n* origin/msm-3.0: (87 commits)\n Revert \"msm: kgsl: Add VBIF error detection\"\n tspp: 8960: adding TSPP driver for 8960\n board-8960: Merge secure and non secure firmware heaps.\n msm: msm_dsps: Move to the new clk_prepare/unprepare API.\n diag: Protect SMD channel from getting NULL value\n camera: Mercury hardware JPEG decoder driver support.\n msm: 8064-regulator: Remove 5V FRC gpio external regulator\n diag: Respond to Get Subsystem Mask request\n Revert \"msm_fb: display: Attach and detach MDP IOMMU on suspend/resume\"\n Revert \"msm_fb: display: Add MDP IOMMU detach support for DTV\"\n msm: rpm-8930: Fix incorrect RPM enumeration and DMM\n msm: board-8930: Configure GPU turbo clock to 400MHz\n usb: mdm_bridge: Fix bug in handling error condition\n msm: vidc: Invalidate the cache before processing metadata.\n video: msm: wfd: Add turbo mode support\n tty: n_smux: Add Dedicated Power Control Queue\n defconfig: msm-copper: Enable SPI ethernet support\n msm: acpuclock-8960: Add PVS support on 8064\n ASoC: mdm9615: Set correct GPIOs for AUX PCM\n msm: 9615: Add auxpcm support over secondary audio interface\n ...\n\nConflicts:\n\tarch/arm/configs/msm-copper_defconfig\n\tdrivers/char/diag/diagchar_core.c\n\tdrivers/char/diag/diagfwd_hsic.h\n\tdrivers/media/video/msm/msm_camera.c\n\tdrivers/media/video/msm/msm_mctl.c\n\tdrivers/mfd/Kconfig\n\tdrivers/mfd/Makefile\n\tdrivers/mfd/wcd9xxx-slimslave.c\n\tdrivers/spmi/spmi.c\n\tdrivers/tty/n_smux.c\n\tdrivers/usb/otg/msm_otg.c\n\tsound/soc/msm/msm-pcm-routing.h\n\nSigned-off-by: Steve Muckle \u003csmuckle@codeaurora.org\u003e\nChange-Id: I49d4ceff17714a7ba51243de63f27b7e78647bda\n" }, { "commit": "f132c6cf77251e011e1dad0ec88c0b1fda16d5aa", "tree": "f04b469a3547a19b7bdbe110adc571eb71c93328", "parents": [ "23016defd7db701a01dc49f972ad6b1bae9651c2", "3f6240f3e4e2608caf1a70d614ada658cbcbe7be" ], "author": { "name": "Steve Muckle", "email": "smuckle@codeaurora.org", "time": "Wed Jun 06 18:30:57 2012 -0700" }, "committer": { "name": "Steve Muckle", "email": "smuckle@codeaurora.org", "time": "Wed Jun 06 18:45:28 2012 -0700" }, "message": "Merge commit \u0027AU_LINUX_ANDROID_ICS.04.00.04.00.126\u0027 into msm-3.4\n\nAU_LINUX_ANDROID_ICS.04.00.04.00.126 from msm-3.0.\nFirst parent is from google/android-3.4.\n\n* commit \u0027AU_LINUX_ANDROID_ICS.04.00.04.00.126\u0027: (8712 commits)\n PRNG: Device tree entry for qrng device.\n vidc:1080p: Set video core timeout value for Thumbnail mode\n msm: sps: improve the debugging support in SPS driver\n board-8064 msm: Overlap secure and non secure video firmware heaps.\n msm: clock: Add handoff ops for 7x30 and copper XO clocks\n msm_fb: display: Wait for external vsync before DTV IOMMU unmap\n msm: Fix ciruclar dependency in debug UART settings\n msm: gdsc: Add GDSC regulator driver for msm-copper\n defconfig: Enable Mobicore Driver.\n mobicore: Add mobicore driver.\n mobicore: rename variable to lower case.\n mobicore: rename folder.\n mobicore: add makefiles\n mobicore: initial import of kernel driver\n ASoC: msm: Add SLIMBUS_2_RX CPU DAI\n board-8064-gpio: Update FUNC for EPM SPI CS\n msm_fb: display: Remove chicken bit config during video playback\n mmc: msm_sdcc: enable the sanitize capability\n msm-fb: display: lm2 writeback support on mpq platfroms\n msm_fb: display: Disable LVDS phy \u0026 pll during panel off\n ...\n\nSigned-off-by: Steve Muckle \u003csmuckle@codeaurora.org\u003e\n" }, { "commit": "006b458571670b54318fc59ede2db931b9f15c4f", "tree": "3de7d09c18d24c2051c1d5ceab311466fed5612b", "parents": [ "073aea0f7c951abd049f81e768e471e47c3bb699" ], "author": { "name": "Mahesh Sivasubramanian", "email": "msivasub@codeaurora.org", "time": "Tue May 29 15:55:46 2012 -0600" }, "committer": { "name": "Mahesh Sivasubramanian", "email": "msivasub@codeaurora.org", "time": "Wed Jun 06 09:36:01 2012 -0600" }, "message": "spmi: Fix compilation error when CONFIG_PM_RUNTIME is defined\n\n\u003clinux/pm_runtime.h\u003e should be included to fix any compilation errors\nassociated with enabling the PM_RUNTIME config.\n\nChange-Id: Ided562e1351ccb5eef8957c305060275a5679d42\nSigned-off-by: Mahesh Sivasubramanian \u003cmsivasub@codeaurora.org\u003e\n" }, { "commit": "5bf9843db9904eb8695d898761fd3c5cf4cf465b", "tree": "49893278430ffe8cb1ba287946cc31c23dda3992", "parents": [ "1c0db13b2c86b0cd32bcb5d65f99596f40a8d498" ], "author": { "name": "Gilad Avidov", "email": "gavidov@codeaurora.org", "time": "Thu Mar 29 14:28:50 2012 -0600" }, "committer": { "name": "Gilad Avidov", "email": "gavidov@codeaurora.org", "time": "Tue Apr 10 15:44:43 2012 -0600" }, "message": "spmi: pmic-arb: Don\u0027t disable arbiter interrupt when no clients use it\n\nThe GIC interrupt should not be firing when the arbiter interrupts\n(peripheral interrupts) are disabled. So enabling/disabling the GIC\ninterrupt is not necessary. Remove those calls, and corresponding\nreference counter logic.\n\nChange-Id: Ice8d76ef255ec6c154c546dbd17807012558fe84\nSigned-off-by: Gilad Avidov \u003cgavidov@codeaurora.org\u003e\n" }, { "commit": "f057e208f2e4427c7b68e1277a773e6e8c84e176", "tree": "c4b624c5a456b1fce840515c3bc7e76253ee556e", "parents": [ "70a5e545440d2fc8973efff76db46e3660231df4" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Thu Mar 08 15:01:08 2012 -0800" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Fri Mar 23 18:18:53 2012 -0700" }, "message": "msm: qpnp: Make MSM_QPNP_INT depend on MSM_QPNP\n\nMSM_QPNP provides the qpnp_get_irq() API that is used by\nclient drivers using QPNP interrupts.\n\nChange-Id: I4556b07a2c6b8dfeda860ebac57be6eb14f216b1\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "86622b3ef7ed42713f82dcfc7338b15202097024", "tree": "dd1390959ade69ff143d25260adb40147cd02072", "parents": [ "5fafd3ce289590ca749004cc061975782b684902" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Wed Feb 08 16:59:00 2012 -0800" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Wed Mar 14 14:05:41 2012 -0700" }, "message": "of: of_spmi: Add support for spmi-dev-container binding\n\nThe spmi-dev-container binding is intended for SPMI\nconfigurations that have multiple device nodes associated with\nonly one spmi_device. By default, if this flag is not specified,\neach device node will create a new spmi_device.\n\nSometimes having multiple spmi_devices for SPMI device nodes is\nsuperfluous. One example of this is gpios. In some architectures,\na single gpio is treated as a unique device. But from a gpio_chip\nperspective, the chip is comprised of many gpios. Beyond wasting\nmemory allocating a unique spmi_device per gpio, the implication\nof not coalescing spmi_devices is that the clients probe() routine\nwould be called N number of times. But this sort of behavior makes\nit difficult to realize when a gpio_chip starts and stops. If we\nassume that one gpio_chip represents one call to probe(), then\nthis problem is solved, since all gpios in that chip will be\npassed as resources.\n\nIn order to support multiple device nodes per spmi_device, we\nalso need to extend the data structures for spmi_resources.\n\nThis change also makes an effort to cleanup some of the error\nhandling for illegal combinations of device bindings, as well as\nadding some additional documentation.\n\nChange-Id: If3ce2aaaa07bdf79e0d9fdedf16419e74a00fbec\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "3bfed03b5c79480cb60684e4f89bcbd46c573624", "tree": "d49398d36d043cf437cb669987580bfe7c4e1f25", "parents": [ "ac1f11cd5578074baa61b7e285a99c48a5c0abcf", "a11c0b5fbefb9d5118f8abff990c7ab36dfc4013" ], "author": { "name": "Linux Build Service Account", "email": "lnxbuild@localhost", "time": "Fri Mar 09 00:03:11 2012 -0800" }, "committer": { "name": "QuIC Gerrit Code Review", "email": "code-review@localhost", "time": "Fri Mar 09 00:03:12 2012 -0800" }, "message": "Merge \"SPMI: new format for device tree data\" into msm-3.0" }, { "commit": "115cf654b1ade0f60f977937c520fcfcddcdd3ce", "tree": "5295aed56070b30b1308c3250b5942c9cd9ec61b", "parents": [ "566b084d3c8c6fd9aa7d1b2f7ffd4a8ff251ce53" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Thu Jan 05 14:32:59 2012 -0800" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Fri Mar 02 16:52:36 2012 -0800" }, "message": "msm: Add QPNP interrupt support\n\nQPNP is a Qualcomm SPMI based implementation that specifies 256\ndevices per SPMI slave ID, with up to 8 interrupts per device.\nThis brings the theoretical max interrupt support to 32768 per\nbus for this architecture.\n\nThis driver implements the standard irq chip interfaces to\nsupport QPNP. The chip driver is informed of Device Tree\nconfiguration through a notifier interface. Once informed of an\ninterrupt, it will allocate resources on the fly. In order to\nsupport this large logical interrupt range, we require SPARSE_IRQ\nto be enabled.\n\nThis driver supports Device Tree interrupt specs with a cell size\nof three. These are comprised of the the slave ID, peripheral ID\nand irq number.\n\nChange-Id: Ic7847bafe6598a84ab3650df7c95bb605aefbe62\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "c802017219171609538a6ed5d0b789480e5881df", "tree": "792777ca59a5cb787a732bcdd25adb212606b325", "parents": [ "0564f549826e3bdca452d52ab675388cc8d9d1a0" ], "author": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Mon Jan 23 19:17:10 2012 -0800" }, "committer": { "name": "Michael Bohan", "email": "mbohan@codeaurora.org", "time": "Thu Feb 23 18:24:46 2012 -0800" }, "message": "msm: Add QPNP support routines\n\nQPNP is a SPMI based PMIC architecture developed by Qualcomm.\nThis library constitutes routines that should be necessary for\nmost, if not all QPNP based devices. The goal is to minimize the\namount of code duplication.\n\nChange-Id: I0fddfcef88416bba488480d790d1cf361d9e67ac\nSigned-off-by: Michael Bohan \u003cmbohan@codeaurora.org\u003e\n" }, { "commit": "a11c0b5fbefb9d5118f8abff990c7ab36dfc4013", "tree": "8c1ff2ad231fcaa85f86b55e761960751f227d8d", "parents": [ "f287480fde75690015d7d950cb68cb794f18a5e1" ], "author": { "name": "Gilad Avidov", "email": "gavidov@codeaurora.org", "time": "Wed Feb 15 15:30:49 2012 -0700" }, "committer": { "name": "Gilad Avidov", "email": "gavidov@codeaurora.org", "time": "Tue Feb 21 14:51:38 2012 -0700" }, "message": "SPMI: new format for device tree data\n\nreduce memory by compressing two values into one 32 bit integer.\n\nChange-Id: I7c0bf7007df082fac53c1138ba45f1ecf77b2f83\nSigned-off-by: Gilad Avidov \u003cgavidov@codeaurora.org\u003e\n" }, { "commit": "65a5ad2f186b376243405ec08e369a7d48060972", "tree": "f338d6ea0ecd2d0d50a56ad1be5bfcff11fee0de", "parents": [ "9621cd122c591042b7263bdfefa46d9f5c257449" ], "author": { "name": "Kenneth Heitke", "email": "kheitke@codeaurora.org", "time": "Wed Feb 08 14:00:04 2012 -0700" }, "committer": { "name": "Kenneth Heitke", "email": "kheitke@codeaurora.org", "time": "Thu Feb 16 06:19:12 2012 -0700" }, "message": "spmi: Add MSM PMIC Arbiter SPMI controller\n\nQualcomm\u0027s PMIC Arbiter SPMI controller functions as a bus master and\nis used to communication with one or more PMIC (slave) devices on the\nSPMI bus. The PMIC Arbiter is actually a hardware wrapper around the\nSPMI controller that provides concurrent and autonomous PMIC access\nto various entities that need to communicate with the PMIC.\n\nThe SPMI controller hardware handles all of the SPMI bus activity (bus\narbitration, sequence start condition, transmission of frames, etc).\nThis software driver uses the PMIC Arbiter register interface to\ninitiate command sequences on the SPMI bus. The status register is\nread to determine when the command sequence has completed and whether\nor not it completed successfully.\n\nRequest Capable Slave (RCS) devices can initiate a master write\ncommand sequence on the SPMI bus that the can be decoded by the\nbus master and used to generate interrupts.\n\nChange-Id: I037fefc946ccb5b8e0b04da856a3a96effe1c7e4\nSigned-off-by: Kenneth Heitke \u003ckheitke@codeaurora.org\u003e\n" }, { "commit": "ee44ade0261441a62d4472ec02a302731d4b5b82", "tree": "ada2335547f5b65e2d029485fe6b1aca65553321", "parents": [ "1268d1e0a2109f40f67830dd92e6a1200eb94ee2" ], "author": { "name": "Kenneth Heitke", "email": "kheitke@codeaurora.org", "time": "Wed Feb 08 13:45:33 2012 -0700" }, "committer": { "name": "Kenneth Heitke", "email": "kheitke@codeaurora.org", "time": "Tue Feb 14 14:50:38 2012 -0700" }, "message": "spmi: Linux driver framework for SPMI\n\nSPMI (System Power Management Interface) is a specification\ndeveloped by the MIPI (Mobile Industry Process Interface) Alliance\noptimized for the real time control of Power Management ICs (PMIC).\n\nSPMI is a two-wire serial interface that supports up to 4 master\ndevices and up to 16 logical slaves. A physical PMIC device may\nconsist of multiple logical slave interfaces.\n\nThe framework supports message APIs, multiple busses (1 controller\nper bus) and multiple clients/slave devices per controller.\n\nChange-Id: Ib6319047b4ab9cea6dfb0879312c4c1f63462439\nSigned-off-by: Kenneth Heitke \u003ckheitke@codeaurora.org\u003e\n" } ] }