)]}'
{
  "log": [
    {
      "commit": "a0776ec8e97bf109e7d973d09fc3e1814eb32bfb",
      "tree": "0c247bdd764fafc19390904d85acd8ef6a065595",
      "parents": [
        "62d0cfcb27cf755cebdc93ca95dabc83608007cd"
      ],
      "author": {
        "name": "Chen, Kenneth W",
        "email": "kenneth.w.chen@intel.com",
        "time": "Fri Oct 13 10:05:45 2006 -0700"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Tue Feb 06 15:04:18 2007 -0800"
      },
      "message": "[IA64] remove per-cpu ia64_phys_stacked_size_p8\n\nIt\u0027s not efficient to use a per-cpu variable just to store\nhow many physical stack register a cpu has.  Ever since the\nincarnation of ia64 up till upcoming Montecito processor, that\nvariable has \"glued\" to 96. Having a variable in memory means\nthat the kernel is burning an extra cacheline access on every\nsyscall and kernel exit path.  Such \"static\" value is better\nserved with the instruction patching utility exists today.\nConvert ia64_phys_stacked_size_p8 into dynamic insn patching.\n\nThis also has a pleasant side effect of eliminating access to\nper-cpu area while psr.ic\u003d0 in the kernel exit path. (fixable\nfor per-cpu DTC work, but why bother?)\n\nThere are some concerns with the default value that the instruc-\ntion encoded in the kernel image.  It shouldn\u0027t be concerned.\nThe reasons are:\n\n(1) cpu_init() is called at CPU initialization.  In there, we\n    find out physical stack register size from PAL and patch\n    two instructions in kernel exit code.  The code in question\n    can not be executed before the patching is done.\n\n(2) current implementation stores zero in ia64_phys_stacked_size_p8,\n    and that\u0027s what the current kernel exit path loads the value with.\n    With the new code, it is equivalent that we store reg size 96\n    in ia64_phys_stacked_size_p8, thus creating a better safety net.\n    Given (1) above can never fail, having (2) is just a bonus.\n\nAll in all, this patch allow one less memory reference in the kernel\nexit path, thus reducing syscall and interrupt return latency; and\navoid polluting potential useful data in the CPU cache.\n\nSigned-off-by: Ken Chen \u003ckenneth.w.chen@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f",
      "tree": "e85ca2d0dd43f90dccf758338764c3caa55f333f",
      "parents": [
        "089f26d5e31b7bf42a9a8fefec08b30cd27f4b0e"
      ],
      "author": {
        "name": "David Woodhouse",
        "email": "dwmw2@infradead.org",
        "time": "Wed Apr 26 12:56:16 2006 +0100"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "dwmw2@infradead.org",
        "time": "Wed Apr 26 12:56:16 2006 +0100"
      },
      "message": "Don\u0027t include linux/config.h from anywhere else in include/\n\nSigned-off-by: David Woodhouse \u003cdwmw2@infradead.org\u003e\n"
    },
    {
      "commit": "3283a67d8618c9a292eced23e8753ab64adc6dba",
      "tree": "b46c784c8b6cca63b8878f8838fa3bbf1604280f",
      "parents": [
        "d89cfe7f1e82d758a7983584c1593795d4e2c098"
      ],
      "author": {
        "name": "Jes Sorensen",
        "email": "jes@sgi.com",
        "time": "Thu Mar 30 10:13:22 2006 -0500"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Thu Mar 30 09:04:19 2006 -0800"
      },
      "message": "[IA64] Add __mca_table to the DISCARD list in gate.lds\n\nAdd __mca_table to the DISCARD list for the gate.lds linker script to\navoid broken linker references when linking the final vmlinux file.\n\nAlso add comment to include/asm-ia64/asmmacros.h to avoid anyone else\nhitting this problem in the future.\n\nCredits to James Bottomley \u003cJames.Bottomley@SteelEye.com\u003e for spotting\nthe DISCARD list in gate.lds.S\n\nSigned-off-by: Jes Sorensen \u003cjes@sgi.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "d2a28ad9fa7bf16761d070d8a3338375e1574b32",
      "tree": "9da2c18c91a4ee12fa6a9b2d23dcb55d13dd0ca8",
      "parents": [
        "a5b00bb4fe60796c791238cf5653b82110031c93"
      ],
      "author": {
        "name": "Russ Anderson",
        "email": "rja@sgi.com",
        "time": "Fri Mar 24 09:49:52 2006 -0800"
      },
      "committer": {
        "name": "Tony Luck",
        "email": "tony.luck@intel.com",
        "time": "Fri Mar 24 09:49:52 2006 -0800"
      },
      "message": "[IA64] MCA recovery: kernel context recovery table\n\nMemory errors encountered by user applications may surface\nwhen the CPU is running in kernel context.  The current code\nwill not attempt recovery if the MCA surfaces in kernel\ncontext (privilage mode 0).  This patch adds a check for cases\nwhere the user initiated the load that surfaces in kernel\ninterrupt code.\n\nAn example is a user process lauching a load from memory\nand the data in memory had bad ECC.  Before the bad data\ngets to the CPU register, and interrupt comes in.  The\ncode jumps to the IVT interrupt entry point and begins\nexecution in kernel context.  The process of saving the\nuser registers (SAVE_REST) causes the bad data to be loaded\ninto a CPU register, triggering the MCA.  The MCA surfaces in\nkernel context, even though the load was initiated from\nuser context.\n\nAs suggested by David and Tony, this patch uses an exception\ntable like approach, puting the tagged recovery addresses in\na searchable table.  One difference from the exception table\nis that MCAs do not surface in precise places (such as with\na TLB miss), so instead of tagging specific instructions,\naddress ranges are registers.  A single macro is used to do\nthe tagging, with the input parameter being the label\nof the starting address and the macro being the ending\naddress.  This limits clutter in the code.\n\nThis patch only tags one spot, the interrupt ivt entry.\nTesting showed that spot to be a \"heavy hitter\" with\nMCAs surfacing while saving user registers.  Other spots\ncan be added as needed by adding a single macro.\n\nSigned-off-by: Russ Anderson (rja@sgi.com)\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n"
    },
    {
      "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2",
      "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d",
      "parents": [],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n"
    }
  ]
}