)]}' { "log": [ { "commit": "9b50ffb0c0281bc5a08ccd56ae9bb84296c28f38", "tree": "85462c93df91c2fdd0c8fc31643158e9e5cf6734", "parents": [ "c4add2e537e6f60048dce8dc518254e7e605301d" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri Mar 30 10:34:05 2007 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Mar 30 09:37:41 2007 -0700" }, "message": "[IA64] make ioremap avoid unsupported attributes\n\nExample memory map (from HP sx1000 with VGA enabled):\n 0x00000 - 0x9FFFF supports only WB (cacheable) access\n 0xA0000 - 0xBFFFF supports only UC (uncacheable) access\n 0xC0000 - 0xFFFFF supports only WB (cacheable) access\n\npci_read_rom() indirectly uses ioremap(0xC0000) to read the shadow VGA option\nROM. ioremap() used to default to a 16MB or 64MB UC kernel identity mapping,\nwhich would cause an MCA when reading 0xC0000 since only WB is supported there.\n\nX uses reads the option ROM to initialize devices. A smaller test case is:\n # echo 1 \u003e /sys/bus/pci/devices/0000:aa:03.0/rom\n # cp /sys/bus/pci/devices/0000:aa:03.0/rom x\n\nTo avoid this, we can use the same ioremap_page_range() strategy that most\narchitectures use for all ioremaps. These page table mappings come out of the\nvmalloc area. On ia64, these are in region 5 (0xA... addresses) and typically\nuse 16KB or 64KB mappings instead of 16MB or 64MB mappings. The smaller\nmappings give more flexibility to use the correct attributes.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "8ea6091f500162e97687d7acf925f84202066b8d", "tree": "c2ee3b467cce2869dc84e1180cc9d8034fdeee3e", "parents": [ "e08cf02f32dff732b2be0c9755cf5eb676f88e48" ], "author": { "name": "John Keller", "email": "jpk@sgi.com", "time": "Wed Oct 04 16:49:25 2006 -0500" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Fri Dec 01 14:36:57 2006 -0800" }, "message": "Altix: Add initial ACPI IO support\n\nFirst phase in introducing ACPI support to SN.\nIn this phase, when running with an ACPI capable PROM,\nthe DSDT will define the root busses and all SN nodes\n(SGIHUB, SGITIO). An ACPI bus driver will be registered\nfor the node devices, with the acpi_pci_root_driver being\nused for the root busses. An ACPI vendor descriptor is\nnow used to pass platform specific information for both\nnodes and busses, eliminating the need for the current\nSAL calls. Also, with ACPI support, SN fixup code is no longer\nneeded to initiate the PCI bus scans, as the acpi_pci_root_driver\ndoes that.\n\nHowever, to maintain backward compatibility with non-ACPI capable\nPROMs, none of the current \u0027fixup\u0027 code can been deleted, though\nmuch restructuring has been done. For example, the bulk of the code\nin io_common.c is relocated code that is now common regardless\nof what PROM is running, while io_acpi_init.c and io_init.c contain\nroutines specific to an ACPI or non ACPI capable PROM respectively.\n\nA new pci bus fixup platform vector has been created to provide\na hook for invoking platform specific bus fixup from pcibios_fixup_bus().\n\nThe size of io_space[] has been increased to support systems with\nlarge IO configurations.\n\n\nSigned-off-by: John Keller \u003cjpk@sgi.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "ffc45571dfb4b70e7eda8d97f64a05f5e5a992ac", "tree": "2393f490879bf4ecd147054ce1db42e18b0e645b", "parents": [ "3bbe486b361b317ac7103378ed3d1aab4779715e" ], "author": { "name": "Aron Griffis", "email": "aron@hp.com", "time": "Tue Oct 17 00:28:15 2006 -0400" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Oct 17 14:49:15 2006 -0700" }, "message": "[IA64] move ioremap/ioremap_nocache under __KERNEL__\n\nI noticed these are declared extern outside of __KERNEL__, but surely\nthey wouldn\u0027t be available to userland since they\u0027re defined in\nioremap.c. Am I missing something here?\n\nIf I\u0027m right about this, then there\u0027s probably a good deal of other\nstuff in io.h that could move inside __KERNEL__, but at least this is\na start.\n\nSigned-off-by: Aron Griffis \u003caron@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "06c67befeeb16f2995c11b0e04a348103ddbfab1", "tree": "aad64fa9d2d03b1479885d1c703ccc5890b12afe", "parents": [ "49c0dab7e6000888b616bedcbbc8cd4710331610" ], "author": { "name": "Lennert Buytenhek", "email": "buytenh@wantstofly.org", "time": "Mon Jul 10 04:45:27 2006 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Mon Jul 10 13:24:25 2006 -0700" }, "message": "[PATCH] make valid_mmap_phys_addr_range() take a pfn\n\nNewer ARMs have a 40 bit physical address space, but mapping physical\nmemory above 4G needs a special page table format which we (currently?) do\nnot use for userspace mappings, so what happens instead is that mapping an\naddress \u003e\u003d 4G will happily discard the upper bits and wrap.\n\nThere is a valid_mmap_phys_addr_range() arch hook where we could check for\n\u003e\u003d 4G addresses and deny the mapping, but this hook takes an unsigned long\naddress:\n\n\tstatic inline int valid_mmap_phys_addr_range(unsigned long addr, size_t size);\n\nAnd drivers/char/mem.c:mmap_mem() calls it like this:\n\n\tstatic int mmap_mem(struct file * file, struct vm_area_struct * vma)\n\t{\n\t\tsize_t size \u003d vma-\u003evm_end - vma-\u003evm_start;\n\n\t\tif (!valid_mmap_phys_addr_range(vma-\u003evm_pgoff \u003c\u003c PAGE_SHIFT, size))\n\nSo that\u0027s not much help either.\n\nThis patch makes the hook take a pfn instead of a phys address.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@wantstofly.org\u003e\nCc: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Russell King \u003crmk@arm.linux.org.uk\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "32e62c636a728cb39c0b3bd191286f2ca65d4028", "tree": "656454a01e720819103c172daae15b5f2fd85d68", "parents": [ "6810b548b25114607e0814612d84125abccc0a4f" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Fri May 05 17:19:50 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon May 08 16:32:05 2006 -0700" }, "message": "[IA64] rework memory attribute aliasing\n\nThis closes a couple holes in our attribute aliasing avoidance scheme:\n\n - The current kernel fails mmaps of some /dev/mem MMIO regions because\n they don\u0027t appear in the EFI memory map. This keeps X from working\n on the Intel Tiger box.\n\n - The current kernel allows UC mmap of the 0-1MB region of\n /sys/.../legacy_mem even when the chipset doesn\u0027t support UC\n access. This causes an MCA when starting X on HP rx7620 and rx8620\n boxes in the default configuration.\n\nThere\u0027s more detail in the Documentation/ia64/aliasing.txt file this\nadds, but the general idea is that if a region might be covered by\na granule-sized kernel identity mapping, any access via /dev/mem or\nmmap must use the same attribute as the identity mapping.\n\nOtherwise, we fall back to using an attribute that is supported\naccording to the EFI memory map, or to using UC if the EFI memory\nmap doesn\u0027t mention the region.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "e9b0a0712148abe96ff717a2b9f8dab1d433e0d5", "tree": "3f4415797d49f477c9c7516625c74438f31673f8", "parents": [ "136939a2b5aa4302281215745ccd567e1df2e8d4" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Sun Mar 26 01:37:06 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:56:54 2006 -0800" }, "message": "[PATCH] ia64: ioremap: check EFI for valid memory attributes\n\nCheck the EFI memory map so we can use the correct memory attributes for\nioremap(). Previously, we always used uncacheable access, which blows up on\nsome machines for regular system memory.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nCc: \"Tolentino, Matthew E\" \u003cmatthew.e.tolentino@intel.com\u003e\nCc: \"Brown, Len\" \u003clen.brown@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nAcked-by: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "136939a2b5aa4302281215745ccd567e1df2e8d4", "tree": "384841deada5b0ceb44c255e0474866bbc8d3354", "parents": [ "3ed3bce846abc7ef460104b461cac793e41afe5e" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Sun Mar 26 01:37:05 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:56:54 2006 -0800" }, "message": "[PATCH] EFI, /dev/mem: simplify efi_mem_attribute_range()\n\nPass the size, not a pointer to the size, to efi_mem_attribute_range().\n\nThis function validates memory regions for the /dev/mem read/write/mmap paths.\nThe pointer allows arches to reduce the size of the range, but I think that\u0027s\nunnecessary complexity. Simplifying it will let me use\nefi_mem_attribute_range() to improve the ia64 ioremap() implementation.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nCc: \"Tolentino, Matthew E\" \u003cmatthew.e.tolentino@intel.com\u003e\nCc: \"Brown, Len\" \u003clen.brown@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nAcked-by: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "3ed3bce846abc7ef460104b461cac793e41afe5e", "tree": "6db86a6cdfd3600db4e24cd91f53ba6f4f661280", "parents": [ "10dbe196a8da6b3196881269c6639c0ec11c36cb" ], "author": { "name": "Matt Domsch", "email": "Matt_Domsch@dell.com", "time": "Sun Mar 26 01:37:03 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Mar 26 08:56:54 2006 -0800" }, "message": "[PATCH] ia64: use i386 dmi_scan.c\n\nEnable DMI table parsing on ia64.\n\nAndi Kleen has a patch in his x86_64 tree which enables the use of i386\ndmi_scan.c on x86_64. dmi_scan.c functions are being used by the\ndrivers/char/ipmi/ipmi_si_intf.c driver for autodetecting the ports or\nmemory spaces where the IPMI controllers may be found.\n\nThis patch adds equivalent changes for ia64 as to what is in the x86_64\ntree. In addition, I reworked the DMI detection, such that on EFI-capable\nsystems, it uses the efi.smbios pointer to find the table, rather than\nbrute-force searching from 0xF0000. On non-EFI systems, it continues the\nbrute-force search.\n\nMy test system, an Intel S870BN4 \u0027Tiger4\u0027, aka Dell PowerEdge 7250, with\nlatest BIOS, does not list the IPMI controller in the ACPI namespace, nor\ndoes it have an ACPI SPMI table. Also note, currently shipping Dell x8xx\nEM64T servers don\u0027t have these either, so DMI is the only method for\nobtaining the address of the IPMI controller.\n\nSigned-off-by: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nAcked-by: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nCc: Andi Kleen \u003cak@muc.de\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "80851ef2a5a404e6054211ca96ecd5ac4b06d297", "tree": "dcacd2a475adc28c540b6012b58f1af9783778c1", "parents": [ "44ac8413901167589226abf824d994aa57e4fd28" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Sun Jan 08 01:04:13 2006 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@g5.osdl.org", "time": "Sun Jan 08 20:14:02 2006 -0800" }, "message": "[PATCH] /dev/mem: validate mmap requests\n\nAdd a hook so architectures can validate /dev/mem mmap requests.\n\nThis is analogous to validation we already perform in the read/write\npaths.\n\nThe identity mapping scheme used on ia64 requires that each 16MB or\n64MB granule be accessed with exactly one attribute (write-back or\nuncacheable). This avoids \"attribute aliasing\", which can cause a\nmachine check.\n\nSample problem scenario:\n - Machine supports VGA, so it has uncacheable (UC) MMIO at 640K-768K\n - efi_memmap_init() discards any write-back (WB) memory in the first granule\n - Application (e.g., \"hwinfo\") mmaps /dev/mem, offset 0\n - hwinfo receives UC mapping (the default, since memmap says \"no WB here\")\n - Machine check abort (on chipsets that don\u0027t support UC access to WB\n memory, e.g., sx1000)\n\nIn the scenario above, the only choices are\n - Use WB for hwinfo mmap. Can\u0027t do this because it causes attribute\n aliasing with the UC mapping for the VGA MMIO space.\n - Use UC for hwinfo mmap. Can\u0027t do this because the chipset may not\n support UC for that region.\n - Disallow the hwinfo mmap with -EINVAL. That\u0027s what this patch does.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Hugh Dickins \u003chugh@veritas.com\u003e\nCc: \"Luck, Tony\" \u003ctony.luck@intel.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n" }, { "commit": "329058028523a5b36de449f130111b7671a4f269", "tree": "7a0860f7b349d26118eac385af4c50b6d038297a", "parents": [ "bcdd3a911499abd65bf1f123b2a6ad9c1d5611ea", "1b66776da71e33dff5edcc0b096ec3b7c40c75ad" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Aug 29 15:50:32 2005 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Aug 29 15:50:32 2005 -0700" }, "message": "Pull rationalise-regions into release branch\n" }, { "commit": "0a41e2501160587eb8f66cef3bdf1c6f2cb86997", "tree": "9f5b0288c3101344acd22f7e901fe909a8f98df6", "parents": [ "0572e3da3ff5c3744b2f606ecf296d5f89a4bbdf" ], "author": { "name": "Peter Chubb", "email": "peterc@gelato.unsw.edu.au", "time": "Tue Aug 16 19:54:00 2005 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Aug 24 15:35:41 2005 -0700" }, "message": "[IA64] Rationalise Region Definitions\n\nCurrently, region numbers are defined in several files, with several \nnames. For example, we have REGION_KERNEL in asm/page.h and \nRGN_KERNEL in pgtable.h \n \nWe also have address definitions that should depend on the \nRGN_XXX macros, but are currently just long constants. \n \nThe following patch reorganises all the definitions so that they have \nthe same form (RGN_XXX), are in one place, and that addresses that \ndepend on RGN_XXX are derived from them. \n\n(This is a necessary but not sufficient patch to allow UML-like \noperation on IA64). \n\nThanks to David Mosberger for catching the change I missed in mmu_context.h.\n \nSigned-off-by: Peter Chubb \u003cpeterc@gelato.unsw.edu.au\u003e \nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b5f3616ba73699d07deee1f244179fae49502052", "tree": "22081641f3873ec2f7632005357be03ca1468e3d", "parents": [ "38d26b9f577ec63ba64926c45f4ee3805ed2041c" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Aug 23 09:24:00 2005 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Wed Aug 24 14:55:09 2005 -0700" }, "message": "[IA64] fix IO_SPACE_SPARSE_ENCODING macro ambiguity\n\nParenthesize \"p\" to avoid ambiguity. No callers have a problem today;\nthis is just to clean up the bad form.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "3a931d4cca1b6dabe1085cc04e909575df9219ae", "tree": "d5a2b5ef9687fd67b9897825e8011f458cb29515", "parents": [ "4aec0fb12267718c750475f3404337ad13caa8f5" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Aug 18 14:40:00 2005 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Aug 18 14:40:00 2005 -0700" }, "message": "[IA64] remove unused function __ia64_get_io_port_base\n\nNot only was this unused, but its somewhat eccentric declaration\nof \"static inline const unsigned long\" gives gcc4 heartburn.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2", "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d", "parents": [], "author": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n" } ] }