)]}' { "log": [ { "commit": "edbe7075d144b35e8232ca32f373c1e0c26ff085", "tree": "071018351041af71e3e5dc141b5f2a336d893573", "parents": [ "8e75ad8908bd653191b19347ecccb4078cb17b74" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Thu Sep 20 14:21:11 2007 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Oct 12 15:11:22 2007 -0700" }, "message": "[IA64] abstract SAL_CALL wrapper to allow other firmware entry points\n\nSAL_CALL() always calls through the ia64_sal function pointer. I am adding\nnew functionality that needs the same conventions as SAL_CALL (FP regs\nsaved/restored, sal_lock acquired, etc), but doesn\u0027t use the ia64_sal\nfunction pointer.\n\nThis patch pulls the body of SAL_CALL out into a new \"IA64_FW_CALL\" that\ntakes care of these calling conventions, but allows the caller to specify\neither ia64_sal or some other firmware entry point.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "860abe8f7254208074cef83dc9ebc4d70ae277a9", "tree": "fc4a92d67f1873ecc16e70ec43dba099f95aa66a", "parents": [ "396e8e76c5eda19184e7b14ba9f1dcd5c4ea8d7e" ], "author": { "name": "Horms", "email": "horms@verge.net.au", "time": "Wed Feb 07 15:49:25 2007 +0900" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Mar 08 09:58:13 2007 -0800" }, "message": "[IA64] whitespace fixes for include/asm-ia64/sal.h\n\n* Make use of spaces and tabs consistent\n* Make long line \u003c 80col\n\nSigned-off-by: Simon Horman \u003chorms@verge.net.au\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "fa1d19e5d9a94120f31e5783ab44758f46892d94", "tree": "cb685f4b1cc31d633d04561ea9f31e40e43a3fc1", "parents": [ "264b0f99308436deaee38bab99e586612d012fc1" ], "author": { "name": "Troy Heber", "email": "troy.heber@hp.com", "time": "Wed Oct 25 14:46:15 2006 -0600" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Oct 31 14:32:10 2006 -0800" }, "message": "[IA64] move SAL_CACHE_FLUSH check later in boot\n\nThe check to see if the firmware drops interrupts during a\nSAL_CACHE_FLUSH is done to early in the boot. SAL_CACHE_FLUSH expects\nto be able to make PAL calls in virtual mode, on some cell based\nmachines a fault occurs causing a MCA. This patch moves the check\nafter mmu_context_init so the TLB and VHPT are properly setup.\n\nSigned-off-by Troy Heber \u003ctroy.heber@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "a58786917ce23c2a26c3e099c3cdba32a35eeceb", "tree": "4740de51febbe16934d24d94cb80432a7547cb26", "parents": [ "af14aca90e0cdfccd71f9947c45b6ea2cf321dcb" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Mon Jan 30 16:32:31 2006 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Thu Feb 02 13:25:54 2006 -0800" }, "message": "[IA64] avoid broken SAL_CACHE_FLUSH implementations\n\nIf SAL_CACHE_FLUSH drops interrupts, complain about it and fall back to\nusing PAL_CACHE_FLUSH instead.\n\nThis is to work around a defect in HP rx5670 firmware: when an interrupt\noccurs during SAL_CACHE_FLUSH, SAL drops the interrupt but leaves it marked\n\"in-service\", which leaves the interrupt (and others of equal or lower\npriority) masked.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "eed66cfcbbea851c97e287440d940286fce3f829", "tree": "0d78ff78e693f474c226551ddb4759aa4e62a46b", "parents": [ "90ac8f7741be4ff66de1f52904f4f67f272f74ce" ], "author": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Dec 13 10:41:49 2005 -0800" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Tue Dec 13 10:41:49 2005 -0800" }, "message": "[IA64] Split 16-bit severity field in sal_log_record_header\n\nERR_SEVERITY item is defined as a 8 bits item in SAL documentation\n($B.2.1 rev december 2003), but as an u16 in sal.h.\nThis has the side effect that current code in mca.c may not call\nia64_sal_clear_state_info() upon receiving corrected platform errors\nif there are bits set in the validation byte. Reported by Xavier Bru.\n\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "e927ecb05e1ce4bbb1e10f57008c94994e2160f5", "tree": "bc8256cc074f02d557088696035982fa7ae0b301", "parents": [ "6118ec847e8e35393efc0f88394c2f5dd48c3313" ], "author": { "name": "Suresh Siddha", "email": "suresh.b.siddha@intel.com", "time": "Mon Apr 25 13:25:06 2005 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Mon Apr 25 13:25:06 2005 -0700" }, "message": "[IA64] multi-core/multi-thread identification\n\nVersion 3 - rediffed to apply on top of Ashok\u0027s hotplug cpu\npatch. /proc/cpuinfo output in step with x86.\n\nThis is an updated MC/MT identification patch based on the \nprevious discussions on list. \n\nAdd the Multi-core and Multi-threading detection for IPF.\n - Add new core and threading related fields in /proc/cpuinfo.\n\t\tPhysical id\n\t\tCore id\n\t\tThread id\n\t\tSiblings\n - setup the cpu_core_map and cpu_sibling_map appropriately\n - Handles Hot plug CPU\n \nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nSigned-off-by: Gordon Jin \u003cgordon.jin@intel.com\u003e\nSigned-off-by: Rohit Seth \u003crohit.seth@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "b8d8b883e6f029e99c35c88f853501740e322131", "tree": "391f2ade8823149f217991eb02911bf3dacce050", "parents": [ "7130667107cd3ab9d6802b69bab63c7d22f20bd4" ], "author": { "name": "Ashok Raj", "email": "ashok.raj@intel.com", "time": "Fri Apr 22 14:44:40 2005 -0700" }, "committer": { "name": "Tony Luck", "email": "tony.luck@intel.com", "time": "Fri Apr 22 14:44:40 2005 -0700" }, "message": "[IA64] cpu hotplug: return offlined cpus to SAL\n\nThis patch is required to support cpu removal for IPF systems. Existing code\njust fakes the real offline by keeping it run the idle thread, and polling\nfor the bit to re-appear in the cpu_state to get out of the idle loop.\n\nFor the cpu-offline to work correctly, we need to pass control of this CPU \nback to SAL so it can continue in the boot-rendez mode. This gives the\nSAL control to not pick this cpu as the monarch processor for global MCA\nevents, and addition does not wait for this cpu to checkin with SAL\nfor global MCA events as well. The handoff is implemented as documented in \nSAL specification section 3.2.5.1 \"OS_BOOT_RENDEZ to SAL return State\"\n\nSigned-off-by: Ashok Raj \u003cashok.raj@intel.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n" }, { "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2", "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d", "parents": [], "author": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@ppc970.osdl.org", "time": "Sat Apr 16 15:20:36 2005 -0700" }, "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n" } ] }