)]}'
{
  "log": [
    {
      "commit": "62c4f0a2d5a188f73a94f2cb8ea0dba3e7cf0a7f",
      "tree": "e85ca2d0dd43f90dccf758338764c3caa55f333f",
      "parents": [
        "089f26d5e31b7bf42a9a8fefec08b30cd27f4b0e"
      ],
      "author": {
        "name": "David Woodhouse",
        "email": "dwmw2@infradead.org",
        "time": "Wed Apr 26 12:56:16 2006 +0100"
      },
      "committer": {
        "name": "David Woodhouse",
        "email": "dwmw2@infradead.org",
        "time": "Wed Apr 26 12:56:16 2006 +0100"
      },
      "message": "Don\u0027t include linux/config.h from anywhere else in include/\n\nSigned-off-by: David Woodhouse \u003cdwmw2@infradead.org\u003e\n"
    },
    {
      "commit": "0ec57e53c945fe962b190953f61e1ffd127e68d3",
      "tree": "2c8cf3e91aa3222be2f7e55bbbd4f55c4deef98f",
      "parents": [
        "f4fc4a5b74cff2a487222f05704a2bd01953d250"
      ],
      "author": {
        "name": "Marcelo Tosatti",
        "email": "marcelo.tosatti@cyclades.com",
        "time": "Tue Jan 17 00:24:42 2006 -0200"
      },
      "committer": {
        "name": "Paul Mackerras",
        "email": "paulus@samba.org",
        "time": "Fri Jan 20 16:13:50 2006 +1100"
      },
      "message": "[PATCH] powerpc: generalize PPC44x_PIN_SIZE\n\nThe following patch generalizes PPC44x_PIN_SIZE by changing it to\nPPC_PIN_SIZE, which can be defined by any sub-arch to automatically adjust\nVMALLOC_START.\n\nDefine PPC_PIN_SIZE on 8xx, avoiding potential conflicts with the\npinned space.\n\nSigned-off-by: Marcelo Tosatti \u003cmarcelo.tosatti@cyclades.com\u003e\nSigned-off-by: Paul Mackerras \u003cpaulus@samba.org\u003e\n"
    },
    {
      "commit": "b0f7b8bc57ee90138a7c429951457027a90c326f",
      "tree": "07f320bf7d240273faf64d02069488fb29761ae8",
      "parents": [
        "41aace4fe81e3da52fa80b8380e5d2d084f77691"
      ],
      "author": {
        "name": "Roland Dreier",
        "email": "rolandd@cisco.com",
        "time": "Mon Nov 07 00:58:13 2005 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Mon Nov 07 07:53:26 2005 -0800"
      },
      "message": "[PATCH] ppc32: Add 440SPe support\n\nAdd support for the AMCC PowerPC 440SPe SoC, including PCI Express in root\nport mode.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\nCc: Matt Porter \u003cmporter@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "41aace4fe81e3da52fa80b8380e5d2d084f77691",
      "tree": "d98b965682efa0e940d9564eafdd8eb69e616ffe",
      "parents": [
        "fcc188e7fdddd8b23f900e485e6b3db05e7375f4"
      ],
      "author": {
        "name": "Roland Dreier",
        "email": "rolandd@cisco.com",
        "time": "Mon Nov 07 00:58:12 2005 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Mon Nov 07 07:53:26 2005 -0800"
      },
      "message": "[PATCH] ppc32: Dump error status for both PLB segments on 440SP\n\nThe PowerPC 440SP SoC has two Processor Local Bus (PLB) segments (a\nhigh-throughput segment and a low-latency segment).  Fix our PLB register\ndefinitions to cope with this, and add code to dump the status of both\nsegments when a machine check occurs.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\nCc: Matt Porter \u003cmporter@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "fcc188e7fdddd8b23f900e485e6b3db05e7375f4",
      "tree": "8da8cac96f2ca884039e31cd6ff9d00e21cc2aea",
      "parents": [
        "2104da90a9aeef31ff6441d171a7d0492088f1d0"
      ],
      "author": {
        "name": "Roland Dreier",
        "email": "rolandd@cisco.com",
        "time": "Mon Nov 07 00:58:11 2005 -0800"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Mon Nov 07 07:53:26 2005 -0800"
      },
      "message": "[PATCH] ppc32: Allow ERPN for early serial to depend on CPU type\n\nThe PowerPC 440SPe supports up to 16 GB of RAM, and therefore its IO registers\nare at 0x4_xxxx_xxxx instead of being at 0x1_xxxx_xxxx like most other PPC 440\nchips.  To allow for this, this patch moves the definition of the ERPN used\nfor mapping UART0 from being hard-coded in the head_44x.S assembly code to\nbeing defined in ibm44x.h.\n\nSigned-off-by: Roland Dreier \u003crolandd@cisco.com\u003e\nSigned-off-by: Matt Porter \u003cmporter@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "c6a3ea22af7a2ed36afa4672a86b3a86d604db33",
      "tree": "b61bf02bb31ad01a0fe734dc697dd0c9583e0441",
      "parents": [
        "28cd1d17801774561c81a5be53bfb2d632aee2a2"
      ],
      "author": {
        "name": "Matt Porter",
        "email": "mporter@kernel.crashing.org",
        "time": "Thu Aug 18 11:24:26 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Thu Aug 18 12:53:58 2005 -0700"
      },
      "message": "[PATCH] ppc32: Fix PPC440SP SRAM controller DCRs\n\nFixes the incorrect DCR base value for the 440SP SRAM controller.\n\nSigned-off-by: Matt Porter \u003cmporter@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "c9cf73aee140baa425429902aaed2c758401343f",
      "tree": "7e28361e87950e7e66a453e4218745a4b0912119",
      "parents": [
        "e8be1c8e065691c332fd8e9bae70c7096a69c31d"
      ],
      "author": {
        "name": "Matt Porter",
        "email": "mporter@kernel.crashing.org",
        "time": "Sun Jul 31 22:34:52 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@g5.osdl.org",
        "time": "Mon Aug 01 19:14:01 2005 -0700"
      },
      "message": "[PATCH] ppc32: add 440ep support\n\nAdd PPC440EP core support.  PPC440EP is a PPC440-based SoC with a classic PPC\nFPU and another set of peripherals.\n\nSigned-off-by: Wade Farnsworth \u003cwfarnsworth@mvista.com\u003e\nSigned-off-by: Matt Porter \u003cmporter@kernel.crashing.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@osdl.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@osdl.org\u003e\n"
    },
    {
      "commit": "1da177e4c3f41524e886b7f1b8a0c1fc7321cac2",
      "tree": "0bba044c4ce775e45a88a51686b5d9f90697ea9d",
      "parents": [],
      "author": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "committer": {
        "name": "Linus Torvalds",
        "email": "torvalds@ppc970.osdl.org",
        "time": "Sat Apr 16 15:20:36 2005 -0700"
      },
      "message": "Linux-2.6.12-rc2\n\nInitial git repository build. I\u0027m not bothering with the full history,\neven though we have it. We can create a separate \"historical\" git\narchive of that later if we want to, and in the meantime it\u0027s about\n3.2GB when imported into git - space that would just make the early\ngit days unnecessarily complicated, when we don\u0027t have a lot of good\ninfrastructure for it.\n\nLet it rip!\n"
    }
  ]
}