)]}' { "log": [ { "commit": "8e9394ce2412254ec69fd2a4f3e44a66eade2297", "tree": "355f25148b4ce3f5cfebeaf0939d71cb6beaf88b", "parents": [ "62e877b893e6350c900d381f353aa62ed48dcc97" ], "author": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Wed Feb 17 10:57:05 2010 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Mar 07 17:04:52 2010 -0800" }, "message": "Driver core: create lock/unlock functions for struct device\n\nIn the future, we are going to be changing the lock type for struct\ndevice (once we get the lockdep infrastructure properly worked out) To\nmake that changeover easier, and to possibly burry the lock in a\ndifferent part of struct device, let\u0027s create some functions to lock and\nunlock a device so that no out-of-core code needs to be changed in the\nfuture.\n\nThis patch creates the device_lock/unlock/trylock() functions, and\nconverts all in-tree users to them.\n\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Jean Delvare \u003ckhali@linux-fr.org\u003e\nCc: Dave Young \u003chidave.darkstar@gmail.com\u003e\nCc: Ming Lei \u003ctom.leiming@gmail.com\u003e\nCc: Jiri Kosina \u003cjkosina@suse.cz\u003e\nCc: Phil Carmody \u003cext-phil.2.carmody@nokia.com\u003e\nCc: Arjan van de Ven \u003carjan@linux.intel.com\u003e\nCc: Cornelia Huck \u003ccornelia.huck@de.ibm.com\u003e\nCc: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nCc: Pavel Machek \u003cpavel@ucw.cz\u003e\nCc: Len Brown \u003clen.brown@intel.com\u003e\nCc: Magnus Damm \u003cdamm@igel.co.jp\u003e\nCc: Alan Stern \u003cstern@rowland.harvard.edu\u003e\nCc: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nCc: Stefan Richter \u003cstefanr@s5r6.in-berlin.de\u003e\nCc: David Brownell \u003cdbrownell@users.sourceforge.net\u003e\nCc: Vegard Nossum \u003cvegard.nossum@gmail.com\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nCc: Alex Chiang \u003cachiang@hp.com\u003e\nCc: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nCc: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nCc: Andrew Patterson \u003candrew.patterson@hp.com\u003e\nCc: Yu Zhao \u003cyu.zhao@intel.com\u003e\nCc: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nCc: Samuel Ortiz \u003csameo@linux.intel.com\u003e\nCc: Wolfram Sang \u003cw.sang@pengutronix.de\u003e\nCc: CHENG Renquan \u003crqcheng@smu.edu.sg\u003e\nCc: Oliver Neukum \u003coliver@neukum.org\u003e\nCc: Frans Pop \u003celendil@planet.nl\u003e\nCc: David Vrabel \u003cdavid.vrabel@csr.com\u003e\nCc: Kay Sievers \u003ckay.sievers@vrfy.org\u003e\nCc: Sarah Sharp \u003csarah.a.sharp@linux.intel.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "62e877b893e6350c900d381f353aa62ed48dcc97", "tree": "d2021f2c688207b1301ce016e7d7a73f77df8c11", "parents": [ "0f4288ec6fcc1a47d1fa0241ec1c6dacd5a09e96" ], "author": { "name": "Stephen Rothwell", "email": "sfr@canb.auug.org.au", "time": "Mon Mar 01 20:38:36 2010 +1100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Mar 07 17:04:52 2010 -0800" }, "message": "sysfs: fix for thinko with sysfs_bin_attr_init()\n\nAfter merging the final tree, today\u0027s linux-next build (powerpc\nallyesconfig) failed like this:\n\ndrivers/pci/pci-sysfs.c: In function \u0027pci_create_legacy_files\u0027:\ndrivers/pci/pci-sysfs.c:645: error: lvalue required as unary \u0027\u0026\u0027 operand\ndrivers/pci/pci-sysfs.c:658: error: lvalue required as unary \u0027\u0026\u0027 operand\n\nCaused by commit \"sysfs: Use sysfs_attr_init and sysfs_bin_attr_init on\ndynamic attributes\" interacting with commit \"sysfs: Use one lockdep\nclass per sysfs attribute\") both from the driver-core tree.\n\nSigned-off-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nCc: \"Eric W. Biederman\" \u003cebiederm@xmission.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n\n" }, { "commit": "a07e4156a2ee6359d31a44946d7ee7f85dbf6bca", "tree": "1ab5ef1c8a0e9549b8e72af889ae0b5f5f660400", "parents": [ "6992f5334995af474c2b58d010d08bc597f0f2fe" ], "author": { "name": "Eric W. Biederman", "email": "ebiederm@xmission.com", "time": "Thu Feb 11 15:23:05 2010 -0800" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Mar 07 17:04:51 2010 -0800" }, "message": "sysfs: Use sysfs_attr_init and sysfs_bin_attr_init on dynamic attributes\n\nThese are the non-static sysfs attributes that exist on\nmy test machine. Fix them to use sysfs_attr_init or\nsysfs_bin_attr_init as appropriate. It simply requires\nmaking a sysfs attribute present to see this. So this\nis a little bit tedious but otherwise not too bad.\n\nSigned-off-by: Eric W. Biederman \u003cebiederm@xmission.com\u003e\nAcked-by: WANG Cong \u003cxiyou.wangcong@gmail.com\u003e\nCc: Tejun Heo \u003ctj@kernel.org\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "52cf25d0ab7f78eeecc59ac652ed5090f69b619e", "tree": "031d1ffb3890bd69c0260c864c512e0be62ac05c", "parents": [ "6c1733aca0b48db4d0e660d54976a1cca25b5eaf" ], "author": { "name": "Emese Revfy", "email": "re.emese@gmail.com", "time": "Tue Jan 19 02:58:23 2010 +0100" }, "committer": { "name": "Greg Kroah-Hartman", "email": "gregkh@suse.de", "time": "Sun Mar 07 17:04:49 2010 -0800" }, "message": "Driver core: Constify struct sysfs_ops in struct kobj_type\n\nConstify struct sysfs_ops.\n\nThis is part of the ops structure constification\neffort started by Arjan van de Ven et al.\n\nBenefits of this constification:\n\n * prevents modification of data that is shared\n (referenced) by many other structure instances\n at runtime\n\n * detects/prevents accidental (but not intentional)\n modification attempts on archs that enforce\n read-only kernel data at runtime\n\n * potentially better optimized code as the compiler\n can assume that the const data cannot be changed\n\n * the compiler/linker move const data into .rodata\n and therefore exclude them from false sharing\n\nSigned-off-by: Emese Revfy \u003cre.emese@gmail.com\u003e\nAcked-by: David Teigland \u003cteigland@redhat.com\u003e\nAcked-by: Matt Domsch \u003cMatt_Domsch@dell.com\u003e\nAcked-by: Maciej Sosnowski \u003cmaciej.sosnowski@intel.com\u003e\nAcked-by: Hans J. Koch \u003chjk@linutronix.de\u003e\nAcked-by: Pekka Enberg \u003cpenberg@cs.helsinki.fi\u003e\nAcked-by: Jens Axboe \u003cjens.axboe@oracle.com\u003e\nAcked-by: Stephen Hemminger \u003cshemminger@vyatta.com\u003e\nSigned-off-by: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\n\n" }, { "commit": "322aafa6645a48c3b7837ca7385f126ab78127fd", "tree": "50f6665aedcf051cecd571183df81ba7f248014b", "parents": [ "dd04265b028c00c365a78f9ff78a05e217f98656", "c7bbf52aa4fa332b84c4f2bb33e69561ee6870b4" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 07 15:59:39 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Mar 07 15:59:39 2010 -0800" }, "message": "Merge branch \u0027x86-mrst-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-mrst-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (30 commits)\n x86, mrst: Fix whitespace breakage in apb_timer.c\n x86, mrst: Fix APB timer per cpu clockevent\n x86, mrst: Remove X86_MRST dependency on PCI_IOAPIC\n x86, olpc: Use pci subarch init for OLPC\n x86, pci: Add arch_init to x86_init abstraction\n x86, mrst: Add Kconfig dependencies for Moorestown\n x86, pci: Exclude Moorestown PCI code if CONFIG_X86_MRST\u003dn\n x86, numaq: Make CONFIG_X86_NUMAQ depend on CONFIG_PCI\n x86, pci: Add sanity check for PCI fixed bar probing\n x86, legacy_irq: Remove duplicate vector assigment\n x86, legacy_irq: Remove left over nr_legacy_irqs\n x86, mrst: Platform clock setup code\n x86, apbt: Moorestown APB system timer driver\n x86, mrst: Add vrtc platform data setup code\n x86, mrst: Add platform timer info parsing code\n x86, mrst: Fill in PCI functions in x86_init layer\n x86, mrst: Add dummy legacy pic to platform setup\n x86/PCI: Moorestown PCI support\n x86, ioapic: Add dummy ioapic functions\n x86, ioapic: Early enable ioapic for timer irq\n ...\n\nFixed up semantic conflict of new clocksources due to commit\n17622339af25 (\"clocksource: add argument to resume callback\").\n" }, { "commit": "03cd8f7ebe0cbef5ca7eed349774085e92a3d726", "tree": "350773b650554fe4337e7f253b501bd4721a3bcd", "parents": [ "45bf5cd7be624712ef1591e9de71f0ff7ad21cf1" ], "author": { "name": "Maxim Levitsky", "email": "maximlevitsky@gmail.com", "time": "Fri Mar 05 13:43:20 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Mar 06 11:26:36 2010 -0800" }, "message": "ricoh_mmc: port from driver to pci quirk\n\nThis patch solves nasty problem original driver has.\n\nOriginal goal of the ricoh_mmc was to disable this device because then,\nmmc cards can be read using standard SDHCI controller, thus avoiding\nwriting of yet another driver.\n\nHowever, the act of disablement, makes other pci functions that belong to\nthis controller (xD and memstick) shift up one level, thus pci core has\nnow wrong idea about these devices.\n\nTo fix this issue, this patch moves the driver into the pci quirk section,\nthus it is executes before the pci is enumerated, and therefore solving\nthat issue, also same sequence of commands is performed on resume for same\nreasons.\n\nAlso regardless of the above, this way is cleaner. You still need to set\nCONFIG_MMC_RICOH_MMC to enable this quirk\n\nSigned-off-by: Maxim Levitsky \u003cmaximlevitsky@gmail.com\u003e\nAcked-by: Philip Langdale \u003cphilipl@overt.org\u003e\nAcked-by: Wolfram Sang \u003cw.sang@pengutronix.de\u003e\nCc: \u003clinux-mmc@vger.kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "a626b46e17d0762d664ce471d40bc506b6e721ab", "tree": "445f6ac655ea9247d2e27529f23ba02d0991fec0", "parents": [ "c1dcb4bb1e3e16e9baee578d9bb040e5fba1063e", "dce46a04d55d6358d2d4ab44a4946a19f9425fe2" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 03 08:15:05 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Mar 03 08:15:05 2010 -0800" }, "message": "Merge branch \u0027x86-bootmem-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-bootmem-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (30 commits)\n early_res: Need to save the allocation name in drop_range_partial()\n sparsemem: Fix compilation on PowerPC\n early_res: Add free_early_partial()\n x86: Fix non-bootmem compilation on PowerPC\n core: Move early_res from arch/x86 to kernel/\n x86: Add find_fw_memmap_area\n Move round_up/down to kernel.h\n x86: Make 32bit support NO_BOOTMEM\n early_res: Enhance check_and_double_early_res\n x86: Move back find_e820_area to e820.c\n x86: Add find_early_area_size\n x86: Separate early_res related code from e820.c\n x86: Move bios page reserve early to head32/64.c\n sparsemem: Put mem map for one node together.\n sparsemem: Put usemap for one node together\n x86: Make 64 bit use early_res instead of bootmem before slab\n x86: Only call dma32_reserve_bootmem 64bit !CONFIG_NUMA\n x86: Make early_node_mem get mem \u003e 4 GB if possible\n x86: Dynamically increase early_res array size\n x86: Introduce max_early_res and early_res_count\n ...\n" }, { "commit": "6d6b89bd2e316b78d668f761d380837b81fa71ef", "tree": "7e63c58611fc6181153526abbdafdd846ed1a19d", "parents": [ "13dda80e48439b446d0bc9bab34b91484bc8f533", "2507c05ff55fbf38326b08ed27eaed233bc75042" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 02 07:55:08 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Mar 02 07:55:08 2010 -0800" }, "message": "Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6\n\n* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1341 commits)\n virtio_net: remove forgotten assignment\n be2net: fix tx completion polling\n sis190: fix cable detect via link status poll\n net: fix protocol sk_buff field\n bridge: Fix build error when IGMP_SNOOPING is not enabled\n bnx2x: Tx barriers and locks\n scm: Only support SCM_RIGHTS on unix domain sockets.\n vhost-net: restart tx poll on sk_sndbuf full\n vhost: fix get_user_pages_fast error handling\n vhost: initialize log eventfd context pointer\n vhost: logging thinko fix\n wireless: convert to use netdev_for_each_mc_addr\n ethtool: do not set some flags, if others failed\n ipoib: returned back addrlen check for mc addresses\n netlink: Adding inode field to /proc/net/netlink\n axnet_cs: add new id\n bridge: Make IGMP snooping depend upon BRIDGE.\n bridge: Add multicast count/interval sysfs entries\n bridge: Add hash elasticity/max sysfs entries\n bridge: Add multicast_snooping sysfs toggle\n ...\n\nTrivial conflicts in Documentation/feature-removal-schedule.txt\n" }, { "commit": "bc535154137601400ffe44c2a7be047ca041fe06", "tree": "1b6ad05ec2a458d44a384aa90b2ef914c6ce4d52", "parents": [ "d03ab7ff335b7fbf48d0fd28ead5d7957798510b", "439913fffd39374c3737186b22d2d56c3a0ae526" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Mar 01 10:36:22 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Mar 01 10:36:22 2010 -0800" }, "message": "Merge branch \u0027acpica\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6\n\n* \u0027acpica\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6:\n ACPI: replace acpi_integer by u64\n ACPICA: Update version to 20100121.\n ACPICA: Remove unused uint32_struct type\n ACPICA: Disassembler: Remove obsolete \"Integer64\" field in parse object\n ACPICA: Remove obsolete ACPI_INTEGER (acpi_integer) type\n ACPICA: Predefined name repair: fix NULL package elements\n ACPICA: AcpiGetDevices: Eliminate unnecessary _STA calls\n ACPICA: Update all ACPICA copyrights and signons to 2010\n ACPICA: Update for new gcc-4 warning options\n" }, { "commit": "9a928660c9dcaff568c9d379655c5aa16fb981f8", "tree": "df244e4ebf47647b59dfafd4c5f999cf67309e48", "parents": [ "30ff056c42c665b9ea535d8515890857ae382540" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Sun Feb 28 15:49:39 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Mar 01 07:41:55 2010 -0800" }, "message": "pci: don\u0027t reassign to ROM res if it is not going to be enabled\n\nA ROM resource that doesn\u0027t fit should not cause us to try to re-assign\nall the bus resources. Nobody generally cares, and re-assigning is\ngoing to just cause way more troubles than it tries to solve.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "47871889c601d8199c51a4086f77eebd77c29b0b", "tree": "40cdcac3bff0ee40cc33dcca61d0577cdf965f77", "parents": [ "c16cc0b464b8876cfd57ce1c1dbcb6f9a6a0bce3", "30ff056c42c665b9ea535d8515890857ae382540" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 28 19:23:06 2010 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 28 19:23:06 2010 -0800" }, "message": "Merge branch \u0027master\u0027 of /home/davem/src/GIT/linux-2.6/\n\nConflicts:\n\tdrivers/firmware/iscsi_ibft.c\n" }, { "commit": "c7e15899d07c9813c1aa96b21699d2d9c8314c4b", "tree": "16e9b4dceddf1b4d1dad05588d700c70cf8fcb88", "parents": [ "f6a0b5cd34d6e922cc7258c5429fb0f17508ceb6", "78c06176466cbd1b3f0f67709d3023c40dbebcbd" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Feb 28 10:59:18 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sun Feb 28 10:59:18 2010 -0800" }, "message": "Merge branch \u0027x86-pci-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027x86-pci-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86: Enable NMI on all cpus on UV\n vgaarb: Add user selectability of the number of GPUS in a system\n vgaarb: Fix VGA arbiter to accept PCI domains other than 0\n x86, uv: Update UV arch to target Legacy VGA I/O correctly.\n pci: Update pci_set_vga_state() to call arch functions\n" }, { "commit": "4067a8541d397e9d6b443dd2ce0ecb78bfd991db", "tree": "49690419b218020b8a0e9381db2f9cc90b658cd0", "parents": [ "e1d5bdabb94da89bdb3c3f2ee105cf61fca88ec8" ], "author": { "name": "Matt Carlson", "email": "mcarlson@broadcom.com", "time": "Fri Feb 26 14:04:43 2010 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 28 00:43:33 2010 -0800" }, "message": "pci: Add helper to search for VPD keywords\n\nThis patch adds the pci_vpd_find_info_keyword() helper function to\nfind information field keywords within read-only and read-write large\nresource data type sections.\n\nSigned-off-by: Matt Carlson \u003cmcarlson@broadcom.com\u003e\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "b55ac1b22690d2e5b02a61cf6d69c2d66969c79d", "tree": "d336b38719dba482e2734f2091f5a60dfcb134b4", "parents": [ "7ad506fa1adc2da3d394c562f09b8e1b3026c402" ], "author": { "name": "Matt Carlson", "email": "mcarlson@broadcom.com", "time": "Fri Feb 26 14:04:41 2010 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Sun Feb 28 00:43:32 2010 -0800" }, "message": "pci: Add helper to find a VPD resource data type\n\nThis patch adds the pci_vpd_find_tag() helper function to find VPD\nresource data types in a buffer.\n\nSigned-off-by: Matt Carlson \u003cmcarlson@broadcom.com\u003e\nSigned-off-by: Michael Chan \u003cmchan@broadcom.com\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "a1e4d72cd3024999bfb6703092ea271438805c89", "tree": "853a289d73ad9ffb04038fc493d209e980a3ef9b", "parents": [ "09c09bc618a4ceec387c57542031b4fc35826e16" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Mon Feb 08 19:16:33 2010 +0100" }, "committer": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Fri Feb 26 20:39:12 2010 +0100" }, "message": "PM: Allow PCI devices to suspend/resume asynchronously\n\nSet power.async_suspend for all PCI devices and PCIe port services,\nso that they can be suspended and resumed in parallel with other\ndevices they don\u0027t depend on in a known way (i.e. devices which are\nnot their parents or children).\n\nThis only affects the \"regular\" suspend and resume stages, which\nmeans in particular that the restoration of the PCI devices\u0027 standard\nconfiguration registers during resume will still be carried out\nsynchronously (at the \"early\" resume stage).\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\n" }, { "commit": "2fe2abf896c1e7a0ee65faaf3ef0ce654848abbd", "tree": "f066d5c94bbed5ca3556b4d2f0c4b3a9795b6eff", "parents": [ "89a74ecccd1f78e51faf6287e5c0e93a92ac096e" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Feb 23 10:24:36 2010 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 23 09:43:37 2010 -0800" }, "message": "PCI: augment bus resource table with a list\n\nPreviously we used a table of size PCI_BUS_NUM_RESOURCES (16) for resources\nforwarded to a bus by its upstream bridge. We\u0027ve increased this size\nseveral times when the table overflowed.\n\nBut there\u0027s no good limit on the number of resources because host bridges\nand subtractive decode bridges can forward any number of ranges to their\nsecondary buses.\n\nThis patch reduces the table to only PCI_BRIDGE_RESOURCE_NUM (4) entries,\nwhich corresponds to the number of windows a PCI-to-PCI (3) or CardBus (4)\nbridge can positively decode. Any additional resources, e.g., PCI host\nbridge windows or subtractively-decoded regions, are kept in a list.\n\nI\u0027d prefer a single list rather than this split table/list approach, but\nthat requires simultaneous changes to every architecture. This approach\nonly requires immediate changes where we set up (a) host bridges with more\nthan four windows and (b) subtractive-decode P2P bridges, and we can\nincrementally change other architectures to use the list.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "89a74ecccd1f78e51faf6287e5c0e93a92ac096e", "tree": "6d167d73fb2cf5bb457b0b19145fcbf81cf441ef", "parents": [ "2adf75160b10bf3f09ed7d3d04e937f923fc557e" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Feb 23 10:24:31 2010 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 23 09:43:31 2010 -0800" }, "message": "PCI: add pci_bus_for_each_resource(), remove direct bus-\u003eresource[] refs\n\nNo functional change; this converts loops that iterate from 0 to\nPCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the\npci_bus_for_each_resource() iterator instead.\n\nThis doesn\u0027t change the way resources are stored; it merely removes\ndependencies on the fact that they\u0027re in a table.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "2adf75160b10bf3f09ed7d3d04e937f923fc557e", "tree": "db2998c5403f6c12bb207fd80a1e1fca2ec4a1b4", "parents": [ "fa27b2d108fa49685129867a8c5b968344d6e197" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Feb 23 10:24:26 2010 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 23 09:43:25 2010 -0800" }, "message": "PCI: read bridge windows before filling in subtractive decode resources\n\nNo functional change; this fills in the bus subtractive decode resources\nafter reading the bridge window information rather than before. Also,\nprint out the subtractive decode resources as we already do for the\npositive decode windows.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "fa27b2d108fa49685129867a8c5b968344d6e197", "tree": "442356bc1afa2aacf1afc7e53ebc9aca8a14903d", "parents": [ "b16694f70c40ea8d539cdc93a422039771e85870" ], "author": { "name": "Bjorn Helgaas", "email": "bjorn.helgaas@hp.com", "time": "Tue Feb 23 10:24:21 2010 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Tue Feb 23 09:43:17 2010 -0800" }, "message": "PCI: split up pci_read_bridge_bases()\n\nNo functional change; this breaks up pci_read_bridge_bases() into separate\npieces for the I/O, memory, and prefetchable memory windows, similar to how\nYinghai recently split up pci_setup_bridge() in 68e84ff3bdc.\n\nSigned-off-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b16694f70c40ea8d539cdc93a422039771e85870", "tree": "2ac80b596bff438d84c13224076aa474a3c8053c", "parents": [ "6cbf82148ff286ec22a55be6836c3a5bffc489c1" ], "author": { "name": "Kenji Kaneshige", "email": "kaneshige.kenji@jp.fujitsu.com", "time": "Mon Feb 22 14:13:39 2010 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:21:21 2010 -0800" }, "message": "PCIe PME: use pci_pcie_cap()\n\nUse pci_pcie_cap() instead of pci_find_capability() to get PCIe\ncapability offset. This reduces redundant search in PCI configuration\nspace.\n\nSigned-off-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6cbf82148ff286ec22a55be6836c3a5bffc489c1", "tree": "77b1b0097f9c2389d56734ec4c022611aa1bd9db", "parents": [ "552be54cc4232dc5acc49ccb372129d6f1b6923f" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Wed Feb 17 23:44:58 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:21:19 2010 -0800" }, "message": "PCI PM: Run-time callbacks for PCI bus type\n\nIntroduce run-time PM callbacks for the PCI bus type. Make the new\ncallbacks work in analogy with the existing system sleep PM\ncallbacks, so that the drivers already converted to struct dev_pm_ops\ncan use their suspend and resume routines for run-time PM without\nmodifications.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "552be54cc4232dc5acc49ccb372129d6f1b6923f", "tree": "65739c06da3ce6a68dfe8fa27d4438d0eb8166d4", "parents": [ "b67ea76172d4b1922c4b3c46c8ea8e9fec1ff38c" ], "author": { "name": "Kenji Kaneshige", "email": "kaneshige.kenji@jp.fujitsu.com", "time": "Mon Feb 22 14:12:24 2010 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:21:10 2010 -0800" }, "message": "PCIe PME: use pci_is_pcie()\n\nUse pci_is_pcie() instead of looking at obsolete is_pcie field in\nstruct pci_dev.\n\nSigned-off-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b67ea76172d4b1922c4b3c46c8ea8e9fec1ff38c", "tree": "c2f51811376060b3b59ac43243a182b94a48be9b", "parents": [ "3f0be67188c60ebf1b5d00354b44b4b24f5af313" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Wed Feb 17 23:44:09 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:21:02 2010 -0800" }, "message": "PCI / ACPI / PM: Platform support for PCI PME wake-up\n\nAlthough the majority of PCI devices can generate PMEs that in\nprinciple may be used to wake up devices suspended at run time,\nplatform support is generally necessary to convert PMEs into wake-up\nevents that can be delivered to the kernel. If ACPI is used for this\npurpose, PME signals generated by a PCI device will trigger the ACPI\nGPE associated with the device to generate an ACPI wake-up event that\nwe can set up a handler for, provided that everything is configured\ncorrectly.\n\nUnfortunately, the subset of PCI devices that have GPEs associated\nwith them is quite limited. The devices without dedicated GPEs have\nto rely on the GPEs associated with other devices (in the majority of\ncases their upstream bridges and, possibly, the root bridge) to\ngenerate ACPI wake-up events in response to PME signals from them.\n\nAdd ACPI platform support for PCI PME wake-up:\no Add a framework making is possible to use ACPI system notify\n handlers for run-time PM.\no Add new PCI platform callback -\u003erun_wake() to struct\n pci_platform_pm_ops allowing us to enable/disable the platform to\n generate wake-up events for given device. Implemet this callback\n for the ACPI platform.\no Define ACPI wake-up handlers for PCI devices and PCI root buses and\n make the PCI-ACPI binding code register wake-up notifiers for all\n PCI devices present in the ACPI tables.\no Add function pci_dev_run_wake() which can be used by PCI drivers to\n check if given device is capable of generating wake-up events at\n run time.\n\nDeveloped in cooperation with Matthew Garrett \u003cmjg@redhat.com\u003e.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c39fae1416d59fd565606793f090cebe3720d50d", "tree": "f53b3dc3202706c328c2306f168058ec2e9ae859", "parents": [ "c7f486567c1d0acd2e4166c47069835b9f75e77b" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Wed Feb 17 23:40:07 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:20:39 2010 -0800" }, "message": "PCI PM: Make it possible to force using INTx for PCIe PME signaling\n\nApparently, some machines may have problems with PCI run-time power\nmanagement if MSIs are used for the native PCIe PME signaling. In\nparticular, on the MSI Wind U-100 PCIe PME interrupts are not\ngenerated by a PCIe root port after a resume from suspend to RAM, if\nthe system wake-up was triggered by a PME from the device attached to\nthis port. [It doesn\u0027t help to free the interrupt on suspend and\nrequest it back on resume, even if that is done along with disabling\nthe MSI and re-enabling it, respectively.] However, if INTx\ninterrupts are used for this purpose on the same machine, everything\nworks just fine.\n\nFor this reason, add a kernel command line switch allowing one to\nrequest that MSIs be not used for the native PCIe PME signaling,\nintroduce a DMI table allowing us to blacklist machines that need\nthis switch to be set by default and put the MSI Wind U-100 into this\ntable.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c7f486567c1d0acd2e4166c47069835b9f75e77b", "tree": "5552890ac80fc53f61dd9c53a6211610375efa1f", "parents": [ "58ff463396ad00828e922d50998787e97fd32512" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Wed Feb 17 23:39:08 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:20:31 2010 -0800" }, "message": "PCI PM: PCIe PME root port service driver\n\nPCIe native PME detection mechanism is based on interrupts generated\nby root ports or event collectors every time a PCIe device sends a\nPME message upstream.\n\nOnce a PME message has been sent by an endpoint device and received\nby its root port (or event collector in the case of root complex\nintegrated endpoints), the Requester ID from the message header is\nregistered in the root port\u0027s Root Status register. At the same\ntime, the PME Status bit of the Root Status register is set to\nindicate that there\u0027s a PME to handle. If PCIe PME interrupt is\nenabled for the root port, it generates an interrupt once the PME\nStatus has been set. After receiving the interrupt, the kernel can\nidentify the PCIe device that generated the PME using the Requester\nID from the root port\u0027s Root Status register. [For details, see PCI\nExpress Base Specification, Rev. 2.0.]\n\nImplement a driver for the PCIe PME root port service working in\naccordance with the above description.\n\nBased on a patch from Shaohua Li \u003cshaohua.li@intel.com\u003e.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "58ff463396ad00828e922d50998787e97fd32512", "tree": "4964b07518a02736a23839d89bb7ac4a065dede8", "parents": [ "6d3be84aab461815978d970aa45f5bc9e52dd772" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Wed Feb 17 23:36:58 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:20:24 2010 -0800" }, "message": "PCI PM: Add function for checking PME status of devices\n\nAdd function pci_check_pme_status() that will check the PME status\nbit of given device and clear it along with the PME enable bit. It\nwill be necessary for PCI run-time power management.\n\nBased on a patch from Shaohua Li \u003cshaohua.li@intel.com\u003e\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9958610552c0bd7558b41cb8addbd865587f142a", "tree": "38106fadf812bca10fc5b2c9bef8912de154df74", "parents": [ "32180e402f9ff1f3389c99edf3f393425e706080" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:28 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:25 2010 -0800" }, "message": "PCI: set PCI_PREF_RANGE_TYPE_64 in pci_bridge_check_ranges\n\nMake pci_bridge_check_ranges() store the PCI_PREF_RANGE_TYPE_64 in\naddition to IORESOURCE_MEM_64. Just like pci_read_bridge_bases().\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "32180e402f9ff1f3389c99edf3f393425e706080", "tree": "8bdc06675bdaf8dc79916e96e4ca666343bb1b23", "parents": [ "9789ac979b6b6ae6cc09f7b29c88e95ecb14ec39" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:27 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:25 2010 -0800" }, "message": "PCI: pciehp: second try to get big range for pcie devices\n\nHandle the case where the slot bridge that doesn\u0027t get a pre-allocated\nresource big enough to handle its child resources.. For example pcie\ndevices need 256M, but the bridge only gets 2M preallocated.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9789ac979b6b6ae6cc09f7b29c88e95ecb14ec39", "tree": "ad77f238e5ee0971767079276b1fd43e11457264", "parents": [ "6841ec681a88b66651e4563040b9c7a7ad25d7b5" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:26 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:24 2010 -0800" }, "message": "PCI: pciehp: cleanup flow in pciehp_configure_device\n\nMove bus_size_bridges and assign resources out of pciehp_add_bridge()\nand do them all together, one time, including slot bridge, to avoid to\ncalling assign resources several times when there are several bridges\nunder the slot bridge. Using pci_assign_unassigned_bridge_resources.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6841ec681a88b66651e4563040b9c7a7ad25d7b5", "tree": "412ddf4db54257d64136930ccd921e674fffd1f9", "parents": [ "977d17bb1749517b353874ccdc9b85abc7a58c2a" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:25 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:23 2010 -0800" }, "message": "PCI: introduce pci_assign_unassigned_bridge_resources\n\nFor use by pciehp.\n\npci_setup_bridge() will not check enabled for the slot bridge, otherwise\nupdate res is not updated to bridge BAR. That is, bridge is already\nenabled for port service.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "977d17bb1749517b353874ccdc9b85abc7a58c2a", "tree": "7abb576779682d20fb71d8656d50741571f0cdb2", "parents": [ "d65245c3297ac63abc51a976d92f45f2195d2854" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:24 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:22 2010 -0800" }, "message": "PCI: update bridge resources to get more big ranges in PCI assign unssigned\n\nBIOS separates IO ranges between several IOHs, and on some slots, BIOS assigns\nresources to a bridge, but stops assigning resources to the device under that\nbridge, because the device needs a big resource.\n\nSo:\n 1. allocate resources and record the failed device resources\n 2. clear the BIOS assigned resources of the parent bridge of failing device\n 3. go back and call pci assign unassigned\n 4. if it still fails, go up the tree, clear more bridges. and try again\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "d65245c3297ac63abc51a976d92f45f2195d2854", "tree": "97dbc9a714ef03810609f2d5faca1f56fd872547", "parents": [ "cd81e1ea1a4cda94aa5f3e942301cf0da497c262" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:23 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:21 2010 -0800" }, "message": "PCI: don\u0027t shrink bridge resources\n\nWhen clearing leaf bridge resources, trying to get a big enough one, we\ncould shrink the bridge if there is no resource under it. Confirm\nagainst the old resource side to make sure we\u0027re increasing the\nallocation.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "cd81e1ea1a4cda94aa5f3e942301cf0da497c262", "tree": "91f271f961f560e62f1e0790e766f98afc287a00", "parents": [ "568ddef8735d4a51a521ba6af026ee0c32281566" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:22 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:21 2010 -0800" }, "message": "PCI: reject mmio ranges starting at 0 on pci_bridge read\n\nWe already track unassigned resources in struct resource, and this\nprevents us from overwriting resource flags and info in the unassigned\ncase.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "568ddef8735d4a51a521ba6af026ee0c32281566", "tree": "967c71b21ae4ecbafa9547726b6e34848215c13e", "parents": [ "5009b46025acb2d3955d2c93574604fba667ef39" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:21 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:20 2010 -0800" }, "message": "PCI: add failed_list to pci_bus_assign_resources\n\nThis allows us to track failed allocations for later re-trying with\nreallocation.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5009b46025acb2d3955d2c93574604fba667ef39", "tree": "13c9822a92c3b797364313f1e52856caf6ab67c3", "parents": [ "ba02b242bbf8e4e1bc63d62e8ccec33b4e5ea132" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Fri Jan 22 01:02:20 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:19 2010 -0800" }, "message": "PCI: add pci_bridge_release_resources and pci_bus_release_bridge_resources\n\nWe use this in later patches to free resrouce ranges for reassignment in\nan effort to support a wider variety of PCI topologies.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nReviewed-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "ba02b242bbf8e4e1bc63d62e8ccec33b4e5ea132", "tree": "d81b48ebf427e0ee346582b8f92ced6017ce9015", "parents": [ "939fdc67350e15aeeea70457d5b4bc1116bb4fd5" ], "author": { "name": "Andrew Morton", "email": "akpm@linux-foundation.org", "time": "Tue Feb 02 14:45:54 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:19 2010 -0800" }, "message": "PCI hotplug: check ioremap() return value in ibmphp_ebda.c\n\ncheck ioremap() return value.\n\nCc: \u003cstable@kernel.org\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "939fdc67350e15aeeea70457d5b4bc1116bb4fd5", "tree": "e34ca471dda1b1dc37d8aecb9e8f6750747f2d99", "parents": [ "4fb88c1a28a8dc302bdc09858e7cdafc97bef794" ], "author": { "name": "Randy Dunlap", "email": "randy.dunlap@oracle.com", "time": "Thu Feb 04 12:12:23 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:18 2010 -0800" }, "message": "PCI hotplug: fix ibmphp build error\n\nAdd header file to fix build error:\n\ndrivers/pci/hotplug/ibmphp_hpc.c:135: error: implicit declaration of function \u0027init_MUTEX\u0027\ndrivers/pci/hotplug/ibmphp_hpc.c:136: error: implicit declaration of function \u0027init_MUTEX_LOCKED\u0027\ndrivers/pci/hotplug/ibmphp_hpc.c:797: error: implicit declaration of function \u0027down\u0027\ndrivers/pci/hotplug/ibmphp_hpc.c:807: error: implicit declaration of function \u0027up\u0027\n\nSigned-off-by: Randy Dunlap \u003crandy.dunlap@oracle.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "4fb88c1a28a8dc302bdc09858e7cdafc97bef794", "tree": "cd2d6ff98626d6d8782edd848c357bc4607ece17", "parents": [ "0bf01c3c86d4b9ea279d6215420484db887f5db5" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Sun Jan 17 14:01:41 2010 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:17 2010 -0800" }, "message": "PCI: Make pci_scan_slot more robust\n\nYinghai pointed out that the new pci_scan_slot() crashes when called\non an ARI-capable slot that is empty. Fix this by exiting early from\npci_scan_slot if there is no device in the slot.\n\nAlso make next_ari_func() robust against devices not existing in case\nthe ARI capability is corrupt. ARI also requires that the devices be\nlisted in order, so if we find a function listed that is out of order,\nstop scanning to prevent loops.\n\nSigned-off-by: Matthew Wilcox \u003cmatthew@wil.cx\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "0bf01c3c86d4b9ea279d6215420484db887f5db5", "tree": "5d967d0a3d4c81183c2782a1786cdcd0aedcd872", "parents": [ "41a68a748bbc61f5bcea999e33ba72926dfbe6f7" ], "author": { "name": "Jiri Slaby", "email": "jslaby@suse.cz", "time": "Wed Jan 20 14:15:54 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:02 2010 -0800" }, "message": "PCI: hotplug/cpcihp, fix pci device refcounting\n\nStanse found an ommitted pci_dev_put on one error path in\ncpcihp_generic_init. The path is taken on !dev, but also when\ndev-\u003ehdr_type !\u003d PCI_HEADER_TYPE_BRIDGE. However it omits to\npci_dev_put on the latter.\n\nAs it is fine to pass NULL to pci_dev_put, put it in there\nuncoditionally.\n\nSigned-off-by: Jiri Slaby \u003cjslaby@suse.cz\u003e\nCc: Scott Murray \u003cscott@spiteful.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "41a68a748bbc61f5bcea999e33ba72926dfbe6f7", "tree": "d6b100c49d847270c235a9788b0bebb9372bcec9", "parents": [ "7c9342b8dd1a32386fc32bffb9eedebbfe264763" ], "author": { "name": "Tilman Schmidt", "email": "tilman@imap.cc", "time": "Mon Jan 18 17:24:10 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:01 2010 -0800" }, "message": "PCI: push deprecated pci_find_device() function to last user\n\nThe ISDN4Linux HiSax driver family contains the last remaining users\nof the deprecated pci_find_device() function. This patch creates a\nprivate copy of that function in HiSax, and removes the now unused\nglobal function together with its controlling configuration option,\nCONFIG_PCI_LEGACY.\n\nSigned-off-by: Tilman Schmidt \u003ctilman@imap.cc\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7c9342b8dd1a32386fc32bffb9eedebbfe264763", "tree": "5e1e96a1f9bd0808ec3ded0a0cfbf6cf6917eff0", "parents": [ "5eeec0ec931a01e85b3701ce121b7d8a1800ec60" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Tue Dec 22 15:02:24 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:17:00 2010 -0800" }, "message": "PCI: don\u0027t dump resource when bus resource flags indicates unused\n\nDon\u0027t print out resources without flags to avoid cluttering up the debug\noutput.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7cc5997d1dada3bdeed95a59c2f4f6c66cbb0767", "tree": "d93b2e63dbc6ee0a45bdbe222a0c9a74005249b1", "parents": [ "b0fc889c4311835ae7d02f433154bc20cad9ee11" ], "author": { "name": "Yinghai Lu", "email": "yinghai@kernel.org", "time": "Tue Dec 22 15:02:21 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:16:59 2010 -0800" }, "message": "PCI: separate pci_setup_bridge to small functions\n\nThis is a good cleanup in itself, and makes it easier to modify specific\nresource types in later code.\n\nSigned-off-by: Yinghai Lu \u003cyinghai@kernel.org\u003e\nAcked-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b0fc889c4311835ae7d02f433154bc20cad9ee11", "tree": "8985c7acc157bb7e40d271e136b5cdc7dd56d225", "parents": [ "6fcaf17ac7a512227112ac81c0e1a5862bab57a6" ], "author": { "name": "Chandru", "email": "chandru@in.ibm.com", "time": "Mon Jan 11 11:49:21 2010 +0530" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:16:58 2010 -0800" }, "message": "PCI hotplug: ibmphp: read the length of ebda and map entire ebda region\n\nibmphp driver currently maps only 1KB of ebda memory area into kernel address\nspace during driver initialization. This causes kernel oops when the driver is\nmodprobe\u0027d and it accesses memory beyond 1KB within ebda segment. The first\nbyte of ebda segment actually stores the length of the ebda region in\nKilobytes. Hence make use of the length parameter and map the entire ebda\nregion.\n\nSigned-off-by: Chandru Siddalingappa \u003cchandru@linux.vnet.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6fcaf17ac7a512227112ac81c0e1a5862bab57a6", "tree": "a238d8a279f7fbc742b606b58b421ea2ea297403", "parents": [ "3b7a17fcdae532d29dffab9d564a28be08960988" ], "author": { "name": "Jiri Slaby", "email": "jslaby@suse.cz", "time": "Wed Jan 06 17:47:56 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:16:57 2010 -0800" }, "message": "PCI hotplug: fix memory leaks\n\nStanse found a cut\u0026pasted memory leak in pciehp_queue_pushbutton_work\nand shpchp_queue_pushbutton_work. info is not freed/assigned on all\npaths. Fix that.\n\nReviewed-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Jiri Slaby \u003cjslaby@suse.cz\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3b7a17fcdae532d29dffab9d564a28be08960988", "tree": "64ac96e997751e34fcd237485fac9b868d1e0614", "parents": [ "b26b2d494b659f988b4d75eb394dfa0ddac415c9" ], "author": { "name": "Dominik Brodowski", "email": "linux@dominikbrodowski.net", "time": "Fri Jan 01 17:40:50 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:16:57 2010 -0800" }, "message": "resource/PCI: mark struct resource as const\n\nNow that we return the new resource start position, there is no\nneed to update \"struct resource\" inside the align function.\nTherefore, mark the struct resource as const.\n\nCc: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b26b2d494b659f988b4d75eb394dfa0ddac415c9", "tree": "d262f333e529a21017dc072e604a626b38520515", "parents": [ "93da6202264ce1256b04db8008a43882ae62d060" ], "author": { "name": "Dominik Brodowski", "email": "linux@dominikbrodowski.net", "time": "Fri Jan 01 17:40:49 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:16:56 2010 -0800" }, "message": "resource/PCI: align functions now return start of resource\n\nAs suggested by Linus, align functions should return the start\nof a resource, not void. An update of \"res-\u003estart\" is no longer\nnecessary.\n\nCc: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nCc: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "93177a748ba0d4f3d3e51c8e6c785773bf6a70df", "tree": "1207e03e87d1b68a54ff159c9a8a2f279ea0b6a1", "parents": [ "3804259475314a50e4d7a8a974a22fddb6ac7dd7" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Sat Jan 02 22:57:24 2010 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:15:21 2010 -0800" }, "message": "PCI: Clean up build for CONFIG_PCI_QUIRKS unset\n\nCurrently, drivers/pci/quirks.c is built unconditionally, but if\nCONFIG_PCI_QUIRKS is unset, the only things actually built in this\nfile are definitions of global variables and empty functions (due to\nthe #ifdef CONFIG_PCI_QUIRKS embracing all of the code inside the\nfile). This is not particularly nice and if someone overlooks\nthe #ifdef CONFIG_PCI_QUIRKS, build errors are introduced.\n\nTo clean that up, move the definitions of the global variables in\nquirks.c that are always built to pci.c, move the definitions of\nthe empty functions (compiled when CONFIG_PCI_QUIRKS is unset) to\nheaders (additionally make these functions static inline) and modify\ndrivers/pci/Makefile so that quirks.c is only built if\nCONFIG_PCI_QUIRKS is set.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3804259475314a50e4d7a8a974a22fddb6ac7dd7", "tree": "6efe5c2d30dcba571cfdcd4d02a83c8188d326a8", "parents": [ "9dfd97fe12f79ec8b68feb63912a4ef2f31f571a" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jan 04 15:44:10 2010 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:15:20 2010 -0800" }, "message": "PCI hotplug: remove obsolete usage of get_bus_speed from rpaphp hotplug ops\n\nNo longer needed and causes build breakage.\n\nReported-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9dfd97fe12f79ec8b68feb63912a4ef2f31f571a", "tree": "845515c430a3cc48b1d88496d3b8f4d13bd7efb2", "parents": [ "45b4cdd57ef0e57555b2ab61b584784819b39365" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Sun Dec 13 08:11:35 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:15:19 2010 -0800" }, "message": "PCI: Add support for reporting PCIe 3.0 speeds\n\nAdd the 8.0 GT/s speed.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "45b4cdd57ef0e57555b2ab61b584784819b39365", "tree": "1e08008e0cdc57252022b5ad1a0e3029c7e96f99", "parents": [ "9be60ca0497a2563662fde4c9007841c3b79a742" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Sun Dec 13 08:11:34 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:15:19 2010 -0800" }, "message": "PCI: Add support for AGP in cur/max bus speed\n\nTake advantage of some gaps in the table to fit in support for AGP speeds.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "9be60ca0497a2563662fde4c9007841c3b79a742", "tree": "d31bc38997f7591d818d478ba91a7f07dee9bede", "parents": [ "3749c51ac6c1560aa1cb1520066bed84c6f8152a" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Sun Dec 13 08:11:33 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:15:18 2010 -0800" }, "message": "PCI: Add support for detection of PCIe and PCI-X bus speeds\n\nBoth PCIe and PCI-X bridges report their secondary bus speed in their\nrespective capabilities.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "3749c51ac6c1560aa1cb1520066bed84c6f8152a", "tree": "3cbfb6a6d2df821e3e80ccce29ede8011b94246e", "parents": [ "536c8cb49eccd4f753b4782e7e975ef87359cb44" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Sun Dec 13 08:11:32 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:15:17 2010 -0800" }, "message": "PCI: Make current and maximum bus speeds part of the PCI core\n\nMove the max_bus_speed and cur_bus_speed into the pci_bus. Expose the\nvalues through the PCI slot driver instead of the hotplug slot driver.\nUpdate all the hotplug drivers to use the pci_bus instead of their own\ndata structures.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "536c8cb49eccd4f753b4782e7e975ef87359cb44", "tree": "1cc2a32b17e4eb1fc4c9b64dc4895892a2fd3d41", "parents": [ "f07852d6442c46c50b59c7e2acc8a1b291f9ab6d" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Sun Dec 13 08:11:31 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:15:17 2010 -0800" }, "message": "PCI: Unify pcie_link_speed and pci_bus_speed\n\nThese enums must not overlap anyway, since we only have a single\npci_bus_speed_strings array. Use a single enum, and move it to\npci.h. Add \u0027SPEED\u0027 to the pcie names to make it clear what they are.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "f07852d6442c46c50b59c7e2acc8a1b291f9ab6d", "tree": "d855a7bc7df8f3e84f1d267e060537ec011477c6", "parents": [ "bee415ce427d1eab6cfb30221461c7d20cbf1903" ], "author": { "name": "Matthew Wilcox", "email": "matthew@wil.cx", "time": "Sun Dec 13 08:10:02 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Feb 22 16:15:16 2010 -0800" }, "message": "PCI: Rewrite pci_scan_slot\n\nThe Alternate Routing-ID Interpretation capability allows a single device\nto have up to 256 functions. They can be populated sparsely, so the\ncurrent technique of scanning every eighth function is not guaranteed\nto find them all. By introducing a \u0027next_fn\u0027 function pointer, we can\nuse the linked list of functions in the ARI capability to scan all the\nfunctions which exist.\n\nWe can then speed up the pci_scan_slot by skipping the scan of subsequent\ndevfns for PCIe devices which are the direct children of Root Ports or\nDownstream Ports. These devices are only permitted to implement device\n0, unless they are ARI devices, in which case they\u0027ll be scanned by the\nARI code above.\n\nSigned-off-by: Matthew Wilcox \u003cwilly@linux.intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7a0deb6bcda98c2a764cb87f1441eef920fd3663", "tree": "0ed375637719e38c0a731e6ac390e2231b28e796", "parents": [ "3c945e5b3719bcc18c6ddd31bbcae8ef94f3d19a" ], "author": { "name": "Alexander Duyck", "email": "alexander.h.duyck@intel.com", "time": "Fri Feb 19 17:57:46 2010 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Mon Feb 22 15:45:33 2010 -0800" }, "message": "pci: add support for 82576NS serdes to existing SR-IOV quirk\n\nThis patch adds support for the 82576NS Serdes adapter to the existing pci\nquirk for 82576 parts.\n\nSigned-off-by: Alexander Duyck \u003calexander.h.duyck@intel.com\u003e\nSigned-off-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "cf4c43dd439b90a1a876b3f836ebe745abb9a269", "tree": "59d7a278d9d5cb6c9927819fa75231e284b29556", "parents": [ "724e6d3fe8003c3f60bf404bf22e4e331327c596" ], "author": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Jul 15 13:13:00 2009 -0700" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Feb 19 16:12:26 2010 -0800" }, "message": "PCI: Add pci_bus_find_ext_capability\n\nFor use by code that needs to walk extended capability lists before\npci_dev structures are set up.\n\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nLKML-Reference: \u003c43F901BD926A4E43B106BF17856F07559FB80CFD@orsmsx508.amr.corp.intel.com\u003e\nSigned-off-by: Jacob Pan \u003cjacob.jun.pan@intel.com\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "0e2ecbaefd219cb538aa7827f37da064d1a3328b", "tree": "99ec286e471c8353ff32fd1d19106963536c8f11", "parents": [ "b0483e78e5c4c9871fc5541875b3bc006846d46b", "49bf83a45fc677db1ed44d0e072e6aaeabe4e124", "49c6fb2e41d41c4c0c5c753b6960bc81fe658d20", "370d5cd88509b93b76eb2f5f97efbd71c25061cb", "1379d2fef0ec07c7027a5e89036025ce761470c8", "a4932299d03a1c20e58e4cc40a66fb0a048fb3a7", "7779688fc3d1ceddad84846a7b0affbe8e78ec6e", "f04d5e012d73ea441bd39804ace39fd6d1ce5611" ], "author": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Thu Feb 18 03:51:04 2010 -0500" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Thu Feb 18 03:51:04 2010 -0500" }, "message": "Merge branches \u0027bugzilla-14886\u0027, \u0027bugzilla-15000\u0027, \u0027bugzilla-15040\u0027, \u0027bugzilla-15108\u0027, \u0027pdc\u0027, \u0027hotplug-null-ref\u0027 and \u0027thinkpad\u0027 into release\n" }, { "commit": "2bb4646fce8d09916b351d1a62f98db7cec6fc41", "tree": "c1f0d002e69868606eca9d1b919835f422892063", "parents": [ "6836b9bdd98e3b500cd49512484df68f46e14659", "b0483e78e5c4c9871fc5541875b3bc006846d46b" ], "author": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Feb 16 22:09:29 2010 -0800" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Tue Feb 16 22:09:29 2010 -0800" }, "message": "Merge branch \u0027master\u0027 of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6\n" }, { "commit": "fb8a0d9d1bfd1e4355f307e86a6da7209eefd5f3", "tree": "99f23a4bc7c51343619f63970e5d017d75b5a66f", "parents": [ "81d54ec8479a2c695760da81f05b5a9fb2dbe40a" ], "author": { "name": "Williams, Mitch A", "email": "mitch.a.williams@intel.com", "time": "Wed Feb 10 01:43:04 2010 +0000" }, "committer": { "name": "David S. Miller", "email": "davem@davemloft.net", "time": "Fri Feb 12 16:56:07 2010 -0800" }, "message": "pci: Add SR-IOV convenience functions and macros\n\nAdd and export pci_num_vf to allow other subsystems to determine how many\nvirtual function devices are associated with an SR-IOV physical function\ndevice.\nAdd macros dev_is_pci, dev_is_ps, and dev_num_vf to make it easier for\nnon-PCI specific code to determine SR-IOV capabilities.\n\nSigned-off-by: Mitch Williams \u003cmitch.a.williams@intel.com\u003e\nSigned-off-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n" }, { "commit": "c85e4aae699360e8db4ebfe710e917ac9b6fc77e", "tree": "c406eb80fe17d420212597a32e1c841ec3d8380f", "parents": [ "84abd88a70090cf00f9e45c3a81680874f17626e" ], "author": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Wed Feb 10 17:45:09 2010 -0800" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Wed Feb 10 17:45:09 2010 -0800" }, "message": "ibmphp: Rename add_range() to add_bus_range() to avoid conflict\n\nRename add_range() to add_bus_range() to avoid conflict with the\nnaming of the generic range manipulation functions.\n\nLKML-Reference: \u003c1265793639-15071-4-git-send-email-yinghai@kernel.org\u003e\nCc: Yinghai Lu \u003cyinghai@kernel.org\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nCc: Greg Kroah-Hartman \u003cgregkh@suse.de\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "95a8b6efc5d07103583f706c8a5889437d537939", "tree": "a8e9161eea03b0eb21e838826c547771158ecdce", "parents": [ "499a2673713c85734a54c37dd90b4b729de399c4" ], "author": { "name": "Mike Travis", "email": "travis@sgi.com", "time": "Tue Feb 02 14:38:13 2010 -0800" }, "committer": { "name": "H. Peter Anvin", "email": "hpa@zytor.com", "time": "Fri Feb 05 14:05:41 2010 -0800" }, "message": "pci: Update pci_set_vga_state() to call arch functions\n\nUpdate pci_set_vga_state to call arch dependent functions to enable Legacy\nVGA I/O transactions to be redirected to correct target.\n\n[akpm@linux-foundation.org: make pci_register_set_vga_state() __init]\nSigned-off-by: Mike Travis \u003ctravis@sgi.com\u003e\nLKML-Reference: \u003c201002022238.o12McE1J018723@imap1.linux-foundation.org\u003e\nCc: Thomas Gleixner \u003ctglx@linutronix.de\u003e\nCc: Robin Holt \u003cholt@sgi.com\u003e\nCc: Jack Steiner \u003csteiner@sgi.com\u003e\nCc: Ingo Molnar \u003cmingo@elte.hu\u003e\nCc: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\nCc: David Airlie \u003cairlied@linux.ie\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: H. Peter Anvin \u003chpa@zytor.com\u003e\n" }, { "commit": "73d2eaac8a3f1ec1d6d0a80ea7302a439ca9b933", "tree": "1656adeecc51ba47cc4c081d0d7c56d7ec75ced2", "parents": [ "2938429501b73f6aeb312236eac7ed0416a07cd5" ], "author": { "name": "Andres Salomon", "email": "dilinger@collabora.co.uk", "time": "Fri Feb 05 01:42:43 2010 -0500" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Feb 05 07:36:50 2010 -0800" }, "message": "CS5536: apply pci quirk for BIOS SMBUS bug\n\nThe new cs5535-* drivers use PCI header config info rather than MSRs to\ndetermine the memory region to use for things like GPIOs and MFGPTs. As\nanticipated, we\u0027ve run into a buggy BIOS:\n\n[ 0.081818] pci 0000:00:14.0: reg 10: [io 0x6000-0x7fff]\n[ 0.081906] pci 0000:00:14.0: reg 14: [io 0x6100-0x61ff]\n[ 0.082015] pci 0000:00:14.0: reg 18: [io 0x6200-0x63ff]\n[ 0.082917] pci 0000:00:14.2: reg 20: [io 0xe000-0xe00f]\n[ 0.083551] pci 0000:00:15.0: reg 10: [mem 0xa0010000-0xa0010fff]\n[ 0.084436] pci 0000:00:15.1: reg 10: [mem 0xa0011000-0xa0011fff]\n[ 0.088816] PCI: pci_cache_line_size set to 32 bytes\n[ 0.088938] pci 0000:00:14.0: address space collision: [io 0x6100-0x61ff] already in use\n[ 0.089052] pci 0000:00:14.0: can\u0027t reserve [io 0x6100-0x61ff]\n\nThis is a Soekris board, and its BIOS sets the size of the PCI ISA bridge\ndevice\u0027s BAR0 to 8k. In reality, it should be 8 bytes (BAR0 is used for\nSMBus stuff). This quirk checks for an incorrect size, and resets it\naccordingly.\n\nSigned-off-by: Andres Salomon \u003cdilinger@collabora.co.uk\u003e\nTested-by: Leigh Porter \u003cleigh@leighporter.org\u003e\nTested-by: Jens Rottmann \u003cJRottmann@LiPPERTEmbedded.de\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "32337f8a7020676b5fd6387def9ccb9060440c5c", "tree": "7688f053cc9a3be1e99a492c33b85473cd57c859", "parents": [ "abe94c756c08d50566c09a65b9c7fe72f83071c5", "94f28da8409c6059135e89ac64a0839993124155" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Feb 01 10:37:58 2010 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Mon Feb 01 10:37:58 2010 -0800" }, "message": "Merge branch \u0027merge\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc\n\n* \u0027merge\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:\n powerpc: TIF_ABI_PENDING bit removal\n powerpc/pseries: Fix xics build without CONFIG_SMP\n powerpc/4xx: Add pcix type 1 transactions\n powerpc/pci: Add missing call to header fixup\n powerpc/pci: Add missing hookup to pci_slot\n powerpc/pci: Add calls to set_pcie_port_type() and set_pcie_hotplug_bridge()\n powerpc/40x: Update the PowerPC 40x board defconfigs\n powerpc/44x: Update PowerPC 44x board defconfigs\n" }, { "commit": "7779688fc3d1ceddad84846a7b0affbe8e78ec6e", "tree": "fff56e1fea8656749666280b857ecac04560e70a", "parents": [ "d2f6650a950dadd20667a04a9dc785f240d43695" ], "author": { "name": "Thomas Renninger", "email": "trenn@suse.de", "time": "Fri Jan 29 17:48:52 2010 +0100" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Sun Jan 31 21:43:32 2010 -0500" }, "message": "ACPI: acpi_bus_{scan,bus,add}: return -ENODEV if no device was found\n\nCallers (acpi_memhotplug.c, dock.c and others) check for the return\nvalue of acpi_bus_add() and assume a valid device was returned in\ncase zero was returned.\n\nThus return -ENODEV if no device was found in acpi_bus_scan and\npropagate this through acpi_bus_add and acpi_bus_start.\n\nAlso remove a confusing comment in acpiphp_glue.c, acpi_bus_scan\nwill and cannot invoke if acpi_bus_add returns no valid device.\n\nSigned-off-by: Thomas Renninger \u003ctrenn@suse.de\u003e\nAcked-by: Bjorn Helgaas \u003cbjorn.helgaas@hp.com\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "bb209c8287d2d55ec4a67e3933346e0a3ee0da76", "tree": "2e444f273e631fa4dded4ee13ac779565e5efb43", "parents": [ "b04da8bfdfbbd79544cab2fadfdc12e87eb01600" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Tue Jan 26 17:10:03 2010 +0000" }, "committer": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Fri Jan 29 16:51:10 2010 +1100" }, "message": "powerpc/pci: Add calls to set_pcie_port_type() and set_pcie_hotplug_bridge()\n\nWe are missing these when building the pci_dev from scratch off\nthe Open Firmware device-tree\n\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nAcked-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "439913fffd39374c3737186b22d2d56c3a0ae526", "tree": "f6d5c809c1b77950a2cf7174fdee8667d527c87b", "parents": [ "aea9c04bcc257caad9841c283b90ec1b28267fae" ], "author": { "name": "Lin Ming", "email": "ming.m.lin@intel.com", "time": "Thu Jan 28 10:53:19 2010 +0800" }, "committer": { "name": "Len Brown", "email": "len.brown@intel.com", "time": "Thu Jan 28 01:47:33 2010 -0500" }, "message": "ACPI: replace acpi_integer by u64\n\nacpi_integer is now obsolete and removed from the ACPICA code base,\nreplaced by u64.\n\nSigned-off-by: Lin Ming \u003cming.m.lin@intel.com\u003e\nSigned-off-by: Len Brown \u003clen.brown@intel.com\u003e\n" }, { "commit": "bd1f46deba615971a58193afd0202878cadf19a7", "tree": "1a197e82ad0f6314f0ff0507c04030aaad933c7c", "parents": [ "61c39bb354a1f791ba6f562b766a72e508a036ee" ], "author": { "name": "Andrew Patterson", "email": "andrew.patterson@hp.com", "time": "Fri Jan 22 14:06:53 2010 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jan 25 10:42:52 2010 -0800" }, "message": "PCI: fix nested spinlock hang in aer_inject\n\nThe aer_inject module hangs in aer_inject() when checking the device\u0027s\nerror masks. The hang is due to a recursive use of the aer_inject lock.\nThe aer_inject() routine grabs the lock while processing the error and then\ncalls pci_read_config_dword to read the masks. The pci_read_config_dword\nroutine is earlier overridden by pci_read_aer, which among other things,\ngrabs the aer_inject lock.\n\nFixed by moving the pci_read_config_dword calls to read the masks to before\nthe lock is taken.\n\nAcked-by: Huang Ying \u003cying.huang@intel.com\u003e\nSigned-off-by: Andrew Patterson \u003candrew.patterson@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b49bfd32901625e4adcfee011d2b32a43b4db67d", "tree": "2a83d0d739df23b96b094de83880defc05ea0a6a", "parents": [ "1ae861e652b5457e7fa98ccbc55abea1e207916e" ], "author": { "name": "Youquan,Song", "email": "youquan.song@linux.intel.com", "time": "Thu Dec 17 08:22:48 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jan 04 15:52:49 2010 -0800" }, "message": "PCIe AER: prevent AER injection if hardware masks error reporting\n\nThe Correcteable/Uncorrectable Error Mask Registers are used by PCIe AER\ndriver which will controls the reporting of individual errors to PCIe RC\nvia PCIe error messages.\n\nIf hardware masks special error reporting to RC, the aer_inject driver\nshould not inject aer error.\n\nAcked-by: Andi Kleen \u003cak@linux.intel.com\u003e\nSigned-off-by: Youquan, Song \u003cyouquan.song@intel.com\u003e\nAcked-by: Ying, Huang \u003cying.huang@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "1ae861e652b5457e7fa98ccbc55abea1e207916e", "tree": "d0326aab2746a779f3ab140ec9fdea2508f2e99b", "parents": [ "6be954d1f91b81ca85c74792b13654069278c577" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Thu Dec 31 12:15:54 2009 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jan 04 15:41:47 2010 -0800" }, "message": "PCI/PM: Use per-device D3 delays\n\nIt turns out that some PCI devices require extra delays when changing\npower state from D3 to D0 (and the other way around). Although this\nis against the PCI specification, we can handle it quite easily by\nallowing drivers to define arbitrary D3 delays for devices known to\nrequire extra time for switching power states.\n\nIntroduce additional field d3_delay in struct pci_dev and use it to\nstore the value of the device\u0027s D0-\u003eD3 delay, in miliseconds. Make\nthe PCI PM core code use the per-device d3_delay unless\npci_pm_d3_delay is greater (in which case the latter is used).\n[This also allows the driver to specify d3_delay shorter than the\n 10 ms required by the PCI standard if the device is known to be able\n to handle that.]\n\nMake the sky2 driver set d3_delay to 150 for devices handled by it.\n\nFixes http://bugzilla.kernel.org/show_bug.cgi?id\u003d14730 which is a\nlisted regression from 2.6.30.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "6be954d1f91b81ca85c74792b13654069278c577", "tree": "c1e769d05028d8b8dc2058b10e7d0be01a9b2be5", "parents": [ "46256f83d0d066f99ffde547f27473dfd2a78009" ], "author": { "name": "David John", "email": "davidjon@xenontk.org", "time": "Mon Jan 04 20:28:57 2010 +0530" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jan 04 15:10:56 2010 -0800" }, "message": "PCI: Check the node argument passed to cpumask_of_node\n\nCommit e0cd516 \"PCI: derive nearby CPUs from device\u0027s instead of bus\u0027\nNUMA information\" causes an null pointer dereference when reading from\nthe sysfs attributes local_cpu* on Intel machines with no ACPI NUMA\nproximity info, since dev-\u003enuma_node gets set to -1 for all PCI devices,\nwhich then gets passed to cpumask_of_node.\n\nAdd a check to prevent this.\n\nSigned-off-by: David John \u003cdavidjon@xenontk.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "46256f83d0d066f99ffde547f27473dfd2a78009", "tree": "b70c070f59d510d3d0e974009199a1c175d753d3", "parents": [ "40da4186a53e59d801130156ecb89fc5830ff227" ], "author": { "name": "Youquan,Song", "email": "youquan.song@linux.intel.com", "time": "Fri Dec 11 18:42:35 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jan 04 08:31:46 2010 -0800" }, "message": "PCI: AER: fix aer inject result in kernel oops\n\nIf the BIOS does not export _OSC to allow OS take over the PCIe AER, the\npcie aer driver will not initialize the aer service. However, the\naer_inject driver does not check this scenario, which results in a kernel\noops when injecting an aer error into OS. For example:\n\nBUG: unable to handle kernel NULL pointer dereference at 0000000000000350\nIP: [\u003cffffffff812e08f7\u003e] _spin_lock_irqsave+0xc/0x23\nPGD 155c41067 PUD 157fe0067 PMD 0\nOops: 0002 [#1] SMP\nPid: 5119, comm: aer-inject Not tainted 2.6.32-rc8-mce #2\nRIP: 0010:[\u003cffffffff812e08f7\u003e] [\u003cffffffff812e08f7\u003e] _spin_lock_irqsave+0xc/0x23\nRSP: 0018:ffff880157f81e28 EFLAGS: 00010096\nRAX: 0000000000000296 RBX: 0000000000000000 RCX: 0000000000000100\nRDX: 0000000000010000 RSI: 0000000000000246 RDI: 0000000000000350\nRBP: ffff880157f81e28 R08: 0000000000000004 R09: ffff880157f81dac\nR10: ffff88015a666f60 R11: ffff88015a666f40 R12: ffff88015758cc00\nR13: 0000000000000350 R14: 0000000000000000 R15: 0000000000000100\nFS: 00007f4d4a66e6f0(0000) GS:ffff8800282e0000(0000) knlGS:0000000000000000\nCS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b\nCR2: 0000000000000350 CR3: 000000015661a000 CR4: 00000000000006e0\nDR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000\nDR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400\nProcess aer-inject (pid: 5119, threadinfo ffff880157f80000, task ffff8801585f4340)\nStack:\n ffff880157f81e78 ffffffff811b1615 ffff880157f81e78 ffffffff81222823\nCall Trace:\n [\u003cffffffff811b1615\u003e] aer_irq+0x38/0x117\n [\u003cffffffff81222823\u003e] ? device_for_each_child+0x5f/0x6f\n [\u003cffffffffa00967bf\u003e] aer_inject_write+0x409/0x45e [aer_inject]\n [\u003cffffffff810eb80e\u003e] vfs_write+0xae/0x16a\n [\u003cffffffff810eb98e\u003e] sys_write+0x47/0x6e\n [\u003cffffffff8100ba2b\u003e] system_call_fastpath+0x16/0x1b\nRIP [\u003cffffffff812e08f7\u003e] _spin_lock_irqsave+0xc/0x23\n RSP \u003cffff880157f81e28\u003e\nCR2: 0000000000000350\n\nSo check the _OSC before assuming that AER is available to the OS.\n\nSigned-off-by: Youquan, Song \u003cyouquan.song@intel.com\u003e\nAcked-by: Ying, Huang \u003cying.huang@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "40da4186a53e59d801130156ecb89fc5830ff227", "tree": "8eab64b223ca9657a65fb0650f10dce68ff6420f", "parents": [ "45d28b097280a78893ce25a5d0db41e6a2717853" ], "author": { "name": "Hidetoshi Seto", "email": "seto.hidetoshi@jp.fujitsu.com", "time": "Tue Dec 15 11:38:04 2009 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Mon Jan 04 08:29:37 2010 -0800" }, "message": "PCI: pcie portdrv: style cleanup\n\nNo change in logic.\n\nBefore:\n drivers/pci/pcie/portdrv_core.c:\n total: 7 errors, 2 warnings, 508 lines checked\n drivers/pci/pcie/portdrv_pci.c:\n total: 4 errors, 2 warnings, 300 lines checked\n\nAfter:\n drivers/pci/pcie/portdrv_core.c:\n total: 0 errors, 0 warnings, 506 lines checked\n drivers/pci/pcie/portdrv_pci.c:\n total: 0 errors, 0 warnings, 299 lines checked\n\nSigned-off-by: Hidetoshi Seto \u003cseto.hidetoshi@jp.fujitsu.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "df9d1e8a4379119cbc47c474f168b5103e404e17", "tree": "4cb583dd397985c80ebb0e67f9ac566330477929", "parents": [ "c03f6bfc9f4fbeee14abef81ece67e39150a1ab1" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Dec 31 16:44:43 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Dec 31 16:44:43 2009 -0800" }, "message": "pci: avoid compiler warning in quirks.c\n\nIntroduced by commit 5b889bf23 (\"PCI: Fix build if quirks are not\nenabled\"), which made the pci_dev_reset_methods[] array static and\n\u0027const\u0027, but didn\u0027t then change the code to match, and use a const\npointer when moving it to quirks.c.\n\nTrivially fixed by just adding the required \u0027const\u0027 to the iterator\nvariable.\n\nReported-by: Stephen Rothwell \u003csfr@canb.auug.org.au\u003e\nCc: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "5b889bf237fca383b5807ad69fde3ad1e2287e42", "tree": "91c1df6fe04a187d31b62d96b1aa70abf3e04710", "parents": [ "9de54606d3d55095e4426a81a79a41d8e5e5b6be" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Thu Dec 31 19:06:35 2009 +0100" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Thu Dec 31 12:00:45 2009 -0800" }, "message": "PCI: Fix build if quirks are not enabled\n\nAfter commit b9c3b266411d27f1a6466c19d146d08db576bfea (\"PCI: support\ndevice-specific reset methods\") the kernel build is broken if\nCONFIG_PCI_QUIRKS is unset.\n\nFix this by moving pci_dev_specific_reset() to drivers/pci/quirks.c and\nproviding an empty replacement for !CONFIG_PCI_QUIRKS builds.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nReported-by: Ingo Molnar \u003cmingo@elte.hu\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "d661d76b0262f3ed649a1dea24c0119757592b09", "tree": "ff56854943219c16f51e18c5360b9626c3a20474", "parents": [ "b07d41b77e58baa2df2326cec68dde03cb2348c5", "2d1c861871d767153538a77c498752b36d4bb4b8" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 30 13:13:24 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 30 13:13:24 2009 -0800" }, "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6:\n PCI/cardbus: Add a fixup hook and fix powerpc\n PCI: change PCI nomenclature in drivers/pci/ (non-comment changes)\n PCI: change PCI nomenclature in drivers/pci/ (comment changes)\n PCI: fix section mismatch on update_res()\n PCI: add Intel 82599 Virtual Function specific reset method\n PCI: add Intel USB specific reset method\n PCI: support device-specific reset methods\n PCI: Handle case when no pci device can provide cache line size hint\n PCI/PM: Propagate wake-up enable for PCIe devices too\n vgaarbiter: fix a typo in the vgaarbiter Documentation\n" }, { "commit": "2d1c861871d767153538a77c498752b36d4bb4b8", "tree": "2ed80140487cd68e539c55876ba361199a4b92c1", "parents": [ "7e8af37a9a71b479f58d2fd5f0ddaa6780c51f11" ], "author": { "name": "Benjamin Herrenschmidt", "email": "benh@kernel.crashing.org", "time": "Wed Dec 09 17:52:13 2009 +1100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Dec 16 18:55:51 2009 -0800" }, "message": "PCI/cardbus: Add a fixup hook and fix powerpc\n\nThe cardbus code creates PCI devices without ever going through the\nnecessary fixup bits and pieces that normal PCI devices go through.\n\nThere\u0027s in fact a commented out call to pcibios_fixup_bus() in there,\nit\u0027s commented because ... it doesn\u0027t work.\n\nI could make pcibios_fixup_bus() do the right thing on powerpc easily\nbut I felt it cleaner instead to provide a specific hook pci_fixup_cardbus\nfor which a weak empty implementation is provided by the PCI core.\n\nThis fixes cardbus on powerbooks and probably all other PowerPC\nplatforms which was broken completely for ever on some platforms and\nsince 2.6.31 on others such as PowerBooks when we made the DMA ops\nmandatory (since those are setup by the fixups).\n\nAcked-by: Dominik Brodowski \u003clinux@dominikbrodowski.net\u003e\nSigned-off-by: Benjamin Herrenschmidt \u003cbenh@kernel.crashing.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "7e8af37a9a71b479f58d2fd5f0ddaa6780c51f11", "tree": "c83fc67ebf0df900bf7ac3c30cd282f28a13b8a6", "parents": [ "45e829ea412760d2404d7dfc42528df46aedbf62" ], "author": { "name": "Stefan Assmann", "email": "sassmann@redhat.com", "time": "Thu Dec 03 18:00:10 2009 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Dec 16 13:37:54 2009 -0800" }, "message": "PCI: change PCI nomenclature in drivers/pci/ (non-comment changes)\n\nChanging occurrences of variants of PCI-X and PCIe to the PCI-SIG\nterms listed in the \"Trademark and Logo Usage Guidelines\".\nhttp://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf\n\nPatch is limited to drivers/pci/ and changes concern non-comment parts or\nanything that might be visible to the user.\n\nSigned-off-by: Stefan Assmann \u003csassmann@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "45e829ea412760d2404d7dfc42528df46aedbf62", "tree": "869581b5828f9eb16a5ce38231b58a80a30be67c", "parents": [ "5714868812b563ba8816c1d974f4f07c76941c30" ], "author": { "name": "Stefan Assmann", "email": "sassmann@redhat.com", "time": "Thu Dec 03 06:49:24 2009 -0500" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Dec 16 13:37:53 2009 -0800" }, "message": "PCI: change PCI nomenclature in drivers/pci/ (comment changes)\n\nChanging occurrences of variants of PCI-X and PCIe to the PCI-SIG\nterms listed in the \"Trademark and Logo Usage Guidelines\".\nhttp://www.pcisig.com/developers/procedures/logos/Trademark_and_Logo_Usage_Guidelines_updated_112206.pdf\n\nPatch is limited to drivers/pci/ and changes concern comments only.\n\nSigned-off-by: Stefan Assmann \u003csassmann@redhat.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "c763e7b58f71833e6cb7b05493eb1adda4811b08", "tree": "0fb92e114a0762da1d3f910506bf9c6e2bf6328b", "parents": [ "aeb30016fec3378c543cae33654c2144277fe674" ], "author": { "name": "Dexuan Cui", "email": "dexuan.cui@intel.com", "time": "Mon Dec 07 13:03:23 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Dec 16 13:37:52 2009 -0800" }, "message": "PCI: add Intel 82599 Virtual Function specific reset method\n\nHandle device specific timeout and use FLR.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Dexuan Cui \u003cdexuan.cui@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "aeb30016fec3378c543cae33654c2144277fe674", "tree": "f45c459334b963634d0c54aab4d3c0ff46e686b1", "parents": [ "b9c3b266411d27f1a6466c19d146d08db576bfea" ], "author": { "name": "Dexuan Cui", "email": "dexuan.cui@intel.com", "time": "Mon Dec 07 13:03:22 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Dec 16 13:37:51 2009 -0800" }, "message": "PCI: add Intel USB specific reset method\n\nHandle device specific reset requirements (i.e. vendor reg for reset\nalong with appropriate timeout).\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Dexuan Cui \u003cdexuan.cui@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b9c3b266411d27f1a6466c19d146d08db576bfea", "tree": "c310b37e7dff6607e22eca0b690c2a3f290c85a9", "parents": [ "2820f333e3b4ad96590093efbed7b3400bcf492b" ], "author": { "name": "Dexuan Cui", "email": "dexuan.cui@intel.com", "time": "Mon Dec 07 13:03:21 2009 +0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Dec 16 13:37:50 2009 -0800" }, "message": "PCI: support device-specific reset methods\n\nAdd a new type of quirk for resetting devices at pci_dev_reset time.\nThis is necessary to handle device with nonstandard reset procedures,\nespecially useful for guest drivers.\n\nSigned-off-by: Yu Zhao \u003cyu.zhao@intel.com\u003e\nSigned-off-by: Dexuan Cui \u003cdexuan.cui@intel.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "2820f333e3b4ad96590093efbed7b3400bcf492b", "tree": "47a9e4ebacfc0df5c070a1f70cc68a9f9af4e164", "parents": [ "dc1a94ae1749d14c55f8b54e9d92bd89df82d51a" ], "author": { "name": "Csaba Henk", "email": "csaba@gluster.com", "time": "Tue Dec 15 17:55:25 2009 +0530" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Dec 16 13:37:50 2009 -0800" }, "message": "PCI: Handle case when no pci device can provide cache line size hint\n\nPrior to this patch, if pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, ...)\nreturns 0 for all dev, pci_cache_line_size ends up set to zero\n(instead of pci_dfl_cache_line_size).\n\nThis patch ensures the pci_cache_line_size \u003d pci_dfl_cache_line_size\nsetting in the above scenario.\n\nThis happens in case of a kvm-88 guest (where, consequently, the rtl8139\nNIC failed to initialize).\n\nAcked-by: Tejun Heo \u003ctj@kernel.org\u003e\nSigned-off-by: Csaba Henk \u003ccsaba@gluster.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "dc1a94ae1749d14c55f8b54e9d92bd89df82d51a", "tree": "6a5df75770f1ddf65d70a694fb83d00b8ec986c2", "parents": [ "15293df82bd1c15196e7cb336130c243e9a41806" ], "author": { "name": "Rafael J. Wysocki", "email": "rjw@sisk.pl", "time": "Sun Nov 29 16:35:54 2009 +0100" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Wed Dec 16 13:37:49 2009 -0800" }, "message": "PCI/PM: Propagate wake-up enable for PCIe devices too\n\nHaving read the PM part of the PCIe 2.0 specification more carefully\nI think that it was a mistake to restrict the wake-up enable\npropagation to non-PCIe devices, because if we do not request\ncontrol of the root ports\u0027 PME registers via OSC, PCIe PME is\nsupposed to be handled by the platform, just like the non-PCIe PME.\nEven if we do that, the wake-up propagation is done to allow the\ndevices to wake up the system from sleep states which involves the\nplatform anyway, so it won\u0027t hurt.\n\nSigned-off-by: Rafael J. Wysocki \u003crjw@sisk.pl\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "a79960e576ebca9dbf24489b562689f2be7e9ff0", "tree": "b0748839230c2bba1d49ccdd732608d7d1f334cb", "parents": [ "661e338f728d101b4839b6b157d44cfcb80e3c5e", "cd7bcf32d42b15891620b3f1387a00178b54291a" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 16 10:11:38 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 16 10:11:38 2009 -0800" }, "message": "Merge git://git.infradead.org/iommu-2.6\n\n* git://git.infradead.org/iommu-2.6:\n implement early_io{re,un}map for ia64\n Revert \"Intel IOMMU: Avoid memory allocation failures in dma map api calls\"\n intel-iommu: ignore page table validation in pass through mode\n intel-iommu: Fix oops with intel_iommu\u003digfx_off\n intel-iommu: Check for an RMRR which ends before it starts.\n intel-iommu: Apply BIOS sanity checks for interrupt remapping too.\n intel-iommu: Detect DMAR in hyperspace at probe time.\n dmar: Fix build failure without NUMA, warn on bogus RHSA tables and don\u0027t abort\n iommu: Allocate dma-remapping structures using numa locality info\n intr_remap: Allocate intr-remapping table using numa locality info\n dmar: Allocate queued invalidation structure using numa locality info\n dmar: support for parsing Remapping Hardware Static Affinity structure\n" }, { "commit": "471452104b8520337ae2fb48c4e61cd4896e025d", "tree": "8594ae4a8362014e3cccf72a4e8834cdbb610bdd", "parents": [ "0ead0f84e81a41c3e98aeceab04af8ab1bb08d1f" ], "author": { "name": "Alexey Dobriyan", "email": "adobriyan@gmail.com", "time": "Mon Dec 14 18:00:08 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Dec 15 08:53:25 2009 -0800" }, "message": "const: constify remaining dev_pm_ops\n\nSigned-off-by: Alexey Dobriyan \u003cadobriyan@gmail.com\u003e\nSigned-off-by: Andrew Morton \u003cakpm@linux-foundation.org\u003e\nSigned-off-by: Linus Torvalds \u003ctorvalds@linux-foundation.org\u003e\n" }, { "commit": "11bd04f6f35621193311c32e0721142b073a7794", "tree": "00979740582bb26e8d3756bf3526c85f19f66a46", "parents": [ "4e2ccdb0409146f8cf64a11b6ef82a9c928ced2a", "9e0b5b2c447ad0caa075a5cfef86def62e1782ff" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Dec 11 12:18:16 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Fri Dec 11 12:18:16 2009 -0800" }, "message": "Merge branch \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6\n\n* \u0027linux-next\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (109 commits)\n PCI: fix coding style issue in pci_save_state()\n PCI: add pci_request_acs\n PCI: fix BUG_ON triggered by logical PCIe root port removal\n PCI: remove ifdefed pci_cleanup_aer_correct_error_status\n PCI: unconditionally clear AER uncorr status register during cleanup\n x86/PCI: claim SR-IOV BARs in pcibios_allocate_resource\n PCI: portdrv: remove redundant definitions\n PCI: portdrv: remove unnecessary struct pcie_port_data\n PCI: portdrv: minor cleanup for pcie_port_device_register\n PCI: portdrv: add missing irq cleanup\n PCI: portdrv: enable device before irq initialization\n PCI: portdrv: cleanup service irqs initialization\n PCI: portdrv: check capabilities first\n PCI: portdrv: move PME capability check\n PCI: portdrv: remove redundant pcie type calculation\n PCI: portdrv: cleanup pcie_device registration\n PCI: portdrv: remove redundant pcie_port_device_probe\n PCI: Always set prefetchable base/limit upper32 registers\n PCI: read-modify-write the pcie device control register when initiating pcie flr\n PCI: show dma_mask bits in /sys\n ...\n\nFixed up conflicts in:\n\tarch/x86/kernel/amd_iommu_init.c\n\tdrivers/pci/dmar.c\n\tdrivers/pci/hotplug/acpiphp_glue.c\n" }, { "commit": "3067e02f8f3ae2f3f02ba76400d03b8bcb4942b0", "tree": "761e19d279b27a03714a6673811e76e0b1cf2081", "parents": [ "f71eaf68406cfee91b6a96bcdf7ce33dc78829c5", "b00eb796f1b67c46036b5490e83b31741f1eebaf" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 09 19:57:06 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Wed Dec 09 19:57:06 2009 -0800" }, "message": "Merge branch \u0027acpica\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6\n\n* \u0027acpica\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux-acpi-2.6:\n ACPICA: Update version to 20091112.\n ACPICA: Add additional module-level code support\n ACPICA: Deploy new create integer interface where appropriate\n ACPICA: New internal utility function to create Integer objects\n ACPICA: Add repair for predefined methods that must return sorted lists\n ACPICA: Fix possible fault if return Package objects contain NULL elements\n ACPICA: Add post-order callback to acpi_walk_namespace\n ACPICA: Change package length error message to an info message\n ACPICA: Reduce severity of predefined repair messages, Warning to Info\n ACPICA: Update version to 20091013\n ACPICA: Fix possible memory leak for Scope ASL operator\n ACPICA: Remove possibility of executing _REG methods twice\n ACPICA: Add repair for bad _MAT buffers\n ACPICA: Add repair for bad _BIF/_BIX packages\n" }, { "commit": "849e8dea099aafa56db9e74b580b0d858b956533", "tree": "f97331389507608561e96e96a04546b84a8860fc", "parents": [ "e069efb6bbf8f739a2e084183709b5eb76abf90d", "18ed61da985c57eea3fe8038b13fa2837c9b3c3f" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Dec 08 19:26:55 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Tue Dec 08 19:26:55 2009 -0800" }, "message": "Merge branch \u0027timers-for-linus-hpet\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027timers-for-linus-hpet\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:\n x86: hpet: Make WARN_ON understandable\n x86: arch specific support for remapping HPET MSIs\n intr-remap: generic support for remapping HPET MSIs\n x86, hpet: Simplify the HPET code\n x86, hpet: Disable per-cpu hpet timer if ARAT is supported\n" }, { "commit": "354bb65e6e0df0aaae0e5b1ea33948d8e0b61418", "tree": "afcb7dca4c8362442ec50ce799290ae1211bde19", "parents": [ "1672af1164d3d50ba8908014fd34cc0b58afdc1e" ], "author": { "name": "KOSAKI Motohiro", "email": "kosaki.motohiro@jp.fujitsu.com", "time": "Tue Nov 17 16:21:09 2009 +0900" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 10:12:04 2009 +0000" }, "message": "Revert \"Intel IOMMU: Avoid memory allocation failures in dma map api calls\"\n\ncommit eb3fa7cb51 said Intel IOMMU\n\n Intel IOMMU driver needs memory during DMA map calls to setup its\n internal page tables and for other data structures. As we all know\n that these DMA map calls are mostly called in the interrupt context\n or with the spinlock held by the upper level drivers(network/storage\n drivers), so in order to avoid any memory allocation failure due to\n low memory issues, this patch makes memory allocation by temporarily\n setting PF_MEMALLOC flags for the current task before making memory\n allocation calls.\n\n We evaluated mempools as a backup when kmem_cache_alloc() fails\n and found that mempools are really not useful here because\n 1) We don\u0027t know for sure how much to reserve in advance\n 2) And mempools are not useful for GFP_ATOMIC case (as we call\n memory alloc functions with GFP_ATOMIC)\n\n (akpm: point 2 is wrong...)\n\nThe above description doesn\u0027t justify to waste system emergency memory\nat all. Non MM subsystem must not use PF_MEMALLOC. Memory reclaim need\nfew memory, anyone must not prevent it. Otherwise the system cause\nmysterious hang-up and/or OOM Killer invokation.\n\nPlus, akpm already pointed out what we should do.\n\nThen, this patch revert it.\n\nCc: Keshavamurthy Anil S \u003canil.s.keshavamurthy@intel.com\u003e\nSigned-off-by: KOSAKI Motohiro \u003ckosaki.motohiro@jp.fujitsu.com\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "1672af1164d3d50ba8908014fd34cc0b58afdc1e", "tree": "b485a7cfb4b305906bb19c145cd3e4ff9e1fe349", "parents": [ "44cd613c0e4cd93079ea2a93aa06649d8ca0830a" ], "author": { "name": "Chris Wright", "email": "chrisw@sous-sol.org", "time": "Wed Dec 02 12:06:34 2009 -0800" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 10:03:25 2009 +0000" }, "message": "intel-iommu: ignore page table validation in pass through mode\n\nWe are seeing a bug when booting w/ iommu\u003dpt with current upstream\n(bisect blames 19943b0e30b05d42e494ae6fef78156ebc8c637e \"intel-iommu:\nUnify hardware and software passthrough support).\n\nThe issue is specific to this loop during identity map initialization\nof each device:\n\ndomain_context_mapping_one(si_domain, ..., CONTEXT_TT_PASS_THROUGH)\n...\n\t\t/* Skip top levels of page tables for\n\t\t* iommu which has less agaw than default.\n\t\t*/\n\t\tfor (agaw \u003d domain-\u003eagaw; agaw !\u003d iommu-\u003eagaw; agaw--) {\n\t\t\tpgd \u003d phys_to_virt(dma_pte_addr(pgd));\n\t\t\tif (!dma_pte_present(pgd)) { \u003c------ failing here\n\t\t\t\tspin_unlock_irqrestore(\u0026iommu-\u003elock, flags);\n\t\t\treturn -ENOMEM;\n\t\t}\n\nThis box has 2 iommu\u0027s in it. The catchall iommu has MGAW \u003d\u003d 48, and\nSAGAW \u003d\u003d 4. The other iommu has MGAW \u003d\u003d 39, SAGAW \u003d\u003d 2.\n\nThe device that\u0027s failing the above pgd test is the only device connected\nto the non-catchall iommu, which has a smaller address width than the\ndomain default. This test is not necessary since the context is in PT\nmode and the ASR is ignored.\n\nThanks to Don Dutile for discovering and debugging this one.\n\nCc: stable@kernel.org\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "44cd613c0e4cd93079ea2a93aa06649d8ca0830a", "tree": "63eb3d5b97569d4db7fa3eb47201d77eaaccaf46", "parents": [ "5595b528b49a702c0428c0762bab60999648254c" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Dec 02 10:18:30 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 10:03:06 2009 +0000" }, "message": "intel-iommu: Fix oops with intel_iommu\u003digfx_off\n\nThe hotplug notifier will call find_domain() to see if the device in\nquestion has been assigned an IOMMU domain. However, this should never\nbe called for devices with a \"dummy\" domain, such as graphics devices\nwhen intel_iommu\u003digfx_off is set and the corresponding IOMMU isn\u0027t even\ninitialised. If you do that, it\u0027ll oops as it dereferences the (-1)\npointer.\n\nThe notifier function should check iommu_no_mapping() for the\ndevice before doing anything else.\n\nCc: stable@kernel.org\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "5595b528b49a702c0428c0762bab60999648254c", "tree": "aa6c04a00e90eb7ac91e24aa295fc2022de4161d", "parents": [ "6ecbf01c7ce4c0f4c3bdfa0e64ac6258328fda6c" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Dec 02 09:21:55 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 10:02:52 2009 +0000" }, "message": "intel-iommu: Check for an RMRR which ends before it starts.\n\nSome HP BIOSes report an RMRR region (a region which needs a 1:1 mapping\nin the IOMMU for a given device) which has an end address lower than its\nstart address. Detect that and warn, rather than triggering the\nBUG() in dma_pte_clear_range().\n\nCc: stable@kernel.org\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "6ecbf01c7ce4c0f4c3bdfa0e64ac6258328fda6c", "tree": "91b5c5cdf8aa7a3f4dea1c8ae46a98765fdd9a6f", "parents": [ "2c99220810c1c79322034628b993573b088ff2da" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Wed Dec 02 09:20:27 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 10:02:39 2009 +0000" }, "message": "intel-iommu: Apply BIOS sanity checks for interrupt remapping too.\n\nThe BIOS errors where an IOMMU is reported either at zero or a bogus\naddress are causing problems even when the IOMMU is disabled -- because\ninterrupt remapping uses the same hardware. Ensure that the checks get\napplied for the interrupt remapping initialisation too.\n\nCc: stable@kernel.org\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "2c99220810c1c79322034628b993573b088ff2da", "tree": "0b5e69d0ad7a6da667b752ffd727781c875cccff", "parents": [ "ec208491936d6adb8a70c3dd4a517cdfe54e823d" ], "author": { "name": "Chris Wright", "email": "chrisw@sous-sol.org", "time": "Wed Dec 02 09:17:13 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 10:02:15 2009 +0000" }, "message": "intel-iommu: Detect DMAR in hyperspace at probe time.\n\nMany BIOSes will lie to us about the existence of an IOMMU, and claim\nthat there is one at an address which actually returns all 0xFF.\n\nWe need to detect this early, so that we know we don\u0027t have a viable\nIOMMU and can set up swiotlb before it\u0027s too late.\n\nCc: stable@kernel.org\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nSigned-off-by: David Woodhouse \u003cDavid.Woodhouse@intel.com\u003e\n" }, { "commit": "ec208491936d6adb8a70c3dd4a517cdfe54e823d", "tree": "c7291450e8e559c5fbf3360df30999432204af3c", "parents": [ "aa697079ee66315c4b9747a5eb3e48487fb1b8be", "7b626acb8f983eb83b396ab96cc24b18d635d487" ], "author": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 09:58:33 2009 +0000" }, "committer": { "name": "David Woodhouse", "email": "David.Woodhouse@intel.com", "time": "Tue Dec 08 09:59:24 2009 +0000" }, "message": "Merge branch \u0027master\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6\n\nMerge the BIOS workarounds from 2.6.32, and the swiotlb fallback on failure.\n" }, { "commit": "7b626acb8f983eb83b396ab96cc24b18d635d487", "tree": "8c3320191311e6186d3aa722f1acd12acd47ece8", "parents": [ "1ebb275afcf5a47092e995541d6c604eef96062a", "4528752f49c1f4025473d12bc5fa9181085c3f22" ], "author": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Dec 05 09:49:07 2009 -0800" }, "committer": { "name": "Linus Torvalds", "email": "torvalds@linux-foundation.org", "time": "Sat Dec 05 09:49:07 2009 -0800" }, "message": "Merge branch \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip\n\n* \u0027core-iommu-for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (63 commits)\n x86, Calgary IOMMU quirk: Find nearest matching Calgary while walking up the PCI tree\n x86/amd-iommu: Remove amd_iommu_pd_table\n x86/amd-iommu: Move reset_iommu_command_buffer out of locked code\n x86/amd-iommu: Cleanup DTE flushing code\n x86/amd-iommu: Introduce iommu_flush_device() function\n x86/amd-iommu: Cleanup attach/detach_device code\n x86/amd-iommu: Keep devices per domain in a list\n x86/amd-iommu: Add device bind reference counting\n x86/amd-iommu: Use dev-\u003earch-\u003eiommu to store iommu related information\n x86/amd-iommu: Remove support for domain sharing\n x86/amd-iommu: Rearrange dma_ops related functions\n x86/amd-iommu: Move some pte allocation functions in the right section\n x86/amd-iommu: Remove iommu parameter from dma_ops_domain_alloc\n x86/amd-iommu: Use get_device_id and check_device where appropriate\n x86/amd-iommu: Move find_protection_domain to helper functions\n x86/amd-iommu: Simplify get_device_resources()\n x86/amd-iommu: Let domain_for_device handle aliases\n x86/amd-iommu: Remove iommu specific handling from dma_ops path\n x86/amd-iommu: Remove iommu parameter from __(un)map_single\n x86/amd-iommu: Make alloc_new_range aware of multiple IOMMUs\n ...\n" }, { "commit": "9e0b5b2c447ad0caa075a5cfef86def62e1782ff", "tree": "ef8f5d5646ea7d1cd6cba366c5588b9c93ac61ff", "parents": [ "5d990b627537e59a3a2f039ff588a4750e9c1a6a" ], "author": { "name": "Kleber Sacilotto de Souza", "email": "klebers@linux.vnet.ibm.com", "time": "Wed Nov 25 00:55:51 2009 -0200" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Dec 04 16:21:02 2009 -0800" }, "message": "PCI: fix coding style issue in pci_save_state()\n\nRemove a stray space in pci_save_state().\n\nSigned-off-by: Kleber Sacilotto de Souza \u003cklebers@linux.vnet.ibm.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "5d990b627537e59a3a2f039ff588a4750e9c1a6a", "tree": "8c0e723c3f9146da52b30c087a80fc417df2b41b", "parents": [ "b26a34aa4792b3db2500b8a98cb7702765c1a92e" ], "author": { "name": "Chris Wright", "email": "chrisw@sous-sol.org", "time": "Fri Dec 04 12:15:21 2009 -0800" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Dec 04 16:19:24 2009 -0800" }, "message": "PCI: add pci_request_acs\n\nCommit ae21ee65e8bc228416bbcc8a1da01c56a847a60c \"PCI: acs p2p upsteram\nforwarding enabling\" doesn\u0027t actually enable ACS.\n\nAdd a function to pci core to allow an IOMMU to request that ACS\nbe enabled. The existing mechanism of using iommu_found() in the pci\ncore to know when ACS should be enabled doesn\u0027t actually work due to\ninitialization order; iommu has only been detected not initialized.\n\nHave Intel and AMD IOMMUs request ACS, and Xen does as well during early\ninit of dom0.\n\nCc: Allen Kay \u003callen.m.kay@intel.com\u003e\nCc: David Woodhouse \u003cdwmw2@infradead.org\u003e\nCc: Jeremy Fitzhardinge \u003cjeremy@goop.org\u003e\nCc: Joerg Roedel \u003cjoerg.roedel@amd.com\u003e\nSigned-off-by: Chris Wright \u003cchrisw@sous-sol.org\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "b26a34aa4792b3db2500b8a98cb7702765c1a92e", "tree": "2a34bad3bce325dabc1a3aafbe225c62cee3dd77", "parents": [ "638bba08282fb50ba4ebde073ad70551b929e0f2" ], "author": { "name": "Kenji Kaneshige", "email": "kaneshige.kenji@jp.fujitsu.com", "time": "Fri Nov 06 11:25:13 2009 +0900" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Dec 04 16:09:59 2009 -0800" }, "message": "PCI: fix BUG_ON triggered by logical PCIe root port removal\n\nThis problem happened when removing PCIe root port using PCI logical\nhotplug operation.\n\nThe immediate cause of this problem is that the pointer to invalid\ndata structure is passed to pcie_update_aspm_capable() by\npcie_aspm_exit_link_state(). When pcie_aspm_exit_link_state() received\na pointer to root port link, it unconfigures the root port link and\nfrees its data structure at first. At this point, there are not links\nto configure under the root port and the data structure for root port\nlink is already freed. So pcie_aspm_exit_link_state() must not call\npcie_update_aspm_capable() and pcie_config_aspm_path().\n\nThis patch fixes the problem by changing pcie_aspm_exit_link_state()\nnot to call pcie_update_aspm_capable() and pcie_config_aspm_path() if\nthe specified link is root port link.\n\n------------[ cut here ]------------\nkernel BUG at drivers/pci/pcie/aspm.c:606!\ninvalid opcode: 0000 [#1] SMP DEBUG_PAGEALLOC\nlast sysfs file: /sys/devices/pci0000:40/0000:40:13.0/remove\nCPU 1\nModules linked in: shpchp\nPid: 9345, comm: sysfsd Not tainted 2.6.32-rc5 #98 ProLiant DL785 G6\nRIP: 0010:[\u003cffffffff811df69b\u003e] [\u003cffffffff811df69b\u003e] pcie_update_aspm_capable+0x15/0xbe\nRSP: 0018:ffff88082a2f5ca0 EFLAGS: 00010202\nRAX: 0000000000000e77 RBX: ffff88182cc3e000 RCX: ffff88082a33d006\nRDX: 0000000000000001 RSI: ffffffff811dff4a RDI: ffff88182cc3e000\nRBP: ffff88082a2f5cc0 R08: ffff88182cc3e000 R09: 0000000000000000\nR10: ffff88182fc00180 R11: ffff88182fc00198 R12: ffff88182cc3e000\nR13: 0000000000000000 R14: ffff88182cc3e000 R15: ffff88082a2f5e20\nFS: 00007f259a64b6f0(0000) GS:ffff880864600000(0000) knlGS:0000000000000000\nCS: 0010 DS: 0018 ES: 0018 CR0: 000000008005003b\nCR2: 00007feb53f73da0 CR3: 000000102cc94000 CR4: 00000000000006e0\nDR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000\nDR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400\nProcess sysfsd (pid: 9345, threadinfo ffff88082a2f4000, task ffff88082a33cf00)\nStack:\n ffff88182cc3e000 ffff88182cc3e000 0000000000000000 ffff88082a33cf00\n\u003c0\u003e ffff88082a2f5cf0 ffffffff811dff52 ffff88082a2f5cf0 ffff88082c525168\n\u003c0\u003e ffff88402c9fd2f8 ffff88402c9fd2f8 ffff88082a2f5d20 ffffffff811d7db2\nCall Trace:\n [\u003cffffffff811dff52\u003e] pcie_aspm_exit_link_state+0xf5/0x11e\n [\u003cffffffff811d7db2\u003e] pci_stop_bus_device+0x76/0x7e\n [\u003cffffffff811d7d67\u003e] pci_stop_bus_device+0x2b/0x7e\n [\u003cffffffff811d7e4f\u003e] pci_remove_bus_device+0x15/0xb9\n [\u003cffffffff811dcb8c\u003e] remove_callback+0x29/0x3a\n [\u003cffffffff81135aeb\u003e] sysfs_schedule_callback_work+0x15/0x6d\n [\u003cffffffff81072790\u003e] worker_thread+0x19d/0x298\n [\u003cffffffff8107273b\u003e] ? worker_thread+0x148/0x298\n [\u003cffffffff81135ad6\u003e] ? sysfs_schedule_callback_work+0x0/0x6d\n [\u003cffffffff810765c0\u003e] ? autoremove_wake_function+0x0/0x38\n [\u003cffffffff810725f3\u003e] ? worker_thread+0x0/0x298\n [\u003cffffffff8107629e\u003e] kthread+0x7d/0x85\n [\u003cffffffff8102eafa\u003e] child_rip+0xa/0x20\n [\u003cffffffff8102e4bc\u003e] ? restore_args+0x0/0x30\n [\u003cffffffff81076221\u003e] ? kthread+0x0/0x85\n [\u003cffffffff8102eaf0\u003e] ? child_rip+0x0/0x20\nCode: 89 e5 8a 50 48 31 c0 c0 ea 03 83 e2 07 e8 b2 de fe ff c9 48 98 c3 55 48 89 e5 41 56 49 89 fe 41 55 41 54 53 48 83 7f 10 00 74 04 \u003c0f\u003e 0b eb fe 48 8b 05 da 7d 63 00 4c 8d 60 e8 4c 89 e1 eb 24 4c\nRIP [\u003cffffffff811df69b\u003e] pcie_update_aspm_capable+0x15/0xbe\n RSP \u003cffff88082a2f5ca0\u003e\n---[ end trace 6ae0f65bdeab8555 ]---\n\nReported-by: Alex Chiang \u003cachiang@hp.com\u003e\nTested-by: Alex Chiang \u003cachiang@hp.com\u003e\nSigned-off-by: Kenji Kaneshige \u003ckaneshige.kenji@jp.fujitsu.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" }, { "commit": "638bba08282fb50ba4ebde073ad70551b929e0f2", "tree": "ba517f15b67b9f5329d6167df27d6198d1a798b0", "parents": [ "6cdfd995a65a52e05b99e3a72a9b979abe73b312" ], "author": { "name": "Andrew Patterson", "email": "andrew.patterson@hp.com", "time": "Thu Dec 03 10:28:25 2009 -0700" }, "committer": { "name": "Jesse Barnes", "email": "jbarnes@virtuousgeek.org", "time": "Fri Dec 04 16:03:19 2009 -0800" }, "message": "PCI: remove ifdefed pci_cleanup_aer_correct_error_status\n\nThe pci_cleanup_aer_correct_error_status() function has been\n#if 0\u0027d out since 2.6.25. Time to remove the dead code.\n\nSigned-off-by: Andrew Patterson \u003candrew.patterson@hp.com\u003e\nSigned-off-by: Jesse Barnes \u003cjbarnes@virtuousgeek.org\u003e\n" } ], "next": "6cdfd995a65a52e05b99e3a72a9b979abe73b312" }